1 /* $FreeBSD$ */ 2 /*- 3 * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * substantially similar to the "NO WARRANTY" disclaimer below 13 * ("Disclaimer") and any redistribution must be conditioned upon including 14 * a substantially similar Disclaimer requirement for further binary 15 * redistribution. 16 * 3. Neither the name of the LSI Logic Corporation nor the names of its 17 * contributors may be used to endorse or promote products derived from 18 * this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 30 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * Name: mpi_init.h 33 * Title: MPI initiator mode messages and structures 34 * Creation Date: June 8, 2000 35 * 36 * mpi_init.h Version: 01.05.06 37 * 38 * Version History 39 * --------------- 40 * 41 * Date Version Description 42 * -------- -------- ------------------------------------------------------ 43 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 44 * 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY. 45 * 06-06-00 01.00.01 Update version number for 1.0 release. 46 * 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions. 47 * 11-02-00 01.01.01 Original release for post 1.0 work. 48 * 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT. 49 * 02-20-01 01.01.03 Started using MPI_POINTER. 50 * 03-27-01 01.01.04 Added structure offset comments. 51 * 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT. 52 * 08-08-01 01.02.01 Original release for v1.2 work. 53 * 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET. 54 * Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for 55 * MSG_SCSI_IO_REPLY. 56 * 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure 57 * Processor messages. 58 * 10-04-01 01.02.04 Added defines for SEP request Action field. 59 * 05-31-02 01.02.05 Added MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR define 60 * for SCSI IO requests. 61 * 11-15-02 01.02.06 Added special extended SCSI Status defines for FCP. 62 * 06-26-03 01.02.07 Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define. 63 * 05-11-04 01.03.01 Original release for MPI v1.3. 64 * 08-19-04 01.05.01 Added MsgFlags defines for EEDP to SCSI IO request. 65 * Added new word to MSG_SCSI_IO_REPLY to add TaskTag field 66 * and a reserved U16. 67 * Added new MSG_SCSI_IO32_REQUEST structure. 68 * Added a TaskType of Clear Task Set to SCSI 69 * Task Management request. 70 * 12-07-04 01.05.02 Added support for Task Management Query Task. 71 * 01-15-05 01.05.03 Modified SCSI Enclosure Processor Request to support 72 * WWID addressing. 73 * 03-11-05 01.05.04 Removed EEDP flags from SCSI IO Request. 74 * Removed SCSI IO 32 Request. 75 * Modified SCSI Enclosure Processor Request and Reply to 76 * support Enclosure/Slot addressing rather than WWID 77 * addressing. 78 * 06-24-05 01.05.05 Added SCSI IO 32 structures and defines. 79 * Added four new defines for SEP SlotStatus. 80 * 08-03-05 01.05.06 Fixed some MPI_SCSIIO32_MSGFLGS_ defines to make them 81 * unique in the first 32 characters. 82 * -------------------------------------------------------------------------- 83 */ 84 85 #ifndef MPI_INIT_H 86 #define MPI_INIT_H 87 88 89 /***************************************************************************** 90 * 91 * S C S I I n i t i a t o r M e s s a g e s 92 * 93 *****************************************************************************/ 94 95 /****************************************************************************/ 96 /* SCSI IO messages and associated structures */ 97 /****************************************************************************/ 98 99 typedef struct _MSG_SCSI_IO_REQUEST 100 { 101 U8 TargetID; /* 00h */ 102 U8 Bus; /* 01h */ 103 U8 ChainOffset; /* 02h */ 104 U8 Function; /* 03h */ 105 U8 CDBLength; /* 04h */ 106 U8 SenseBufferLength; /* 05h */ 107 U8 Reserved; /* 06h */ 108 U8 MsgFlags; /* 07h */ 109 U32 MsgContext; /* 08h */ 110 U8 LUN[8]; /* 0Ch */ 111 U32 Control; /* 14h */ 112 U8 CDB[16]; /* 18h */ 113 U32 DataLength; /* 28h */ 114 U32 SenseBufferLowAddr; /* 2Ch */ 115 SGE_IO_UNION SGL; /* 30h */ 116 } MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST, 117 SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t; 118 119 120 /* SCSI IO MsgFlags bits */ 121 122 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01) 123 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00) 124 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01) 125 126 #define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02) 127 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00) 128 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02) 129 130 #define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04) 131 132 /* SCSI IO LUN fields */ 133 134 #define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) 135 #define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) 136 #define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) 137 #define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) 138 #define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00) 139 #define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00) 140 141 /* SCSI IO Control bits */ 142 143 #define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000) 144 #define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000) 145 #define MPI_SCSIIO_CONTROL_WRITE (0x01000000) 146 #define MPI_SCSIIO_CONTROL_READ (0x02000000) 147 148 #define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000) 149 #define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26) 150 151 #define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700) 152 #define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000) 153 #define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100) 154 #define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200) 155 #define MPI_SCSIIO_CONTROL_ACAQ (0x00000400) 156 #define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500) 157 #define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700) 158 159 #define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000) 160 #define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000) 161 #define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000) 162 #define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000) 163 #define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000) 164 #define MPI_SCSIIO_CONTROL_RESERVED (0x00080000) 165 #define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000) 166 #define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000) 167 #define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000) 168 169 170 /* SCSI IO reply structure */ 171 typedef struct _MSG_SCSI_IO_REPLY 172 { 173 U8 TargetID; /* 00h */ 174 U8 Bus; /* 01h */ 175 U8 MsgLength; /* 02h */ 176 U8 Function; /* 03h */ 177 U8 CDBLength; /* 04h */ 178 U8 SenseBufferLength; /* 05h */ 179 U8 Reserved; /* 06h */ 180 U8 MsgFlags; /* 07h */ 181 U32 MsgContext; /* 08h */ 182 U8 SCSIStatus; /* 0Ch */ 183 U8 SCSIState; /* 0Dh */ 184 U16 IOCStatus; /* 0Eh */ 185 U32 IOCLogInfo; /* 10h */ 186 U32 TransferCount; /* 14h */ 187 U32 SenseCount; /* 18h */ 188 U32 ResponseInfo; /* 1Ch */ 189 U16 TaskTag; /* 20h */ 190 U16 Reserved1; /* 22h */ 191 } MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY, 192 SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t; 193 194 195 /* SCSI IO Reply SCSIStatus values (SAM-2 status codes) */ 196 197 #define MPI_SCSI_STATUS_SUCCESS (0x00) 198 #define MPI_SCSI_STATUS_CHECK_CONDITION (0x02) 199 #define MPI_SCSI_STATUS_CONDITION_MET (0x04) 200 #define MPI_SCSI_STATUS_BUSY (0x08) 201 #define MPI_SCSI_STATUS_INTERMEDIATE (0x10) 202 #define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14) 203 #define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18) 204 #define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22) 205 #define MPI_SCSI_STATUS_TASK_SET_FULL (0x28) 206 #define MPI_SCSI_STATUS_ACA_ACTIVE (0x30) 207 208 #define MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT (0x80) 209 #define MPI_SCSI_STATUS_FCPEXT_NO_LINK (0x81) 210 #define MPI_SCSI_STATUS_FCPEXT_UNASSIGNED (0x82) 211 212 213 /* SCSI IO Reply SCSIState values */ 214 215 #define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01) 216 #define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02) 217 #define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04) 218 #define MPI_SCSI_STATE_TERMINATED (0x08) 219 #define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10) 220 #define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20) 221 222 /* SCSI IO Reply ResponseInfo values */ 223 /* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */ 224 225 #define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000) 226 #define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000) 227 #define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000) 228 #define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000) 229 #define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000) 230 #define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000) 231 #define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000) 232 233 #define MPI_SCSI_TASKTAG_UNKNOWN (0xFFFF) 234 235 236 /****************************************************************************/ 237 /* SCSI IO 32 messages and associated structures */ 238 /****************************************************************************/ 239 240 typedef struct 241 { 242 U8 CDB[20]; /* 00h */ 243 U32 PrimaryReferenceTag; /* 14h */ 244 U16 PrimaryApplicationTag; /* 18h */ 245 U16 PrimaryApplicationTagMask; /* 1Ah */ 246 U32 TransferLength; /* 1Ch */ 247 } MPI_SCSI_IO32_CDB_EEDP32, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP32, 248 MpiScsiIo32CdbEedp32_t, MPI_POINTER pMpiScsiIo32CdbEedp32_t; 249 250 typedef struct 251 { 252 U8 CDB[16]; /* 00h */ 253 U32 DataLength; /* 10h */ 254 U32 PrimaryReferenceTag; /* 14h */ 255 U16 PrimaryApplicationTag; /* 18h */ 256 U16 PrimaryApplicationTagMask; /* 1Ah */ 257 U32 TransferLength; /* 1Ch */ 258 } MPI_SCSI_IO32_CDB_EEDP16, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP16, 259 MpiScsiIo32CdbEedp16_t, MPI_POINTER pMpiScsiIo32CdbEedp16_t; 260 261 typedef union 262 { 263 U8 CDB32[32]; 264 MPI_SCSI_IO32_CDB_EEDP32 EEDP32; 265 MPI_SCSI_IO32_CDB_EEDP16 EEDP16; 266 SGE_SIMPLE_UNION SGE; 267 } MPI_SCSI_IO32_CDB_UNION, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_UNION, 268 MpiScsiIo32Cdb_t, MPI_POINTER pMpiScsiIo32Cdb_t; 269 270 typedef struct 271 { 272 U8 TargetID; /* 00h */ 273 U8 Bus; /* 01h */ 274 U16 Reserved1; /* 02h */ 275 U32 Reserved2; /* 04h */ 276 } MPI_SCSI_IO32_BUS_TARGET_ID_FORM, MPI_POINTER PTR_MPI_SCSI_IO32_BUS_TARGET_ID_FORM, 277 MpiScsiIo32BusTargetIdForm_t, MPI_POINTER pMpiScsiIo32BusTargetIdForm_t; 278 279 typedef union 280 { 281 MPI_SCSI_IO32_BUS_TARGET_ID_FORM SCSIID; 282 U64 WWID; 283 } MPI_SCSI_IO32_ADDRESS, MPI_POINTER PTR_MPI_SCSI_IO32_ADDRESS, 284 MpiScsiIo32Address_t, MPI_POINTER pMpiScsiIo32Address_t; 285 286 typedef struct _MSG_SCSI_IO32_REQUEST 287 { 288 U8 Port; /* 00h */ 289 U8 Reserved1; /* 01h */ 290 U8 ChainOffset; /* 02h */ 291 U8 Function; /* 03h */ 292 U8 CDBLength; /* 04h */ 293 U8 SenseBufferLength; /* 05h */ 294 U8 Flags; /* 06h */ 295 U8 MsgFlags; /* 07h */ 296 U32 MsgContext; /* 08h */ 297 U8 LUN[8]; /* 0Ch */ 298 U32 Control; /* 14h */ 299 MPI_SCSI_IO32_CDB_UNION CDB; /* 18h */ 300 U32 DataLength; /* 38h */ 301 U32 BidirectionalDataLength; /* 3Ch */ 302 U32 SecondaryReferenceTag; /* 40h */ 303 U16 SecondaryApplicationTag; /* 44h */ 304 U16 Reserved2; /* 46h */ 305 U16 EEDPFlags; /* 48h */ 306 U16 ApplicationTagTranslationMask; /* 4Ah */ 307 U32 EEDPBlockSize; /* 4Ch */ 308 MPI_SCSI_IO32_ADDRESS DeviceAddress; /* 50h */ 309 U8 SGLOffset0; /* 58h */ 310 U8 SGLOffset1; /* 59h */ 311 U8 SGLOffset2; /* 5Ah */ 312 U8 SGLOffset3; /* 5Bh */ 313 U32 Reserved3; /* 5Ch */ 314 U32 Reserved4; /* 60h */ 315 U32 SenseBufferLowAddr; /* 64h */ 316 SGE_IO_UNION SGL; /* 68h */ 317 } MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST, 318 SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t; 319 320 /* SCSI IO 32 MsgFlags bits */ 321 #define MPI_SCSIIO32_MSGFLGS_SENSE_WIDTH (0x01) 322 #define MPI_SCSIIO32_MSGFLGS_32_SENSE_WIDTH (0x00) 323 #define MPI_SCSIIO32_MSGFLGS_64_SENSE_WIDTH (0x01) 324 325 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOCATION (0x02) 326 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_HOST (0x00) 327 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_IOC (0x02) 328 329 #define MPI_SCSIIO32_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04) 330 #define MPI_SCSIIO32_MSGFLGS_SGL_OFFSETS_CHAINS (0x08) 331 #define MPI_SCSIIO32_MSGFLGS_MULTICAST (0x10) 332 #define MPI_SCSIIO32_MSGFLGS_BIDIRECTIONAL (0x20) 333 #define MPI_SCSIIO32_MSGFLGS_LARGE_CDB (0x40) 334 335 /* SCSI IO 32 Flags bits */ 336 #define MPI_SCSIIO32_FLAGS_FORM_MASK (0x03) 337 #define MPI_SCSIIO32_FLAGS_FORM_SCSIID (0x00) 338 #define MPI_SCSIIO32_FLAGS_FORM_WWID (0x01) 339 340 /* SCSI IO 32 LUN fields */ 341 #define MPI_SCSIIO32_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) 342 #define MPI_SCSIIO32_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) 343 #define MPI_SCSIIO32_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) 344 #define MPI_SCSIIO32_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) 345 #define MPI_SCSIIO32_LUN_LEVEL_1_WORD (0xFF00) 346 #define MPI_SCSIIO32_LUN_LEVEL_1_DWORD (0x0000FF00) 347 348 /* SCSI IO 32 Control bits */ 349 #define MPI_SCSIIO32_CONTROL_DATADIRECTION_MASK (0x03000000) 350 #define MPI_SCSIIO32_CONTROL_NODATATRANSFER (0x00000000) 351 #define MPI_SCSIIO32_CONTROL_WRITE (0x01000000) 352 #define MPI_SCSIIO32_CONTROL_READ (0x02000000) 353 #define MPI_SCSIIO32_CONTROL_BIDIRECTIONAL (0x03000000) 354 355 #define MPI_SCSIIO32_CONTROL_ADDCDBLEN_MASK (0xFC000000) 356 #define MPI_SCSIIO32_CONTROL_ADDCDBLEN_SHIFT (26) 357 358 #define MPI_SCSIIO32_CONTROL_TASKATTRIBUTE_MASK (0x00000700) 359 #define MPI_SCSIIO32_CONTROL_SIMPLEQ (0x00000000) 360 #define MPI_SCSIIO32_CONTROL_HEADOFQ (0x00000100) 361 #define MPI_SCSIIO32_CONTROL_ORDEREDQ (0x00000200) 362 #define MPI_SCSIIO32_CONTROL_ACAQ (0x00000400) 363 #define MPI_SCSIIO32_CONTROL_UNTAGGED (0x00000500) 364 #define MPI_SCSIIO32_CONTROL_NO_DISCONNECT (0x00000700) 365 366 #define MPI_SCSIIO32_CONTROL_TASKMANAGE_MASK (0x00FF0000) 367 #define MPI_SCSIIO32_CONTROL_OBSOLETE (0x00800000) 368 #define MPI_SCSIIO32_CONTROL_CLEAR_ACA_RSV (0x00400000) 369 #define MPI_SCSIIO32_CONTROL_TARGET_RESET (0x00200000) 370 #define MPI_SCSIIO32_CONTROL_LUN_RESET_RSV (0x00100000) 371 #define MPI_SCSIIO32_CONTROL_RESERVED (0x00080000) 372 #define MPI_SCSIIO32_CONTROL_CLR_TASK_SET_RSV (0x00040000) 373 #define MPI_SCSIIO32_CONTROL_ABORT_TASK_SET (0x00020000) 374 #define MPI_SCSIIO32_CONTROL_RESERVED2 (0x00010000) 375 376 /* SCSI IO 32 EEDPFlags */ 377 #define MPI_SCSIIO32_EEDPFLAGS_MASK_OP (0x0007) 378 #define MPI_SCSIIO32_EEDPFLAGS_NOOP_OP (0x0000) 379 #define MPI_SCSIIO32_EEDPFLAGS_CHK_OP (0x0001) 380 #define MPI_SCSIIO32_EEDPFLAGS_STRIP_OP (0x0002) 381 #define MPI_SCSIIO32_EEDPFLAGS_CHKRM_OP (0x0003) 382 #define MPI_SCSIIO32_EEDPFLAGS_INSERT_OP (0x0004) 383 #define MPI_SCSIIO32_EEDPFLAGS_REPLACE_OP (0x0006) 384 #define MPI_SCSIIO32_EEDPFLAGS_CHKREGEN_OP (0x0007) 385 386 #define MPI_SCSIIO32_EEDPFLAGS_PASS_REF_TAG (0x0008) 387 #define MPI_SCSIIO32_EEDPFLAGS_8_9THS_MODE (0x0010) 388 389 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_MASK (0x0700) 390 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_GUARD (0x0100) 391 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_REFTAG (0x0200) 392 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_LBATAG (0x0400) 393 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_SHIFT (8) 394 395 #define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_APPTAG (0x1000) 396 #define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_APPTAG (0x2000) 397 #define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_REFTAG (0x4000) 398 #define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_REFTAG (0x8000) 399 400 401 /* SCSIIO32 IO reply structure */ 402 typedef struct _MSG_SCSIIO32_IO_REPLY 403 { 404 U8 Port; /* 00h */ 405 U8 Reserved1; /* 01h */ 406 U8 MsgLength; /* 02h */ 407 U8 Function; /* 03h */ 408 U8 CDBLength; /* 04h */ 409 U8 SenseBufferLength; /* 05h */ 410 U8 Flags; /* 06h */ 411 U8 MsgFlags; /* 07h */ 412 U32 MsgContext; /* 08h */ 413 U8 SCSIStatus; /* 0Ch */ 414 U8 SCSIState; /* 0Dh */ 415 U16 IOCStatus; /* 0Eh */ 416 U32 IOCLogInfo; /* 10h */ 417 U32 TransferCount; /* 14h */ 418 U32 SenseCount; /* 18h */ 419 U32 ResponseInfo; /* 1Ch */ 420 U16 TaskTag; /* 20h */ 421 U16 Reserved2; /* 22h */ 422 U32 BidirectionalTransferCount; /* 24h */ 423 } MSG_SCSIIO32_IO_REPLY, MPI_POINTER PTR_MSG_SCSIIO32_IO_REPLY, 424 SCSIIO32Reply_t, MPI_POINTER pSCSIIO32Reply_t; 425 426 427 /****************************************************************************/ 428 /* SCSI Task Management messages */ 429 /****************************************************************************/ 430 431 typedef struct _MSG_SCSI_TASK_MGMT 432 { 433 U8 TargetID; /* 00h */ 434 U8 Bus; /* 01h */ 435 U8 ChainOffset; /* 02h */ 436 U8 Function; /* 03h */ 437 U8 Reserved; /* 04h */ 438 U8 TaskType; /* 05h */ 439 U8 Reserved1; /* 06h */ 440 U8 MsgFlags; /* 07h */ 441 U32 MsgContext; /* 08h */ 442 U8 LUN[8]; /* 0Ch */ 443 U32 Reserved2[7]; /* 14h */ 444 U32 TaskMsgContext; /* 30h */ 445 } MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT, 446 SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t; 447 448 /* TaskType values */ 449 450 #define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01) 451 #define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02) 452 #define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03) 453 #define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04) 454 #define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05) 455 #define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06) 456 #define MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07) 457 458 /* MsgFlags bits */ 459 #define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00) 460 #define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02) 461 #define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04) 462 463 /* SCSI Task Management Reply */ 464 typedef struct _MSG_SCSI_TASK_MGMT_REPLY 465 { 466 U8 TargetID; /* 00h */ 467 U8 Bus; /* 01h */ 468 U8 MsgLength; /* 02h */ 469 U8 Function; /* 03h */ 470 U8 ResponseCode; /* 04h */ 471 U8 TaskType; /* 05h */ 472 U8 Reserved1; /* 06h */ 473 U8 MsgFlags; /* 07h */ 474 U32 MsgContext; /* 08h */ 475 U8 Reserved2[2]; /* 0Ch */ 476 U16 IOCStatus; /* 0Eh */ 477 U32 IOCLogInfo; /* 10h */ 478 U32 TerminationCount; /* 14h */ 479 } MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY, 480 SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t; 481 482 /* ResponseCode values */ 483 #define MPI_SCSITASKMGMT_RSP_TM_COMPLETE (0x00) 484 #define MPI_SCSITASKMGMT_RSP_INVALID_FRAME (0x02) 485 #define MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04) 486 #define MPI_SCSITASKMGMT_RSP_TM_FAILED (0x05) 487 #define MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08) 488 #define MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09) 489 #define MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80) 490 491 492 /****************************************************************************/ 493 /* SCSI Enclosure Processor messages */ 494 /****************************************************************************/ 495 496 typedef struct _MSG_SEP_REQUEST 497 { 498 U8 TargetID; /* 00h */ 499 U8 Bus; /* 01h */ 500 U8 ChainOffset; /* 02h */ 501 U8 Function; /* 03h */ 502 U8 Action; /* 04h */ 503 U8 Flags; /* 05h */ 504 U8 Reserved1; /* 06h */ 505 U8 MsgFlags; /* 07h */ 506 U32 MsgContext; /* 08h */ 507 U32 SlotStatus; /* 0Ch */ 508 U32 Reserved2; /* 10h */ 509 U32 Reserved3; /* 14h */ 510 U32 Reserved4; /* 18h */ 511 U16 Slot; /* 1Ch */ 512 U16 EnclosureHandle; /* 1Eh */ 513 } MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST, 514 SEPRequest_t, MPI_POINTER pSEPRequest_t; 515 516 /* Action defines */ 517 #define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00) 518 #define MPI_SEP_REQ_ACTION_READ_STATUS (0x01) 519 520 /* Flags defines */ 521 #define MPI_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01) 522 #define MPI_SEP_REQ_FLAGS_BUS_TARGETID_ADDRESS (0x00) 523 524 /* SlotStatus bits for MSG_SEP_REQUEST */ 525 #define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001) 526 #define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002) 527 #define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004) 528 #define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 529 #define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 530 #define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020) 531 #define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 532 #define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080) 533 #define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100) 534 #define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 535 #define MPI_SEP_REQ_SLOTSTATUS_REQ_CONSISTENCY_CHECK (0x00001000) 536 #define MPI_SEP_REQ_SLOTSTATUS_DISABLE (0x00002000) 537 #define MPI_SEP_REQ_SLOTSTATUS_REQ_RESERVED_DEVICE (0x00004000) 538 #define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 539 #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000) 540 #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000) 541 #define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000) 542 #define MPI_SEP_REQ_SLOTSTATUS_ACTIVE (0x00800000) 543 #define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000) 544 #define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000) 545 #define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000) 546 #define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000) 547 548 549 typedef struct _MSG_SEP_REPLY 550 { 551 U8 TargetID; /* 00h */ 552 U8 Bus; /* 01h */ 553 U8 MsgLength; /* 02h */ 554 U8 Function; /* 03h */ 555 U8 Action; /* 04h */ 556 U8 Reserved1; /* 05h */ 557 U8 Reserved2; /* 06h */ 558 U8 MsgFlags; /* 07h */ 559 U32 MsgContext; /* 08h */ 560 U16 Reserved3; /* 0Ch */ 561 U16 IOCStatus; /* 0Eh */ 562 U32 IOCLogInfo; /* 10h */ 563 U32 SlotStatus; /* 14h */ 564 U32 Reserved4; /* 18h */ 565 U16 Slot; /* 1Ch */ 566 U16 EnclosureHandle; /* 1Eh */ 567 } MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY, 568 SEPReply_t, MPI_POINTER pSEPReply_t; 569 570 /* SlotStatus bits for MSG_SEP_REPLY */ 571 #define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001) 572 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002) 573 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004) 574 #define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 575 #define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 576 #define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020) 577 #define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 578 #define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080) 579 #define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100) 580 #define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 581 #define MPI_SEP_REPLY_SLOTSTATUS_CONSISTENCY_CHECK (0x00001000) 582 #define MPI_SEP_REPLY_SLOTSTATUS_DISABLE (0x00002000) 583 #define MPI_SEP_REPLY_SLOTSTATUS_RESERVED_DEVICE (0x00004000) 584 #define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000) 585 #define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 586 #define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000) 587 #define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000) 588 #define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000) 589 #define MPI_SEP_REPLY_SLOTSTATUS_ACTIVE (0x00800000) 590 #define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000) 591 #define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000) 592 #define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000) 593 #define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000) 594 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000) 595 #define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000) 596 #define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000) 597 598 #endif 599