1 /*- 2 * Generic routines for LSI Fusion adapters. 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice immediately at the beginning of the file, without modification, 12 * this list of conditions, and the following disclaimer. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 /*- 29 * Copyright (c) 2002, 2006 by Matthew Jacob 30 * All rights reserved. 31 * 32 * Redistribution and use in source and binary forms, with or without 33 * modification, are permitted provided that the following conditions are 34 * met: 35 * 1. Redistributions of source code must retain the above copyright 36 * notice, this list of conditions and the following disclaimer. 37 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 38 * substantially similar to the "NO WARRANTY" disclaimer below 39 * ("Disclaimer") and any redistribution must be conditioned upon including 40 * a substantially similar Disclaimer requirement for further binary 41 * redistribution. 42 * 3. Neither the names of the above listed copyright holders nor the names 43 * of any contributors may be used to endorse or promote products derived 44 * from this software without specific prior written permission. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 47 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 49 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 50 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 56 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 * 58 * Support from Chris Ellsworth in order to make SAS adapters work 59 * is gratefully acknowledged. 60 * 61 * 62 * Support from LSI-Logic has also gone a great deal toward making this a 63 * workable subsystem and is gratefully acknowledged. 64 */ 65 /*- 66 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 67 * Copyright (c) 2005, WHEEL Sp. z o.o. 68 * Copyright (c) 2004, 2005 Justin T. Gibbs 69 * All rights reserved. 70 * 71 * Redistribution and use in source and binary forms, with or without 72 * modification, are permitted provided that the following conditions are 73 * met: 74 * 1. Redistributions of source code must retain the above copyright 75 * notice, this list of conditions and the following disclaimer. 76 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 77 * substantially similar to the "NO WARRANTY" disclaimer below 78 * ("Disclaimer") and any redistribution must be conditioned upon including 79 * a substantially similar Disclaimer requirement for further binary 80 * redistribution. 81 * 3. Neither the names of the above listed copyright holders nor the names 82 * of any contributors may be used to endorse or promote products derived 83 * from this software without specific prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 86 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 88 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 89 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 90 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 91 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 92 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 93 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 94 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 95 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 96 */ 97 98 #include <sys/cdefs.h> 99 __FBSDID("$FreeBSD$"); 100 101 #include <dev/mpt/mpt.h> 102 #include <dev/mpt/mpt_cam.h> /* XXX For static handler registration */ 103 #include <dev/mpt/mpt_raid.h> /* XXX For static handler registration */ 104 105 #include <dev/mpt/mpilib/mpi.h> 106 #include <dev/mpt/mpilib/mpi_ioc.h> 107 #include <dev/mpt/mpilib/mpi_fc.h> 108 #include <dev/mpt/mpilib/mpi_targ.h> 109 110 #include <sys/sysctl.h> 111 112 #define MPT_MAX_TRYS 3 113 #define MPT_MAX_WAIT 300000 114 115 static int maxwait_ack = 0; 116 static int maxwait_int = 0; 117 static int maxwait_state = 0; 118 119 static TAILQ_HEAD(, mpt_softc) mpt_tailq = TAILQ_HEAD_INITIALIZER(mpt_tailq); 120 mpt_reply_handler_t *mpt_reply_handlers[MPT_NUM_REPLY_HANDLERS]; 121 122 static mpt_reply_handler_t mpt_default_reply_handler; 123 static mpt_reply_handler_t mpt_config_reply_handler; 124 static mpt_reply_handler_t mpt_handshake_reply_handler; 125 static mpt_reply_handler_t mpt_event_reply_handler; 126 static void mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 127 MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context); 128 static int mpt_send_event_request(struct mpt_softc *mpt, int onoff); 129 static int mpt_soft_reset(struct mpt_softc *mpt); 130 static void mpt_hard_reset(struct mpt_softc *mpt); 131 static int mpt_configure_ioc(struct mpt_softc *mpt, int, int); 132 static int mpt_enable_ioc(struct mpt_softc *mpt, int); 133 134 /************************* Personality Module Support *************************/ 135 /* 136 * We include one extra entry that is guaranteed to be NULL 137 * to simplify our itterator. 138 */ 139 static struct mpt_personality *mpt_personalities[MPT_MAX_PERSONALITIES + 1]; 140 static __inline struct mpt_personality* 141 mpt_pers_find(struct mpt_softc *, u_int); 142 static __inline struct mpt_personality* 143 mpt_pers_find_reverse(struct mpt_softc *, u_int); 144 145 static __inline struct mpt_personality * 146 mpt_pers_find(struct mpt_softc *mpt, u_int start_at) 147 { 148 KASSERT(start_at <= MPT_MAX_PERSONALITIES, 149 ("mpt_pers_find: starting position out of range\n")); 150 151 while (start_at < MPT_MAX_PERSONALITIES 152 && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 153 start_at++; 154 } 155 return (mpt_personalities[start_at]); 156 } 157 158 /* 159 * Used infrequently, so no need to optimize like a forward 160 * traversal where we use the MAX+1 is guaranteed to be NULL 161 * trick. 162 */ 163 static __inline struct mpt_personality * 164 mpt_pers_find_reverse(struct mpt_softc *mpt, u_int start_at) 165 { 166 while (start_at < MPT_MAX_PERSONALITIES 167 && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 168 start_at--; 169 } 170 if (start_at < MPT_MAX_PERSONALITIES) 171 return (mpt_personalities[start_at]); 172 return (NULL); 173 } 174 175 #define MPT_PERS_FOREACH(mpt, pers) \ 176 for (pers = mpt_pers_find(mpt, /*start_at*/0); \ 177 pers != NULL; \ 178 pers = mpt_pers_find(mpt, /*start_at*/pers->id+1)) 179 180 #define MPT_PERS_FOREACH_REVERSE(mpt, pers) \ 181 for (pers = mpt_pers_find_reverse(mpt, MPT_MAX_PERSONALITIES-1);\ 182 pers != NULL; \ 183 pers = mpt_pers_find_reverse(mpt, /*start_at*/pers->id-1)) 184 185 static mpt_load_handler_t mpt_stdload; 186 static mpt_probe_handler_t mpt_stdprobe; 187 static mpt_attach_handler_t mpt_stdattach; 188 static mpt_enable_handler_t mpt_stdenable; 189 static mpt_ready_handler_t mpt_stdready; 190 static mpt_event_handler_t mpt_stdevent; 191 static mpt_reset_handler_t mpt_stdreset; 192 static mpt_shutdown_handler_t mpt_stdshutdown; 193 static mpt_detach_handler_t mpt_stddetach; 194 static mpt_unload_handler_t mpt_stdunload; 195 static struct mpt_personality mpt_default_personality = 196 { 197 .load = mpt_stdload, 198 .probe = mpt_stdprobe, 199 .attach = mpt_stdattach, 200 .enable = mpt_stdenable, 201 .ready = mpt_stdready, 202 .event = mpt_stdevent, 203 .reset = mpt_stdreset, 204 .shutdown = mpt_stdshutdown, 205 .detach = mpt_stddetach, 206 .unload = mpt_stdunload 207 }; 208 209 static mpt_load_handler_t mpt_core_load; 210 static mpt_attach_handler_t mpt_core_attach; 211 static mpt_enable_handler_t mpt_core_enable; 212 static mpt_reset_handler_t mpt_core_ioc_reset; 213 static mpt_event_handler_t mpt_core_event; 214 static mpt_shutdown_handler_t mpt_core_shutdown; 215 static mpt_shutdown_handler_t mpt_core_detach; 216 static mpt_unload_handler_t mpt_core_unload; 217 static struct mpt_personality mpt_core_personality = 218 { 219 .name = "mpt_core", 220 .load = mpt_core_load, 221 // .attach = mpt_core_attach, 222 // .enable = mpt_core_enable, 223 .event = mpt_core_event, 224 .reset = mpt_core_ioc_reset, 225 .shutdown = mpt_core_shutdown, 226 .detach = mpt_core_detach, 227 .unload = mpt_core_unload, 228 }; 229 230 /* 231 * Manual declaration so that DECLARE_MPT_PERSONALITY doesn't need 232 * ordering information. We want the core to always register FIRST. 233 * other modules are set to SI_ORDER_SECOND. 234 */ 235 static moduledata_t mpt_core_mod = { 236 "mpt_core", mpt_modevent, &mpt_core_personality 237 }; 238 DECLARE_MODULE(mpt_core, mpt_core_mod, SI_SUB_DRIVERS, SI_ORDER_FIRST); 239 MODULE_VERSION(mpt_core, 1); 240 241 #define MPT_PERS_ATTACHED(pers, mpt) ((mpt)->mpt_pers_mask & (0x1 << pers->id)) 242 243 int 244 mpt_modevent(module_t mod, int type, void *data) 245 { 246 struct mpt_personality *pers; 247 int error; 248 249 pers = (struct mpt_personality *)data; 250 251 error = 0; 252 switch (type) { 253 case MOD_LOAD: 254 { 255 mpt_load_handler_t **def_handler; 256 mpt_load_handler_t **pers_handler; 257 int i; 258 259 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 260 if (mpt_personalities[i] == NULL) 261 break; 262 } 263 if (i >= MPT_MAX_PERSONALITIES) { 264 error = ENOMEM; 265 break; 266 } 267 pers->id = i; 268 mpt_personalities[i] = pers; 269 270 /* Install standard/noop handlers for any NULL entries. */ 271 def_handler = MPT_PERS_FIRST_HANDLER(&mpt_default_personality); 272 pers_handler = MPT_PERS_FIRST_HANDLER(pers); 273 while (pers_handler <= MPT_PERS_LAST_HANDLER(pers)) { 274 if (*pers_handler == NULL) 275 *pers_handler = *def_handler; 276 pers_handler++; 277 def_handler++; 278 } 279 280 error = (pers->load(pers)); 281 if (error != 0) 282 mpt_personalities[i] = NULL; 283 break; 284 } 285 case MOD_SHUTDOWN: 286 break; 287 #if __FreeBSD_version >= 500000 288 case MOD_QUIESCE: 289 break; 290 #endif 291 case MOD_UNLOAD: 292 error = pers->unload(pers); 293 mpt_personalities[pers->id] = NULL; 294 break; 295 default: 296 error = EINVAL; 297 break; 298 } 299 return (error); 300 } 301 302 int 303 mpt_stdload(struct mpt_personality *pers) 304 { 305 /* Load is always successfull. */ 306 return (0); 307 } 308 309 int 310 mpt_stdprobe(struct mpt_softc *mpt) 311 { 312 /* Probe is always successfull. */ 313 return (0); 314 } 315 316 int 317 mpt_stdattach(struct mpt_softc *mpt) 318 { 319 /* Attach is always successfull. */ 320 return (0); 321 } 322 323 int 324 mpt_stdenable(struct mpt_softc *mpt) 325 { 326 /* Enable is always successfull. */ 327 return (0); 328 } 329 330 void 331 mpt_stdready(struct mpt_softc *mpt) 332 { 333 } 334 335 336 int 337 mpt_stdevent(struct mpt_softc *mpt, request_t *req, MSG_EVENT_NOTIFY_REPLY *msg) 338 { 339 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_stdevent: 0x%x\n", msg->Event & 0xFF); 340 /* Event was not for us. */ 341 return (0); 342 } 343 344 void 345 mpt_stdreset(struct mpt_softc *mpt, int type) 346 { 347 } 348 349 void 350 mpt_stdshutdown(struct mpt_softc *mpt) 351 { 352 } 353 354 void 355 mpt_stddetach(struct mpt_softc *mpt) 356 { 357 } 358 359 int 360 mpt_stdunload(struct mpt_personality *pers) 361 { 362 /* Unload is always successfull. */ 363 return (0); 364 } 365 366 /* 367 * Post driver attachment, we may want to perform some global actions. 368 * Here is the hook to do so. 369 */ 370 371 static void 372 mpt_postattach(void *unused) 373 { 374 struct mpt_softc *mpt; 375 struct mpt_personality *pers; 376 377 TAILQ_FOREACH(mpt, &mpt_tailq, links) { 378 MPT_PERS_FOREACH(mpt, pers) 379 pers->ready(mpt); 380 } 381 } 382 SYSINIT(mptdev, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE, mpt_postattach, NULL); 383 384 385 /******************************* Bus DMA Support ******************************/ 386 void 387 mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error) 388 { 389 struct mpt_map_info *map_info; 390 391 map_info = (struct mpt_map_info *)arg; 392 map_info->error = error; 393 map_info->phys = segs->ds_addr; 394 } 395 396 /**************************** Reply/Event Handling ****************************/ 397 int 398 mpt_register_handler(struct mpt_softc *mpt, mpt_handler_type type, 399 mpt_handler_t handler, uint32_t *phandler_id) 400 { 401 402 switch (type) { 403 case MPT_HANDLER_REPLY: 404 { 405 u_int cbi; 406 u_int free_cbi; 407 408 if (phandler_id == NULL) 409 return (EINVAL); 410 411 free_cbi = MPT_HANDLER_ID_NONE; 412 for (cbi = 0; cbi < MPT_NUM_REPLY_HANDLERS; cbi++) { 413 /* 414 * If the same handler is registered multiple 415 * times, don't error out. Just return the 416 * index of the original registration. 417 */ 418 if (mpt_reply_handlers[cbi] == handler.reply_handler) { 419 *phandler_id = MPT_CBI_TO_HID(cbi); 420 return (0); 421 } 422 423 /* 424 * Fill from the front in the hope that 425 * all registered handlers consume only a 426 * single cache line. 427 * 428 * We don't break on the first empty slot so 429 * that the full table is checked to see if 430 * this handler was previously registered. 431 */ 432 if (free_cbi == MPT_HANDLER_ID_NONE && 433 (mpt_reply_handlers[cbi] 434 == mpt_default_reply_handler)) 435 free_cbi = cbi; 436 } 437 if (free_cbi == MPT_HANDLER_ID_NONE) { 438 return (ENOMEM); 439 } 440 mpt_reply_handlers[free_cbi] = handler.reply_handler; 441 *phandler_id = MPT_CBI_TO_HID(free_cbi); 442 break; 443 } 444 default: 445 mpt_prt(mpt, "mpt_register_handler unknown type %d\n", type); 446 return (EINVAL); 447 } 448 return (0); 449 } 450 451 int 452 mpt_deregister_handler(struct mpt_softc *mpt, mpt_handler_type type, 453 mpt_handler_t handler, uint32_t handler_id) 454 { 455 456 switch (type) { 457 case MPT_HANDLER_REPLY: 458 { 459 u_int cbi; 460 461 cbi = MPT_CBI(handler_id); 462 if (cbi >= MPT_NUM_REPLY_HANDLERS 463 || mpt_reply_handlers[cbi] != handler.reply_handler) 464 return (ENOENT); 465 mpt_reply_handlers[cbi] = mpt_default_reply_handler; 466 break; 467 } 468 default: 469 mpt_prt(mpt, "mpt_deregister_handler unknown type %d\n", type); 470 return (EINVAL); 471 } 472 return (0); 473 } 474 475 static int 476 mpt_default_reply_handler(struct mpt_softc *mpt, request_t *req, 477 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 478 { 479 mpt_prt(mpt, 480 "Default Handler Called: req=%p:%u reply_descriptor=%x frame=%p\n", 481 req, req->serno, reply_desc, reply_frame); 482 483 if (reply_frame != NULL) 484 mpt_dump_reply_frame(mpt, reply_frame); 485 486 mpt_prt(mpt, "Reply Frame Ignored\n"); 487 488 return (/*free_reply*/TRUE); 489 } 490 491 static int 492 mpt_config_reply_handler(struct mpt_softc *mpt, request_t *req, 493 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 494 { 495 if (req != NULL) { 496 497 if (reply_frame != NULL) { 498 MSG_CONFIG *cfgp; 499 MSG_CONFIG_REPLY *reply; 500 501 cfgp = (MSG_CONFIG *)req->req_vbuf; 502 reply = (MSG_CONFIG_REPLY *)reply_frame; 503 req->IOCStatus = le16toh(reply_frame->IOCStatus); 504 bcopy(&reply->Header, &cfgp->Header, 505 sizeof(cfgp->Header)); 506 cfgp->ExtPageLength = reply->ExtPageLength; 507 cfgp->ExtPageType = reply->ExtPageType; 508 } 509 req->state &= ~REQ_STATE_QUEUED; 510 req->state |= REQ_STATE_DONE; 511 TAILQ_REMOVE(&mpt->request_pending_list, req, links); 512 if ((req->state & REQ_STATE_NEED_WAKEUP) != 0) { 513 wakeup(req); 514 } else if ((req->state & REQ_STATE_TIMEDOUT) != 0) { 515 /* 516 * Whew- we can free this request (late completion) 517 */ 518 mpt_free_request(mpt, req); 519 } 520 } 521 522 return (TRUE); 523 } 524 525 static int 526 mpt_handshake_reply_handler(struct mpt_softc *mpt, request_t *req, 527 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 528 { 529 /* Nothing to be done. */ 530 return (TRUE); 531 } 532 533 static int 534 mpt_event_reply_handler(struct mpt_softc *mpt, request_t *req, 535 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame) 536 { 537 int free_reply; 538 539 KASSERT(reply_frame != NULL, ("null reply in mpt_event_reply_handler")); 540 KASSERT(req != NULL, ("null request in mpt_event_reply_handler")); 541 542 free_reply = TRUE; 543 switch (reply_frame->Function) { 544 case MPI_FUNCTION_EVENT_NOTIFICATION: 545 { 546 MSG_EVENT_NOTIFY_REPLY *msg; 547 struct mpt_personality *pers; 548 u_int handled; 549 550 handled = 0; 551 msg = (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 552 msg->EventDataLength = le16toh(msg->EventDataLength); 553 msg->IOCStatus = le16toh(msg->IOCStatus); 554 msg->IOCLogInfo = le32toh(msg->IOCLogInfo); 555 msg->Event = le32toh(msg->Event); 556 MPT_PERS_FOREACH(mpt, pers) 557 handled += pers->event(mpt, req, msg); 558 559 if (handled == 0 && mpt->mpt_pers_mask == 0) { 560 mpt_lprt(mpt, MPT_PRT_INFO, 561 "No Handlers For Any Event Notify Frames. " 562 "Event %#x (ACK %sequired).\n", 563 msg->Event, msg->AckRequired? "r" : "not r"); 564 } else if (handled == 0) { 565 mpt_lprt(mpt, 566 msg->AckRequired? MPT_PRT_WARN : MPT_PRT_INFO, 567 "Unhandled Event Notify Frame. Event %#x " 568 "(ACK %sequired).\n", 569 msg->Event, msg->AckRequired? "r" : "not r"); 570 } 571 572 if (msg->AckRequired) { 573 request_t *ack_req; 574 uint32_t context; 575 576 context = req->index | MPT_REPLY_HANDLER_EVENTS; 577 ack_req = mpt_get_request(mpt, FALSE); 578 if (ack_req == NULL) { 579 struct mpt_evtf_record *evtf; 580 581 evtf = (struct mpt_evtf_record *)reply_frame; 582 evtf->context = context; 583 LIST_INSERT_HEAD(&mpt->ack_frames, evtf, links); 584 free_reply = FALSE; 585 break; 586 } 587 mpt_send_event_ack(mpt, ack_req, msg, context); 588 /* 589 * Don't check for CONTINUATION_REPLY here 590 */ 591 return (free_reply); 592 } 593 break; 594 } 595 case MPI_FUNCTION_PORT_ENABLE: 596 mpt_lprt(mpt, MPT_PRT_DEBUG , "enable port reply\n"); 597 break; 598 case MPI_FUNCTION_EVENT_ACK: 599 break; 600 default: 601 mpt_prt(mpt, "unknown event function: %x\n", 602 reply_frame->Function); 603 break; 604 } 605 606 /* 607 * I'm not sure that this continuation stuff works as it should. 608 * 609 * I've had FC async events occur that free the frame up because 610 * the continuation bit isn't set, and then additional async events 611 * then occur using the same context. As you might imagine, this 612 * leads to Very Bad Thing. 613 * 614 * Let's just be safe for now and not free them up until we figure 615 * out what's actually happening here. 616 */ 617 #if 0 618 if ((reply_frame->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) == 0) { 619 TAILQ_REMOVE(&mpt->request_pending_list, req, links); 620 mpt_free_request(mpt, req); 621 mpt_prt(mpt, "event_reply %x for req %p:%u NOT a continuation", 622 reply_frame->Function, req, req->serno); 623 if (reply_frame->Function == MPI_FUNCTION_EVENT_NOTIFICATION) { 624 MSG_EVENT_NOTIFY_REPLY *msg = 625 (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 626 mpt_prtc(mpt, " Event=0x%x AckReq=%d", 627 msg->Event, msg->AckRequired); 628 } 629 } else { 630 mpt_prt(mpt, "event_reply %x for %p:%u IS a continuation", 631 reply_frame->Function, req, req->serno); 632 if (reply_frame->Function == MPI_FUNCTION_EVENT_NOTIFICATION) { 633 MSG_EVENT_NOTIFY_REPLY *msg = 634 (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 635 mpt_prtc(mpt, " Event=0x%x AckReq=%d", 636 msg->Event, msg->AckRequired); 637 } 638 mpt_prtc(mpt, "\n"); 639 } 640 #endif 641 return (free_reply); 642 } 643 644 /* 645 * Process an asynchronous event from the IOC. 646 */ 647 static int 648 mpt_core_event(struct mpt_softc *mpt, request_t *req, 649 MSG_EVENT_NOTIFY_REPLY *msg) 650 { 651 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_core_event: 0x%x\n", 652 msg->Event & 0xFF); 653 switch(msg->Event & 0xFF) { 654 case MPI_EVENT_NONE: 655 break; 656 case MPI_EVENT_LOG_DATA: 657 { 658 int i; 659 660 /* Some error occured that LSI wants logged */ 661 mpt_prt(mpt, "EvtLogData: IOCLogInfo: 0x%08x\n", 662 msg->IOCLogInfo); 663 mpt_prt(mpt, "\tEvtLogData: Event Data:"); 664 for (i = 0; i < msg->EventDataLength; i++) 665 mpt_prtc(mpt, " %08x", msg->Data[i]); 666 mpt_prtc(mpt, "\n"); 667 break; 668 } 669 case MPI_EVENT_EVENT_CHANGE: 670 /* 671 * This is just an acknowledgement 672 * of our mpt_send_event_request. 673 */ 674 break; 675 case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE: 676 break; 677 default: 678 return (0); 679 break; 680 } 681 return (1); 682 } 683 684 static void 685 mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 686 MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context) 687 { 688 MSG_EVENT_ACK *ackp; 689 690 ackp = (MSG_EVENT_ACK *)ack_req->req_vbuf; 691 memset(ackp, 0, sizeof (*ackp)); 692 ackp->Function = MPI_FUNCTION_EVENT_ACK; 693 ackp->Event = htole32(msg->Event); 694 ackp->EventContext = htole32(msg->EventContext); 695 ackp->MsgContext = htole32(context); 696 mpt_check_doorbell(mpt); 697 mpt_send_cmd(mpt, ack_req); 698 } 699 700 /***************************** Interrupt Handling *****************************/ 701 void 702 mpt_intr(void *arg) 703 { 704 struct mpt_softc *mpt; 705 uint32_t reply_desc; 706 int ntrips = 0; 707 708 mpt = (struct mpt_softc *)arg; 709 mpt_lprt(mpt, MPT_PRT_DEBUG2, "enter mpt_intr\n"); 710 MPT_LOCK_ASSERT(mpt); 711 712 while ((reply_desc = mpt_pop_reply_queue(mpt)) != MPT_REPLY_EMPTY) { 713 request_t *req; 714 MSG_DEFAULT_REPLY *reply_frame; 715 uint32_t reply_baddr; 716 uint32_t ctxt_idx; 717 u_int cb_index; 718 u_int req_index; 719 int free_rf; 720 721 req = NULL; 722 reply_frame = NULL; 723 reply_baddr = 0; 724 if ((reply_desc & MPI_ADDRESS_REPLY_A_BIT) != 0) { 725 u_int offset; 726 /* 727 * Insure that the reply frame is coherent. 728 */ 729 reply_baddr = MPT_REPLY_BADDR(reply_desc); 730 offset = reply_baddr - (mpt->reply_phys & 0xFFFFFFFF); 731 bus_dmamap_sync_range(mpt->reply_dmat, 732 mpt->reply_dmap, offset, MPT_REPLY_SIZE, 733 BUS_DMASYNC_POSTREAD); 734 reply_frame = MPT_REPLY_OTOV(mpt, offset); 735 ctxt_idx = le32toh(reply_frame->MsgContext); 736 } else { 737 uint32_t type; 738 739 type = MPI_GET_CONTEXT_REPLY_TYPE(reply_desc); 740 ctxt_idx = reply_desc; 741 mpt_lprt(mpt, MPT_PRT_DEBUG1, "Context Reply: 0x%08x\n", 742 reply_desc); 743 744 switch (type) { 745 case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT: 746 ctxt_idx &= MPI_CONTEXT_REPLY_CONTEXT_MASK; 747 break; 748 case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET: 749 ctxt_idx = GET_IO_INDEX(reply_desc); 750 if (mpt->tgt_cmd_ptrs == NULL) { 751 mpt_prt(mpt, 752 "mpt_intr: no target cmd ptrs\n"); 753 reply_desc = MPT_REPLY_EMPTY; 754 break; 755 } 756 if (ctxt_idx >= mpt->tgt_cmds_allocated) { 757 mpt_prt(mpt, 758 "mpt_intr: bad tgt cmd ctxt %u\n", 759 ctxt_idx); 760 reply_desc = MPT_REPLY_EMPTY; 761 ntrips = 1000; 762 break; 763 } 764 req = mpt->tgt_cmd_ptrs[ctxt_idx]; 765 if (req == NULL) { 766 mpt_prt(mpt, "no request backpointer " 767 "at index %u", ctxt_idx); 768 reply_desc = MPT_REPLY_EMPTY; 769 ntrips = 1000; 770 break; 771 } 772 /* 773 * Reformulate ctxt_idx to be just as if 774 * it were another type of context reply 775 * so the code below will find the request 776 * via indexing into the pool. 777 */ 778 ctxt_idx = 779 req->index | mpt->scsi_tgt_handler_id; 780 req = NULL; 781 break; 782 case MPI_CONTEXT_REPLY_TYPE_LAN: 783 mpt_prt(mpt, "LAN CONTEXT REPLY: 0x%08x\n", 784 reply_desc); 785 reply_desc = MPT_REPLY_EMPTY; 786 break; 787 default: 788 mpt_prt(mpt, "Context Reply 0x%08x?\n", type); 789 reply_desc = MPT_REPLY_EMPTY; 790 break; 791 } 792 if (reply_desc == MPT_REPLY_EMPTY) { 793 if (ntrips++ > 1000) { 794 break; 795 } 796 continue; 797 } 798 } 799 800 cb_index = MPT_CONTEXT_TO_CBI(ctxt_idx); 801 req_index = MPT_CONTEXT_TO_REQI(ctxt_idx); 802 if (req_index < MPT_MAX_REQUESTS(mpt)) { 803 req = &mpt->request_pool[req_index]; 804 } else { 805 mpt_prt(mpt, "WARN: mpt_intr index == %d (reply_desc ==" 806 " 0x%x)\n", req_index, reply_desc); 807 } 808 809 free_rf = mpt_reply_handlers[cb_index](mpt, req, 810 reply_desc, reply_frame); 811 812 if (reply_frame != NULL && free_rf) { 813 mpt_free_reply(mpt, reply_baddr); 814 } 815 816 /* 817 * If we got ourselves disabled, don't get stuck in a loop 818 */ 819 if (mpt->disabled) { 820 mpt_disable_ints(mpt); 821 break; 822 } 823 if (ntrips++ > 1000) { 824 break; 825 } 826 } 827 mpt_lprt(mpt, MPT_PRT_DEBUG2, "exit mpt_intr\n"); 828 } 829 830 /******************************* Error Recovery *******************************/ 831 void 832 mpt_complete_request_chain(struct mpt_softc *mpt, struct req_queue *chain, 833 u_int iocstatus) 834 { 835 MSG_DEFAULT_REPLY ioc_status_frame; 836 request_t *req; 837 838 memset(&ioc_status_frame, 0, sizeof(ioc_status_frame)); 839 ioc_status_frame.MsgLength = roundup2(sizeof(ioc_status_frame), 4); 840 ioc_status_frame.IOCStatus = iocstatus; 841 while((req = TAILQ_FIRST(chain)) != NULL) { 842 MSG_REQUEST_HEADER *msg_hdr; 843 u_int cb_index; 844 845 TAILQ_REMOVE(chain, req, links); 846 msg_hdr = (MSG_REQUEST_HEADER *)req->req_vbuf; 847 ioc_status_frame.Function = msg_hdr->Function; 848 ioc_status_frame.MsgContext = msg_hdr->MsgContext; 849 cb_index = MPT_CONTEXT_TO_CBI(le32toh(msg_hdr->MsgContext)); 850 mpt_reply_handlers[cb_index](mpt, req, msg_hdr->MsgContext, 851 &ioc_status_frame); 852 } 853 } 854 855 /********************************* Diagnostics ********************************/ 856 /* 857 * Perform a diagnostic dump of a reply frame. 858 */ 859 void 860 mpt_dump_reply_frame(struct mpt_softc *mpt, MSG_DEFAULT_REPLY *reply_frame) 861 { 862 mpt_prt(mpt, "Address Reply:\n"); 863 mpt_print_reply(reply_frame); 864 } 865 866 /******************************* Doorbell Access ******************************/ 867 static __inline uint32_t mpt_rd_db(struct mpt_softc *mpt); 868 static __inline uint32_t mpt_rd_intr(struct mpt_softc *mpt); 869 870 static __inline uint32_t 871 mpt_rd_db(struct mpt_softc *mpt) 872 { 873 return mpt_read(mpt, MPT_OFFSET_DOORBELL); 874 } 875 876 static __inline uint32_t 877 mpt_rd_intr(struct mpt_softc *mpt) 878 { 879 return mpt_read(mpt, MPT_OFFSET_INTR_STATUS); 880 } 881 882 /* Busy wait for a door bell to be read by IOC */ 883 static int 884 mpt_wait_db_ack(struct mpt_softc *mpt) 885 { 886 int i; 887 for (i=0; i < MPT_MAX_WAIT; i++) { 888 if (!MPT_DB_IS_BUSY(mpt_rd_intr(mpt))) { 889 maxwait_ack = i > maxwait_ack ? i : maxwait_ack; 890 return (MPT_OK); 891 } 892 DELAY(200); 893 } 894 return (MPT_FAIL); 895 } 896 897 /* Busy wait for a door bell interrupt */ 898 static int 899 mpt_wait_db_int(struct mpt_softc *mpt) 900 { 901 int i; 902 for (i = 0; i < MPT_MAX_WAIT; i++) { 903 if (MPT_DB_INTR(mpt_rd_intr(mpt))) { 904 maxwait_int = i > maxwait_int ? i : maxwait_int; 905 return MPT_OK; 906 } 907 DELAY(100); 908 } 909 return (MPT_FAIL); 910 } 911 912 /* Wait for IOC to transition to a give state */ 913 void 914 mpt_check_doorbell(struct mpt_softc *mpt) 915 { 916 uint32_t db = mpt_rd_db(mpt); 917 if (MPT_STATE(db) != MPT_DB_STATE_RUNNING) { 918 mpt_prt(mpt, "Device not running\n"); 919 mpt_print_db(db); 920 } 921 } 922 923 /* Wait for IOC to transition to a give state */ 924 static int 925 mpt_wait_state(struct mpt_softc *mpt, enum DB_STATE_BITS state) 926 { 927 int i; 928 929 for (i = 0; i < MPT_MAX_WAIT; i++) { 930 uint32_t db = mpt_rd_db(mpt); 931 if (MPT_STATE(db) == state) { 932 maxwait_state = i > maxwait_state ? i : maxwait_state; 933 return (MPT_OK); 934 } 935 DELAY(100); 936 } 937 return (MPT_FAIL); 938 } 939 940 941 /************************* Intialization/Configuration ************************/ 942 static int mpt_download_fw(struct mpt_softc *mpt); 943 944 /* Issue the reset COMMAND to the IOC */ 945 static int 946 mpt_soft_reset(struct mpt_softc *mpt) 947 { 948 mpt_lprt(mpt, MPT_PRT_DEBUG, "soft reset\n"); 949 950 /* Have to use hard reset if we are not in Running state */ 951 if (MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_RUNNING) { 952 mpt_prt(mpt, "soft reset failed: device not running\n"); 953 return (MPT_FAIL); 954 } 955 956 /* If door bell is in use we don't have a chance of getting 957 * a word in since the IOC probably crashed in message 958 * processing. So don't waste our time. 959 */ 960 if (MPT_DB_IS_IN_USE(mpt_rd_db(mpt))) { 961 mpt_prt(mpt, "soft reset failed: doorbell wedged\n"); 962 return (MPT_FAIL); 963 } 964 965 /* Send the reset request to the IOC */ 966 mpt_write(mpt, MPT_OFFSET_DOORBELL, 967 MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET << MPI_DOORBELL_FUNCTION_SHIFT); 968 if (mpt_wait_db_ack(mpt) != MPT_OK) { 969 mpt_prt(mpt, "soft reset failed: ack timeout\n"); 970 return (MPT_FAIL); 971 } 972 973 /* Wait for the IOC to reload and come out of reset state */ 974 if (mpt_wait_state(mpt, MPT_DB_STATE_READY) != MPT_OK) { 975 mpt_prt(mpt, "soft reset failed: device did not restart\n"); 976 return (MPT_FAIL); 977 } 978 979 return MPT_OK; 980 } 981 982 static int 983 mpt_enable_diag_mode(struct mpt_softc *mpt) 984 { 985 int try; 986 987 try = 20; 988 while (--try) { 989 990 if ((mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC) & MPI_DIAG_DRWE) != 0) 991 break; 992 993 /* Enable diagnostic registers */ 994 mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFF); 995 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_1ST_KEY_VALUE); 996 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_2ND_KEY_VALUE); 997 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_3RD_KEY_VALUE); 998 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_4TH_KEY_VALUE); 999 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_5TH_KEY_VALUE); 1000 1001 DELAY(100000); 1002 } 1003 if (try == 0) 1004 return (EIO); 1005 return (0); 1006 } 1007 1008 static void 1009 mpt_disable_diag_mode(struct mpt_softc *mpt) 1010 { 1011 mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFFFFFFFF); 1012 } 1013 1014 /* This is a magic diagnostic reset that resets all the ARM 1015 * processors in the chip. 1016 */ 1017 static void 1018 mpt_hard_reset(struct mpt_softc *mpt) 1019 { 1020 int error; 1021 int wait; 1022 uint32_t diagreg; 1023 1024 mpt_lprt(mpt, MPT_PRT_DEBUG, "hard reset\n"); 1025 1026 error = mpt_enable_diag_mode(mpt); 1027 if (error) { 1028 mpt_prt(mpt, "WARNING - Could not enter diagnostic mode !\n"); 1029 mpt_prt(mpt, "Trying to reset anyway.\n"); 1030 } 1031 1032 diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 1033 1034 /* 1035 * This appears to be a workaround required for some 1036 * firmware or hardware revs. 1037 */ 1038 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_DISABLE_ARM); 1039 DELAY(1000); 1040 1041 /* Diag. port is now active so we can now hit the reset bit */ 1042 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_RESET_ADAPTER); 1043 1044 /* 1045 * Ensure that the reset has finished. We delay 1ms 1046 * prior to reading the register to make sure the chip 1047 * has sufficiently completed its reset to handle register 1048 * accesses. 1049 */ 1050 wait = 5000; 1051 do { 1052 DELAY(1000); 1053 diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 1054 } while (--wait && (diagreg & MPI_DIAG_RESET_ADAPTER) == 0); 1055 1056 if (wait == 0) { 1057 mpt_prt(mpt, "WARNING - Failed hard reset! " 1058 "Trying to initialize anyway.\n"); 1059 } 1060 1061 /* 1062 * If we have firmware to download, it must be loaded before 1063 * the controller will become operational. Do so now. 1064 */ 1065 if (mpt->fw_image != NULL) { 1066 1067 error = mpt_download_fw(mpt); 1068 1069 if (error) { 1070 mpt_prt(mpt, "WARNING - Firmware Download Failed!\n"); 1071 mpt_prt(mpt, "Trying to initialize anyway.\n"); 1072 } 1073 } 1074 1075 /* 1076 * Reseting the controller should have disabled write 1077 * access to the diagnostic registers, but disable 1078 * manually to be sure. 1079 */ 1080 mpt_disable_diag_mode(mpt); 1081 } 1082 1083 static void 1084 mpt_core_ioc_reset(struct mpt_softc *mpt, int type) 1085 { 1086 /* 1087 * Complete all pending requests with a status 1088 * appropriate for an IOC reset. 1089 */ 1090 mpt_complete_request_chain(mpt, &mpt->request_pending_list, 1091 MPI_IOCSTATUS_INVALID_STATE); 1092 } 1093 1094 1095 /* 1096 * Reset the IOC when needed. Try software command first then if needed 1097 * poke at the magic diagnostic reset. Note that a hard reset resets 1098 * *both* IOCs on dual function chips (FC929 && LSI1030) as well as 1099 * fouls up the PCI configuration registers. 1100 */ 1101 int 1102 mpt_reset(struct mpt_softc *mpt, int reinit) 1103 { 1104 struct mpt_personality *pers; 1105 int ret; 1106 int retry_cnt = 0; 1107 1108 /* 1109 * Try a soft reset. If that fails, get out the big hammer. 1110 */ 1111 again: 1112 if ((ret = mpt_soft_reset(mpt)) != MPT_OK) { 1113 int cnt; 1114 for (cnt = 0; cnt < 5; cnt++) { 1115 /* Failed; do a hard reset */ 1116 mpt_hard_reset(mpt); 1117 1118 /* 1119 * Wait for the IOC to reload 1120 * and come out of reset state 1121 */ 1122 ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 1123 if (ret == MPT_OK) { 1124 break; 1125 } 1126 /* 1127 * Okay- try to check again... 1128 */ 1129 ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 1130 if (ret == MPT_OK) { 1131 break; 1132 } 1133 mpt_prt(mpt, "mpt_reset: failed hard reset (%d:%d)\n", 1134 retry_cnt, cnt); 1135 } 1136 } 1137 1138 if (retry_cnt == 0) { 1139 /* 1140 * Invoke reset handlers. We bump the reset count so 1141 * that mpt_wait_req() understands that regardless of 1142 * the specified wait condition, it should stop its wait. 1143 */ 1144 mpt->reset_cnt++; 1145 MPT_PERS_FOREACH(mpt, pers) 1146 pers->reset(mpt, ret); 1147 } 1148 1149 if (reinit) { 1150 ret = mpt_enable_ioc(mpt, 1); 1151 if (ret == MPT_OK) { 1152 mpt_enable_ints(mpt); 1153 } 1154 } 1155 if (ret != MPT_OK && retry_cnt++ < 2) { 1156 goto again; 1157 } 1158 return ret; 1159 } 1160 1161 /* Return a command buffer to the free queue */ 1162 void 1163 mpt_free_request(struct mpt_softc *mpt, request_t *req) 1164 { 1165 request_t *nxt; 1166 struct mpt_evtf_record *record; 1167 uint32_t reply_baddr; 1168 1169 if (req == NULL || req != &mpt->request_pool[req->index]) { 1170 panic("mpt_free_request bad req ptr\n"); 1171 return; 1172 } 1173 if ((nxt = req->chain) != NULL) { 1174 req->chain = NULL; 1175 mpt_free_request(mpt, nxt); /* NB: recursion */ 1176 } 1177 KASSERT(req->state != REQ_STATE_FREE, ("freeing free request")); 1178 KASSERT(!(req->state & REQ_STATE_LOCKED), ("freeing locked request")); 1179 MPT_LOCK_ASSERT(mpt); 1180 KASSERT(mpt_req_on_free_list(mpt, req) == 0, 1181 ("mpt_free_request: req %p:%u func %x already on freelist", 1182 req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1183 KASSERT(mpt_req_on_pending_list(mpt, req) == 0, 1184 ("mpt_free_request: req %p:%u func %x on pending list", 1185 req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1186 #ifdef INVARIANTS 1187 mpt_req_not_spcl(mpt, req, "mpt_free_request", __LINE__); 1188 #endif 1189 1190 req->ccb = NULL; 1191 if (LIST_EMPTY(&mpt->ack_frames)) { 1192 /* 1193 * Insert free ones at the tail 1194 */ 1195 req->serno = 0; 1196 req->state = REQ_STATE_FREE; 1197 #ifdef INVARIANTS 1198 memset(req->req_vbuf, 0xff, sizeof (MSG_REQUEST_HEADER)); 1199 #endif 1200 TAILQ_INSERT_TAIL(&mpt->request_free_list, req, links); 1201 if (mpt->getreqwaiter != 0) { 1202 mpt->getreqwaiter = 0; 1203 wakeup(&mpt->request_free_list); 1204 } 1205 return; 1206 } 1207 1208 /* 1209 * Process an ack frame deferred due to resource shortage. 1210 */ 1211 record = LIST_FIRST(&mpt->ack_frames); 1212 LIST_REMOVE(record, links); 1213 req->state = REQ_STATE_ALLOCATED; 1214 mpt_assign_serno(mpt, req); 1215 mpt_send_event_ack(mpt, req, &record->reply, record->context); 1216 reply_baddr = (uint32_t)((uint8_t *)record - mpt->reply) 1217 + (mpt->reply_phys & 0xFFFFFFFF); 1218 mpt_free_reply(mpt, reply_baddr); 1219 } 1220 1221 /* Get a command buffer from the free queue */ 1222 request_t * 1223 mpt_get_request(struct mpt_softc *mpt, int sleep_ok) 1224 { 1225 request_t *req; 1226 1227 retry: 1228 MPT_LOCK_ASSERT(mpt); 1229 req = TAILQ_FIRST(&mpt->request_free_list); 1230 if (req != NULL) { 1231 KASSERT(req == &mpt->request_pool[req->index], 1232 ("mpt_get_request: corrupted request free list\n")); 1233 KASSERT(req->state == REQ_STATE_FREE, 1234 ("req %p:%u not free on free list %x index %d function %x", 1235 req, req->serno, req->state, req->index, 1236 ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1237 TAILQ_REMOVE(&mpt->request_free_list, req, links); 1238 req->state = REQ_STATE_ALLOCATED; 1239 req->chain = NULL; 1240 mpt_assign_serno(mpt, req); 1241 mpt_callout_init(&req->callout); 1242 } else if (sleep_ok != 0) { 1243 mpt->getreqwaiter = 1; 1244 mpt_sleep(mpt, &mpt->request_free_list, PUSER, "mptgreq", 0); 1245 goto retry; 1246 } 1247 return (req); 1248 } 1249 1250 /* Pass the command to the IOC */ 1251 void 1252 mpt_send_cmd(struct mpt_softc *mpt, request_t *req) 1253 { 1254 if (mpt->verbose > MPT_PRT_DEBUG2) { 1255 mpt_dump_request(mpt, req); 1256 } 1257 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 1258 BUS_DMASYNC_PREWRITE); 1259 req->state |= REQ_STATE_QUEUED; 1260 KASSERT(mpt_req_on_free_list(mpt, req) == 0, 1261 ("req %p:%u func %x on freelist list in mpt_send_cmd", 1262 req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1263 KASSERT(mpt_req_on_pending_list(mpt, req) == 0, 1264 ("req %p:%u func %x already on pending list in mpt_send_cmd", 1265 req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function)); 1266 TAILQ_INSERT_HEAD(&mpt->request_pending_list, req, links); 1267 mpt_write(mpt, MPT_OFFSET_REQUEST_Q, (uint32_t) req->req_pbuf); 1268 } 1269 1270 /* 1271 * Wait for a request to complete. 1272 * 1273 * Inputs: 1274 * mpt softc of controller executing request 1275 * req request to wait for 1276 * sleep_ok nonzero implies may sleep in this context 1277 * time_ms timeout in ms. 0 implies no timeout. 1278 * 1279 * Return Values: 1280 * 0 Request completed 1281 * non-0 Timeout fired before request completion. 1282 */ 1283 int 1284 mpt_wait_req(struct mpt_softc *mpt, request_t *req, 1285 mpt_req_state_t state, mpt_req_state_t mask, 1286 int sleep_ok, int time_ms) 1287 { 1288 int error; 1289 int timeout; 1290 u_int saved_cnt; 1291 1292 /* 1293 * timeout is in ms. 0 indicates infinite wait. 1294 * Convert to ticks or 500us units depending on 1295 * our sleep mode. 1296 */ 1297 if (sleep_ok != 0) { 1298 timeout = (time_ms * hz) / 1000; 1299 } else { 1300 timeout = time_ms * 2; 1301 } 1302 req->state |= REQ_STATE_NEED_WAKEUP; 1303 mask &= ~REQ_STATE_NEED_WAKEUP; 1304 saved_cnt = mpt->reset_cnt; 1305 while ((req->state & mask) != state && mpt->reset_cnt == saved_cnt) { 1306 if (sleep_ok != 0) { 1307 error = mpt_sleep(mpt, req, PUSER, "mptreq", timeout); 1308 if (error == EWOULDBLOCK) { 1309 timeout = 0; 1310 break; 1311 } 1312 } else { 1313 if (time_ms != 0 && --timeout == 0) { 1314 break; 1315 } 1316 DELAY(500); 1317 mpt_intr(mpt); 1318 } 1319 } 1320 req->state &= ~REQ_STATE_NEED_WAKEUP; 1321 if (mpt->reset_cnt != saved_cnt) { 1322 return (EIO); 1323 } 1324 if (time_ms && timeout <= 0) { 1325 MSG_REQUEST_HEADER *msg_hdr = req->req_vbuf; 1326 req->state |= REQ_STATE_TIMEDOUT; 1327 mpt_prt(mpt, "mpt_wait_req(%x) timed out\n", msg_hdr->Function); 1328 return (ETIMEDOUT); 1329 } 1330 return (0); 1331 } 1332 1333 /* 1334 * Send a command to the IOC via the handshake register. 1335 * 1336 * Only done at initialization time and for certain unusual 1337 * commands such as device/bus reset as specified by LSI. 1338 */ 1339 int 1340 mpt_send_handshake_cmd(struct mpt_softc *mpt, size_t len, void *cmd) 1341 { 1342 int i; 1343 uint32_t data, *data32; 1344 1345 /* Check condition of the IOC */ 1346 data = mpt_rd_db(mpt); 1347 if ((MPT_STATE(data) != MPT_DB_STATE_READY 1348 && MPT_STATE(data) != MPT_DB_STATE_RUNNING 1349 && MPT_STATE(data) != MPT_DB_STATE_FAULT) 1350 || MPT_DB_IS_IN_USE(data)) { 1351 mpt_prt(mpt, "handshake aborted - invalid doorbell state\n"); 1352 mpt_print_db(data); 1353 return (EBUSY); 1354 } 1355 1356 /* We move things in 32 bit chunks */ 1357 len = (len + 3) >> 2; 1358 data32 = cmd; 1359 1360 /* Clear any left over pending doorbell interrupts */ 1361 if (MPT_DB_INTR(mpt_rd_intr(mpt))) 1362 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1363 1364 /* 1365 * Tell the handshake reg. we are going to send a command 1366 * and how long it is going to be. 1367 */ 1368 data = (MPI_FUNCTION_HANDSHAKE << MPI_DOORBELL_FUNCTION_SHIFT) | 1369 (len << MPI_DOORBELL_ADD_DWORDS_SHIFT); 1370 mpt_write(mpt, MPT_OFFSET_DOORBELL, data); 1371 1372 /* Wait for the chip to notice */ 1373 if (mpt_wait_db_int(mpt) != MPT_OK) { 1374 mpt_prt(mpt, "mpt_send_handshake_cmd: db ignored\n"); 1375 return (ETIMEDOUT); 1376 } 1377 1378 /* Clear the interrupt */ 1379 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1380 1381 if (mpt_wait_db_ack(mpt) != MPT_OK) { 1382 mpt_prt(mpt, "mpt_send_handshake_cmd: db ack timed out\n"); 1383 return (ETIMEDOUT); 1384 } 1385 1386 /* Send the command */ 1387 for (i = 0; i < len; i++) { 1388 mpt_write(mpt, MPT_OFFSET_DOORBELL, htole32(*data32++)); 1389 if (mpt_wait_db_ack(mpt) != MPT_OK) { 1390 mpt_prt(mpt, 1391 "mpt_send_handshake_cmd: timeout @ index %d\n", i); 1392 return (ETIMEDOUT); 1393 } 1394 } 1395 return MPT_OK; 1396 } 1397 1398 /* Get the response from the handshake register */ 1399 int 1400 mpt_recv_handshake_reply(struct mpt_softc *mpt, size_t reply_len, void *reply) 1401 { 1402 int left, reply_left; 1403 u_int16_t *data16; 1404 uint32_t data; 1405 MSG_DEFAULT_REPLY *hdr; 1406 1407 /* We move things out in 16 bit chunks */ 1408 reply_len >>= 1; 1409 data16 = (u_int16_t *)reply; 1410 1411 hdr = (MSG_DEFAULT_REPLY *)reply; 1412 1413 /* Get first word */ 1414 if (mpt_wait_db_int(mpt) != MPT_OK) { 1415 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout1\n"); 1416 return ETIMEDOUT; 1417 } 1418 data = mpt_read(mpt, MPT_OFFSET_DOORBELL); 1419 *data16++ = le16toh(data & MPT_DB_DATA_MASK); 1420 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1421 1422 /* Get Second Word */ 1423 if (mpt_wait_db_int(mpt) != MPT_OK) { 1424 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout2\n"); 1425 return ETIMEDOUT; 1426 } 1427 data = mpt_read(mpt, MPT_OFFSET_DOORBELL); 1428 *data16++ = le16toh(data & MPT_DB_DATA_MASK); 1429 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1430 1431 /* 1432 * With the second word, we can now look at the length. 1433 * Warn about a reply that's too short (except for IOC FACTS REPLY) 1434 */ 1435 if ((reply_len >> 1) != hdr->MsgLength && 1436 (hdr->Function != MPI_FUNCTION_IOC_FACTS)){ 1437 #if __FreeBSD_version >= 500000 1438 mpt_prt(mpt, "reply length does not match message length: " 1439 "got %x; expected %zx for function %x\n", 1440 hdr->MsgLength << 2, reply_len << 1, hdr->Function); 1441 #else 1442 mpt_prt(mpt, "reply length does not match message length: " 1443 "got %x; expected %x for function %x\n", 1444 hdr->MsgLength << 2, reply_len << 1, hdr->Function); 1445 #endif 1446 } 1447 1448 /* Get rest of the reply; but don't overflow the provided buffer */ 1449 left = (hdr->MsgLength << 1) - 2; 1450 reply_left = reply_len - 2; 1451 while (left--) { 1452 u_int16_t datum; 1453 1454 if (mpt_wait_db_int(mpt) != MPT_OK) { 1455 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout3\n"); 1456 return ETIMEDOUT; 1457 } 1458 data = mpt_read(mpt, MPT_OFFSET_DOORBELL); 1459 datum = le16toh(data & MPT_DB_DATA_MASK); 1460 1461 if (reply_left-- > 0) 1462 *data16++ = datum; 1463 1464 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1465 } 1466 1467 /* One more wait & clear at the end */ 1468 if (mpt_wait_db_int(mpt) != MPT_OK) { 1469 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout4\n"); 1470 return ETIMEDOUT; 1471 } 1472 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 1473 1474 if ((hdr->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1475 if (mpt->verbose >= MPT_PRT_TRACE) 1476 mpt_print_reply(hdr); 1477 return (MPT_FAIL | hdr->IOCStatus); 1478 } 1479 1480 return (0); 1481 } 1482 1483 static int 1484 mpt_get_iocfacts(struct mpt_softc *mpt, MSG_IOC_FACTS_REPLY *freplp) 1485 { 1486 MSG_IOC_FACTS f_req; 1487 int error; 1488 1489 memset(&f_req, 0, sizeof f_req); 1490 f_req.Function = MPI_FUNCTION_IOC_FACTS; 1491 f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1492 error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 1493 if (error) { 1494 return(error); 1495 } 1496 error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 1497 return (error); 1498 } 1499 1500 static int 1501 mpt_get_portfacts(struct mpt_softc *mpt, U8 port, MSG_PORT_FACTS_REPLY *freplp) 1502 { 1503 MSG_PORT_FACTS f_req; 1504 int error; 1505 1506 memset(&f_req, 0, sizeof f_req); 1507 f_req.Function = MPI_FUNCTION_PORT_FACTS; 1508 f_req.PortNumber = port; 1509 f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1510 error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 1511 if (error) { 1512 return(error); 1513 } 1514 error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 1515 return (error); 1516 } 1517 1518 /* 1519 * Send the initialization request. This is where we specify how many 1520 * SCSI busses and how many devices per bus we wish to emulate. 1521 * This is also the command that specifies the max size of the reply 1522 * frames from the IOC that we will be allocating. 1523 */ 1524 static int 1525 mpt_send_ioc_init(struct mpt_softc *mpt, uint32_t who) 1526 { 1527 int error = 0; 1528 MSG_IOC_INIT init; 1529 MSG_IOC_INIT_REPLY reply; 1530 1531 memset(&init, 0, sizeof init); 1532 init.WhoInit = who; 1533 init.Function = MPI_FUNCTION_IOC_INIT; 1534 init.MaxDevices = 0; /* at least 256 devices per bus */ 1535 init.MaxBuses = 16; /* at least 16 busses */ 1536 1537 init.MsgVersion = htole16(MPI_VERSION); 1538 init.HeaderVersion = htole16(MPI_HEADER_VERSION); 1539 init.ReplyFrameSize = htole16(MPT_REPLY_SIZE); 1540 init.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1541 1542 if ((error = mpt_send_handshake_cmd(mpt, sizeof init, &init)) != 0) { 1543 return(error); 1544 } 1545 1546 error = mpt_recv_handshake_reply(mpt, sizeof reply, &reply); 1547 return (error); 1548 } 1549 1550 1551 /* 1552 * Utiltity routine to read configuration headers and pages 1553 */ 1554 int 1555 mpt_issue_cfg_req(struct mpt_softc *mpt, request_t *req, cfgparms_t *params, 1556 bus_addr_t addr, bus_size_t len, int sleep_ok, int timeout_ms) 1557 { 1558 MSG_CONFIG *cfgp; 1559 SGE_SIMPLE32 *se; 1560 1561 cfgp = req->req_vbuf; 1562 memset(cfgp, 0, sizeof *cfgp); 1563 cfgp->Action = params->Action; 1564 cfgp->Function = MPI_FUNCTION_CONFIG; 1565 cfgp->Header.PageVersion = params->PageVersion; 1566 cfgp->Header.PageNumber = params->PageNumber; 1567 cfgp->PageAddress = htole32(params->PageAddress); 1568 if ((params->PageType & MPI_CONFIG_PAGETYPE_MASK) == 1569 MPI_CONFIG_PAGETYPE_EXTENDED) { 1570 cfgp->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED; 1571 cfgp->Header.PageLength = 0; 1572 cfgp->ExtPageLength = htole16(params->ExtPageLength); 1573 cfgp->ExtPageType = params->ExtPageType; 1574 } else { 1575 cfgp->Header.PageType = params->PageType; 1576 cfgp->Header.PageLength = params->PageLength; 1577 } 1578 se = (SGE_SIMPLE32 *)&cfgp->PageBufferSGE; 1579 se->Address = htole32(addr); 1580 MPI_pSGE_SET_LENGTH(se, len); 1581 MPI_pSGE_SET_FLAGS(se, (MPI_SGE_FLAGS_SIMPLE_ELEMENT | 1582 MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER | 1583 MPI_SGE_FLAGS_END_OF_LIST | 1584 ((params->Action == MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT 1585 || params->Action == MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM) 1586 ? MPI_SGE_FLAGS_HOST_TO_IOC : MPI_SGE_FLAGS_IOC_TO_HOST))); 1587 se->FlagsLength = htole32(se->FlagsLength); 1588 cfgp->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 1589 1590 mpt_check_doorbell(mpt); 1591 mpt_send_cmd(mpt, req); 1592 return (mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 1593 sleep_ok, timeout_ms)); 1594 } 1595 1596 int 1597 mpt_read_extcfg_header(struct mpt_softc *mpt, int PageVersion, int PageNumber, 1598 uint32_t PageAddress, int ExtPageType, 1599 CONFIG_EXTENDED_PAGE_HEADER *rslt, 1600 int sleep_ok, int timeout_ms) 1601 { 1602 request_t *req; 1603 cfgparms_t params; 1604 MSG_CONFIG_REPLY *cfgp; 1605 int error; 1606 1607 req = mpt_get_request(mpt, sleep_ok); 1608 if (req == NULL) { 1609 mpt_prt(mpt, "mpt_extread_cfg_header: Get request failed!\n"); 1610 return (ENOMEM); 1611 } 1612 1613 params.Action = MPI_CONFIG_ACTION_PAGE_HEADER; 1614 params.PageVersion = PageVersion; 1615 params.PageLength = 0; 1616 params.PageNumber = PageNumber; 1617 params.PageType = MPI_CONFIG_PAGETYPE_EXTENDED; 1618 params.PageAddress = PageAddress; 1619 params.ExtPageType = ExtPageType; 1620 params.ExtPageLength = 0; 1621 error = mpt_issue_cfg_req(mpt, req, ¶ms, /*addr*/0, /*len*/0, 1622 sleep_ok, timeout_ms); 1623 if (error != 0) { 1624 /* 1625 * Leave the request. Without resetting the chip, it's 1626 * still owned by it and we'll just get into trouble 1627 * freeing it now. Mark it as abandoned so that if it 1628 * shows up later it can be freed. 1629 */ 1630 mpt_prt(mpt, "read_extcfg_header timed out\n"); 1631 return (ETIMEDOUT); 1632 } 1633 1634 switch (req->IOCStatus & MPI_IOCSTATUS_MASK) { 1635 case MPI_IOCSTATUS_SUCCESS: 1636 cfgp = req->req_vbuf; 1637 rslt->PageVersion = cfgp->Header.PageVersion; 1638 rslt->PageNumber = cfgp->Header.PageNumber; 1639 rslt->PageType = cfgp->Header.PageType; 1640 rslt->ExtPageLength = le16toh(cfgp->ExtPageLength); 1641 rslt->ExtPageType = cfgp->ExtPageType; 1642 error = 0; 1643 break; 1644 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: 1645 mpt_lprt(mpt, MPT_PRT_DEBUG, 1646 "Invalid Page Type %d Number %d Addr 0x%0x\n", 1647 MPI_CONFIG_PAGETYPE_EXTENDED, PageNumber, PageAddress); 1648 error = EINVAL; 1649 break; 1650 default: 1651 mpt_prt(mpt, "mpt_read_extcfg_header: Config Info Status %x\n", 1652 req->IOCStatus); 1653 error = EIO; 1654 break; 1655 } 1656 mpt_free_request(mpt, req); 1657 return (error); 1658 } 1659 1660 int 1661 mpt_read_extcfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1662 CONFIG_EXTENDED_PAGE_HEADER *hdr, void *buf, size_t len, 1663 int sleep_ok, int timeout_ms) 1664 { 1665 request_t *req; 1666 cfgparms_t params; 1667 int error; 1668 1669 req = mpt_get_request(mpt, sleep_ok); 1670 if (req == NULL) { 1671 mpt_prt(mpt, "mpt_read_extcfg_page: Get request failed!\n"); 1672 return (-1); 1673 } 1674 1675 params.Action = Action; 1676 params.PageVersion = hdr->PageVersion; 1677 params.PageLength = 0; 1678 params.PageNumber = hdr->PageNumber; 1679 params.PageType = MPI_CONFIG_PAGETYPE_EXTENDED; 1680 params.PageAddress = PageAddress; 1681 params.ExtPageType = hdr->ExtPageType; 1682 params.ExtPageLength = hdr->ExtPageLength; 1683 error = mpt_issue_cfg_req(mpt, req, ¶ms, 1684 req->req_pbuf + MPT_RQSL(mpt), 1685 len, sleep_ok, timeout_ms); 1686 if (error != 0) { 1687 mpt_prt(mpt, "read_extcfg_page(%d) timed out\n", Action); 1688 return (-1); 1689 } 1690 1691 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1692 mpt_prt(mpt, "mpt_read_extcfg_page: Config Info Status %x\n", 1693 req->IOCStatus); 1694 mpt_free_request(mpt, req); 1695 return (-1); 1696 } 1697 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 1698 BUS_DMASYNC_POSTREAD); 1699 memcpy(buf, ((uint8_t *)req->req_vbuf)+MPT_RQSL(mpt), len); 1700 mpt_free_request(mpt, req); 1701 return (0); 1702 } 1703 1704 int 1705 mpt_read_cfg_header(struct mpt_softc *mpt, int PageType, int PageNumber, 1706 uint32_t PageAddress, CONFIG_PAGE_HEADER *rslt, 1707 int sleep_ok, int timeout_ms) 1708 { 1709 request_t *req; 1710 cfgparms_t params; 1711 MSG_CONFIG *cfgp; 1712 int error; 1713 1714 req = mpt_get_request(mpt, sleep_ok); 1715 if (req == NULL) { 1716 mpt_prt(mpt, "mpt_read_cfg_header: Get request failed!\n"); 1717 return (ENOMEM); 1718 } 1719 1720 params.Action = MPI_CONFIG_ACTION_PAGE_HEADER; 1721 params.PageVersion = 0; 1722 params.PageLength = 0; 1723 params.PageNumber = PageNumber; 1724 params.PageType = PageType; 1725 params.PageAddress = PageAddress; 1726 error = mpt_issue_cfg_req(mpt, req, ¶ms, /*addr*/0, /*len*/0, 1727 sleep_ok, timeout_ms); 1728 if (error != 0) { 1729 /* 1730 * Leave the request. Without resetting the chip, it's 1731 * still owned by it and we'll just get into trouble 1732 * freeing it now. Mark it as abandoned so that if it 1733 * shows up later it can be freed. 1734 */ 1735 mpt_prt(mpt, "read_cfg_header timed out\n"); 1736 return (ETIMEDOUT); 1737 } 1738 1739 switch (req->IOCStatus & MPI_IOCSTATUS_MASK) { 1740 case MPI_IOCSTATUS_SUCCESS: 1741 cfgp = req->req_vbuf; 1742 bcopy(&cfgp->Header, rslt, sizeof(*rslt)); 1743 error = 0; 1744 break; 1745 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: 1746 mpt_lprt(mpt, MPT_PRT_DEBUG, 1747 "Invalid Page Type %d Number %d Addr 0x%0x\n", 1748 PageType, PageNumber, PageAddress); 1749 error = EINVAL; 1750 break; 1751 default: 1752 mpt_prt(mpt, "mpt_read_cfg_header: Config Info Status %x\n", 1753 req->IOCStatus); 1754 error = EIO; 1755 break; 1756 } 1757 mpt_free_request(mpt, req); 1758 return (error); 1759 } 1760 1761 int 1762 mpt_read_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1763 CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1764 int timeout_ms) 1765 { 1766 request_t *req; 1767 cfgparms_t params; 1768 int error; 1769 1770 req = mpt_get_request(mpt, sleep_ok); 1771 if (req == NULL) { 1772 mpt_prt(mpt, "mpt_read_cfg_page: Get request failed!\n"); 1773 return (-1); 1774 } 1775 1776 params.Action = Action; 1777 params.PageVersion = hdr->PageVersion; 1778 params.PageLength = hdr->PageLength; 1779 params.PageNumber = hdr->PageNumber; 1780 params.PageType = hdr->PageType & MPI_CONFIG_PAGETYPE_MASK; 1781 params.PageAddress = PageAddress; 1782 error = mpt_issue_cfg_req(mpt, req, ¶ms, 1783 req->req_pbuf + MPT_RQSL(mpt), 1784 len, sleep_ok, timeout_ms); 1785 if (error != 0) { 1786 mpt_prt(mpt, "read_cfg_page(%d) timed out\n", Action); 1787 return (-1); 1788 } 1789 1790 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1791 mpt_prt(mpt, "mpt_read_cfg_page: Config Info Status %x\n", 1792 req->IOCStatus); 1793 mpt_free_request(mpt, req); 1794 return (-1); 1795 } 1796 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 1797 BUS_DMASYNC_POSTREAD); 1798 memcpy(hdr, ((uint8_t *)req->req_vbuf)+MPT_RQSL(mpt), len); 1799 mpt_free_request(mpt, req); 1800 return (0); 1801 } 1802 1803 int 1804 mpt_write_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1805 CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1806 int timeout_ms) 1807 { 1808 request_t *req; 1809 cfgparms_t params; 1810 u_int hdr_attr; 1811 int error; 1812 1813 hdr_attr = hdr->PageType & MPI_CONFIG_PAGEATTR_MASK; 1814 if (hdr_attr != MPI_CONFIG_PAGEATTR_CHANGEABLE && 1815 hdr_attr != MPI_CONFIG_PAGEATTR_PERSISTENT) { 1816 mpt_prt(mpt, "page type 0x%x not changeable\n", 1817 hdr->PageType & MPI_CONFIG_PAGETYPE_MASK); 1818 return (-1); 1819 } 1820 1821 #if 0 1822 /* 1823 * We shouldn't mask off other bits here. 1824 */ 1825 hdr->PageType &= MPI_CONFIG_PAGETYPE_MASK; 1826 #endif 1827 1828 req = mpt_get_request(mpt, sleep_ok); 1829 if (req == NULL) 1830 return (-1); 1831 1832 memcpy(((caddr_t)req->req_vbuf) + MPT_RQSL(mpt), hdr, len); 1833 1834 /* 1835 * There isn't any point in restoring stripped out attributes 1836 * if you then mask them going down to issue the request. 1837 */ 1838 1839 params.Action = Action; 1840 params.PageVersion = hdr->PageVersion; 1841 params.PageLength = hdr->PageLength; 1842 params.PageNumber = hdr->PageNumber; 1843 params.PageAddress = PageAddress; 1844 #if 0 1845 /* Restore stripped out attributes */ 1846 hdr->PageType |= hdr_attr; 1847 params.PageType = hdr->PageType & MPI_CONFIG_PAGETYPE_MASK; 1848 #else 1849 params.PageType = hdr->PageType; 1850 #endif 1851 error = mpt_issue_cfg_req(mpt, req, ¶ms, 1852 req->req_pbuf + MPT_RQSL(mpt), 1853 len, sleep_ok, timeout_ms); 1854 if (error != 0) { 1855 mpt_prt(mpt, "mpt_write_cfg_page timed out\n"); 1856 return (-1); 1857 } 1858 1859 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1860 mpt_prt(mpt, "mpt_write_cfg_page: Config Info Status %x\n", 1861 req->IOCStatus); 1862 mpt_free_request(mpt, req); 1863 return (-1); 1864 } 1865 mpt_free_request(mpt, req); 1866 return (0); 1867 } 1868 1869 /* 1870 * Read IOC configuration information 1871 */ 1872 static int 1873 mpt_read_config_info_ioc(struct mpt_softc *mpt) 1874 { 1875 CONFIG_PAGE_HEADER hdr; 1876 struct mpt_raid_volume *mpt_raid; 1877 int rv; 1878 int i; 1879 size_t len; 1880 1881 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 1882 2, 0, &hdr, FALSE, 5000); 1883 /* 1884 * If it's an invalid page, so what? Not a supported function.... 1885 */ 1886 if (rv == EINVAL) { 1887 return (0); 1888 } 1889 if (rv) { 1890 return (rv); 1891 } 1892 1893 mpt_lprt(mpt, MPT_PRT_DEBUG, 1894 "IOC Page 2 Header: Version %x len %x PageNumber %x PageType %x\n", 1895 hdr.PageVersion, hdr.PageLength << 2, 1896 hdr.PageNumber, hdr.PageType); 1897 1898 len = hdr.PageLength * sizeof(uint32_t); 1899 mpt->ioc_page2 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1900 if (mpt->ioc_page2 == NULL) { 1901 mpt_prt(mpt, "unable to allocate memory for IOC page 2\n"); 1902 mpt_raid_free_mem(mpt); 1903 return (ENOMEM); 1904 } 1905 memcpy(&mpt->ioc_page2->Header, &hdr, sizeof(hdr)); 1906 rv = mpt_read_cur_cfg_page(mpt, 0, 1907 &mpt->ioc_page2->Header, len, FALSE, 5000); 1908 if (rv) { 1909 mpt_prt(mpt, "failed to read IOC Page 2\n"); 1910 mpt_raid_free_mem(mpt); 1911 return (EIO); 1912 } 1913 mpt2host_config_page_ioc2(mpt->ioc_page2); 1914 1915 if (mpt->ioc_page2->CapabilitiesFlags != 0) { 1916 uint32_t mask; 1917 1918 mpt_prt(mpt, "Capabilities: ("); 1919 for (mask = 1; mask != 0; mask <<= 1) { 1920 if ((mpt->ioc_page2->CapabilitiesFlags & mask) == 0) { 1921 continue; 1922 } 1923 switch (mask) { 1924 case MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT: 1925 mpt_prtc(mpt, " RAID-0"); 1926 break; 1927 case MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT: 1928 mpt_prtc(mpt, " RAID-1E"); 1929 break; 1930 case MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT: 1931 mpt_prtc(mpt, " RAID-1"); 1932 break; 1933 case MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT: 1934 mpt_prtc(mpt, " SES"); 1935 break; 1936 case MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT: 1937 mpt_prtc(mpt, " SAFTE"); 1938 break; 1939 case MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT: 1940 mpt_prtc(mpt, " Multi-Channel-Arrays"); 1941 default: 1942 break; 1943 } 1944 } 1945 mpt_prtc(mpt, " )\n"); 1946 if ((mpt->ioc_page2->CapabilitiesFlags 1947 & (MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT 1948 | MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT 1949 | MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT)) != 0) { 1950 mpt_prt(mpt, "%d Active Volume%s(%d Max)\n", 1951 mpt->ioc_page2->NumActiveVolumes, 1952 mpt->ioc_page2->NumActiveVolumes != 1 1953 ? "s " : " ", 1954 mpt->ioc_page2->MaxVolumes); 1955 mpt_prt(mpt, "%d Hidden Drive Member%s(%d Max)\n", 1956 mpt->ioc_page2->NumActivePhysDisks, 1957 mpt->ioc_page2->NumActivePhysDisks != 1 1958 ? "s " : " ", 1959 mpt->ioc_page2->MaxPhysDisks); 1960 } 1961 } 1962 1963 len = mpt->ioc_page2->MaxVolumes * sizeof(struct mpt_raid_volume); 1964 mpt->raid_volumes = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1965 if (mpt->raid_volumes == NULL) { 1966 mpt_prt(mpt, "Could not allocate RAID volume data\n"); 1967 mpt_raid_free_mem(mpt); 1968 return (ENOMEM); 1969 } 1970 1971 /* 1972 * Copy critical data out of ioc_page2 so that we can 1973 * safely refresh the page without windows of unreliable 1974 * data. 1975 */ 1976 mpt->raid_max_volumes = mpt->ioc_page2->MaxVolumes; 1977 1978 len = sizeof(*mpt->raid_volumes->config_page) + 1979 (sizeof (RAID_VOL0_PHYS_DISK) * (mpt->ioc_page2->MaxPhysDisks - 1)); 1980 for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) { 1981 mpt_raid = &mpt->raid_volumes[i]; 1982 mpt_raid->config_page = 1983 malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1984 if (mpt_raid->config_page == NULL) { 1985 mpt_prt(mpt, "Could not allocate RAID page data\n"); 1986 mpt_raid_free_mem(mpt); 1987 return (ENOMEM); 1988 } 1989 } 1990 mpt->raid_page0_len = len; 1991 1992 len = mpt->ioc_page2->MaxPhysDisks * sizeof(struct mpt_raid_disk); 1993 mpt->raid_disks = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1994 if (mpt->raid_disks == NULL) { 1995 mpt_prt(mpt, "Could not allocate RAID disk data\n"); 1996 mpt_raid_free_mem(mpt); 1997 return (ENOMEM); 1998 } 1999 mpt->raid_max_disks = mpt->ioc_page2->MaxPhysDisks; 2000 2001 /* 2002 * Load page 3. 2003 */ 2004 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 2005 3, 0, &hdr, FALSE, 5000); 2006 if (rv) { 2007 mpt_raid_free_mem(mpt); 2008 return (EIO); 2009 } 2010 2011 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 3 Header: %x %x %x %x\n", 2012 hdr.PageVersion, hdr.PageLength, hdr.PageNumber, hdr.PageType); 2013 2014 len = hdr.PageLength * sizeof(uint32_t); 2015 mpt->ioc_page3 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 2016 if (mpt->ioc_page3 == NULL) { 2017 mpt_prt(mpt, "unable to allocate memory for IOC page 3\n"); 2018 mpt_raid_free_mem(mpt); 2019 return (ENOMEM); 2020 } 2021 memcpy(&mpt->ioc_page3->Header, &hdr, sizeof(hdr)); 2022 rv = mpt_read_cur_cfg_page(mpt, 0, 2023 &mpt->ioc_page3->Header, len, FALSE, 5000); 2024 if (rv) { 2025 mpt_raid_free_mem(mpt); 2026 return (EIO); 2027 } 2028 mpt2host_config_page_ioc3(mpt->ioc_page3); 2029 mpt_raid_wakeup(mpt); 2030 return (0); 2031 } 2032 2033 /* 2034 * Enable IOC port 2035 */ 2036 static int 2037 mpt_send_port_enable(struct mpt_softc *mpt, int port) 2038 { 2039 request_t *req; 2040 MSG_PORT_ENABLE *enable_req; 2041 int error; 2042 2043 req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 2044 if (req == NULL) 2045 return (-1); 2046 2047 enable_req = req->req_vbuf; 2048 memset(enable_req, 0, MPT_RQSL(mpt)); 2049 2050 enable_req->Function = MPI_FUNCTION_PORT_ENABLE; 2051 enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 2052 enable_req->PortNumber = port; 2053 2054 mpt_check_doorbell(mpt); 2055 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling port %d\n", port); 2056 2057 mpt_send_cmd(mpt, req); 2058 error = mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 2059 FALSE, (mpt->is_sas || mpt->is_fc)? 30000 : 3000); 2060 if (error != 0) { 2061 mpt_prt(mpt, "port %d enable timed out\n", port); 2062 return (-1); 2063 } 2064 mpt_free_request(mpt, req); 2065 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabled port %d\n", port); 2066 return (0); 2067 } 2068 2069 /* 2070 * Enable/Disable asynchronous event reporting. 2071 */ 2072 static int 2073 mpt_send_event_request(struct mpt_softc *mpt, int onoff) 2074 { 2075 request_t *req; 2076 MSG_EVENT_NOTIFY *enable_req; 2077 2078 req = mpt_get_request(mpt, FALSE); 2079 if (req == NULL) { 2080 return (ENOMEM); 2081 } 2082 enable_req = req->req_vbuf; 2083 memset(enable_req, 0, sizeof *enable_req); 2084 2085 enable_req->Function = MPI_FUNCTION_EVENT_NOTIFICATION; 2086 enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_EVENTS); 2087 enable_req->Switch = onoff; 2088 2089 mpt_check_doorbell(mpt); 2090 mpt_lprt(mpt, MPT_PRT_DEBUG, "%sabling async events\n", 2091 onoff ? "en" : "dis"); 2092 /* 2093 * Send the command off, but don't wait for it. 2094 */ 2095 mpt_send_cmd(mpt, req); 2096 return (0); 2097 } 2098 2099 /* 2100 * Un-mask the interrupts on the chip. 2101 */ 2102 void 2103 mpt_enable_ints(struct mpt_softc *mpt) 2104 { 2105 /* Unmask every thing except door bell int */ 2106 mpt_write(mpt, MPT_OFFSET_INTR_MASK, MPT_INTR_DB_MASK); 2107 } 2108 2109 /* 2110 * Mask the interrupts on the chip. 2111 */ 2112 void 2113 mpt_disable_ints(struct mpt_softc *mpt) 2114 { 2115 /* Mask all interrupts */ 2116 mpt_write(mpt, MPT_OFFSET_INTR_MASK, 2117 MPT_INTR_REPLY_MASK | MPT_INTR_DB_MASK); 2118 } 2119 2120 static void 2121 mpt_sysctl_attach(struct mpt_softc *mpt) 2122 { 2123 #if __FreeBSD_version >= 500000 2124 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(mpt->dev); 2125 struct sysctl_oid *tree = device_get_sysctl_tree(mpt->dev); 2126 2127 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 2128 "debug", CTLFLAG_RW, &mpt->verbose, 0, 2129 "Debugging/Verbose level"); 2130 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 2131 "role", CTLFLAG_RD, &mpt->role, 0, 2132 "HBA role"); 2133 #ifdef MPT_TEST_MULTIPATH 2134 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 2135 "failure_id", CTLFLAG_RW, &mpt->failure_id, -1, 2136 "Next Target to Fail"); 2137 #endif 2138 #endif 2139 } 2140 2141 int 2142 mpt_attach(struct mpt_softc *mpt) 2143 { 2144 struct mpt_personality *pers; 2145 int i; 2146 int error; 2147 2148 mpt_core_attach(mpt); 2149 mpt_core_enable(mpt); 2150 2151 TAILQ_INSERT_TAIL(&mpt_tailq, mpt, links); 2152 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 2153 pers = mpt_personalities[i]; 2154 if (pers == NULL) { 2155 continue; 2156 } 2157 if (pers->probe(mpt) == 0) { 2158 error = pers->attach(mpt); 2159 if (error != 0) { 2160 mpt_detach(mpt); 2161 return (error); 2162 } 2163 mpt->mpt_pers_mask |= (0x1 << pers->id); 2164 pers->use_count++; 2165 } 2166 } 2167 2168 /* 2169 * Now that we've attached everything, do the enable function 2170 * for all of the personalities. This allows the personalities 2171 * to do setups that are appropriate for them prior to enabling 2172 * any ports. 2173 */ 2174 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 2175 pers = mpt_personalities[i]; 2176 if (pers != NULL && MPT_PERS_ATTACHED(pers, mpt) != 0) { 2177 error = pers->enable(mpt); 2178 if (error != 0) { 2179 mpt_prt(mpt, "personality %s attached but would" 2180 " not enable (%d)\n", pers->name, error); 2181 mpt_detach(mpt); 2182 return (error); 2183 } 2184 } 2185 } 2186 return (0); 2187 } 2188 2189 int 2190 mpt_shutdown(struct mpt_softc *mpt) 2191 { 2192 struct mpt_personality *pers; 2193 2194 MPT_PERS_FOREACH_REVERSE(mpt, pers) { 2195 pers->shutdown(mpt); 2196 } 2197 return (0); 2198 } 2199 2200 int 2201 mpt_detach(struct mpt_softc *mpt) 2202 { 2203 struct mpt_personality *pers; 2204 2205 MPT_PERS_FOREACH_REVERSE(mpt, pers) { 2206 pers->detach(mpt); 2207 mpt->mpt_pers_mask &= ~(0x1 << pers->id); 2208 pers->use_count--; 2209 } 2210 TAILQ_REMOVE(&mpt_tailq, mpt, links); 2211 return (0); 2212 } 2213 2214 int 2215 mpt_core_load(struct mpt_personality *pers) 2216 { 2217 int i; 2218 2219 /* 2220 * Setup core handlers and insert the default handler 2221 * into all "empty slots". 2222 */ 2223 for (i = 0; i < MPT_NUM_REPLY_HANDLERS; i++) { 2224 mpt_reply_handlers[i] = mpt_default_reply_handler; 2225 } 2226 2227 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_EVENTS)] = 2228 mpt_event_reply_handler; 2229 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_CONFIG)] = 2230 mpt_config_reply_handler; 2231 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_HANDSHAKE)] = 2232 mpt_handshake_reply_handler; 2233 return (0); 2234 } 2235 2236 /* 2237 * Initialize per-instance driver data and perform 2238 * initial controller configuration. 2239 */ 2240 int 2241 mpt_core_attach(struct mpt_softc *mpt) 2242 { 2243 int val, error; 2244 2245 LIST_INIT(&mpt->ack_frames); 2246 /* Put all request buffers on the free list */ 2247 TAILQ_INIT(&mpt->request_pending_list); 2248 TAILQ_INIT(&mpt->request_free_list); 2249 TAILQ_INIT(&mpt->request_timeout_list); 2250 MPT_LOCK(mpt); 2251 for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) { 2252 request_t *req = &mpt->request_pool[val]; 2253 req->state = REQ_STATE_ALLOCATED; 2254 mpt_free_request(mpt, req); 2255 } 2256 MPT_UNLOCK(mpt); 2257 for (val = 0; val < MPT_MAX_LUNS; val++) { 2258 STAILQ_INIT(&mpt->trt[val].atios); 2259 STAILQ_INIT(&mpt->trt[val].inots); 2260 } 2261 STAILQ_INIT(&mpt->trt_wildcard.atios); 2262 STAILQ_INIT(&mpt->trt_wildcard.inots); 2263 #ifdef MPT_TEST_MULTIPATH 2264 mpt->failure_id = -1; 2265 #endif 2266 mpt->scsi_tgt_handler_id = MPT_HANDLER_ID_NONE; 2267 mpt_sysctl_attach(mpt); 2268 mpt_lprt(mpt, MPT_PRT_DEBUG, "doorbell req = %s\n", 2269 mpt_ioc_diag(mpt_read(mpt, MPT_OFFSET_DOORBELL))); 2270 2271 MPT_LOCK(mpt); 2272 error = mpt_configure_ioc(mpt, 0, 0); 2273 MPT_UNLOCK(mpt); 2274 2275 return (error); 2276 } 2277 2278 int 2279 mpt_core_enable(struct mpt_softc *mpt) 2280 { 2281 /* 2282 * We enter with the IOC enabled, but async events 2283 * not enabled, ports not enabled and interrupts 2284 * not enabled. 2285 */ 2286 MPT_LOCK(mpt); 2287 2288 /* 2289 * Enable asynchronous event reporting- all personalities 2290 * have attached so that they should be able to now field 2291 * async events. 2292 */ 2293 mpt_send_event_request(mpt, 1); 2294 2295 /* 2296 * Catch any pending interrupts 2297 * 2298 * This seems to be crucial- otherwise 2299 * the portenable below times out. 2300 */ 2301 mpt_intr(mpt); 2302 2303 /* 2304 * Enable Interrupts 2305 */ 2306 mpt_enable_ints(mpt); 2307 2308 /* 2309 * Catch any pending interrupts 2310 * 2311 * This seems to be crucial- otherwise 2312 * the portenable below times out. 2313 */ 2314 mpt_intr(mpt); 2315 2316 /* 2317 * Enable the port. 2318 */ 2319 if (mpt_send_port_enable(mpt, 0) != MPT_OK) { 2320 mpt_prt(mpt, "failed to enable port 0\n"); 2321 MPT_UNLOCK(mpt); 2322 return (ENXIO); 2323 } 2324 MPT_UNLOCK(mpt); 2325 return (0); 2326 } 2327 2328 void 2329 mpt_core_shutdown(struct mpt_softc *mpt) 2330 { 2331 mpt_disable_ints(mpt); 2332 } 2333 2334 void 2335 mpt_core_detach(struct mpt_softc *mpt) 2336 { 2337 /* 2338 * XXX: FREE MEMORY 2339 */ 2340 mpt_disable_ints(mpt); 2341 } 2342 2343 int 2344 mpt_core_unload(struct mpt_personality *pers) 2345 { 2346 /* Unload is always successfull. */ 2347 return (0); 2348 } 2349 2350 #define FW_UPLOAD_REQ_SIZE \ 2351 (sizeof(MSG_FW_UPLOAD) - sizeof(SGE_MPI_UNION) \ 2352 + sizeof(FW_UPLOAD_TCSGE) + sizeof(SGE_SIMPLE32)) 2353 2354 static int 2355 mpt_upload_fw(struct mpt_softc *mpt) 2356 { 2357 uint8_t fw_req_buf[FW_UPLOAD_REQ_SIZE]; 2358 MSG_FW_UPLOAD_REPLY fw_reply; 2359 MSG_FW_UPLOAD *fw_req; 2360 FW_UPLOAD_TCSGE *tsge; 2361 SGE_SIMPLE32 *sge; 2362 uint32_t flags; 2363 int error; 2364 2365 memset(&fw_req_buf, 0, sizeof(fw_req_buf)); 2366 fw_req = (MSG_FW_UPLOAD *)fw_req_buf; 2367 fw_req->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM; 2368 fw_req->Function = MPI_FUNCTION_FW_UPLOAD; 2369 fw_req->MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 2370 tsge = (FW_UPLOAD_TCSGE *)&fw_req->SGL; 2371 tsge->DetailsLength = 12; 2372 tsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT; 2373 tsge->ImageSize = htole32(mpt->fw_image_size); 2374 sge = (SGE_SIMPLE32 *)(tsge + 1); 2375 flags = (MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER 2376 | MPI_SGE_FLAGS_END_OF_LIST | MPI_SGE_FLAGS_SIMPLE_ELEMENT 2377 | MPI_SGE_FLAGS_32_BIT_ADDRESSING | MPI_SGE_FLAGS_IOC_TO_HOST); 2378 flags <<= MPI_SGE_FLAGS_SHIFT; 2379 sge->FlagsLength = htole32(flags | mpt->fw_image_size); 2380 sge->Address = htole32(mpt->fw_phys); 2381 error = mpt_send_handshake_cmd(mpt, sizeof(fw_req_buf), &fw_req_buf); 2382 if (error) 2383 return(error); 2384 error = mpt_recv_handshake_reply(mpt, sizeof(fw_reply), &fw_reply); 2385 return (error); 2386 } 2387 2388 static void 2389 mpt_diag_outsl(struct mpt_softc *mpt, uint32_t addr, 2390 uint32_t *data, bus_size_t len) 2391 { 2392 uint32_t *data_end; 2393 2394 data_end = data + (roundup2(len, sizeof(uint32_t)) / 4); 2395 if (mpt->is_sas) { 2396 pci_enable_io(mpt->dev, SYS_RES_IOPORT); 2397 } 2398 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, addr); 2399 while (data != data_end) { 2400 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, *data); 2401 data++; 2402 } 2403 if (mpt->is_sas) { 2404 pci_disable_io(mpt->dev, SYS_RES_IOPORT); 2405 } 2406 } 2407 2408 static int 2409 mpt_download_fw(struct mpt_softc *mpt) 2410 { 2411 MpiFwHeader_t *fw_hdr; 2412 int error; 2413 uint32_t ext_offset; 2414 uint32_t data; 2415 2416 mpt_prt(mpt, "Downloading Firmware - Image Size %d\n", 2417 mpt->fw_image_size); 2418 2419 error = mpt_enable_diag_mode(mpt); 2420 if (error != 0) { 2421 mpt_prt(mpt, "Could not enter diagnostic mode!\n"); 2422 return (EIO); 2423 } 2424 2425 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, 2426 MPI_DIAG_RW_ENABLE|MPI_DIAG_DISABLE_ARM); 2427 2428 fw_hdr = (MpiFwHeader_t *)mpt->fw_image; 2429 mpt_diag_outsl(mpt, fw_hdr->LoadStartAddress, (uint32_t*)fw_hdr, 2430 fw_hdr->ImageSize); 2431 2432 ext_offset = fw_hdr->NextImageHeaderOffset; 2433 while (ext_offset != 0) { 2434 MpiExtImageHeader_t *ext; 2435 2436 ext = (MpiExtImageHeader_t *)((uintptr_t)fw_hdr + ext_offset); 2437 ext_offset = ext->NextImageHeaderOffset; 2438 2439 mpt_diag_outsl(mpt, ext->LoadStartAddress, (uint32_t*)ext, 2440 ext->ImageSize); 2441 } 2442 2443 if (mpt->is_sas) { 2444 pci_enable_io(mpt->dev, SYS_RES_IOPORT); 2445 } 2446 /* Setup the address to jump to on reset. */ 2447 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, fw_hdr->IopResetRegAddr); 2448 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, fw_hdr->IopResetVectorValue); 2449 2450 /* 2451 * The controller sets the "flash bad" status after attempting 2452 * to auto-boot from flash. Clear the status so that the controller 2453 * will continue the boot process with our newly installed firmware. 2454 */ 2455 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2456 data = mpt_pio_read(mpt, MPT_OFFSET_DIAG_DATA) | MPT_DIAG_MEM_CFG_BADFL; 2457 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2458 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, data); 2459 2460 if (mpt->is_sas) { 2461 pci_disable_io(mpt->dev, SYS_RES_IOPORT); 2462 } 2463 2464 /* 2465 * Re-enable the processor and clear the boot halt flag. 2466 */ 2467 data = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 2468 data &= ~(MPI_DIAG_PREVENT_IOC_BOOT|MPI_DIAG_DISABLE_ARM); 2469 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, data); 2470 2471 mpt_disable_diag_mode(mpt); 2472 return (0); 2473 } 2474 2475 /* 2476 * Allocate/Initialize data structures for the controller. Called 2477 * once at instance startup. 2478 */ 2479 static int 2480 mpt_configure_ioc(struct mpt_softc *mpt, int tn, int needreset) 2481 { 2482 PTR_MSG_PORT_FACTS_REPLY pfp; 2483 int error, port; 2484 size_t len; 2485 2486 if (tn == MPT_MAX_TRYS) { 2487 return (-1); 2488 } 2489 2490 /* 2491 * No need to reset if the IOC is already in the READY state. 2492 * 2493 * Force reset if initialization failed previously. 2494 * Note that a hard_reset of the second channel of a '929 2495 * will stop operation of the first channel. Hopefully, if the 2496 * first channel is ok, the second will not require a hard 2497 * reset. 2498 */ 2499 if (needreset || MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_READY) { 2500 if (mpt_reset(mpt, FALSE) != MPT_OK) { 2501 return (mpt_configure_ioc(mpt, tn++, 1)); 2502 } 2503 needreset = 0; 2504 } 2505 2506 if (mpt_get_iocfacts(mpt, &mpt->ioc_facts) != MPT_OK) { 2507 mpt_prt(mpt, "mpt_get_iocfacts failed\n"); 2508 return (mpt_configure_ioc(mpt, tn++, 1)); 2509 } 2510 mpt2host_iocfacts_reply(&mpt->ioc_facts); 2511 2512 mpt_prt(mpt, "MPI Version=%d.%d.%d.%d\n", 2513 mpt->ioc_facts.MsgVersion >> 8, 2514 mpt->ioc_facts.MsgVersion & 0xFF, 2515 mpt->ioc_facts.HeaderVersion >> 8, 2516 mpt->ioc_facts.HeaderVersion & 0xFF); 2517 2518 /* 2519 * Now that we know request frame size, we can calculate 2520 * the actual (reasonable) segment limit for read/write I/O. 2521 * 2522 * This limit is constrained by: 2523 * 2524 * + The size of each area we allocate per command (and how 2525 * many chain segments we can fit into it). 2526 * + The total number of areas we've set up. 2527 * + The actual chain depth the card will allow. 2528 * 2529 * The first area's segment count is limited by the I/O request 2530 * at the head of it. We cannot allocate realistically more 2531 * than MPT_MAX_REQUESTS areas. Therefore, to account for both 2532 * conditions, we'll just start out with MPT_MAX_REQUESTS-2. 2533 * 2534 */ 2535 /* total number of request areas we (can) allocate */ 2536 mpt->max_seg_cnt = MPT_MAX_REQUESTS(mpt) - 2; 2537 2538 /* converted to the number of chain areas possible */ 2539 mpt->max_seg_cnt *= MPT_NRFM(mpt); 2540 2541 /* limited by the number of chain areas the card will support */ 2542 if (mpt->max_seg_cnt > mpt->ioc_facts.MaxChainDepth) { 2543 mpt_lprt(mpt, MPT_PRT_DEBUG, 2544 "chain depth limited to %u (from %u)\n", 2545 mpt->ioc_facts.MaxChainDepth, mpt->max_seg_cnt); 2546 mpt->max_seg_cnt = mpt->ioc_facts.MaxChainDepth; 2547 } 2548 2549 /* converted to the number of simple sges in chain segments. */ 2550 mpt->max_seg_cnt *= (MPT_NSGL(mpt) - 1); 2551 2552 mpt_lprt(mpt, MPT_PRT_DEBUG, "Maximum Segment Count: %u\n", 2553 mpt->max_seg_cnt); 2554 mpt_lprt(mpt, MPT_PRT_DEBUG, "MsgLength=%u IOCNumber = %d\n", 2555 mpt->ioc_facts.MsgLength, mpt->ioc_facts.IOCNumber); 2556 mpt_lprt(mpt, MPT_PRT_DEBUG, 2557 "IOCFACTS: GlobalCredits=%d BlockSize=%u bytes " 2558 "Request Frame Size %u bytes Max Chain Depth %u\n", 2559 mpt->ioc_facts.GlobalCredits, mpt->ioc_facts.BlockSize, 2560 mpt->ioc_facts.RequestFrameSize << 2, 2561 mpt->ioc_facts.MaxChainDepth); 2562 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOCFACTS: Num Ports %d, FWImageSize %d, " 2563 "Flags=%#x\n", mpt->ioc_facts.NumberOfPorts, 2564 mpt->ioc_facts.FWImageSize, mpt->ioc_facts.Flags); 2565 2566 len = mpt->ioc_facts.NumberOfPorts * sizeof (MSG_PORT_FACTS_REPLY); 2567 mpt->port_facts = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 2568 if (mpt->port_facts == NULL) { 2569 mpt_prt(mpt, "unable to allocate memory for port facts\n"); 2570 return (ENOMEM); 2571 } 2572 2573 2574 if ((mpt->ioc_facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) && 2575 (mpt->fw_uploaded == 0)) { 2576 struct mpt_map_info mi; 2577 2578 /* 2579 * In some configurations, the IOC's firmware is 2580 * stored in a shared piece of system NVRAM that 2581 * is only accessable via the BIOS. In this 2582 * case, the firmware keeps a copy of firmware in 2583 * RAM until the OS driver retrieves it. Once 2584 * retrieved, we are responsible for re-downloading 2585 * the firmware after any hard-reset. 2586 */ 2587 mpt->fw_image_size = mpt->ioc_facts.FWImageSize; 2588 error = mpt_dma_tag_create(mpt, mpt->parent_dmat, 1, 0, 2589 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 2590 mpt->fw_image_size, 1, mpt->fw_image_size, 0, 2591 &mpt->fw_dmat); 2592 if (error != 0) { 2593 mpt_prt(mpt, "cannot create firmwarew dma tag\n"); 2594 return (ENOMEM); 2595 } 2596 error = bus_dmamem_alloc(mpt->fw_dmat, 2597 (void **)&mpt->fw_image, BUS_DMA_NOWAIT, &mpt->fw_dmap); 2598 if (error != 0) { 2599 mpt_prt(mpt, "cannot allocate firmware memory\n"); 2600 bus_dma_tag_destroy(mpt->fw_dmat); 2601 return (ENOMEM); 2602 } 2603 mi.mpt = mpt; 2604 mi.error = 0; 2605 bus_dmamap_load(mpt->fw_dmat, mpt->fw_dmap, 2606 mpt->fw_image, mpt->fw_image_size, mpt_map_rquest, &mi, 0); 2607 mpt->fw_phys = mi.phys; 2608 2609 error = mpt_upload_fw(mpt); 2610 if (error != 0) { 2611 mpt_prt(mpt, "firmware upload failed.\n"); 2612 bus_dmamap_unload(mpt->fw_dmat, mpt->fw_dmap); 2613 bus_dmamem_free(mpt->fw_dmat, mpt->fw_image, 2614 mpt->fw_dmap); 2615 bus_dma_tag_destroy(mpt->fw_dmat); 2616 mpt->fw_image = NULL; 2617 return (EIO); 2618 } 2619 mpt->fw_uploaded = 1; 2620 } 2621 2622 for (port = 0; port < mpt->ioc_facts.NumberOfPorts; port++) { 2623 pfp = &mpt->port_facts[port]; 2624 error = mpt_get_portfacts(mpt, 0, pfp); 2625 if (error != MPT_OK) { 2626 mpt_prt(mpt, 2627 "mpt_get_portfacts on port %d failed\n", port); 2628 free(mpt->port_facts, M_DEVBUF); 2629 mpt->port_facts = NULL; 2630 return (mpt_configure_ioc(mpt, tn++, 1)); 2631 } 2632 mpt2host_portfacts_reply(pfp); 2633 2634 if (port > 0) { 2635 error = MPT_PRT_INFO; 2636 } else { 2637 error = MPT_PRT_DEBUG; 2638 } 2639 mpt_lprt(mpt, error, 2640 "PORTFACTS[%d]: Type %x PFlags %x IID %d MaxDev %d\n", 2641 port, pfp->PortType, pfp->ProtocolFlags, pfp->PortSCSIID, 2642 pfp->MaxDevices); 2643 2644 } 2645 2646 /* 2647 * XXX: Not yet supporting more than port 0 2648 */ 2649 pfp = &mpt->port_facts[0]; 2650 if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_FC) { 2651 mpt->is_fc = 1; 2652 mpt->is_sas = 0; 2653 mpt->is_spi = 0; 2654 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_SAS) { 2655 mpt->is_fc = 0; 2656 mpt->is_sas = 1; 2657 mpt->is_spi = 0; 2658 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_SCSI) { 2659 mpt->is_fc = 0; 2660 mpt->is_sas = 0; 2661 mpt->is_spi = 1; 2662 if (mpt->mpt_ini_id == MPT_INI_ID_NONE) 2663 mpt->mpt_ini_id = pfp->PortSCSIID; 2664 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_ISCSI) { 2665 mpt_prt(mpt, "iSCSI not supported yet\n"); 2666 return (ENXIO); 2667 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_INACTIVE) { 2668 mpt_prt(mpt, "Inactive Port\n"); 2669 return (ENXIO); 2670 } else { 2671 mpt_prt(mpt, "unknown Port Type %#x\n", pfp->PortType); 2672 return (ENXIO); 2673 } 2674 2675 /* 2676 * Set our role with what this port supports. 2677 * 2678 * Note this might be changed later in different modules 2679 * if this is different from what is wanted. 2680 */ 2681 mpt->role = MPT_ROLE_NONE; 2682 if (pfp->ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) { 2683 mpt->role |= MPT_ROLE_INITIATOR; 2684 } 2685 if (pfp->ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) { 2686 mpt->role |= MPT_ROLE_TARGET; 2687 } 2688 2689 /* 2690 * Enable the IOC 2691 */ 2692 if (mpt_enable_ioc(mpt, 1) != MPT_OK) { 2693 mpt_prt(mpt, "unable to initialize IOC\n"); 2694 return (ENXIO); 2695 } 2696 2697 /* 2698 * Read IOC configuration information. 2699 * 2700 * We need this to determine whether or not we have certain 2701 * settings for Integrated Mirroring (e.g.). 2702 */ 2703 mpt_read_config_info_ioc(mpt); 2704 2705 return (0); 2706 } 2707 2708 static int 2709 mpt_enable_ioc(struct mpt_softc *mpt, int portenable) 2710 { 2711 uint32_t pptr; 2712 int val; 2713 2714 if (mpt_send_ioc_init(mpt, MPI_WHOINIT_HOST_DRIVER) != MPT_OK) { 2715 mpt_prt(mpt, "mpt_send_ioc_init failed\n"); 2716 return (EIO); 2717 } 2718 2719 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_send_ioc_init ok\n"); 2720 2721 if (mpt_wait_state(mpt, MPT_DB_STATE_RUNNING) != MPT_OK) { 2722 mpt_prt(mpt, "IOC failed to go to run state\n"); 2723 return (ENXIO); 2724 } 2725 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC now at RUNSTATE\n"); 2726 2727 /* 2728 * Give it reply buffers 2729 * 2730 * Do *not* exceed global credits. 2731 */ 2732 for (val = 0, pptr = mpt->reply_phys; 2733 (pptr + MPT_REPLY_SIZE) < (mpt->reply_phys + PAGE_SIZE); 2734 pptr += MPT_REPLY_SIZE) { 2735 mpt_free_reply(mpt, pptr); 2736 if (++val == mpt->ioc_facts.GlobalCredits - 1) 2737 break; 2738 } 2739 2740 2741 /* 2742 * Enable the port if asked. This is only done if we're resetting 2743 * the IOC after initial startup. 2744 */ 2745 if (portenable) { 2746 /* 2747 * Enable asynchronous event reporting 2748 */ 2749 mpt_send_event_request(mpt, 1); 2750 2751 if (mpt_send_port_enable(mpt, 0) != MPT_OK) { 2752 mpt_prt(mpt, "failed to enable port 0\n"); 2753 return (ENXIO); 2754 } 2755 } 2756 return (MPT_OK); 2757 } 2758 2759 /* 2760 * Endian Conversion Functions- only used on Big Endian machines 2761 */ 2762 #if _BYTE_ORDER == _BIG_ENDIAN 2763 void 2764 mpt2host_sge_simple_union(SGE_SIMPLE_UNION *sge) 2765 { 2766 2767 MPT_2_HOST32(sge, FlagsLength); 2768 MPT_2_HOST32(sge, u.Address64.Low); 2769 MPT_2_HOST32(sge, u.Address64.High); 2770 } 2771 2772 void 2773 mpt2host_iocfacts_reply(MSG_IOC_FACTS_REPLY *rp) 2774 { 2775 2776 MPT_2_HOST16(rp, MsgVersion); 2777 MPT_2_HOST16(rp, HeaderVersion); 2778 MPT_2_HOST32(rp, MsgContext); 2779 MPT_2_HOST16(rp, IOCExceptions); 2780 MPT_2_HOST16(rp, IOCStatus); 2781 MPT_2_HOST32(rp, IOCLogInfo); 2782 MPT_2_HOST16(rp, ReplyQueueDepth); 2783 MPT_2_HOST16(rp, RequestFrameSize); 2784 MPT_2_HOST16(rp, Reserved_0101_FWVersion); 2785 MPT_2_HOST16(rp, ProductID); 2786 MPT_2_HOST32(rp, CurrentHostMfaHighAddr); 2787 MPT_2_HOST16(rp, GlobalCredits); 2788 MPT_2_HOST32(rp, CurrentSenseBufferHighAddr); 2789 MPT_2_HOST16(rp, CurReplyFrameSize); 2790 MPT_2_HOST32(rp, FWImageSize); 2791 MPT_2_HOST32(rp, IOCCapabilities); 2792 MPT_2_HOST32(rp, FWVersion.Word); 2793 MPT_2_HOST16(rp, HighPriorityQueueDepth); 2794 MPT_2_HOST16(rp, Reserved2); 2795 mpt2host_sge_simple_union(&rp->HostPageBufferSGE); 2796 MPT_2_HOST32(rp, ReplyFifoHostSignalingAddr); 2797 } 2798 2799 void 2800 mpt2host_portfacts_reply(MSG_PORT_FACTS_REPLY *pfp) 2801 { 2802 2803 MPT_2_HOST16(pfp, Reserved); 2804 MPT_2_HOST16(pfp, Reserved1); 2805 MPT_2_HOST32(pfp, MsgContext); 2806 MPT_2_HOST16(pfp, Reserved2); 2807 MPT_2_HOST16(pfp, IOCStatus); 2808 MPT_2_HOST32(pfp, IOCLogInfo); 2809 MPT_2_HOST16(pfp, MaxDevices); 2810 MPT_2_HOST16(pfp, PortSCSIID); 2811 MPT_2_HOST16(pfp, ProtocolFlags); 2812 MPT_2_HOST16(pfp, MaxPostedCmdBuffers); 2813 MPT_2_HOST16(pfp, MaxPersistentIDs); 2814 MPT_2_HOST16(pfp, MaxLanBuckets); 2815 MPT_2_HOST16(pfp, Reserved4); 2816 MPT_2_HOST32(pfp, Reserved5); 2817 } 2818 2819 void 2820 mpt2host_config_page_ioc2(CONFIG_PAGE_IOC_2 *ioc2) 2821 { 2822 int i; 2823 2824 MPT_2_HOST32(ioc2, CapabilitiesFlags); 2825 for (i = 0; i < MPI_IOC_PAGE_2_RAID_VOLUME_MAX; i++) { 2826 MPT_2_HOST16(ioc2, RaidVolume[i].Reserved3); 2827 } 2828 } 2829 2830 void 2831 mpt2host_config_page_ioc3(CONFIG_PAGE_IOC_3 *ioc3) 2832 { 2833 2834 MPT_2_HOST16(ioc3, Reserved2); 2835 } 2836 2837 void 2838 mpt2host_config_page_scsi_port_0(CONFIG_PAGE_SCSI_PORT_0 *sp0) 2839 { 2840 2841 MPT_2_HOST32(sp0, Capabilities); 2842 MPT_2_HOST32(sp0, PhysicalInterface); 2843 } 2844 2845 void 2846 mpt2host_config_page_scsi_port_1(CONFIG_PAGE_SCSI_PORT_1 *sp1) 2847 { 2848 2849 MPT_2_HOST32(sp1, Configuration); 2850 MPT_2_HOST32(sp1, OnBusTimerValue); 2851 MPT_2_HOST16(sp1, IDConfig); 2852 } 2853 2854 void 2855 host2mpt_config_page_scsi_port_1(CONFIG_PAGE_SCSI_PORT_1 *sp1) 2856 { 2857 2858 HOST_2_MPT32(sp1, Configuration); 2859 HOST_2_MPT32(sp1, OnBusTimerValue); 2860 HOST_2_MPT16(sp1, IDConfig); 2861 } 2862 2863 void 2864 mpt2host_config_page_scsi_port_2(CONFIG_PAGE_SCSI_PORT_2 *sp2) 2865 { 2866 int i; 2867 2868 MPT_2_HOST32(sp2, PortFlags); 2869 MPT_2_HOST32(sp2, PortSettings); 2870 for (i = 0; i < sizeof(sp2->DeviceSettings) / 2871 sizeof(*sp2->DeviceSettings); i++) { 2872 MPT_2_HOST16(sp2, DeviceSettings[i].DeviceFlags); 2873 } 2874 } 2875 2876 void 2877 mpt2host_config_page_scsi_device_0(CONFIG_PAGE_SCSI_DEVICE_0 *sd0) 2878 { 2879 2880 MPT_2_HOST32(sd0, NegotiatedParameters); 2881 MPT_2_HOST32(sd0, Information); 2882 } 2883 2884 void 2885 mpt2host_config_page_scsi_device_1(CONFIG_PAGE_SCSI_DEVICE_1 *sd1) 2886 { 2887 2888 MPT_2_HOST32(sd1, RequestedParameters); 2889 MPT_2_HOST32(sd1, Reserved); 2890 MPT_2_HOST32(sd1, Configuration); 2891 } 2892 2893 void 2894 host2mpt_config_page_scsi_device_1(CONFIG_PAGE_SCSI_DEVICE_1 *sd1) 2895 { 2896 2897 HOST_2_MPT32(sd1, RequestedParameters); 2898 HOST_2_MPT32(sd1, Reserved); 2899 HOST_2_MPT32(sd1, Configuration); 2900 } 2901 2902 void 2903 mpt2host_config_page_fc_port_0(CONFIG_PAGE_FC_PORT_0 *fp0) 2904 { 2905 2906 MPT_2_HOST32(fp0, Flags); 2907 MPT_2_HOST32(fp0, PortIdentifier); 2908 MPT_2_HOST32(fp0, WWNN.Low); 2909 MPT_2_HOST32(fp0, WWNN.High); 2910 MPT_2_HOST32(fp0, WWPN.Low); 2911 MPT_2_HOST32(fp0, WWPN.High); 2912 MPT_2_HOST32(fp0, SupportedServiceClass); 2913 MPT_2_HOST32(fp0, SupportedSpeeds); 2914 MPT_2_HOST32(fp0, CurrentSpeed); 2915 MPT_2_HOST32(fp0, MaxFrameSize); 2916 MPT_2_HOST32(fp0, FabricWWNN.Low); 2917 MPT_2_HOST32(fp0, FabricWWNN.High); 2918 MPT_2_HOST32(fp0, FabricWWPN.Low); 2919 MPT_2_HOST32(fp0, FabricWWPN.High); 2920 MPT_2_HOST32(fp0, DiscoveredPortsCount); 2921 MPT_2_HOST32(fp0, MaxInitiators); 2922 } 2923 2924 void 2925 mpt2host_config_page_fc_port_1(CONFIG_PAGE_FC_PORT_1 *fp1) 2926 { 2927 2928 MPT_2_HOST32(fp1, Flags); 2929 MPT_2_HOST32(fp1, NoSEEPROMWWNN.Low); 2930 MPT_2_HOST32(fp1, NoSEEPROMWWNN.High); 2931 MPT_2_HOST32(fp1, NoSEEPROMWWPN.Low); 2932 MPT_2_HOST32(fp1, NoSEEPROMWWPN.High); 2933 } 2934 2935 void 2936 host2mpt_config_page_fc_port_1(CONFIG_PAGE_FC_PORT_1 *fp1) 2937 { 2938 2939 HOST_2_MPT32(fp1, Flags); 2940 HOST_2_MPT32(fp1, NoSEEPROMWWNN.Low); 2941 HOST_2_MPT32(fp1, NoSEEPROMWWNN.High); 2942 HOST_2_MPT32(fp1, NoSEEPROMWWPN.Low); 2943 HOST_2_MPT32(fp1, NoSEEPROMWWPN.High); 2944 } 2945 2946 void 2947 mpt2host_config_page_raid_vol_0(CONFIG_PAGE_RAID_VOL_0 *volp) 2948 { 2949 int i; 2950 2951 MPT_2_HOST16(volp, VolumeStatus.Reserved); 2952 MPT_2_HOST16(volp, VolumeSettings.Settings); 2953 MPT_2_HOST32(volp, MaxLBA); 2954 MPT_2_HOST32(volp, MaxLBAHigh); 2955 MPT_2_HOST32(volp, StripeSize); 2956 MPT_2_HOST32(volp, Reserved2); 2957 MPT_2_HOST32(volp, Reserved3); 2958 for (i = 0; i < MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX; i++) { 2959 MPT_2_HOST16(volp, PhysDisk[i].Reserved); 2960 } 2961 } 2962 2963 void 2964 mpt2host_config_page_raid_phys_disk_0(CONFIG_PAGE_RAID_PHYS_DISK_0 *rpd0) 2965 { 2966 2967 MPT_2_HOST32(rpd0, Reserved1); 2968 MPT_2_HOST16(rpd0, PhysDiskStatus.Reserved); 2969 MPT_2_HOST32(rpd0, MaxLBA); 2970 MPT_2_HOST16(rpd0, ErrorData.Reserved); 2971 MPT_2_HOST16(rpd0, ErrorData.ErrorCount); 2972 MPT_2_HOST16(rpd0, ErrorData.SmartCount); 2973 } 2974 2975 void 2976 mpt2host_mpi_raid_vol_indicator(MPI_RAID_VOL_INDICATOR *vi) 2977 { 2978 2979 MPT_2_HOST16(vi, TotalBlocks.High); 2980 MPT_2_HOST16(vi, TotalBlocks.Low); 2981 MPT_2_HOST16(vi, BlocksRemaining.High); 2982 MPT_2_HOST16(vi, BlocksRemaining.Low); 2983 } 2984 #endif 2985