1 /*- 2 * Copyright (c) 2011 Nathan Whitehorn 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/module.h> 32 #include <sys/bus.h> 33 #include <sys/conf.h> 34 #include <sys/kernel.h> 35 #include <sys/rman.h> 36 37 #include <dev/ofw/openfirm.h> 38 #include <dev/ofw/ofw_pci.h> 39 #include <dev/ofw/ofw_bus.h> 40 #include <dev/ofw/ofw_bus_subr.h> 41 #include <dev/ofw/ofwpci.h> 42 43 #include <dev/pci/pcivar.h> 44 #include <dev/pci/pcireg.h> 45 #include <dev/pci/pcib_private.h> 46 47 #include <machine/bus.h> 48 #include <machine/md_var.h> 49 #include <machine/resource.h> 50 51 #include <vm/vm.h> 52 #include <vm/pmap.h> 53 54 #include "pcib_if.h" 55 56 /* 57 * If it is necessary to set another value of this for 58 * some platforms it should be set at fdt.h file 59 */ 60 #ifndef PCI_MAP_INTR 61 #define PCI_MAP_INTR 4 62 #endif 63 64 #define PCI_INTR_PINS 4 65 66 /* 67 * bus interface. 68 */ 69 static struct resource * ofw_pcib_alloc_resource(device_t, device_t, 70 int, int *, rman_res_t, rman_res_t, rman_res_t, u_int); 71 static int ofw_pcib_release_resource(device_t, device_t, int, int, 72 struct resource *); 73 static int ofw_pcib_activate_resource(device_t, device_t, int, int, 74 struct resource *); 75 static int ofw_pcib_deactivate_resource(device_t, device_t, int, int, 76 struct resource *); 77 static int ofw_pcib_adjust_resource(device_t, device_t, int, 78 struct resource *, rman_res_t, rman_res_t); 79 static int ofw_pcib_translate_resource(device_t bus, int type, 80 rman_res_t start, rman_res_t *newstart); 81 82 #ifdef __powerpc__ 83 static bus_space_tag_t ofw_pcib_bus_get_bus_tag(device_t, device_t); 84 #endif 85 86 /* 87 * pcib interface 88 */ 89 static int ofw_pcib_maxslots(device_t); 90 91 /* 92 * ofw_bus interface 93 */ 94 static phandle_t ofw_pcib_get_node(device_t, device_t); 95 96 /* 97 * local methods 98 */ 99 static int ofw_pcib_fill_ranges(phandle_t, struct ofw_pci_range *); 100 static struct rman *ofw_pcib_get_rman(struct ofw_pci_softc *, int, u_int); 101 102 /* 103 * Driver methods. 104 */ 105 static device_method_t ofw_pcib_methods[] = { 106 /* Device interface */ 107 DEVMETHOD(device_attach, ofw_pcib_attach), 108 109 /* Bus interface */ 110 DEVMETHOD(bus_print_child, bus_generic_print_child), 111 DEVMETHOD(bus_read_ivar, ofw_pcib_read_ivar), 112 DEVMETHOD(bus_write_ivar, ofw_pcib_write_ivar), 113 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 114 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 115 DEVMETHOD(bus_alloc_resource, ofw_pcib_alloc_resource), 116 DEVMETHOD(bus_release_resource, ofw_pcib_release_resource), 117 DEVMETHOD(bus_activate_resource, ofw_pcib_activate_resource), 118 DEVMETHOD(bus_deactivate_resource, ofw_pcib_deactivate_resource), 119 DEVMETHOD(bus_adjust_resource, ofw_pcib_adjust_resource), 120 DEVMETHOD(bus_translate_resource, ofw_pcib_translate_resource), 121 #ifdef __powerpc__ 122 DEVMETHOD(bus_get_bus_tag, ofw_pcib_bus_get_bus_tag), 123 #endif 124 125 /* pcib interface */ 126 DEVMETHOD(pcib_maxslots, ofw_pcib_maxslots), 127 DEVMETHOD(pcib_route_interrupt, ofw_pcib_route_interrupt), 128 DEVMETHOD(pcib_request_feature, pcib_request_feature_allow), 129 130 /* ofw_bus interface */ 131 DEVMETHOD(ofw_bus_get_node, ofw_pcib_get_node), 132 133 DEVMETHOD_END 134 }; 135 136 DEFINE_CLASS_0(ofw_pcib, ofw_pcib_driver, ofw_pcib_methods, 0); 137 138 int 139 ofw_pcib_init(device_t dev) 140 { 141 struct ofw_pci_softc *sc; 142 phandle_t node; 143 u_int32_t busrange[2]; 144 struct ofw_pci_range *rp; 145 int i, error; 146 struct ofw_pci_cell_info *cell_info; 147 148 node = ofw_bus_get_node(dev); 149 sc = device_get_softc(dev); 150 sc->sc_initialized = 1; 151 sc->sc_range = NULL; 152 sc->sc_pci_domain = device_get_unit(dev); 153 154 cell_info = (struct ofw_pci_cell_info *)malloc(sizeof(*cell_info), 155 M_DEVBUF, M_WAITOK | M_ZERO); 156 157 sc->sc_cell_info = cell_info; 158 159 if (OF_getencprop(node, "bus-range", busrange, sizeof(busrange)) != 8) 160 busrange[0] = 0; 161 162 sc->sc_dev = dev; 163 sc->sc_node = node; 164 sc->sc_bus = busrange[0]; 165 166 if (sc->sc_quirks & OFW_PCI_QUIRK_RANGES_ON_CHILDREN) { 167 phandle_t c; 168 int n, i; 169 170 sc->sc_nrange = 0; 171 for (c = OF_child(node); c != 0; c = OF_peer(c)) { 172 n = ofw_pcib_nranges(c, cell_info); 173 if (n > 0) 174 sc->sc_nrange += n; 175 } 176 if (sc->sc_nrange == 0) { 177 error = ENXIO; 178 goto out; 179 } 180 sc->sc_range = malloc(sc->sc_nrange * sizeof(sc->sc_range[0]), 181 M_DEVBUF, M_WAITOK); 182 i = 0; 183 for (c = OF_child(node); c != 0; c = OF_peer(c)) { 184 n = ofw_pcib_fill_ranges(c, &sc->sc_range[i]); 185 if (n > 0) 186 i += n; 187 } 188 KASSERT(i == sc->sc_nrange, ("range count mismatch")); 189 } else { 190 sc->sc_nrange = ofw_pcib_nranges(node, cell_info); 191 if (sc->sc_nrange <= 0) { 192 device_printf(dev, "could not getranges\n"); 193 error = ENXIO; 194 goto out; 195 } 196 sc->sc_range = malloc(sc->sc_nrange * sizeof(sc->sc_range[0]), 197 M_DEVBUF, M_WAITOK); 198 ofw_pcib_fill_ranges(node, sc->sc_range); 199 } 200 201 sc->sc_io_rman.rm_type = RMAN_ARRAY; 202 sc->sc_io_rman.rm_descr = "PCI I/O Ports"; 203 error = rman_init(&sc->sc_io_rman); 204 if (error != 0) { 205 device_printf(dev, "rman_init() failed. error = %d\n", error); 206 goto out; 207 } 208 209 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 210 sc->sc_mem_rman.rm_descr = "PCI Non Prefetchable Memory"; 211 error = rman_init(&sc->sc_mem_rman); 212 if (error != 0) { 213 device_printf(dev, "rman_init() failed. error = %d\n", error); 214 goto out; 215 } 216 217 sc->sc_pmem_rman.rm_type = RMAN_ARRAY; 218 sc->sc_pmem_rman.rm_descr = "PCI Prefetchable Memory"; 219 error = rman_init(&sc->sc_pmem_rman); 220 if (error != 0) { 221 device_printf(dev, "rman_init() failed. error = %d\n", error); 222 goto out; 223 } 224 225 for (i = 0; i < sc->sc_nrange; i++) { 226 error = 0; 227 rp = sc->sc_range + i; 228 229 if (sc->sc_range_mask & ((uint64_t)1 << i)) 230 continue; 231 switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) { 232 case OFW_PCI_PHYS_HI_SPACE_CONFIG: 233 break; 234 case OFW_PCI_PHYS_HI_SPACE_IO: 235 error = rman_manage_region(&sc->sc_io_rman, rp->pci, 236 rp->pci + rp->size - 1); 237 break; 238 case OFW_PCI_PHYS_HI_SPACE_MEM32: 239 case OFW_PCI_PHYS_HI_SPACE_MEM64: 240 if (rp->pci_hi & OFW_PCI_PHYS_HI_PREFETCHABLE) { 241 sc->sc_have_pmem = 1; 242 error = rman_manage_region(&sc->sc_pmem_rman, 243 rp->pci, rp->pci + rp->size - 1); 244 } else { 245 error = rman_manage_region(&sc->sc_mem_rman, 246 rp->pci, rp->pci + rp->size - 1); 247 } 248 break; 249 } 250 251 if (error != 0) { 252 device_printf(dev, 253 "rman_manage_region(%x, %#jx, %#jx) failed. " 254 "error = %d\n", rp->pci_hi & 255 OFW_PCI_PHYS_HI_SPACEMASK, rp->pci, 256 rp->pci + rp->size - 1, error); 257 goto out; 258 } 259 } 260 261 ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(cell_t)); 262 return (0); 263 264 out: 265 free(cell_info, M_DEVBUF); 266 free(sc->sc_range, M_DEVBUF); 267 rman_fini(&sc->sc_io_rman); 268 rman_fini(&sc->sc_mem_rman); 269 rman_fini(&sc->sc_pmem_rman); 270 271 return (error); 272 } 273 274 int 275 ofw_pcib_attach(device_t dev) 276 { 277 struct ofw_pci_softc *sc; 278 int error; 279 280 sc = device_get_softc(dev); 281 if (!sc->sc_initialized) { 282 error = ofw_pcib_init(dev); 283 if (error != 0) 284 return (error); 285 } 286 287 device_add_child(dev, "pci", -1); 288 return (bus_generic_attach(dev)); 289 } 290 291 static int 292 ofw_pcib_maxslots(device_t dev) 293 { 294 295 return (PCI_SLOTMAX); 296 } 297 298 int 299 ofw_pcib_route_interrupt(device_t bus, device_t dev, int pin) 300 { 301 struct ofw_pci_softc *sc; 302 struct ofw_pci_register reg; 303 uint32_t pintr, mintr[PCI_MAP_INTR]; 304 int intrcells; 305 phandle_t iparent; 306 307 sc = device_get_softc(bus); 308 pintr = pin; 309 310 /* Fabricate imap information in case this isn't an OFW device */ 311 bzero(®, sizeof(reg)); 312 reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) | 313 (pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) | 314 (pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT); 315 316 intrcells = ofw_bus_lookup_imap(ofw_bus_get_node(dev), 317 &sc->sc_pci_iinfo, ®, sizeof(reg), &pintr, sizeof(pintr), 318 mintr, sizeof(mintr), &iparent); 319 if (intrcells != 0) { 320 pintr = ofw_bus_map_intr(dev, iparent, intrcells, mintr); 321 return (pintr); 322 } 323 324 /* 325 * Maybe it's a real interrupt, not an intpin 326 */ 327 if (pin > PCI_INTR_PINS) 328 return (pin); 329 330 device_printf(bus, "could not route pin %d for device %d.%d\n", 331 pin, pci_get_slot(dev), pci_get_function(dev)); 332 return (PCI_INVALID_IRQ); 333 } 334 335 int 336 ofw_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 337 { 338 struct ofw_pci_softc *sc; 339 340 sc = device_get_softc(dev); 341 342 switch (which) { 343 case PCIB_IVAR_DOMAIN: 344 *result = sc->sc_pci_domain; 345 return (0); 346 case PCIB_IVAR_BUS: 347 *result = sc->sc_bus; 348 return (0); 349 default: 350 break; 351 } 352 353 return (ENOENT); 354 } 355 356 int 357 ofw_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 358 { 359 struct ofw_pci_softc *sc; 360 361 sc = device_get_softc(dev); 362 363 switch (which) { 364 case PCIB_IVAR_BUS: 365 sc->sc_bus = value; 366 return (0); 367 default: 368 break; 369 } 370 371 return (ENOENT); 372 } 373 374 int 375 ofw_pcib_nranges(phandle_t node, struct ofw_pci_cell_info *info) 376 { 377 ssize_t nbase_ranges; 378 379 if (info == NULL) 380 return (-1); 381 382 info->host_address_cells = 1; 383 info->size_cells = 2; 384 info->pci_address_cell = 3; 385 386 OF_getencprop(OF_parent(node), "#address-cells", 387 &(info->host_address_cells), sizeof(info->host_address_cells)); 388 OF_getencprop(node, "#address-cells", 389 &(info->pci_address_cell), sizeof(info->pci_address_cell)); 390 OF_getencprop(node, "#size-cells", &(info->size_cells), 391 sizeof(info->size_cells)); 392 393 nbase_ranges = OF_getproplen(node, "ranges"); 394 if (nbase_ranges <= 0) 395 return (-1); 396 397 return (nbase_ranges / sizeof(cell_t) / 398 (info->pci_address_cell + info->host_address_cells + 399 info->size_cells)); 400 } 401 402 static struct resource * 403 ofw_pcib_alloc_resource(device_t bus, device_t child, int type, int *rid, 404 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 405 { 406 struct ofw_pci_softc *sc; 407 struct resource *rv; 408 struct rman *rm; 409 int needactivate; 410 411 needactivate = flags & RF_ACTIVE; 412 flags &= ~RF_ACTIVE; 413 414 sc = device_get_softc(bus); 415 416 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 417 if (type == PCI_RES_BUS) { 418 return (pci_domain_alloc_bus(sc->sc_pci_domain, child, rid, 419 start, end, count, flags | needactivate)); 420 } 421 #endif 422 423 rm = ofw_pcib_get_rman(sc, type, flags); 424 if (rm == NULL) { 425 return (bus_generic_alloc_resource(bus, child, type, rid, 426 start, end, count, flags | needactivate)); 427 } 428 429 rv = rman_reserve_resource(rm, start, end, count, flags, child); 430 if (rv == NULL) { 431 device_printf(bus, "failed to reserve resource for %s\n", 432 device_get_nameunit(child)); 433 return (NULL); 434 } 435 436 rman_set_rid(rv, *rid); 437 438 if (needactivate) { 439 if (bus_activate_resource(child, type, *rid, rv) != 0) { 440 device_printf(bus, 441 "failed to activate resource for %s\n", 442 device_get_nameunit(child)); 443 rman_release_resource(rv); 444 return (NULL); 445 } 446 } 447 448 return (rv); 449 } 450 451 static int 452 ofw_pcib_release_resource(device_t bus, device_t child, int type, int rid, 453 struct resource *res) 454 { 455 struct ofw_pci_softc *sc; 456 struct rman *rm; 457 int error; 458 459 sc = device_get_softc(bus); 460 461 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 462 if (type == PCI_RES_BUS) 463 return (pci_domain_release_bus(sc->sc_pci_domain, child, rid, 464 res)); 465 #endif 466 467 rm = ofw_pcib_get_rman(sc, type, rman_get_flags(res)); 468 if (rm == NULL) { 469 return (bus_generic_release_resource(bus, child, type, rid, 470 res)); 471 } 472 KASSERT(rman_is_region_manager(res, rm), ("rman mismatch")); 473 474 if (rman_get_flags(res) & RF_ACTIVE) { 475 error = bus_deactivate_resource(child, type, rid, res); 476 if (error != 0) 477 return (error); 478 } 479 return (rman_release_resource(res)); 480 } 481 482 static int 483 ofw_pcib_translate_resource(device_t bus, int type, rman_res_t start, 484 rman_res_t *newstart) 485 { 486 struct ofw_pci_softc *sc; 487 struct ofw_pci_range *rp; 488 int space; 489 490 sc = device_get_softc(bus); 491 492 /* 493 * Map this through the ranges list 494 */ 495 for (rp = sc->sc_range; rp < sc->sc_range + sc->sc_nrange && 496 rp->pci_hi != 0; rp++) { 497 if (start < rp->pci || start >= rp->pci + rp->size) 498 continue; 499 500 switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) { 501 case OFW_PCI_PHYS_HI_SPACE_IO: 502 space = SYS_RES_IOPORT; 503 break; 504 case OFW_PCI_PHYS_HI_SPACE_MEM32: 505 case OFW_PCI_PHYS_HI_SPACE_MEM64: 506 space = SYS_RES_MEMORY; 507 break; 508 default: 509 space = -1; 510 } 511 512 if (type == space) { 513 start += (rp->host - rp->pci); 514 break; 515 } 516 } 517 *newstart = start; 518 return (0); 519 } 520 521 static int 522 ofw_pcib_activate_resource(device_t bus, device_t child, int type, int rid, 523 struct resource *res) 524 { 525 struct ofw_pci_softc *sc; 526 bus_space_handle_t handle; 527 bus_space_tag_t tag; 528 struct ofw_pci_range *rp; 529 vm_paddr_t start; 530 int space; 531 int rv; 532 533 sc = device_get_softc(bus); 534 535 if (type != SYS_RES_IOPORT && type != SYS_RES_MEMORY) { 536 return (bus_generic_activate_resource(bus, child, type, rid, 537 res)); 538 } 539 540 start = (vm_paddr_t)rman_get_start(res); 541 542 /* 543 * Map this through the ranges list 544 */ 545 for (rp = sc->sc_range; rp < sc->sc_range + sc->sc_nrange && 546 rp->pci_hi != 0; rp++) { 547 if (start < rp->pci || start >= rp->pci + rp->size) 548 continue; 549 550 switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) { 551 case OFW_PCI_PHYS_HI_SPACE_IO: 552 space = SYS_RES_IOPORT; 553 break; 554 case OFW_PCI_PHYS_HI_SPACE_MEM32: 555 case OFW_PCI_PHYS_HI_SPACE_MEM64: 556 space = SYS_RES_MEMORY; 557 break; 558 default: 559 space = -1; 560 } 561 562 if (type == space) { 563 start += (rp->host - rp->pci); 564 break; 565 } 566 } 567 568 if (bootverbose) 569 printf("ofw_pci mapdev: start %jx, len %jd\n", 570 (rman_res_t)start, rman_get_size(res)); 571 572 tag = BUS_GET_BUS_TAG(child, child); 573 if (tag == NULL) 574 return (ENOMEM); 575 576 rman_set_bustag(res, tag); 577 rv = bus_space_map(tag, start, 578 rman_get_size(res), 0, &handle); 579 if (rv != 0) 580 return (ENOMEM); 581 582 rman_set_bushandle(res, handle); 583 rman_set_virtual(res, (void *)handle); /* XXX for powerpc only ? */ 584 585 return (rman_activate_resource(res)); 586 } 587 588 #ifdef __powerpc__ 589 static bus_space_tag_t 590 ofw_pcib_bus_get_bus_tag(device_t bus, device_t child) 591 { 592 593 return (&bs_le_tag); 594 } 595 #endif 596 597 static int 598 ofw_pcib_deactivate_resource(device_t bus, device_t child, int type, int rid, 599 struct resource *res) 600 { 601 vm_size_t psize; 602 603 if (type != SYS_RES_IOPORT && type != SYS_RES_MEMORY) { 604 return (bus_generic_deactivate_resource(bus, child, type, rid, 605 res)); 606 } 607 608 psize = rman_get_size(res); 609 pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize); 610 611 return (rman_deactivate_resource(res)); 612 } 613 614 static int 615 ofw_pcib_adjust_resource(device_t bus, device_t child, int type, 616 struct resource *res, rman_res_t start, rman_res_t end) 617 { 618 struct rman *rm; 619 struct ofw_pci_softc *sc; 620 621 sc = device_get_softc(bus); 622 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 623 if (type == PCI_RES_BUS) 624 return (pci_domain_adjust_bus(sc->sc_pci_domain, child, res, 625 start, end)); 626 #endif 627 628 rm = ofw_pcib_get_rman(sc, type, rman_get_flags(res)); 629 if (rm == NULL) { 630 return (bus_generic_adjust_resource(bus, child, type, res, 631 start, end)); 632 } 633 KASSERT(rman_is_region_manager(res, rm), ("rman mismatch")); 634 KASSERT(!(rman_get_flags(res) & RF_ACTIVE), 635 ("active resources cannot be adjusted")); 636 637 return (rman_adjust_resource(res, start, end)); 638 } 639 640 static phandle_t 641 ofw_pcib_get_node(device_t bus, device_t dev) 642 { 643 struct ofw_pci_softc *sc; 644 645 sc = device_get_softc(bus); 646 /* We only have one child, the PCI bus, which needs our own node. */ 647 648 return (sc->sc_node); 649 } 650 651 static int 652 ofw_pcib_fill_ranges(phandle_t node, struct ofw_pci_range *ranges) 653 { 654 int host_address_cells = 1, pci_address_cells = 3, size_cells = 2; 655 cell_t *base_ranges; 656 ssize_t nbase_ranges; 657 int nranges; 658 int i, j, k; 659 660 OF_getencprop(OF_parent(node), "#address-cells", &host_address_cells, 661 sizeof(host_address_cells)); 662 OF_getencprop(node, "#address-cells", &pci_address_cells, 663 sizeof(pci_address_cells)); 664 OF_getencprop(node, "#size-cells", &size_cells, sizeof(size_cells)); 665 666 nbase_ranges = OF_getproplen(node, "ranges"); 667 if (nbase_ranges <= 0) 668 return (-1); 669 nranges = nbase_ranges / sizeof(cell_t) / 670 (pci_address_cells + host_address_cells + size_cells); 671 672 base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK); 673 OF_getencprop(node, "ranges", base_ranges, nbase_ranges); 674 675 for (i = 0, j = 0; i < nranges; i++) { 676 ranges[i].pci_hi = base_ranges[j++]; 677 ranges[i].pci = 0; 678 for (k = 0; k < pci_address_cells - 1; k++) { 679 ranges[i].pci <<= 32; 680 ranges[i].pci |= base_ranges[j++]; 681 } 682 ranges[i].host = 0; 683 for (k = 0; k < host_address_cells; k++) { 684 ranges[i].host <<= 32; 685 ranges[i].host |= base_ranges[j++]; 686 } 687 ranges[i].size = 0; 688 for (k = 0; k < size_cells; k++) { 689 ranges[i].size <<= 32; 690 ranges[i].size |= base_ranges[j++]; 691 } 692 } 693 694 free(base_ranges, M_DEVBUF); 695 return (nranges); 696 } 697 698 static struct rman * 699 ofw_pcib_get_rman(struct ofw_pci_softc *sc, int type, u_int flags) 700 { 701 702 switch (type) { 703 case SYS_RES_IOPORT: 704 return (&sc->sc_io_rman); 705 case SYS_RES_MEMORY: 706 if (sc->sc_have_pmem && (flags & RF_PREFETCHABLE)) 707 return (&sc->sc_pmem_rman); 708 else 709 return (&sc->sc_mem_rman); 710 default: 711 break; 712 } 713 714 return (NULL); 715 } 716