xref: /freebsd/sys/dev/pccbb/pccbb.c (revision c697fb7f)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2000-2001 Jonathan Chen All rights reserved.
5  * Copyright (c) 2002-2004 M. Warner Losh <imp@FreeBSD.org>
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  */
29 
30 /*-
31  * Copyright (c) 1998, 1999 and 2000
32  *      HAYAKAWA Koichi.  All rights reserved.
33  *
34  * Redistribution and use in source and binary forms, with or without
35  * modification, are permitted provided that the following conditions
36  * are met:
37  * 1. Redistributions of source code must retain the above copyright
38  *    notice, this list of conditions and the following disclaimer.
39  * 2. Redistributions in binary form must reproduce the above copyright
40  *    notice, this list of conditions and the following disclaimer in the
41  *    documentation and/or other materials provided with the distribution.
42  * 3. All advertising materials mentioning features or use of this software
43  *    must display the following acknowledgement:
44  *	This product includes software developed by HAYAKAWA Koichi.
45  * 4. The name of the author may not be used to endorse or promote products
46  *    derived from this software without specific prior written permission.
47  *
48  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
49  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
50  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
51  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
52  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
53  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
54  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
55  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
56  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
57  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
58  */
59 
60 /*
61  * Driver for PCI to CardBus Bridge chips
62  *
63  * References:
64  *  TI Datasheets:
65  *   http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS
66  *
67  * Written by Jonathan Chen <jon@freebsd.org>
68  * The author would like to acknowledge:
69  *  * HAYAKAWA Koichi: Author of the NetBSD code for the same thing
70  *  * Warner Losh: Newbus/newcard guru and author of the pccard side of things
71  *  * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver
72  *  * David Cross: Author of the initial ugly hack for a specific cardbus card
73  */
74 
75 #include <sys/cdefs.h>
76 __FBSDID("$FreeBSD$");
77 
78 #include <sys/param.h>
79 #include <sys/bus.h>
80 #include <sys/condvar.h>
81 #include <sys/errno.h>
82 #include <sys/kernel.h>
83 #include <sys/module.h>
84 #include <sys/kthread.h>
85 #include <sys/lock.h>
86 #include <sys/malloc.h>
87 #include <sys/mutex.h>
88 #include <sys/proc.h>
89 #include <sys/rman.h>
90 #include <sys/sysctl.h>
91 #include <sys/systm.h>
92 #include <machine/bus.h>
93 #include <machine/resource.h>
94 
95 #include <dev/pci/pcireg.h>
96 #include <dev/pci/pcivar.h>
97 #include <dev/pci/pcib_private.h>
98 
99 #include <dev/pccard/pccardreg.h>
100 #include <dev/pccard/pccardvar.h>
101 
102 #include <dev/exca/excareg.h>
103 #include <dev/exca/excavar.h>
104 
105 #include <dev/pccbb/pccbbreg.h>
106 #include <dev/pccbb/pccbbvar.h>
107 
108 #include "power_if.h"
109 #include "card_if.h"
110 #include "pcib_if.h"
111 
112 #define	DPRINTF(x) do { if (cbb_debug) printf x; } while (0)
113 #define	DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0)
114 
115 #define	PCI_MASK_CONFIG(DEV,REG,MASK,SIZE)				\
116 	pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
117 #define	PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE)			\
118 	pci_write_config(DEV, REG, (					\
119 		pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
120 
121 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0)
122 
123 #define CBB_START_MEM	0x88000000
124 #define CBB_START_32_IO 0x1000
125 #define CBB_START_16_IO 0x100
126 
127 devclass_t cbb_devclass;
128 
129 /* sysctl vars */
130 static SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
131     "CBB parameters");
132 
133 /* There's no way to say TUNEABLE_LONG to get the right types */
134 u_long cbb_start_mem = CBB_START_MEM;
135 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RWTUN,
136     &cbb_start_mem, CBB_START_MEM,
137     "Starting address for memory allocations");
138 
139 u_long cbb_start_16_io = CBB_START_16_IO;
140 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RWTUN,
141     &cbb_start_16_io, CBB_START_16_IO,
142     "Starting ioport for 16-bit cards");
143 
144 u_long cbb_start_32_io = CBB_START_32_IO;
145 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RWTUN,
146     &cbb_start_32_io, CBB_START_32_IO,
147     "Starting ioport for 32-bit cards");
148 
149 int cbb_debug = 0;
150 SYSCTL_INT(_hw_cbb, OID_AUTO, debug, CTLFLAG_RWTUN, &cbb_debug, 0,
151     "Verbose cardbus bridge debugging");
152 
153 static void	cbb_insert(struct cbb_softc *sc);
154 static void	cbb_removal(struct cbb_softc *sc);
155 static uint32_t	cbb_detect_voltage(device_t brdev);
156 static int	cbb_cardbus_reset_power(device_t brdev, device_t child, int on);
157 static int	cbb_cardbus_io_open(device_t brdev, int win, uint32_t start,
158 		    uint32_t end);
159 static int	cbb_cardbus_mem_open(device_t brdev, int win,
160 		    uint32_t start, uint32_t end);
161 static void	cbb_cardbus_auto_open(struct cbb_softc *sc, int type);
162 static int	cbb_cardbus_activate_resource(device_t brdev, device_t child,
163 		    int type, int rid, struct resource *res);
164 static int	cbb_cardbus_deactivate_resource(device_t brdev,
165 		    device_t child, int type, int rid, struct resource *res);
166 static struct resource	*cbb_cardbus_alloc_resource(device_t brdev,
167 		    device_t child, int type, int *rid, rman_res_t start,
168 		    rman_res_t end, rman_res_t count, u_int flags);
169 static int	cbb_cardbus_release_resource(device_t brdev, device_t child,
170 		    int type, int rid, struct resource *res);
171 static int	cbb_cardbus_power_enable_socket(device_t brdev,
172 		    device_t child);
173 static int	cbb_cardbus_power_disable_socket(device_t brdev,
174 		    device_t child);
175 static int	cbb_func_filt(void *arg);
176 static void	cbb_func_intr(void *arg);
177 
178 static void
179 cbb_remove_res(struct cbb_softc *sc, struct resource *res)
180 {
181 	struct cbb_reslist *rle;
182 
183 	SLIST_FOREACH(rle, &sc->rl, link) {
184 		if (rle->res == res) {
185 			SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link);
186 			free(rle, M_DEVBUF);
187 			return;
188 		}
189 	}
190 }
191 
192 static struct resource *
193 cbb_find_res(struct cbb_softc *sc, int type, int rid)
194 {
195 	struct cbb_reslist *rle;
196 
197 	SLIST_FOREACH(rle, &sc->rl, link)
198 		if (SYS_RES_MEMORY == rle->type && rid == rle->rid)
199 			return (rle->res);
200 	return (NULL);
201 }
202 
203 static void
204 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type,
205     int rid)
206 {
207 	struct cbb_reslist *rle;
208 
209 	/*
210 	 * Need to record allocated resource so we can iterate through
211 	 * it later.
212 	 */
213 	rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT);
214 	if (rle == NULL)
215 		panic("cbb_cardbus_alloc_resource: can't record entry!");
216 	rle->res = res;
217 	rle->type = type;
218 	rle->rid = rid;
219 	SLIST_INSERT_HEAD(&sc->rl, rle, link);
220 }
221 
222 static void
223 cbb_destroy_res(struct cbb_softc *sc)
224 {
225 	struct cbb_reslist *rle;
226 
227 	while ((rle = SLIST_FIRST(&sc->rl)) != NULL) {
228 		device_printf(sc->dev, "Danger Will Robinson: Resource "
229 		    "left allocated!  This is a bug... "
230 		    "(rid=%x, type=%d, addr=%jx)\n", rle->rid, rle->type,
231 		    rman_get_start(rle->res));
232 		SLIST_REMOVE_HEAD(&sc->rl, link);
233 		free(rle, M_DEVBUF);
234 	}
235 }
236 
237 /*
238  * Disable function interrupts by telling the bridge to generate IRQ1
239  * interrupts.  These interrupts aren't really generated by the chip, since
240  * IRQ1 is reserved.  Some chipsets assert INTA# inappropriately during
241  * initialization, so this helps to work around the problem.
242  *
243  * XXX We can't do this workaround for all chipsets, because this
244  * XXX causes interference with the keyboard because somechipsets will
245  * XXX actually signal IRQ1 over their serial interrupt connections to
246  * XXX the south bridge.  Disable it it for now.
247  */
248 void
249 cbb_disable_func_intr(struct cbb_softc *sc)
250 {
251 #if 0
252 	uint8_t reg;
253 
254 	reg = (exca_getb(&sc->exca, EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) |
255 	    EXCA_INTR_IRQ_RESERVED1;
256 	exca_putb(&sc->exca, EXCA_INTR, reg);
257 #endif
258 }
259 
260 /*
261  * Enable function interrupts.  We turn on function interrupts when the card
262  * requests an interrupt.  The PCMCIA standard says that we should set
263  * the lower 4 bits to 0 to route via PCI.  Note: we call this for both
264  * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus
265  * cards.
266  */
267 static void
268 cbb_enable_func_intr(struct cbb_softc *sc)
269 {
270 	uint8_t reg;
271 
272 	reg = (exca_getb(&sc->exca, EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) |
273 	    EXCA_INTR_IRQ_NONE;
274 	PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL,
275 	    & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2);
276 	exca_putb(&sc->exca, EXCA_INTR, reg);
277 }
278 
279 int
280 cbb_detach(device_t brdev)
281 {
282 	struct cbb_softc *sc = device_get_softc(brdev);
283 	device_t *devlist;
284 	int tmp, tries, error, numdevs;
285 
286 	/*
287 	 * Before we delete the children (which we have to do because
288 	 * attach doesn't check for children busses correctly), we have
289 	 * to detach the children.  Even if we didn't need to delete the
290 	 * children, we have to detach them.
291 	 */
292 	error = bus_generic_detach(brdev);
293 	if (error != 0)
294 		return (error);
295 
296 	/*
297 	 * Since the attach routine doesn't search for children before it
298 	 * attaches them to this device, we must delete them here in order
299 	 * for the kldload/unload case to work.  If we failed to do that, then
300 	 * we'd get duplicate devices when cbb.ko was reloaded.
301 	 */
302 	tries = 10;
303 	do {
304 		error = device_get_children(brdev, &devlist, &numdevs);
305 		if (error == 0)
306 			break;
307 		/*
308 		 * Try hard to cope with low memory.
309 		 */
310 		if (error == ENOMEM) {
311 			pause("cbbnomem", 1);
312 			continue;
313 		}
314 	} while (tries-- > 0);
315 	for (tmp = 0; tmp < numdevs; tmp++)
316 		device_delete_child(brdev, devlist[tmp]);
317 	free(devlist, M_TEMP);
318 
319 	/* Turn off the interrupts */
320 	cbb_set(sc, CBB_SOCKET_MASK, 0);
321 
322 	/* reset 16-bit pcmcia bus */
323 	exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
324 
325 	/* turn off power */
326 	cbb_power(brdev, CARD_OFF);
327 
328 	/* Ack the interrupt */
329 	cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff);
330 
331 	/*
332 	 * Wait for the thread to die.  kproc_exit will do a wakeup
333 	 * on the event thread's struct proc * so that we know it is
334 	 * safe to proceed.  IF the thread is running, set the please
335 	 * die flag and wait for it to comply.  Since the wakeup on
336 	 * the event thread happens only in kproc_exit, we don't
337 	 * need to loop here.
338 	 */
339 	bus_teardown_intr(brdev, sc->irq_res, sc->intrhand);
340 	mtx_lock(&sc->mtx);
341 	sc->flags |= CBB_KTHREAD_DONE;
342 	while (sc->flags & CBB_KTHREAD_RUNNING) {
343 		DEVPRINTF((sc->dev, "Waiting for thread to die\n"));
344 		wakeup(&sc->intrhand);
345 		msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0);
346 	}
347 	mtx_unlock(&sc->mtx);
348 
349 	bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
350 	bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
351 	    sc->base_res);
352 	mtx_destroy(&sc->mtx);
353 	return (0);
354 }
355 
356 int
357 cbb_setup_intr(device_t dev, device_t child, struct resource *irq,
358   int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg,
359    void **cookiep)
360 {
361 	struct cbb_intrhand *ih;
362 	struct cbb_softc *sc = device_get_softc(dev);
363 	int err;
364 
365 	if (filt == NULL && intr == NULL)
366 		return (EINVAL);
367 	ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT);
368 	if (ih == NULL)
369 		return (ENOMEM);
370 	*cookiep = ih;
371 	ih->filt = filt;
372 	ih->intr = intr;
373 	ih->arg = arg;
374 	ih->sc = sc;
375 	/*
376 	 * XXX need to turn on ISA interrupts, if we ever support them, but
377 	 * XXX for now that's all we need to do.
378 	 */
379 	err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags,
380 	    filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih,
381 	    &ih->cookie);
382 	if (err != 0) {
383 		free(ih, M_DEVBUF);
384 		return (err);
385 	}
386 	cbb_enable_func_intr(sc);
387 	sc->cardok = 1;
388 	return 0;
389 }
390 
391 int
392 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq,
393     void *cookie)
394 {
395 	struct cbb_intrhand *ih;
396 	int err;
397 
398 	/* XXX Need to do different things for ISA interrupts. */
399 	ih = (struct cbb_intrhand *) cookie;
400 	err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq,
401 	    ih->cookie);
402 	if (err != 0)
403 		return (err);
404 	free(ih, M_DEVBUF);
405 	return (0);
406 }
407 
408 
409 void
410 cbb_driver_added(device_t brdev, driver_t *driver)
411 {
412 	struct cbb_softc *sc = device_get_softc(brdev);
413 	device_t *devlist;
414 	device_t dev;
415 	int tmp;
416 	int numdevs;
417 	int wake = 0;
418 
419 	DEVICE_IDENTIFY(driver, brdev);
420 	tmp = device_get_children(brdev, &devlist, &numdevs);
421 	if (tmp != 0) {
422 		device_printf(brdev, "Cannot get children list, no reprobe\n");
423 		return;
424 	}
425 	for (tmp = 0; tmp < numdevs; tmp++) {
426 		dev = devlist[tmp];
427 		if (device_get_state(dev) == DS_NOTPRESENT &&
428 		    device_probe_and_attach(dev) == 0)
429 			wake++;
430 	}
431 	free(devlist, M_TEMP);
432 
433 	if (wake > 0)
434 		wakeup(&sc->intrhand);
435 }
436 
437 void
438 cbb_child_detached(device_t brdev, device_t child)
439 {
440 	struct cbb_softc *sc = device_get_softc(brdev);
441 
442 	/* I'm not sure we even need this */
443 	if (child != sc->cbdev && child != sc->exca.pccarddev)
444 		device_printf(brdev, "Unknown child detached: %s\n",
445 		    device_get_nameunit(child));
446 }
447 
448 /************************************************************************/
449 /* Kthreads								*/
450 /************************************************************************/
451 
452 void
453 cbb_event_thread(void *arg)
454 {
455 	struct cbb_softc *sc = arg;
456 	uint32_t status;
457 	int err;
458 	int not_a_card = 0;
459 
460 	/*
461 	 * We need to act as a power sequencer on startup.  Delay 2s/channel
462 	 * to ensure the other channels have had a chance to come up.  We likely
463 	 * should add a lock that's shared on a per-slot basis so that only
464 	 * one power event can happen per slot at a time.
465 	 */
466 	pause("cbbstart", hz * device_get_unit(sc->dev) * 2);
467 	mtx_lock(&sc->mtx);
468 	sc->flags |= CBB_KTHREAD_RUNNING;
469 	while ((sc->flags & CBB_KTHREAD_DONE) == 0) {
470 		mtx_unlock(&sc->mtx);
471 		status = cbb_get(sc, CBB_SOCKET_STATE);
472 		DPRINTF(("Status is 0x%x\n", status));
473 		if (!CBB_CARD_PRESENT(status)) {
474 			not_a_card = 0;		/* We know card type */
475 			cbb_removal(sc);
476 		} else if (status & CBB_STATE_NOT_A_CARD) {
477 			/*
478 			 * Up to 10 times, try to rescan the card when we see
479 			 * NOT_A_CARD.  10 is somehwat arbitrary.  When this
480 			 * pathology hits, there's a ~40% chance each try will
481 			 * fail.  10 tries takes about 5s and results in a
482 			 * 99.99% certainty of the results.
483 			 */
484 			if (not_a_card++ < 10) {
485 				DEVPRINTF((sc->dev,
486 				    "Not a card bit set, rescanning\n"));
487 				cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST);
488 			} else {
489 				device_printf(sc->dev,
490 				    "Can't determine card type\n");
491 			}
492 		} else {
493 			not_a_card = 0;		/* We know card type */
494 			cbb_insert(sc);
495 		}
496 
497 		/*
498 		 * First time through we need to tell mountroot that we're
499 		 * done.
500 		 */
501 		if (sc->sc_root_token) {
502 			root_mount_rel(sc->sc_root_token);
503 			sc->sc_root_token = NULL;
504 		}
505 
506 		/*
507 		 * Wait until it has been 250ms since the last time we
508 		 * get an interrupt.  We handle the rest of the interrupt
509 		 * at the top of the loop.  Although we clear the bit in the
510 		 * ISR, we signal sc->cv from the detach path after we've
511 		 * set the CBB_KTHREAD_DONE bit, so we can't do a simple
512 		 * 250ms sleep here.
513 		 *
514 		 * In our ISR, we turn off the card changed interrupt.  Turn
515 		 * them back on here before we wait for them to happen.  We
516 		 * turn them on/off so that we can tolerate a large latency
517 		 * between the time we signal cbb_event_thread and it gets
518 		 * a chance to run.
519 		 */
520 		mtx_lock(&sc->mtx);
521 		cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS);
522 		msleep(&sc->intrhand, &sc->mtx, 0, "-", 0);
523 		err = 0;
524 		while (err != EWOULDBLOCK &&
525 		    (sc->flags & CBB_KTHREAD_DONE) == 0)
526 			err = msleep(&sc->intrhand, &sc->mtx, 0, "-", hz / 5);
527 	}
528 	DEVPRINTF((sc->dev, "Thread terminating\n"));
529 	sc->flags &= ~CBB_KTHREAD_RUNNING;
530 	mtx_unlock(&sc->mtx);
531 	kproc_exit(0);
532 }
533 
534 /************************************************************************/
535 /* Insert/removal							*/
536 /************************************************************************/
537 
538 static void
539 cbb_insert(struct cbb_softc *sc)
540 {
541 	uint32_t sockevent, sockstate;
542 
543 	sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
544 	sockstate = cbb_get(sc, CBB_SOCKET_STATE);
545 
546 	DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n",
547 	    sockevent, sockstate));
548 
549 	if (sockstate & CBB_STATE_R2_CARD) {
550 		if (device_is_attached(sc->exca.pccarddev)) {
551 			sc->flags |= CBB_16BIT_CARD;
552 			exca_insert(&sc->exca);
553 		} else {
554 			device_printf(sc->dev,
555 			    "16-bit card inserted, but no pccard bus.\n");
556 		}
557 	} else if (sockstate & CBB_STATE_CB_CARD) {
558 		if (device_is_attached(sc->cbdev)) {
559 			sc->flags &= ~CBB_16BIT_CARD;
560 			CARD_ATTACH_CARD(sc->cbdev);
561 		} else {
562 			device_printf(sc->dev,
563 			    "CardBus card inserted, but no cardbus bus.\n");
564 		}
565 	} else {
566 		/*
567 		 * We should power the card down, and try again a couple of
568 		 * times if this happens. XXX
569 		 */
570 		device_printf(sc->dev, "Unsupported card type detected\n");
571 	}
572 }
573 
574 static void
575 cbb_removal(struct cbb_softc *sc)
576 {
577 	sc->cardok = 0;
578 	if (sc->flags & CBB_16BIT_CARD) {
579 		exca_removal(&sc->exca);
580 	} else {
581 		if (device_is_attached(sc->cbdev))
582 			CARD_DETACH_CARD(sc->cbdev);
583 	}
584 	cbb_destroy_res(sc);
585 }
586 
587 /************************************************************************/
588 /* Interrupt Handler							*/
589 /************************************************************************/
590 
591 static int
592 cbb_func_filt(void *arg)
593 {
594 	struct cbb_intrhand *ih = (struct cbb_intrhand *)arg;
595 	struct cbb_softc *sc = ih->sc;
596 
597 	/*
598 	 * Make sure that the card is really there.
599 	 */
600 	if (!sc->cardok)
601 		return (FILTER_STRAY);
602 	if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
603 		sc->cardok = 0;
604 		return (FILTER_HANDLED);
605 	}
606 
607 	/*
608 	 * nb: don't have to check for giant or not, since that's done in the
609 	 * ISR dispatch and one can't hold Giant in a filter anyway...
610 	 */
611 	return ((*ih->filt)(ih->arg));
612 }
613 
614 static void
615 cbb_func_intr(void *arg)
616 {
617 	struct cbb_intrhand *ih = (struct cbb_intrhand *)arg;
618 	struct cbb_softc *sc = ih->sc;
619 
620 	/*
621 	 * While this check may seem redundant, it helps close a race
622 	 * condition.  If the card is ejected after the filter runs, but
623 	 * before this ISR can be scheduled, then we need to do the same
624 	 * filtering to prevent the card's ISR from being called.  One could
625 	 * argue that the card's ISR should be able to cope, but experience
626 	 * has shown they can't always.  This mitigates the problem by making
627 	 * the race quite a bit smaller.  Properly written client ISRs should
628 	 * cope with the card going away in the middle of the ISR.  We assume
629 	 * that drivers that are sophisticated enough to use filters don't
630 	 * need our protection.  This also allows us to ensure they *ARE*
631 	 * called if their filter said they needed to be called.
632 	 */
633 	if (ih->filt == NULL) {
634 		if (!sc->cardok)
635 			return;
636 		if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
637 			sc->cardok = 0;
638 			return;
639 		}
640 	}
641 
642 	/*
643 	 * Call the registered ithread interrupt handler.  This entire routine
644 	 * will be called with Giant if this isn't an MP safe driver, or not
645 	 * if it is.  Either way, we don't have to worry.
646 	 */
647 	ih->intr(ih->arg);
648 }
649 
650 /************************************************************************/
651 /* Generic Power functions						*/
652 /************************************************************************/
653 
654 static uint32_t
655 cbb_detect_voltage(device_t brdev)
656 {
657 	struct cbb_softc *sc = device_get_softc(brdev);
658 	uint32_t psr;
659 	uint32_t vol = CARD_UKN_CARD;
660 
661 	psr = cbb_get(sc, CBB_SOCKET_STATE);
662 
663 	if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK)
664 		vol |= CARD_5V_CARD;
665 	if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK)
666 		vol |= CARD_3V_CARD;
667 	if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK)
668 		vol |= CARD_XV_CARD;
669 	if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK)
670 		vol |= CARD_YV_CARD;
671 
672 	return (vol);
673 }
674 
675 static uint8_t
676 cbb_o2micro_power_hack(struct cbb_softc *sc)
677 {
678 	uint8_t reg;
679 
680 	/*
681 	 * Issue #2: INT# not qualified with IRQ Routing Bit.  An
682 	 * unexpected PCI INT# may be generated during PC Card
683 	 * initialization even with the IRQ Routing Bit Set with some
684 	 * PC Cards.
685 	 *
686 	 * This is a two part issue.  The first part is that some of
687 	 * our older controllers have an issue in which the slot's PCI
688 	 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh
689 	 * bit 7).  Regardless of the IRQ routing bit, if NO ISA IRQ
690 	 * is selected (ExCA register 03h bits 3:0, of the slot, are
691 	 * cleared) we will generate INT# if IREQ# is asserted.  The
692 	 * second part is because some PC Cards prematurally assert
693 	 * IREQ# before the ExCA registers are fully programmed.  This
694 	 * in turn asserts INT# because ExCA register 03h bits 3:0
695 	 * (ISA IRQ Select) are not yet programmed.
696 	 *
697 	 * The fix for this issue, which will work for any controller
698 	 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b
699 	 * (select IRQ1), of the slot, before turning on slot power.
700 	 * Selecting IRQ1 will result in INT# NOT being asserted
701 	 * (because IRQ1 is selected), and IRQ1 won't be asserted
702 	 * because our controllers don't generate IRQ1.
703 	 *
704 	 * Other, non O2Micro controllers will generate irq 1 in some
705 	 * situations, so we can't do this hack for everybody.  Reports of
706 	 * keyboard controller's interrupts being suppressed occurred when
707 	 * we did this.
708 	 */
709 	reg = exca_getb(&sc->exca, EXCA_INTR);
710 	exca_putb(&sc->exca, EXCA_INTR, (reg & 0xf0) | 1);
711 	return (reg);
712 }
713 
714 /*
715  * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so
716  * we don't have an interrupt storm on power on.  This has the effect of
717  * disabling card status change interrupts for the duration of poweron.
718  */
719 static void
720 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg)
721 {
722 	exca_putb(&sc->exca, EXCA_INTR, reg);
723 }
724 
725 int
726 cbb_power(device_t brdev, int volts)
727 {
728 	uint32_t status, sock_ctrl, reg_ctrl, mask;
729 	struct cbb_softc *sc = device_get_softc(brdev);
730 	int cnt, sane;
731 	int retval = 0;
732 	int on = 0;
733 	uint8_t reg = 0;
734 
735 	sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
736 
737 	sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
738 	switch (volts & CARD_VCCMASK) {
739 	case 5:
740 		sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V;
741 		on++;
742 		break;
743 	case 3:
744 		sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V;
745 		on++;
746 		break;
747 	case XV:
748 		sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV;
749 		on++;
750 		break;
751 	case YV:
752 		sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV;
753 		on++;
754 		break;
755 	case 0:
756 		break;
757 	default:
758 		return (0);			/* power NEVER changed */
759 	}
760 
761 	/* VPP == VCC */
762 	sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
763 	sock_ctrl |= ((sock_ctrl >> 4) & 0x07);
764 
765 	if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl)
766 		return (1); /* no change necessary */
767 	DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts));
768 	if (volts != 0 && sc->chipset == CB_O2MICRO)
769 		reg = cbb_o2micro_power_hack(sc);
770 
771 	/*
772 	 * We have to mask the card change detect interrupt while we're
773 	 * messing with the power.  It is allowed to bounce while we're
774 	 * messing with power as things settle down.  In addition, we mask off
775 	 * the card's function interrupt by routing it via the ISA bus.  This
776 	 * bit generally only affects 16-bit cards.  Some bridges allow one to
777 	 * set another bit to have it also affect 32-bit cards.  Since 32-bit
778 	 * cards are required to be better behaved, we don't bother to get
779 	 * into those bridge specific features.
780 	 *
781 	 * XXX I wonder if we need to enable the READY bit interrupt in the
782 	 * EXCA CSC register for 16-bit cards, and disable the CD bit?
783 	 */
784 	mask = cbb_get(sc, CBB_SOCKET_MASK);
785 	mask |= CBB_SOCKET_MASK_POWER;
786 	mask &= ~CBB_SOCKET_MASK_CD;
787 	cbb_set(sc, CBB_SOCKET_MASK, mask);
788 	PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
789 	    |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2);
790 	cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
791 	if (on) {
792 		mtx_lock(&sc->mtx);
793 		cnt = sc->powerintr;
794 		/*
795 		 * We have a shortish timeout of 500ms here.  Some bridges do
796 		 * not generate a POWER_CYCLE event for 16-bit cards.  In
797 		 * those cases, we have to cope the best we can, and having
798 		 * only a short delay is better than the alternatives.  Others
799 		 * raise the power cycle a smidge before it is really ready.
800 		 * We deal with those below.
801 		 */
802 		sane = 10;
803 		while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) &&
804 		    cnt == sc->powerintr && sane-- > 0)
805 			msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20);
806 		mtx_unlock(&sc->mtx);
807 
808 		/*
809 		 * Relax for 100ms.  Some bridges appear to assert this signal
810 		 * right away, but before the card has stabilized.  Other
811 		 * cards need need more time to cope up reliabily.
812 		 * Experiments with troublesome setups show this to be a
813 		 * "cheap" way to enhance reliabilty.  We need not do this for
814 		 * "off" since we don't touch the card after we turn it off.
815 		 */
816 		pause("cbbPwr", min(hz / 10, 1));
817 
818 		/*
819 		 * The TOPIC95B requires a little bit extra time to get its
820 		 * act together, so delay for an additional 100ms.  Also as
821 		 * documented below, it doesn't seem to set the POWER_CYCLE
822 		 * bit, so don't whine if it never came on.
823 		 */
824 		if (sc->chipset == CB_TOPIC95)
825 			pause("cbb95B", hz / 10);
826 		else if (sane <= 0)
827 			device_printf(sc->dev, "power timeout, doom?\n");
828 	}
829 
830 	/*
831 	 * After the power is good, we can turn off the power interrupt.
832 	 * However, the PC Card standard says that we must delay turning the
833 	 * CD bit back on for a bit to allow for bouncyness on power down
834 	 * (recall that we don't wait above for a power down, since we don't
835 	 * get an interrupt for that).  We're called either from the suspend
836 	 * code in which case we don't want to turn card change on again, or
837 	 * we're called from the card insertion code, in which case the cbb
838 	 * thread will turn it on for us before it waits to be woken by a
839 	 * change event.
840 	 *
841 	 * NB: Topic95B doesn't set the power cycle bit.  we assume that
842 	 * both it and the TOPIC95 behave the same.
843 	 */
844 	cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER);
845 	status = cbb_get(sc, CBB_SOCKET_STATE);
846 	if (on && sc->chipset != CB_TOPIC95) {
847 		if ((status & CBB_STATE_POWER_CYCLE) == 0)
848 			device_printf(sc->dev, "Power not on?\n");
849 	}
850 	if (status & CBB_STATE_BAD_VCC_REQ) {
851 		device_printf(sc->dev, "Bad Vcc requested\n");
852 		/*
853 		 * Turn off the power, and try again.  Retrigger other
854 		 * active interrupts via force register.  From NetBSD
855 		 * PR 36652, coded by me to description there.
856 		 */
857 		sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
858 		sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
859 		cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
860 		status &= ~CBB_STATE_BAD_VCC_REQ;
861 		status &= ~CBB_STATE_DATA_LOST;
862 		status |= CBB_FORCE_CV_TEST;
863 		cbb_set(sc, CBB_SOCKET_FORCE, status);
864 		goto done;
865 	}
866 	if (sc->chipset == CB_TOPIC97) {
867 		reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4);
868 		reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE;
869 		if (on)
870 			reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA;
871 		else
872 			reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA;
873 		pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4);
874 	}
875 	retval = 1;
876 done:;
877 	if (volts != 0 && sc->chipset == CB_O2MICRO)
878 		cbb_o2micro_power_hack2(sc, reg);
879 	return (retval);
880 }
881 
882 static int
883 cbb_current_voltage(device_t brdev)
884 {
885 	struct cbb_softc *sc = device_get_softc(brdev);
886 	uint32_t ctrl;
887 
888 	ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
889 	switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) {
890 	case CBB_SOCKET_CTRL_VCC_5V:
891 		return CARD_5V_CARD;
892 	case CBB_SOCKET_CTRL_VCC_3V:
893 		return CARD_3V_CARD;
894 	case CBB_SOCKET_CTRL_VCC_XV:
895 		return CARD_XV_CARD;
896 	case CBB_SOCKET_CTRL_VCC_YV:
897 		return CARD_YV_CARD;
898 	}
899 	return 0;
900 }
901 
902 /*
903  * detect the voltage for the card, and set it.  Since the power
904  * used is the square of the voltage, lower voltages is a big win
905  * and what Windows does (and what Microsoft prefers).  The MS paper
906  * also talks about preferring the CIS entry as well, but that has
907  * to be done elsewhere.  We also optimize power sequencing here
908  * and don't change things if we're already powered up at a supported
909  * voltage.
910  *
911  * In addition, we power up with OE disabled.  We'll set it later
912  * in the power up sequence.
913  */
914 static int
915 cbb_do_power(device_t brdev)
916 {
917 	struct cbb_softc *sc = device_get_softc(brdev);
918 	uint32_t voltage, curpwr;
919 	uint32_t status;
920 
921 	/* Don't enable OE (output enable) until power stable */
922 	exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE);
923 
924 	voltage = cbb_detect_voltage(brdev);
925 	curpwr = cbb_current_voltage(brdev);
926 	status = cbb_get(sc, CBB_SOCKET_STATE);
927 	if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr))
928 		return 0;
929 	/* Prefer lowest voltage supported */
930 	cbb_power(brdev, CARD_OFF);
931 	if (voltage & CARD_YV_CARD)
932 		cbb_power(brdev, CARD_VCC(YV));
933 	else if (voltage & CARD_XV_CARD)
934 		cbb_power(brdev, CARD_VCC(XV));
935 	else if (voltage & CARD_3V_CARD)
936 		cbb_power(brdev, CARD_VCC(3));
937 	else if (voltage & CARD_5V_CARD)
938 		cbb_power(brdev, CARD_VCC(5));
939 	else {
940 		device_printf(brdev, "Unknown card voltage\n");
941 		return (ENXIO);
942 	}
943 	return (0);
944 }
945 
946 /************************************************************************/
947 /* CardBus power functions						*/
948 /************************************************************************/
949 
950 static int
951 cbb_cardbus_reset_power(device_t brdev, device_t child, int on)
952 {
953 	struct cbb_softc *sc = device_get_softc(brdev);
954 	uint32_t b, h;
955 	int delay, count, zero_seen, func;
956 
957 	/*
958 	 * Asserting reset for 20ms is necessary for most bridges.  For some
959 	 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms.  The
960 	 * root cause of this is unknown, and NetBSD does the same thing.
961 	 */
962 	delay = sc->chipset == CB_RF5C47X ? 400 : 20;
963 	PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
964 	pause("cbbP3", hz * delay / 1000);
965 
966 	/*
967 	 * If a card exists and we're turning it on, take it out of reset.
968 	 * After clearing reset, wait up to 1.1s for the first configuration
969 	 * register (vendor/product) configuration register of device 0.0 to
970 	 * become != 0xffffffff.  The PCMCIA PC Card Host System Specification
971 	 * says that when powering up the card, the PCI Spec v2.1 must be
972 	 * followed.  In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first
973 	 * Config Access) is at most 2^25 clocks, or just over 1s.  Section
974 	 * 2.2.1 states any card not ready to participate in bus transactions
975 	 * must tristate its outputs.  Therefore, any access to its
976 	 * configuration registers must be ignored.  In that state, the config
977 	 * reg will read 0xffffffff.  Section 6.2.1 states a vendor id of
978 	 * 0xffff is invalid, so this can never match a real card.  Print a
979 	 * warning if it never returns a real id.  The PCMCIA PC Card
980 	 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on
981 	 * a cardbus bus, so that's the only register we check here.
982 	 */
983 	if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
984 		PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
985 		    &~CBBM_BRIDGECTRL_RESET, 2);
986 		b = pcib_get_bus(child);
987 		count = 1100 / 20;
988 		do {
989 			pause("cbbP4", hz * 2 / 100);
990 		} while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) ==
991 		    0xfffffffful && --count >= 0);
992 		if (count < 0)
993 			device_printf(brdev, "Warning: Bus reset timeout\n");
994 
995 		/*
996 		 * Some cards (so far just an atheros card I have) seem to
997 		 * come out of reset in a funky state. They report they are
998 		 * multi-function cards, but have nonsense for some of the
999 		 * higher functions.  So if the card claims to be MFDEV, and
1000 		 * any of the higher functions' ID is 0, then we've hit the
1001 		 * bug and we'll try again.
1002 		 */
1003 		h = PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_HDRTYPE, 1);
1004 		if ((h & PCIM_MFDEV) == 0)
1005 			return 0;
1006 		zero_seen = 0;
1007 		for (func = 1; func < 8; func++) {
1008 			h = PCIB_READ_CONFIG(brdev, b, 0, func,
1009 			    PCIR_DEVVENDOR, 4);
1010 			if (h == 0)
1011 				zero_seen++;
1012 		}
1013 		if (!zero_seen)
1014 			return 0;
1015 		return (EINVAL);
1016 	}
1017 	return 0;
1018 }
1019 
1020 static int
1021 cbb_cardbus_power_disable_socket(device_t brdev, device_t child)
1022 {
1023 	cbb_power(brdev, CARD_OFF);
1024 	cbb_cardbus_reset_power(brdev, child, 0);
1025 	return (0);
1026 }
1027 
1028 static int
1029 cbb_cardbus_power_enable_socket(device_t brdev, device_t child)
1030 {
1031 	struct cbb_softc *sc = device_get_softc(brdev);
1032 	int err, count;
1033 
1034 	if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE)))
1035 		return (ENODEV);
1036 
1037 	count = 10;
1038 	do {
1039 		err = cbb_do_power(brdev);
1040 		if (err)
1041 			return (err);
1042 		err = cbb_cardbus_reset_power(brdev, child, 1);
1043 		if (err) {
1044 			device_printf(brdev, "Reset failed, trying again.\n");
1045 			cbb_cardbus_power_disable_socket(brdev, child);
1046 			pause("cbbErr1", hz / 10); /* wait 100ms */
1047 		}
1048 	} while (err != 0 && count-- > 0);
1049 	return (0);
1050 }
1051 
1052 /************************************************************************/
1053 /* CardBus Resource							*/
1054 /************************************************************************/
1055 
1056 static void
1057 cbb_activate_window(device_t brdev, int type)
1058 {
1059 
1060 	PCI_ENABLE_IO(device_get_parent(brdev), brdev, type);
1061 }
1062 
1063 static int
1064 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end)
1065 {
1066 	int basereg;
1067 	int limitreg;
1068 
1069 	if ((win < 0) || (win > 1)) {
1070 		DEVPRINTF((brdev,
1071 		    "cbb_cardbus_io_open: window out of range %d\n", win));
1072 		return (EINVAL);
1073 	}
1074 
1075 	basereg = win * 8 + CBBR_IOBASE0;
1076 	limitreg = win * 8 + CBBR_IOLIMIT0;
1077 
1078 	pci_write_config(brdev, basereg, start, 4);
1079 	pci_write_config(brdev, limitreg, end, 4);
1080 	cbb_activate_window(brdev, SYS_RES_IOPORT);
1081 	return (0);
1082 }
1083 
1084 static int
1085 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end)
1086 {
1087 	int basereg;
1088 	int limitreg;
1089 
1090 	if ((win < 0) || (win > 1)) {
1091 		DEVPRINTF((brdev,
1092 		    "cbb_cardbus_mem_open: window out of range %d\n", win));
1093 		return (EINVAL);
1094 	}
1095 
1096 	basereg = win * 8 + CBBR_MEMBASE0;
1097 	limitreg = win * 8 + CBBR_MEMLIMIT0;
1098 
1099 	pci_write_config(brdev, basereg, start, 4);
1100 	pci_write_config(brdev, limitreg, end, 4);
1101 	cbb_activate_window(brdev, SYS_RES_MEMORY);
1102 	return (0);
1103 }
1104 
1105 #define START_NONE 0xffffffff
1106 #define END_NONE 0
1107 
1108 static void
1109 cbb_cardbus_auto_open(struct cbb_softc *sc, int type)
1110 {
1111 	uint32_t starts[2];
1112 	uint32_t ends[2];
1113 	struct cbb_reslist *rle;
1114 	int align, i;
1115 	uint32_t reg;
1116 
1117 	starts[0] = starts[1] = START_NONE;
1118 	ends[0] = ends[1] = END_NONE;
1119 
1120 	if (type == SYS_RES_MEMORY)
1121 		align = CBB_MEMALIGN;
1122 	else if (type == SYS_RES_IOPORT)
1123 		align = CBB_IOALIGN;
1124 	else
1125 		align = 1;
1126 
1127 	SLIST_FOREACH(rle, &sc->rl, link) {
1128 		if (rle->type != type)
1129 			continue;
1130 		if (rle->res == NULL)
1131 			continue;
1132 		if (!(rman_get_flags(rle->res) & RF_ACTIVE))
1133 			continue;
1134 		if (rman_get_flags(rle->res) & RF_PREFETCHABLE)
1135 			i = 1;
1136 		else
1137 			i = 0;
1138 		if (rman_get_start(rle->res) < starts[i])
1139 			starts[i] = rman_get_start(rle->res);
1140 		if (rman_get_end(rle->res) > ends[i])
1141 			ends[i] = rman_get_end(rle->res);
1142 	}
1143 	for (i = 0; i < 2; i++) {
1144 		if (starts[i] == START_NONE)
1145 			continue;
1146 		starts[i] &= ~(align - 1);
1147 		ends[i] = roundup2(ends[i], align) - 1;
1148 	}
1149 	if (starts[0] != START_NONE && starts[1] != START_NONE) {
1150 		if (starts[0] < starts[1]) {
1151 			if (ends[0] > starts[1]) {
1152 				device_printf(sc->dev, "Overlapping ranges"
1153 				    " for prefetch and non-prefetch memory\n");
1154 				return;
1155 			}
1156 		} else {
1157 			if (ends[1] > starts[0]) {
1158 				device_printf(sc->dev, "Overlapping ranges"
1159 				    " for prefetch and non-prefetch memory\n");
1160 				return;
1161 			}
1162 		}
1163 	}
1164 
1165 	if (type == SYS_RES_MEMORY) {
1166 		cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]);
1167 		cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]);
1168 		reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2);
1169 		reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 |
1170 		    CBBM_BRIDGECTRL_PREFETCH_1);
1171 		if (starts[1] != START_NONE)
1172 			reg |= CBBM_BRIDGECTRL_PREFETCH_1;
1173 		pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2);
1174 		if (bootverbose) {
1175 			device_printf(sc->dev, "Opening memory:\n");
1176 			if (starts[0] != START_NONE)
1177 				device_printf(sc->dev, "Normal: %#x-%#x\n",
1178 				    starts[0], ends[0]);
1179 			if (starts[1] != START_NONE)
1180 				device_printf(sc->dev, "Prefetch: %#x-%#x\n",
1181 				    starts[1], ends[1]);
1182 		}
1183 	} else if (type == SYS_RES_IOPORT) {
1184 		cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]);
1185 		cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]);
1186 		if (bootverbose && starts[0] != START_NONE)
1187 			device_printf(sc->dev, "Opening I/O: %#x-%#x\n",
1188 			    starts[0], ends[0]);
1189 	}
1190 }
1191 
1192 static int
1193 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type,
1194     int rid, struct resource *res)
1195 {
1196 	int ret;
1197 
1198 	ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1199 	    type, rid, res);
1200 	if (ret != 0)
1201 		return (ret);
1202 	cbb_cardbus_auto_open(device_get_softc(brdev), type);
1203 	return (0);
1204 }
1205 
1206 static int
1207 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type,
1208     int rid, struct resource *res)
1209 {
1210 	int ret;
1211 
1212 	ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1213 	    type, rid, res);
1214 	if (ret != 0)
1215 		return (ret);
1216 	cbb_cardbus_auto_open(device_get_softc(brdev), type);
1217 	return (0);
1218 }
1219 
1220 static struct resource *
1221 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type,
1222     int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
1223 {
1224 	struct cbb_softc *sc = device_get_softc(brdev);
1225 	int tmp;
1226 	struct resource *res;
1227 	rman_res_t align;
1228 
1229 	switch (type) {
1230 	case SYS_RES_IRQ:
1231 		tmp = rman_get_start(sc->irq_res);
1232 		if (start > tmp || end < tmp || count != 1) {
1233 			device_printf(child, "requested interrupt %jd-%jd,"
1234 			    "count = %jd not supported by cbb\n",
1235 			    start, end, count);
1236 			return (NULL);
1237 		}
1238 		start = end = tmp;
1239 		flags |= RF_SHAREABLE;
1240 		break;
1241 	case SYS_RES_IOPORT:
1242 		if (start <= cbb_start_32_io)
1243 			start = cbb_start_32_io;
1244 		if (end < start)
1245 			end = start;
1246 		if (count > (1 << RF_ALIGNMENT(flags)))
1247 			flags = (flags & ~RF_ALIGNMENT_MASK) |
1248 			    rman_make_alignment_flags(count);
1249 		break;
1250 	case SYS_RES_MEMORY:
1251 		if (start <= cbb_start_mem)
1252 			start = cbb_start_mem;
1253 		if (end < start)
1254 			end = start;
1255 		if (count < CBB_MEMALIGN)
1256 			align = CBB_MEMALIGN;
1257 		else
1258 			align = count;
1259 		if (align > (1 << RF_ALIGNMENT(flags)))
1260 			flags = (flags & ~RF_ALIGNMENT_MASK) |
1261 			    rman_make_alignment_flags(align);
1262 		break;
1263 	}
1264 	res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1265 	    start, end, count, flags & ~RF_ACTIVE);
1266 	if (res == NULL) {
1267 		printf("cbb alloc res fail type %d rid %x\n", type, *rid);
1268 		return (NULL);
1269 	}
1270 	cbb_insert_res(sc, res, type, *rid);
1271 	if (flags & RF_ACTIVE)
1272 		if (bus_activate_resource(child, type, *rid, res) != 0) {
1273 			bus_release_resource(child, type, *rid, res);
1274 			return (NULL);
1275 		}
1276 
1277 	return (res);
1278 }
1279 
1280 static int
1281 cbb_cardbus_release_resource(device_t brdev, device_t child, int type,
1282     int rid, struct resource *res)
1283 {
1284 	struct cbb_softc *sc = device_get_softc(brdev);
1285 	int error;
1286 
1287 	if (rman_get_flags(res) & RF_ACTIVE) {
1288 		error = bus_deactivate_resource(child, type, rid, res);
1289 		if (error != 0)
1290 			return (error);
1291 	}
1292 	cbb_remove_res(sc, res);
1293 	return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1294 	    type, rid, res));
1295 }
1296 
1297 /************************************************************************/
1298 /* PC Card Power Functions						*/
1299 /************************************************************************/
1300 
1301 static int
1302 cbb_pcic_power_enable_socket(device_t brdev, device_t child)
1303 {
1304 	struct cbb_softc *sc = device_get_softc(brdev);
1305 	int err;
1306 
1307 	DPRINTF(("cbb_pcic_socket_enable:\n"));
1308 
1309 	/* power down/up the socket to reset */
1310 	err = cbb_do_power(brdev);
1311 	if (err)
1312 		return (err);
1313 	exca_reset(&sc->exca, child);
1314 
1315 	return (0);
1316 }
1317 
1318 static int
1319 cbb_pcic_power_disable_socket(device_t brdev, device_t child)
1320 {
1321 	struct cbb_softc *sc = device_get_softc(brdev);
1322 
1323 	DPRINTF(("cbb_pcic_socket_disable\n"));
1324 
1325 	/* Turn off the card's interrupt and leave it in reset, wait 10ms */
1326 	exca_putb(&sc->exca, EXCA_INTR, 0);
1327 	pause("cbbP1", hz / 100);
1328 
1329 	/* power down the socket */
1330 	cbb_power(brdev, CARD_OFF);
1331 	exca_putb(&sc->exca, EXCA_PWRCTL, 0);
1332 
1333 	/* wait 300ms until power fails (Tpf). */
1334 	pause("cbbP2", hz * 300 / 1000);
1335 
1336 	/* enable CSC interrupts */
1337 	exca_putb(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE);
1338 	return (0);
1339 }
1340 
1341 /************************************************************************/
1342 /* POWER methods							*/
1343 /************************************************************************/
1344 
1345 int
1346 cbb_power_enable_socket(device_t brdev, device_t child)
1347 {
1348 	struct cbb_softc *sc = device_get_softc(brdev);
1349 
1350 	if (sc->flags & CBB_16BIT_CARD)
1351 		return (cbb_pcic_power_enable_socket(brdev, child));
1352 	return (cbb_cardbus_power_enable_socket(brdev, child));
1353 }
1354 
1355 int
1356 cbb_power_disable_socket(device_t brdev, device_t child)
1357 {
1358 	struct cbb_softc *sc = device_get_softc(brdev);
1359 	if (sc->flags & CBB_16BIT_CARD)
1360 		return (cbb_pcic_power_disable_socket(brdev, child));
1361 	return (cbb_cardbus_power_disable_socket(brdev, child));
1362 }
1363 
1364 static int
1365 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid,
1366     struct resource *res)
1367 {
1368 	struct cbb_softc *sc = device_get_softc(brdev);
1369 	int error;
1370 
1371 	error = exca_activate_resource(&sc->exca, child, type, rid, res);
1372 	if (error == 0)
1373 		cbb_activate_window(brdev, type);
1374 	return (error);
1375 }
1376 
1377 static int
1378 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type,
1379     int rid, struct resource *res)
1380 {
1381 	struct cbb_softc *sc = device_get_softc(brdev);
1382 	return (exca_deactivate_resource(&sc->exca, child, type, rid, res));
1383 }
1384 
1385 static struct resource *
1386 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1387     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
1388 {
1389 	struct resource *res = NULL;
1390 	struct cbb_softc *sc = device_get_softc(brdev);
1391 	int align;
1392 	int tmp;
1393 
1394 	switch (type) {
1395 	case SYS_RES_MEMORY:
1396 		if (start < cbb_start_mem)
1397 			start = cbb_start_mem;
1398 		if (end < start)
1399 			end = start;
1400 		if (count < CBB_MEMALIGN)
1401 			align = CBB_MEMALIGN;
1402 		else
1403 			align = count;
1404 		if (align > (1 << RF_ALIGNMENT(flags)))
1405 			flags = (flags & ~RF_ALIGNMENT_MASK) |
1406 			    rman_make_alignment_flags(align);
1407 		break;
1408 	case SYS_RES_IOPORT:
1409 		if (start < cbb_start_16_io)
1410 			start = cbb_start_16_io;
1411 		if (end < start)
1412 			end = start;
1413 		break;
1414 	case SYS_RES_IRQ:
1415 		tmp = rman_get_start(sc->irq_res);
1416 		if (start > tmp || end < tmp || count != 1) {
1417 			device_printf(child, "requested interrupt %jd-%jd,"
1418 			    "count = %jd not supported by cbb\n",
1419 			    start, end, count);
1420 			return (NULL);
1421 		}
1422 		flags |= RF_SHAREABLE;
1423 		start = end = rman_get_start(sc->irq_res);
1424 		break;
1425 	}
1426 	res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1427 	    start, end, count, flags & ~RF_ACTIVE);
1428 	if (res == NULL)
1429 		return (NULL);
1430 	cbb_insert_res(sc, res, type, *rid);
1431 	if (flags & RF_ACTIVE) {
1432 		if (bus_activate_resource(child, type, *rid, res) != 0) {
1433 			bus_release_resource(child, type, *rid, res);
1434 			return (NULL);
1435 		}
1436 	}
1437 
1438 	return (res);
1439 }
1440 
1441 static int
1442 cbb_pcic_release_resource(device_t brdev, device_t child, int type,
1443     int rid, struct resource *res)
1444 {
1445 	struct cbb_softc *sc = device_get_softc(brdev);
1446 	int error;
1447 
1448 	if (rman_get_flags(res) & RF_ACTIVE) {
1449 		error = bus_deactivate_resource(child, type, rid, res);
1450 		if (error != 0)
1451 			return (error);
1452 	}
1453 	cbb_remove_res(sc, res);
1454 	return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1455 	    type, rid, res));
1456 }
1457 
1458 /************************************************************************/
1459 /* PC Card methods							*/
1460 /************************************************************************/
1461 
1462 int
1463 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid,
1464     u_long flags)
1465 {
1466 	struct cbb_softc *sc = device_get_softc(brdev);
1467 	struct resource *res;
1468 
1469 	if (type != SYS_RES_MEMORY)
1470 		return (EINVAL);
1471 	res = cbb_find_res(sc, type, rid);
1472 	if (res == NULL) {
1473 		device_printf(brdev,
1474 		    "set_res_flags: specified rid not found\n");
1475 		return (ENOENT);
1476 	}
1477 	return (exca_mem_set_flags(&sc->exca, res, flags));
1478 }
1479 
1480 int
1481 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid,
1482     uint32_t cardaddr, uint32_t *deltap)
1483 {
1484 	struct cbb_softc *sc = device_get_softc(brdev);
1485 	struct resource *res;
1486 
1487 	res = cbb_find_res(sc, SYS_RES_MEMORY, rid);
1488 	if (res == NULL) {
1489 		device_printf(brdev,
1490 		    "set_memory_offset: specified rid not found\n");
1491 		return (ENOENT);
1492 	}
1493 	return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap));
1494 }
1495 
1496 /************************************************************************/
1497 /* BUS Methods								*/
1498 /************************************************************************/
1499 
1500 
1501 int
1502 cbb_activate_resource(device_t brdev, device_t child, int type, int rid,
1503     struct resource *r)
1504 {
1505 	struct cbb_softc *sc = device_get_softc(brdev);
1506 
1507 	if (sc->flags & CBB_16BIT_CARD)
1508 		return (cbb_pcic_activate_resource(brdev, child, type, rid, r));
1509 	else
1510 		return (cbb_cardbus_activate_resource(brdev, child, type, rid,
1511 		    r));
1512 }
1513 
1514 int
1515 cbb_deactivate_resource(device_t brdev, device_t child, int type,
1516     int rid, struct resource *r)
1517 {
1518 	struct cbb_softc *sc = device_get_softc(brdev);
1519 
1520 	if (sc->flags & CBB_16BIT_CARD)
1521 		return (cbb_pcic_deactivate_resource(brdev, child, type,
1522 		    rid, r));
1523 	else
1524 		return (cbb_cardbus_deactivate_resource(brdev, child, type,
1525 		    rid, r));
1526 }
1527 
1528 struct resource *
1529 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1530     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
1531 {
1532 	struct cbb_softc *sc = device_get_softc(brdev);
1533 
1534 	if (sc->flags & CBB_16BIT_CARD)
1535 		return (cbb_pcic_alloc_resource(brdev, child, type, rid,
1536 		    start, end, count, flags));
1537 	else
1538 		return (cbb_cardbus_alloc_resource(brdev, child, type, rid,
1539 		    start, end, count, flags));
1540 }
1541 
1542 int
1543 cbb_release_resource(device_t brdev, device_t child, int type, int rid,
1544     struct resource *r)
1545 {
1546 	struct cbb_softc *sc = device_get_softc(brdev);
1547 
1548 	if (sc->flags & CBB_16BIT_CARD)
1549 		return (cbb_pcic_release_resource(brdev, child, type,
1550 		    rid, r));
1551 	else
1552 		return (cbb_cardbus_release_resource(brdev, child, type,
1553 		    rid, r));
1554 }
1555 
1556 int
1557 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result)
1558 {
1559 	struct cbb_softc *sc = device_get_softc(brdev);
1560 
1561 	switch (which) {
1562 	case PCIB_IVAR_DOMAIN:
1563 		*result = sc->domain;
1564 		return (0);
1565 	case PCIB_IVAR_BUS:
1566 		*result = sc->bus.sec;
1567 		return (0);
1568 	case EXCA_IVAR_SLOT:
1569 		*result = 0;
1570 		return (0);
1571 	}
1572 	return (ENOENT);
1573 }
1574 
1575 int
1576 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value)
1577 {
1578 
1579 	switch (which) {
1580 	case PCIB_IVAR_DOMAIN:
1581 		return (EINVAL);
1582 	case PCIB_IVAR_BUS:
1583 		return (EINVAL);
1584 	case EXCA_IVAR_SLOT:
1585 		return (EINVAL);
1586 	}
1587 	return (ENOENT);
1588 }
1589 
1590 int
1591 cbb_child_present(device_t parent, device_t child)
1592 {
1593 	struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(parent);
1594 	uint32_t sockstate;
1595 
1596 	sockstate = cbb_get(sc, CBB_SOCKET_STATE);
1597 	return (CBB_CARD_PRESENT(sockstate) && sc->cardok);
1598 }
1599