xref: /freebsd/sys/dev/pci/hostb_pci.c (revision a3557ef0)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright 1997, Stefan Esser <se@freebsd.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice unmodified, this list of conditions, and the following
11  *    disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include <sys/param.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 
36 #include <dev/pci/pcivar.h>
37 #include <dev/pci/pcireg.h>
38 
39 /*
40  * Provide a device to "eat" the host->pci bridge devices that show up
41  * on PCI buses and stop them showing up twice on the probes.  This also
42  * stops them showing up as 'none' in pciconf -l.  If the host bridge
43  * provides an AGP capability then we create a child agp device for the
44  * agp GART driver to attach to.
45  */
46 static int
47 pci_hostb_probe(device_t dev)
48 {
49 	u_int32_t id;
50 
51 	id = pci_get_devid(dev);
52 
53 	switch (id) {
54 
55 	/* VIA VT82C596 Power Management Function */
56 	case 0x30501106:
57 		return (ENXIO);
58 
59 	default:
60 		break;
61 	}
62 
63 	if (pci_get_class(dev) == PCIC_BRIDGE &&
64 	    pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
65 		device_set_desc(dev, "Host to PCI bridge");
66 		device_quiet(dev);
67 		return (-10000);
68 	}
69 	return (ENXIO);
70 }
71 
72 static int
73 pci_hostb_attach(device_t dev)
74 {
75 
76 	bus_generic_probe(dev);
77 
78 	/*
79 	 * If AGP capabilities are present on this device, then create
80 	 * an AGP child.
81 	 */
82 	if (pci_find_cap(dev, PCIY_AGP, NULL) == 0)
83 		device_add_child(dev, "agp", -1);
84 	bus_generic_attach(dev);
85 	return (0);
86 }
87 
88 /* Bus interface. */
89 
90 static int
91 pci_hostb_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
92 {
93 
94 	return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result));
95 }
96 
97 static int
98 pci_hostb_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
99 {
100 
101 	return (EINVAL);
102 }
103 
104 static struct resource *
105 pci_hostb_alloc_resource(device_t dev, device_t child, int type, int *rid,
106     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
107 {
108 
109 	return (bus_alloc_resource(dev, type, rid, start, end, count, flags));
110 }
111 
112 static int
113 pci_hostb_release_resource(device_t dev, device_t child, int type, int rid,
114     struct resource *r)
115 {
116 
117 	return (bus_release_resource(dev, type, rid, r));
118 }
119 
120 /* PCI interface. */
121 
122 static uint32_t
123 pci_hostb_read_config(device_t dev, device_t child, int reg, int width)
124 {
125 
126 	return (pci_read_config(dev, reg, width));
127 }
128 
129 static void
130 pci_hostb_write_config(device_t dev, device_t child, int reg,
131     uint32_t val, int width)
132 {
133 
134 	pci_write_config(dev, reg, val, width);
135 }
136 
137 static int
138 pci_hostb_enable_busmaster(device_t dev, device_t child)
139 {
140 
141 	device_printf(dev, "child %s requested pci_enable_busmaster\n",
142 	    device_get_nameunit(child));
143 	return (pci_enable_busmaster(dev));
144 }
145 
146 static int
147 pci_hostb_disable_busmaster(device_t dev, device_t child)
148 {
149 
150 	device_printf(dev, "child %s requested pci_disable_busmaster\n",
151 	    device_get_nameunit(child));
152 	return (pci_disable_busmaster(dev));
153 }
154 
155 static int
156 pci_hostb_enable_io(device_t dev, device_t child, int space)
157 {
158 
159 	device_printf(dev, "child %s requested pci_enable_io\n",
160 	    device_get_nameunit(child));
161 	return (pci_enable_io(dev, space));
162 }
163 
164 static int
165 pci_hostb_disable_io(device_t dev, device_t child, int space)
166 {
167 
168 	device_printf(dev, "child %s requested pci_disable_io\n",
169 	    device_get_nameunit(child));
170 	return (pci_disable_io(dev, space));
171 }
172 
173 static int
174 pci_hostb_set_powerstate(device_t dev, device_t child, int state)
175 {
176 
177 	device_printf(dev, "child %s requested pci_set_powerstate\n",
178 	    device_get_nameunit(child));
179 	return (pci_set_powerstate(dev, state));
180 }
181 
182 static int
183 pci_hostb_get_powerstate(device_t dev, device_t child)
184 {
185 
186 	device_printf(dev, "child %s requested pci_get_powerstate\n",
187 	    device_get_nameunit(child));
188 	return (pci_get_powerstate(dev));
189 }
190 
191 static int
192 pci_hostb_assign_interrupt(device_t dev, device_t child)
193 {
194 
195 	device_printf(dev, "child %s requested pci_assign_interrupt\n",
196 	    device_get_nameunit(child));
197 	return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev));
198 }
199 
200 static int
201 pci_hostb_find_cap(device_t dev, device_t child, int capability,
202     int *capreg)
203 {
204 
205 	return (pci_find_cap(dev, capability, capreg));
206 }
207 
208 static int
209 pci_hostb_find_next_cap(device_t dev, device_t child, int capability,
210     int start, int *capreg)
211 {
212 
213 	return (pci_find_next_cap(dev, capability, start, capreg));
214 }
215 
216 static int
217 pci_hostb_find_extcap(device_t dev, device_t child, int capability,
218     int *capreg)
219 {
220 
221 	return (pci_find_extcap(dev, capability, capreg));
222 }
223 
224 static int
225 pci_hostb_find_next_extcap(device_t dev, device_t child, int capability,
226     int start, int *capreg)
227 {
228 
229 	return (pci_find_next_extcap(dev, capability, start, capreg));
230 }
231 
232 static int
233 pci_hostb_find_htcap(device_t dev, device_t child, int capability,
234     int *capreg)
235 {
236 
237 	return (pci_find_htcap(dev, capability, capreg));
238 }
239 
240 static int
241 pci_hostb_find_next_htcap(device_t dev, device_t child, int capability,
242     int start, int *capreg)
243 {
244 
245 	return (pci_find_next_htcap(dev, capability, start, capreg));
246 }
247 
248 static device_method_t pci_hostb_methods[] = {
249 	/* Device interface */
250 	DEVMETHOD(device_probe,		pci_hostb_probe),
251 	DEVMETHOD(device_attach,	pci_hostb_attach),
252 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
253 	DEVMETHOD(device_suspend,	bus_generic_suspend),
254 	DEVMETHOD(device_resume,	bus_generic_resume),
255 
256 	/* Bus interface */
257 	DEVMETHOD(bus_read_ivar,	pci_hostb_read_ivar),
258 	DEVMETHOD(bus_write_ivar,	pci_hostb_write_ivar),
259 	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
260 	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
261 
262 	DEVMETHOD(bus_alloc_resource,	pci_hostb_alloc_resource),
263 	DEVMETHOD(bus_release_resource,	pci_hostb_release_resource),
264 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
265 	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
266 
267 	/* PCI interface */
268 	DEVMETHOD(pci_read_config,	pci_hostb_read_config),
269 	DEVMETHOD(pci_write_config,	pci_hostb_write_config),
270 	DEVMETHOD(pci_enable_busmaster,	pci_hostb_enable_busmaster),
271 	DEVMETHOD(pci_disable_busmaster, pci_hostb_disable_busmaster),
272 	DEVMETHOD(pci_enable_io,	pci_hostb_enable_io),
273 	DEVMETHOD(pci_disable_io,	pci_hostb_disable_io),
274 	DEVMETHOD(pci_get_powerstate,	pci_hostb_get_powerstate),
275 	DEVMETHOD(pci_set_powerstate,	pci_hostb_set_powerstate),
276 	DEVMETHOD(pci_assign_interrupt,	pci_hostb_assign_interrupt),
277 	DEVMETHOD(pci_find_cap,		pci_hostb_find_cap),
278 	DEVMETHOD(pci_find_next_cap,	pci_hostb_find_next_cap),
279 	DEVMETHOD(pci_find_extcap,	pci_hostb_find_extcap),
280 	DEVMETHOD(pci_find_next_extcap,	pci_hostb_find_next_extcap),
281 	DEVMETHOD(pci_find_htcap,	pci_hostb_find_htcap),
282 	DEVMETHOD(pci_find_next_htcap,	pci_hostb_find_next_htcap),
283 
284 	{ 0, 0 }
285 };
286 
287 static driver_t pci_hostb_driver = {
288 	"hostb",
289 	pci_hostb_methods,
290 	1,
291 };
292 
293 static devclass_t pci_hostb_devclass;
294 
295 DRIVER_MODULE(hostb, pci, pci_hostb_driver, pci_hostb_devclass, 0, 0);
296