1 /******************************************************************************* 2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved. 3 * 4 *Redistribution and use in source and binary forms, with or without modification, are permitted provided 5 *that the following conditions are met: 6 *1. Redistributions of source code must retain the above copyright notice, this list of conditions and the 7 *following disclaimer. 8 *2. Redistributions in binary form must reproduce the above copyright notice, 9 *this list of conditions and the following disclaimer in the documentation and/or other materials provided 10 *with the distribution. 11 * 12 *THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED 13 *WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 14 *FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 15 *FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 16 *NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 17 *BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 19 *SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 20 * 21 * 22 ********************************************************************************/ 23 /*******************************************************************************/ 24 /*! \file satypes.h 25 * \brief The file defines the internal data structure types used by LL layer 26 * 27 */ 28 /*******************************************************************************/ 29 30 #ifndef __SATYPES_H__ 31 32 #define __SATYPES_H__ 33 34 /** \brief the callback function of an timer 35 * 36 * the definition of the timer callback function 37 */ 38 typedef bit32 (* agsaCallback_t) (agsaRoot_t *agRoot, 39 bit32 Event, 40 void *Parm); 41 42 /** \brief the data structure of a timer 43 * 44 * use to describe timer 45 * 46 */ 47 typedef struct agsaTimerDesc_s 48 { 49 SALINK linkNode; /**< the link node data structure of the timer */ 50 bit32 valid; /**< the valid bit of the timer descriptor */ 51 bit32 timeoutTick; /**< the timeout tick of the timer */ 52 agsaCallback_t pfnTimeout; /**< the callback function fo the timer */ 53 bit32 Event; /**< the event paramter of the timer callback function */ 54 void * pParm; /**< the point to the paramter passed to callback function */ 55 } agsaTimerDesc_t; 56 57 /** \brief the port 58 * 59 * describe port data structure 60 * 61 */ 62 typedef struct agsaPort_s 63 { 64 SALINK linkNode; /**< the link node data structure of the port */ 65 agsaPortContext_t portContext; /**< the port context of the port */ 66 SALINK_LIST listSASATADevices; /**< SAS/SATA devices list of the port */ 67 bit32 phyMap[AGSA_MAX_VALID_PHYS]; /**< Boolean arrar: the Phys included in the port. */ 68 bit32 status; /**< port state */ 69 bit32 tobedeleted; /**< mark for deletetion after callback */ 70 bit32 portId; /** Port Id from SPC */ 71 bit8 portIdx; /**< the Index of the port */ 72 bit8 reserved[3]; 73 } agsaPort_t; 74 75 /** \brief the phy 76 * 77 * phy data structure 78 * 79 */ 80 typedef struct agsaPhy_s 81 { 82 agsaPort_t *pPort; /**< pointer to the port includes the phy */ 83 agsaSASIdentify_t sasIdentify; /**< the SAS identify of the phy */ 84 agsaContext_t *agContext; /**< agContext for the Phy */ 85 bit32 status; /**< the status of the phy */ 86 bit8 phyId; /**< the Id of the phy */ 87 bit8 linkstatus; /**< the link status of the phy */ 88 bit8 reserved[2]; 89 #if defined(SALLSDK_DEBUG) 90 bit8 remoteSignature[8]; /* the remote signature of the phy is the phy is in native SATA mode */ 91 #endif 92 } agsaPhy_t; 93 94 /** \brief the LL defined SAS/SATA device information 95 * 96 * LL defined SAS/SATA device information 97 * 98 */ 99 typedef union agsaSASSATADevInfo_s 100 { 101 agsaSASDeviceInfo_t sasDeviceInfo; /**< SAS device information of the device */ 102 agsaSATADeviceInfo_t sataDeviceInfo; /**< SATA device information of the device */ 103 } agsaSASSATADevInfo_t; 104 105 /** \brief the LL defined device descriptor 106 * 107 * LL defined device descriptor 108 * 109 */ 110 typedef struct agsaDeviceDesc_s 111 { 112 SALINK linkNode; /**< the link node data structure of the device */ 113 agsaDevHandle_t initiatorDevHandle; /**< the device handle of an initiator device */ 114 agsaDevHandle_t targetDevHandle; /**< the device handle of a target device */ 115 SALINK_LIST pendingIORequests; /**< the pending IO requests, for SSP or SATA */ 116 agsaPort_t *pPort; /**< the port discovered the device */ 117 bit8 deviceType; /**< the device type */ 118 bit8 reserved[3]; 119 bit32 option; 120 bit32 param; 121 agsaSASSATADevInfo_t devInfo; /**< SAS/SATA device information */ 122 bit32 DeviceMapIndex; /**< device index for device handle */ 123 } agsaDeviceDesc_t; 124 125 /** \brief the LL defined IO request descriptor 126 * 127 * LL defined IO Request descriptor 128 * 129 */ 130 typedef struct agsaIORequestDesc_s 131 { 132 SALINK linkNode; /**< the link node data structure of the IO request */ 133 agsaIORequest_t *pIORequestContext;/**< the IO request context */ 134 agsaDeviceDesc_t *pDevice; /**< the pointer to the device, to which the request is sent */ 135 agsaPort_t *pPort; /**< the pointer to the port - using by HW_EVENT_ACK with PHY_DOWN event */ 136 ossaSSPCompletedCB_t completionCB; /**< completion callback to be called */ 137 bit32 requestType; /**< the request type */ 138 bit16 HwAckType; /**< Track HW_acks */ 139 bit16 SOP; /**< SetPhyProfile page not returned in reply */ 140 bit32 startTick; /**< start time for this IO */ 141 bit32 HTag; /**< the host tag to index into the IORequest array */ 142 bit8 valid; /**< boolean flag: the request is valid */ 143 bit8 IRmode; /**< indirect smp response mode */ 144 bit8 modePageContext; /**< request is for security mode change */ 145 bit8 DeviceInfoCmdOption;/**< */ 146 #ifdef FAST_IO_TEST 147 SALINK fastLink; /* Fast I/O's chain */ 148 #endif 149 } agsaIORequestDesc_t; 150 151 /** \brief the LL defined SMP Response Frame header and payload 152 * 153 * LL defined SMP Response Frame header and payload 154 * 155 */ 156 typedef struct agsaSMPRspFrame_s 157 { 158 agsaSMPFrameHeader_t smpHeader; 159 bit8 smpPayload[1020]; 160 } agsaSMPRspFrame_t; 161 162 /** \brief the agsaIOMap_t 163 * 164 * data storage for IO Request Mapping 165 * 166 */ 167 typedef struct agsaIOMap_s 168 { 169 bit32 Tag; 170 agsaIORequestDesc_t *IORequest; 171 agsaContext_t *agContext; 172 } agsaIOMap_t; 173 174 /** \brief the agsaPortMap_t 175 * 176 * data storage for Port Context Mapping 177 * 178 */ 179 typedef struct agsaPortMap_s 180 { 181 bit32 PortID; 182 bit32 PortStatus; 183 void *PortContext; 184 } agsaPortMap_t; 185 186 /** \brief the agsaDeviceMap_t 187 * 188 * data storage for Device Handle Mapping 189 * 190 */ 191 typedef struct agsaDeviceMap_s 192 { 193 bit32 DeviceIdFromFW; 194 void *DeviceHandle; 195 } agsaDeviceMap_t; 196 197 #ifdef FAST_IO_TEST 198 /* interleaved Fast IO's are not allowed */ 199 #define LL_FAST_IO_SIZE 1 200 #endif 201 202 /** \brief the LLRoot 203 * 204 * root data structure 205 * 206 */ 207 typedef struct agsaLLRoot_s 208 { 209 agsaMem_t deviceLinkMem; /**< Device Link System Memory */ 210 SALINK_LIST freeDevicesList; /**< List of free IO device handles */ 211 212 agsaMem_t IORequestMem; /**< IO Request Link System Memory */ 213 SALINK_LIST freeIORequests; /**< List of free IORequests */ 214 SALINK_LIST freeReservedRequests; /**< List of reserved IORequests not for normal IO! */ 215 216 agsaMem_t timerLinkMem; /**< Timer Link System Memory */ 217 SALINK_LIST freeTimers; /**< List of free timers */ 218 SALINK_LIST validTimers; /**< List of valid timers */ 219 220 agsaPhy_t phys[AGSA_MAX_VALID_PHYS]; /**< Phys */ 221 222 agsaPort_t ports[AGSA_MAX_VALID_PORTS]; /**< Ports */ 223 SALINK_LIST freePorts; /**< List of free ports */ 224 SALINK_LIST validPorts; /**< List of valid ports */ 225 226 bit8 phyCount; /**< number of phys */ 227 bit8 portCount; /**< number of ports */ 228 bit8 sysIntsActive; /**< whether interrupt is enabled */ 229 bit8 reserved; /**< reserved */ 230 231 bit32 usecsPerTick; /**< timer tick unit */ 232 bit32 minStallusecs; /**< shorest available stall */ 233 bit32 timeTick; /**< the current timer tick */ 234 bit32 ResetStartTick; /* Reset StartTick */ 235 bit32 chipStatus; /**< chip status */ 236 237 bit32 interruptVecIndexBitMap[MAX_NUM_VECTOR]; /**< Interrupt Vector Index BitMap */ 238 bit32 interruptVecIndexBitMap1[MAX_NUM_VECTOR]; /**< Interrupt Vector Index BitMap1 */ 239 240 agsaBarOffset_t SpcBarOffset[60]; 241 bit32 ChipId; /* Subversion PCI ID */ 242 243 agsaPortMap_t PortMap[AGSA_MAX_VALID_PORTS]; /**< Port Mapping for PortContext */ 244 agsaDeviceMap_t DeviceMap[MAX_IO_DEVICE_ENTRIES]; /**< Device Map for Device Handle */ 245 agsaIOMap_t IOMap[MAX_ACTIVE_IO_REQUESTS]; /**< IO MAP for IO Request */ 246 agsaDevHandle_t *DeviceHandle[MAX_IO_DEVICE_ENTRIES]; /**< used for get device handles */ 247 agsaDevHandle_t *pDeviceHandle; /**< used for get device handles */ 248 249 agsaMemoryRequirement_t memoryAllocated; /**< SAS LL memory Allocation */ 250 agsaHwConfig_t hwConfig; /**< copy of hwConfig */ 251 agsaSwConfig_t swConfig; /**< copy of swConfig */ 252 agsaQueueConfig_t QueueConfig; /* copy of MPI IBQ/OBQ configuration */ 253 254 mpiConfig_t mpiConfig; /**< MPI Configuration */ 255 mpiMemReq_t mpiMemoryAllocated; /**< MPI memory */ 256 mpiICQueue_t inboundQueue[AGSA_MAX_INBOUND_Q]; /**< Outbound queue descriptor array */ 257 mpiOCQueue_t outboundQueue[AGSA_MAX_OUTBOUND_Q]; /**< Outbound queue descriptor array */ 258 mpiHostLLConfigDescriptor_t mainConfigTable; /**< LL main Configuration Table */ 259 260 ossaDeviceRegistrationCB_t DeviceRegistrationCB; /**< Device Registration CB */ 261 ossaDeregisterDeviceHandleCB_t DeviceDeregistrationCB;/**< Device DeRegistration CB */ 262 263 bit32 numInterruptVectors; /**< Number of Interrupt Vectors configured from OS */ 264 bit32 Use64bit; /**< Only write upper bits if needed */ 265 266 EnadDisabHandler_t DisableInterrupts; /*Interrupt type dependant function pointer to disable interrupts */ 267 EnadDisabHandler_t ReEnableInterrupts; /*Interrupt type dependant reenable */ 268 InterruptOurs_t OurInterrupt; /*Interrupt type dependant check for our interrupt */ 269 270 #ifdef SA_FW_TEST_BUNCH_STARTS 271 /** 272 * Following variables are needed to handle Bunch Starts (bulk update of PI) 273 * - saRoot (agsaLLRoot_t): Global Flags, apply to all queues 274 * 1. BunchStarts_Enable 275 * 2. BunchStarts_Threshold 276 * 3. BunchStarts_Pending 277 * 4. BunchStarts_TimeoutTicks 278 * 279 * - Circular Q (mpiICQueue_s): Queue specific flags 280 * 1. BunchStarts_QPending 281 * 2. BunchStarts_QPendingTick 282 */ 283 bit32 BunchStarts_Enable; // enables/disables whole feature 284 bit32 BunchStarts_Threshold; // global min number of IOs to bunch per queue. 285 bit32 BunchStarts_Pending; // global counter collects all Q->BunchStarts_QPending 286 bit32 BunchStarts_TimeoutTicks; // global time out value beyond which bunched IOs will be started even below BunchStarts_Threshold. 287 #endif /* SA_FW_TEST_BUNCH_STARTS */ 288 289 #ifdef SA_FW_TIMER_READS_STATUS 290 spc_GSTableDescriptor_t mpiGSTable; 291 bit32 MsguTcnt_last; /**< DW3 - MSGU Tick count */ 292 bit32 IopTcnt_last; /**< DW4 - IOP Tick count */ 293 bit32 Iop1Tcnt_last; /**< DW4 - IOP Tick count */ 294 295 #endif /* SA_FW_TIMER_READS_STATUS */ 296 297 agsaControllerInfo_t ControllerInfo; 298 agsaIOErrorEventStats_t IoErrorCount; 299 agsaIOErrorEventStats_t IoEventCount; 300 301 bit32 ResetFailed; 302 //bit32 FatalDone; 303 bit32 ForensicLastOffset; 304 //bit32 FatalAccumLen; 305 //bit32 NonFatalForensicLastOffset; 306 //bit32 FatalCurrentLength; 307 bit32 FatalForensicStep; 308 bit32 FatalForensicShiftOffset; 309 bit32 FatalBarLoc; 310 311 #ifdef HIALEAH_ENCRYPTION 312 agsaEncryptGeneralPage_t EncGenPage; 313 #endif /* HIALEAH_ENCRYPTION */ 314 #ifdef SA_ENABLE_TRACE_FUNCTIONS 315 bit8 traceBuffLookup[16]; 316 317 bit32 TraceDestination; 318 bit32 TraceMask; 319 320 bit32 TraceBufferLength; 321 bit32 CurrentTraceIndexWrapCount; 322 bit32 CurrentTraceIndex; 323 bit32 traceLineFeedCnt; 324 bit8 *TraceBuffer; 325 bit32 TraceBlockReInit; 326 327 #endif /*SA_ENABLE_TRACE_FUNCTIONS*/ 328 329 bit32 registerDump0[REGISTER_DUMP_BUFF_SIZE/4]; /**< register dump buffer 0 */ 330 bit32 registerDump1[REGISTER_DUMP_BUFF_SIZE/4]; /**< register dump buffer 1 */ 331 332 bit32 autoDeregDeviceflag[AGSA_MAX_VALID_PORTS]; 333 334 #ifdef SA_FW_TEST_INTERRUPT_REASSERT 335 bit32 CheckAll; 336 bit32 OldPi[64]; 337 bit32 OldCi[64]; 338 bit32 OldFlag[64]; 339 #endif /* SA_FW_TEST_INTERRUPT_REASSERT */ 340 341 342 #ifdef SALL_API_TEST 343 agsaLLCountInfo_t LLCounters; 344 #endif 345 #ifdef FAST_IO_TEST 346 void *freeFastReq[LL_FAST_IO_SIZE]; /* saFastRequest_t* */ 347 int freeFastIdx; 348 #endif 349 } agsaLLRoot_t; 350 351 #ifdef FAST_IO_TEST 352 /* 353 one struct per all prepared Fast IO's; 354 freed after all IO's are posted to FW and interrupt is triggered; 355 maintained for error rollback or cancel functionality 356 */ 357 typedef struct saFastRequest_s 358 { 359 bit32 beforePI[AGSA_MAX_INBOUND_Q]; 360 bit32 inqList[AGSA_MAX_INBOUND_Q]; 361 bit32 inqMax; 362 SALINK_LIST requests; /* List of all Fast IORequests */ 363 void *agRoot; /* agsaRoot_t * */ 364 bit8 valid; /* to avoid usage when the struct is freed */ 365 } saFastRequest_t; 366 #endif 367 368 #endif /*__SATYPES_H__ */ 369