1 /******************************************************************************* 2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved. 3 * 4 *Redistribution and use in source and binary forms, with or without modification, are permitted provided 5 *that the following conditions are met: 6 *1. Redistributions of source code must retain the above copyright notice, this list of conditions and the 7 *following disclaimer. 8 *2. Redistributions in binary form must reproduce the above copyright notice, 9 *this list of conditions and the following disclaimer in the documentation and/or other materials provided 10 *with the distribution. 11 * 12 *THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED 13 *WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 14 *FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 15 *FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 16 *NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 17 *BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 19 *SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 20 * 21 * 22 ********************************************************************************/ 23 /*******************************************************************************/ 24 /** \file 25 * 26 * 27 * The file defines data structures for SAS/SATA TD layer 28 * 29 */ 30 31 #ifndef __TDSATYPES_H 32 #define __TDSATYPES_H 33 34 #define ESGL_PAGES_SIZE sizeof(agsaEsgl_t) /** the esgl page size */ 35 #define NUM_ESGL_PAGES 0 /* old value 512 */ /**< the default number of esgl pages */ 36 37 38 /**< target device type */ 39 #define TD_DEFAULT_DEVICE 0 40 #define TD_SAS_DEVICE 1 41 #define TD_SATA_DEVICE 2 42 43 #include <dev/pms/RefTisa/tisa/sassata/common/tdioctl.h> 44 45 46 /** \brief data structure for SATA Host 47 * 48 * to be developed 49 * 50 */ 51 typedef struct itdstHost_s 52 { 53 int i; 54 } itdstHost_t; 55 56 /** \brief data structure for SATA Device 57 * 58 * to be developed 59 * 60 */ 61 typedef struct ttdstDevice_s 62 { 63 int i; 64 } ttdstDevice_t; 65 66 #ifdef INITIATOR_DRIVER 67 typedef struct itdsaIni_s { 68 /**< point to the shared structure bothe SAS and SATA */ 69 struct tdsaContext_s *tdsaAllShared; 70 itdssOperatingOption_t OperatingOption; 71 tdSCSIStatusCount_t ScsiStatusCounts; 72 tdSenseKeyCount_t SenseKeyCounter; 73 bit32 NumIOsActive; 74 /* the list of initiator timer; upon expiration timer CB fn is called 75 eg) itdProcessTimers() 76 */ 77 tdList_t timerlist; 78 } itdsaIni_t; 79 #endif 80 81 struct ttdsaXchgAllocFreeInfoList_s; 82 83 #ifdef TARGET_DRIVER 84 typedef struct ttdsaTgt_s { 85 /* point to the shared across SAS and SATA */ 86 struct tdsaContext_s *tdsaAllShared; 87 ttdssOperatingOption_t OperatingOption; 88 tiTargetOption_t tiOperatingOption; 89 ttdsaXchgData_t ttdsaXchgData; 90 #ifdef PASSTHROUGH 91 /* registered passthrough CB */ 92 ostiProcessPassthroughCmnd_t PasthroughCB; 93 #endif 94 } ttdsaTgt_t; 95 #endif 96 97 98 /** \brief data structure for SATA Device 99 * 100 * not in use yet. just a place holderto be develped 101 * 102 */ 103 typedef struct tdHardwareInfo_s { 104 bit16 DeviceID; 105 bit16 VendorID; 106 bit8 ChipRev; 107 bit32 PciFunctionNumber; 108 bit32 FlashRomPresent; 109 } tdHardwareInfo_t; 110 111 112 /** \brief data structure for ESLG page 113 * 114 * This data structure describes the ESGL page maintained in TD layer. 115 * One important field is agEsgl which is pointer to assaEsgl_t data structure, 116 * which describes ESGL used in lower layer. 117 * Memory for this data structure is allocated using tiTdSharedMem_t data 118 * structure. However, Memory for agsaEsgl_t data structure is allocated using 119 * tiLoLevelResource_t. 120 * 121 */ 122 typedef struct tdsaEsglPageInfo_s { 123 tdList_t tdlist; /**< pointers to next and previous pages */ 124 bit32 physAddressUpper; /**< upper physical address of the page */ 125 bit32 physAddressLower; /**< lower physical address of the page */ 126 bit32 len; 127 agsaEsgl_t *agEsgl; 128 bit32 id; /**< for debugging only */ 129 } tdsaEsglPageInfo_t; 130 131 /** \brief data structure for ESLG page pool 132 * 133 * This data structure describes the pool of esgl pages 134 * 135 */ 136 typedef struct tdsaEsglPagePool_s { 137 tdsaEsglPageInfo_t EsglPages[1]; /**< variable size array */ 138 } tdsaEsglPagePool_t; 139 140 141 /** \brief data structure for ESGL pool information 142 * 143 * This data structure maintains information about ESGL pool. For example, this 144 * data structure maintains the number of free and total ESGL pages and uses 145 * tdList_t data structure for listing of ESGL pages. 146 * 147 */ 148 typedef struct tdsaEsglAllInfo_s { 149 /* 150 used in tdGetEsglPages() 151 */ 152 tdList_t mainlist; /* not used */ 153 tdList_t freelist; 154 bit32 NumEsglPages; 155 bit32 NumFreeEsglPages; 156 bit32 EsglPageSize; 157 bit32 physAddrUpper; 158 bit32 physAddrLower; 159 void *virtPtr; 160 tdsaEsglPagePool_t *EsglPagePool; 161 } tdsaEsglAllInfo_t; 162 163 typedef struct smp_pass_through_req 164 { 165 bit8 exp_sas_addr[8]; //Storing the 16 digit expander SAS-address 166 bit32 smp_req_len; //Length of the request frame 167 bit32 smp_resp_len; //Length of the response frame 168 bit8 smp_req_resp[1]; //Pointer to the request-response frame 169 }smp_pass_through_req_t; 170 171 #ifdef TD_INT_COALESCE 172 typedef struct tdsaIntCoalesceContext_s { 173 tdList_t MainLink; /* free */ 174 tdList_t FreeLink; /* in use */ 175 struct tdsaContext_s *tdsaAllShared; 176 #ifdef OS_INT_COALESCE 177 tiIntCoalesceContext_t *tiIntCoalesceCxt; 178 #endif 179 agsaIntCoalesceContext_t agIntCoalCxt; 180 /* for debug */ 181 bit32 id; 182 183 } tdsaIntCoalesceContext_t; 184 #endif 185 186 typedef struct tdsaHwEventSource_s { 187 bit32 EventValid; 188 agsaEventSource_t Source; 189 } tdsaHwEventSource_t; 190 191 /** \brief data structure for SAS/SATA context at TD layer 192 * 193 * This data structure is used for both SAS and SATA. 194 * In addition, this is the data structure used mainly to communicate with 195 * lower layer. 196 * 197 */ 198 typedef struct tdsaContext_s { 199 bit32 currentOperation; 200 201 /**< agsaRoot_t->osData points to this */ 202 struct tdsaRootOsData_s agRootOsDataForInt; /* for interrupt */ 203 struct tdsaRootOsData_s agRootOsDataForNonInt; /* for non-interrupt */ 204 205 agsaRoot_t agRootInt; /* for interrupt */ 206 agsaRoot_t agRootNonInt; /* for non-interrupt */ 207 208 /* flags values commonly used for both SAS and SATA */ 209 struct tdsaComMemFlags_s flags; 210 211 212 /**< software-related initialization params used in saInitialize() */ 213 agsaSwConfig_t SwConfig; 214 215 /**< Queue-related initialization params used in saInitialize() */ 216 agsaQueueConfig_t QueueConfig; 217 218 /**< hardware-related initialization params used in saInitialize() */ 219 agsaHwConfig_t HwConfig; 220 221 222 /**< Copy of TI low level resoure */ 223 tiLoLevelResource_t loResource; 224 225 /* information of ESGL pages allocated 226 tdsaEsglAllInfo_t EsglAllInfo; 227 */ 228 229 /* hardware information; just place holder 230 tdHardwareInfo_t hwInfo; 231 */ 232 233 bit32 currentInterruptDelay; 234 235 /**< timers used commonly in SAS/SATA */ 236 tdList_t timerlist; 237 /***********************************************************************/ 238 /* used to be in tdssContext_t tdssSASShared;*/ 239 struct itdsaIni_s *itdsaIni; /* Initiator; */ 240 struct ttdsaTgt_s *ttdsaTgt; /* Target */ 241 /**< pointer to PortContext memory; */ 242 tdsaPortContext_t *PortContextMem; 243 /**< pointer to Device memory */ 244 tdsaDeviceData_t *DeviceMem; 245 246 tdList_t FreePortContextList; 247 tdList_t MainPortContextList; 248 tdList_t FreeDeviceList; 249 tdList_t MainDeviceList; 250 251 /**< actual storage for jump table */ 252 tdsaJumpTable_t tdJumpTable; 253 /**< Local SAS port start information such as ID addr */ 254 tdsaPortStartInfo_t Ports[TD_MAX_NUM_PHYS]; 255 /***********************************************************************/ 256 /**< storage for FW download contents */ 257 tdFWControlEx_t tdFWControlEx; 258 #ifdef SPC_ENABLE_PROFILE 259 tdFWProfileEx_t tdFWProfileEx; 260 #endif 261 #ifdef TD_INT_COALESCE 262 tdsaIntCoalesceContext_t *IntCoalesce; 263 #endif 264 265 /* first time a card is processed set this true */ 266 bit32 first_process; 267 268 /* expander list */ 269 tdsaExpander_t *ExpanderHead; 270 // tdList_t discoveringExpanderList; 271 tdList_t freeExpanderList; 272 bit32 phyCount; 273 bit32 IBQnumber; 274 bit32 OBQnumber; 275 bit32 InboundQueueSize[AGSA_MAX_OUTBOUND_Q]; 276 bit32 InboundQueueEleSize[AGSA_MAX_OUTBOUND_Q]; 277 bit32 OutboundQueueSize[AGSA_MAX_OUTBOUND_Q]; 278 bit32 OutboundQueueEleSize[AGSA_MAX_OUTBOUND_Q]; 279 bit32 OutboundQueueInterruptDelay[AGSA_MAX_OUTBOUND_Q]; 280 bit32 OutboundQueueInterruptCount[AGSA_MAX_OUTBOUND_Q]; 281 bit32 OutboundQueueInterruptEnable[AGSA_MAX_OUTBOUND_Q]; 282 bit32 InboundQueuePriority[AGSA_MAX_INBOUND_Q]; 283 bit32 QueueOption; 284 bit32 tdDeviceIdVendId; 285 bit32 tdSubVendorId; 286 /* instance number */ 287 bit8 CardIDString[TD_CARD_ID_LEN]; 288 bit32 CardID; 289 #ifdef VPD_TESTING 290 /* temp; for testing VPD indirect */ 291 bit32 addrUpper; 292 bit32 addrLower; 293 #endif 294 295 bit32 resetCount; 296 tdsaHwEventSource_t eventSource[TD_MAX_NUM_PHYS]; 297 bit32 portTMO; /* in 100ms */ 298 bit32 phyCalibration; /* enables or disables phy calibration */ 299 bit32 FCA; /* force to clear affiliation by sending SMP HARD RESET */ 300 bit32 SMPQNum; /* first high priority queue number for SMP */ 301 bit32 ResetInDiscovery; /* hard/link reset in discovery */ 302 bit32 FWMaxPorts; 303 bit32 IDRetry; /* SATA ID failurs are retired */ 304 bit32 RateAdjust; /* allow retry open with lower connection rate */ 305 #ifdef AGTIAPI_CTL 306 bit16 SASConnectTimeLimit; /* used by tdsaCTLSet() */ 307 #endif 308 bit32 MaxNumOSLocks; /* max number of OS layer locks */ 309 bit32 MaxNumLLLocks; /* max num of LL locks */ 310 bit32 MaxNumLocks; /* max num of locks for layers and modules (LL, TDM, SATM, DM) */ 311 #ifdef FDS_DM 312 bit32 MaxNumDMLocks; /* max num of DM locks */ 313 dmRoot_t dmRoot; /* discovery root */ 314 dmSwConfig_t dmSwConfig; 315 #endif 316 #ifdef FDS_SM 317 bit32 MaxNumSMLocks; /* max num of SM locks */ 318 smRoot_t smRoot; /* SATM root */ 319 smSwConfig_t smSwConfig; 320 #endif 321 bit32 MCN; /* temp; only for testing and to be set by registry or adj file */ 322 bit32 sflag; /* Sflag bit */ 323 #ifdef CCFLAGS_PHYCONTROL_COUNTS 324 agsaPhyAnalogSetupRegisters_t analog[TD_MAX_NUM_PHYS]; 325 #endif /* CCFLAGS_PHYCONTROL_COUNTS */ 326 bit32 stp_idle_time; /* stp idle time for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 327 bit32 STP_MCT_TMO; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 328 bit32 SSP_MCT_TMO; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 329 bit32 MAX_OPEN_TIME; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 330 bit32 SMP_MAX_CONN_TIMER; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 331 bit32 STP_FRM_TMO; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 332 bit32 MFD; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 333 bit32 OPNRJT_RTRY_INTVL; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 334 bit32 DOPNRJT_RTRY_TMO; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 335 bit32 COPNRJT_RTRY_TMO; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 336 bit32 DOPNRJT_RTRY_THR; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 337 bit32 COPNRJT_RTRY_THR; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 338 bit32 itNexusTimeout; /* set by registry */ 339 bit32 MAX_AIP; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 340 agsaMPIContext_t MpiOverride; 341 #ifdef TI_GETFOR_ONRESET 342 bit8 FatalErrorData[(5 * (1024 * 1024))]; 343 #endif /* TI_GETFOR_ONRESET */ 344 bit32 sgpioResponseSet; /*Used to sync between SGPIO Req and Resp */ 345 volatile int NvmdResponseSet; 346 } tdsaContext_t; 347 348 #ifdef FAST_IO_TEST 349 #define CMDS_PER_IO_IOPS 1 350 #define CMDS_PER_IO_DUP 1 //4 351 #endif 352 353 /** \brief the root data structure for TD layer 354 * 355 * This data structure is the main data structure used in communicating 356 * with OS layer. For example, tiRoot_t->tdData points to this data structure 357 * From this data structure, SATA host/Device and SAS initiator/target are found. 358 * 359 */ 360 typedef struct tdsaRoot_s 361 { 362 /**<< common data structure for SAS/SATA */ 363 tdsaContext_t tdsaAllShared; 364 bit32 autoGoodRSP; 365 #ifdef INITIATOR_DRIVER 366 itdsaIni_t *itdsaIni; /**< SAS/SATA initiator */ 367 #endif 368 #ifdef TARGET_DRIVER 369 ttdsaTgt_t *ttdsaTgt; /**< SAS/SATA target */ 370 #endif 371 } tdsaRoot_t; 372 373 typedef struct tmf_pass_through_req 374 { 375 bit8 pathId; 376 bit8 targetId; 377 bit8 lun; 378 }tmf_pass_through_req_t; 379 380 /* Context Field accessors */ 381 #define TD_GET_TIROOT(sa_root) (((tdsaRootOsData_t *)(sa_root)->osData)->tiRoot) 382 #define TD_GET_TDROOT(ti_root) ((tdsaRoot_t *)(ti_root)->tdData) 383 #define TD_GET_TICONTEXT(ti_root) ((tdsaContext_t *)&TD_GET_TDROOT(ti_root)->tdsaAllShared) 384 #define TD_GET_TIINI_CONTEXT(ti_root) ((itdsaIni_t *)TD_GET_TICONTEXT(ti_root)->itdsaIni) 385 #define TD_GET_TITGT_CONTEXT(ti_root) ((ttdsaTgt_t *)TD_GET_TICONTEXT(ti_root)->ttdsaTgt) 386 #endif /* __TDSATYPES_H */ 387