1 /*
2  * Copyright (c) 2006 Maxim Sobolev <sobomax@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
16  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
17  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
18  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
19  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
20  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
22  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
23  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
24  * POSSIBILITY OF SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/module.h>
32 #include <sys/bus.h>
33 #include <sys/conf.h>
34 #include <sys/kernel.h>
35 #include <sys/uio.h>
36 
37 #include <dev/ofw/openfirm.h>
38 #include <dev/ofw/ofw_bus.h>
39 
40 #include <machine/bus.h>
41 #include <machine/md_var.h>
42 #include <machine/pio.h>
43 #include <machine/resource.h>
44 
45 #include <sys/rman.h>
46 
47 #include <dev/powermac_nvram/powermac_nvramvar.h>
48 
49 #include <vm/vm.h>
50 #include <vm/pmap.h>
51 
52 /*
53  * Device interface.
54  */
55 static int		powermac_nvram_probe(device_t);
56 static int		powermac_nvram_attach(device_t);
57 static int		powermac_nvram_detach(device_t);
58 
59 /* Helper functions */
60 static int		powermac_nvram_check(void *data);
61 static int		chrp_checksum(int sum, uint8_t *, uint8_t *);
62 static uint32_t		adler_checksum(uint8_t *, int);
63 static int		erase_bank(device_t, uint8_t *);
64 static int		write_bank(device_t, uint8_t *, uint8_t *);
65 
66 /*
67  * Driver methods.
68  */
69 static device_method_t	powermac_nvram_methods[] = {
70 	/* Device interface */
71 	DEVMETHOD(device_probe,		powermac_nvram_probe),
72 	DEVMETHOD(device_attach,	powermac_nvram_attach),
73 	DEVMETHOD(device_detach,	powermac_nvram_detach),
74 
75 	{ 0, 0 }
76 };
77 
78 static driver_t	powermac_nvram_driver = {
79 	"powermac_nvram",
80 	powermac_nvram_methods,
81 	sizeof(struct powermac_nvram_softc)
82 };
83 
84 static devclass_t powermac_nvram_devclass;
85 
86 DRIVER_MODULE(powermac_nvram, nexus, powermac_nvram_driver, powermac_nvram_devclass, 0, 0);
87 
88 /*
89  * Cdev methods.
90  */
91 
92 static	d_open_t	powermac_nvram_open;
93 static	d_close_t	powermac_nvram_close;
94 static	d_read_t	powermac_nvram_read;
95 static	d_write_t	powermac_nvram_write;
96 
97 static struct cdevsw powermac_nvram_cdevsw = {
98 	.d_version =	D_VERSION,
99 	.d_flags =	D_NEEDGIANT,
100 	.d_open =	powermac_nvram_open,
101 	.d_close =	powermac_nvram_close,
102 	.d_read =	powermac_nvram_read,
103 	.d_write =	powermac_nvram_write,
104 	.d_name =	"powermac_nvram",
105 };
106 
107 static int
108 powermac_nvram_probe(device_t dev)
109 {
110 	const char	*type, *compatible;
111 
112 	type = ofw_bus_get_type(dev);
113 	compatible = ofw_bus_get_compat(dev);
114 
115 	if (type == NULL || compatible == NULL)
116 		return ENXIO;
117 
118 	if (strcmp(type, "nvram") != 0 || strcmp(compatible, "amd-0137") != 0)
119 		return ENXIO;
120 
121 	device_set_desc(dev, "Apple NVRAM");
122 	return 0;
123 }
124 
125 static int
126 powermac_nvram_attach(device_t dev)
127 {
128 	struct powermac_nvram_softc *sc;
129 	phandle_t node;
130 	u_int32_t reg[3];
131 	int gen0, gen1, i;
132 
133 	node = ofw_bus_get_node(dev);
134 	sc = device_get_softc(dev);
135 
136 	if ((i = OF_getprop(node, "reg", reg, sizeof(reg))) < 8)
137 		return ENXIO;
138 
139 	sc->sc_dev = dev;
140 	sc->sc_node = node;
141 
142 	/*
143 	 * Find which byte of reg corresponds to the 32-bit physical address.
144 	 * We should probably read #address-cells from /chosen instead.
145 	 */
146 	i = (i/4) - 2;
147 
148 	sc->sc_bank0 = (vm_offset_t)pmap_mapdev(reg[i], NVRAM_SIZE * 2);
149 	sc->sc_bank1 = sc->sc_bank0 + NVRAM_SIZE;
150 
151 	gen0 = powermac_nvram_check((void *)sc->sc_bank0);
152 	gen1 = powermac_nvram_check((void *)sc->sc_bank1);
153 
154 	if (gen0 == -1 && gen1 == -1) {
155 		if ((void *)sc->sc_bank0 != NULL)
156 			pmap_unmapdev(sc->sc_bank0, NVRAM_SIZE * 2);
157 		device_printf(dev, "both banks appear to be corrupt\n");
158 		return ENXIO;
159 	}
160 	device_printf(dev, "bank0 generation %d, bank1 generation %d\n",
161 	    gen0, gen1);
162 
163 	sc->sc_bank = (gen0 > gen1) ? sc->sc_bank0 : sc->sc_bank1;
164 	bcopy((void *)sc->sc_bank, (void *)sc->sc_data, NVRAM_SIZE);
165 
166 	sc->sc_cdev = make_dev(&powermac_nvram_cdevsw, 0, 0, 0, 0600,
167 	    "powermac_nvram");
168 	sc->sc_cdev->si_drv1 = sc;
169 
170 	return 0;
171 }
172 
173 static int
174 powermac_nvram_detach(device_t dev)
175 {
176 	struct powermac_nvram_softc *sc;
177 
178 	sc = device_get_softc(dev);
179 
180 	if ((void *)sc->sc_bank0 != NULL)
181 		pmap_unmapdev(sc->sc_bank0, NVRAM_SIZE * 2);
182 
183 	if (sc->sc_cdev != NULL)
184 		destroy_dev(sc->sc_cdev);
185 
186 	return 0;
187 }
188 
189 static int
190 powermac_nvram_open(struct cdev *dev, int flags, int fmt, struct thread *td)
191 {
192 	struct powermac_nvram_softc *sc = dev->si_drv1;
193 
194 	if (sc->sc_isopen)
195 		return EBUSY;
196 	sc->sc_isopen = 1;
197 	sc->sc_rpos = sc->sc_wpos = 0;
198 	return 0;
199 }
200 
201 static int
202 powermac_nvram_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
203 {
204 	struct powermac_nvram_softc *sc = dev->si_drv1;
205 	struct core99_header *header;
206 	vm_offset_t bank;
207 
208 	if (sc->sc_wpos != sizeof(sc->sc_data)) {
209 		/* Short write, restore in-memory copy */
210 		bcopy((void *)sc->sc_bank, (void *)sc->sc_data, NVRAM_SIZE);
211 		sc->sc_isopen = 0;
212 		return 0;
213 	}
214 
215 	header = (struct core99_header *)sc->sc_data;
216 
217 	header->generation = ((struct core99_header *)sc->sc_bank)->generation;
218 	header->generation++;
219 	header->chrp_header.signature = CORE99_SIGNATURE;
220 
221 	header->adler_checksum =
222 	    adler_checksum((uint8_t *)&(header->generation),
223 	    NVRAM_SIZE - offsetof(struct core99_header, generation));
224 	header->chrp_header.chrp_checksum = chrp_checksum(header->chrp_header.signature,
225 	    (uint8_t *)&(header->chrp_header.length),
226 	    (uint8_t *)&(header->adler_checksum));
227 
228 	bank = (sc->sc_bank == sc->sc_bank0) ? sc->sc_bank1 : sc->sc_bank0;
229 	if (erase_bank(sc->sc_dev, (uint8_t *)bank) != 0 ||
230 	    write_bank(sc->sc_dev, (uint8_t *)bank, sc->sc_data) != 0) {
231 		sc->sc_isopen = 0;
232 		return ENOSPC;
233 	}
234 	sc->sc_bank = bank;
235 	sc->sc_isopen = 0;
236 	return 0;
237 }
238 
239 static int
240 powermac_nvram_read(struct cdev *dev, struct uio *uio, int ioflag)
241 {
242 	int rv, amnt, data_available;
243 	struct powermac_nvram_softc *sc = dev->si_drv1;
244 
245 	rv = 0;
246 	while (uio->uio_resid > 0) {
247 		data_available = sizeof(sc->sc_data) - sc->sc_rpos;
248 		if (data_available > 0) {
249 			amnt = MIN(uio->uio_resid, data_available);
250 			rv = uiomove((void *)(sc->sc_data + sc->sc_rpos),
251 			    amnt, uio);
252 			if (rv != 0)
253 				break;
254 			sc->sc_rpos += amnt;
255 		} else {
256 			break;
257 		}
258 	}
259 	return rv;
260 }
261 
262 static int
263 powermac_nvram_write(struct cdev *dev, struct uio *uio, int ioflag)
264 {
265 	int rv, amnt, data_available;
266 	struct powermac_nvram_softc *sc = dev->si_drv1;
267 
268 	if (sc->sc_wpos >= sizeof(sc->sc_data))
269 		return EINVAL;
270 
271 	rv = 0;
272 	while (uio->uio_resid > 0) {
273 		data_available = sizeof(sc->sc_data) - sc->sc_wpos;
274 		if (data_available > 0) {
275 			amnt = MIN(uio->uio_resid, data_available);
276 			rv = uiomove((void *)(sc->sc_data + sc->sc_wpos),
277 			    amnt, uio);
278 			if (rv != 0)
279 				break;
280 			sc->sc_wpos += amnt;
281 		} else {
282 			break;
283 		}
284 	}
285 	return rv;
286 }
287 
288 static int
289 powermac_nvram_check(void *data)
290 {
291 	struct core99_header *header;
292 
293 	header = (struct core99_header *)data;
294 
295 	if (header->chrp_header.signature != CORE99_SIGNATURE)
296 		return -1;
297 	if (header->chrp_header.chrp_checksum !=
298 	    chrp_checksum(header->chrp_header.signature,
299 	    (uint8_t *)&(header->chrp_header.length),
300 	    (uint8_t *)&(header->adler_checksum)))
301 		return -1;
302 	if (header->adler_checksum !=
303 	    adler_checksum((uint8_t *)&(header->generation),
304 	    NVRAM_SIZE - offsetof(struct core99_header, generation)))
305 		return -1;
306 	return header->generation;
307 }
308 
309 static int
310 chrp_checksum(int sum, uint8_t *data, uint8_t *end)
311 {
312 
313 	for (; data < end; data++)
314 		sum += data[0];
315 	while (sum > 0xff)
316 		sum = (sum & 0xff) + (sum >> 8);
317 	return sum;
318 }
319 
320 static uint32_t
321 adler_checksum(uint8_t *data, int len)
322 {
323 	uint32_t low, high;
324 	int i;
325 
326 	low = 1;
327 	high = 0;
328 	for (i = 0; i < len; i++) {
329 		if ((i % 5000) == 0) {
330 			high %= 65521UL;
331 			high %= 65521UL;
332 		}
333 		low += data[i];
334 		high += low;
335 	}
336 	low %= 65521UL;
337 	high %= 65521UL;
338 
339 	return (high << 16) | low;
340 }
341 
342 #define	OUTB_DELAY(a, v)	outb(a, v); DELAY(1);
343 
344 static int
345 wait_operation_complete(uint8_t *bank)
346 {
347 	int i;
348 
349 	for (i = 1000000; i != 0; i--)
350 		if ((inb(bank) ^ inb(bank)) == 0)
351 			return 0;
352 	return -1;
353 }
354 
355 static int
356 erase_bank(device_t dev, uint8_t *bank)
357 {
358 	unsigned int i;
359 
360 	/* Unlock 1 */
361 	OUTB_DELAY(bank + 0x555, 0xaa);
362 	/* Unlock 2 */
363 	OUTB_DELAY(bank + 0x2aa, 0x55);
364 
365 	/* Sector-Erase */
366 	OUTB_DELAY(bank + 0x555, 0x80);
367 	OUTB_DELAY(bank + 0x555, 0xaa);
368 	OUTB_DELAY(bank + 0x2aa, 0x55);
369 	OUTB_DELAY(bank, 0x30);
370 
371 	if (wait_operation_complete(bank) != 0) {
372 		device_printf(dev, "flash erase timeout\n");
373 		return -1;
374 	}
375 
376 	/* Reset */
377 	OUTB_DELAY(bank, 0xf0);
378 
379 	for (i = 0; i < NVRAM_SIZE; i++) {
380 		if (bank[i] != 0xff) {
381 			device_printf(dev, "flash erase has failed\n");
382 			return -1;
383 		}
384 	}
385 	return 0;
386 }
387 
388 static int
389 write_bank(device_t dev, uint8_t *bank, uint8_t *data)
390 {
391 	unsigned int i;
392 
393 	for (i = 0; i < NVRAM_SIZE; i++) {
394 		/* Unlock 1 */
395 		OUTB_DELAY(bank + 0x555, 0xaa);
396 		/* Unlock 2 */
397 		OUTB_DELAY(bank + 0x2aa, 0x55);
398 
399 		/* Write single word */
400 		OUTB_DELAY(bank + 0x555, 0xa0);
401 		OUTB_DELAY(bank + i, data[i]);
402 		if (wait_operation_complete(bank) != 0) {
403 			device_printf(dev, "flash write timeout\n");
404 			return -1;
405 		}
406 	}
407 
408 	/* Reset */
409 	OUTB_DELAY(bank, 0xf0);
410 
411 	for (i = 0; i < NVRAM_SIZE; i++) {
412 		if (bank[i] != data[i]) {
413 			device_printf(dev, "flash write has failed\n");
414 			return -1;
415 		}
416 	}
417 	return 0;
418 }
419