17722d8c7SRuslan Bukin/*- 27722d8c7SRuslan Bukin * SPDX-License-Identifier: BSD-2-Clause 37722d8c7SRuslan Bukin * 47722d8c7SRuslan Bukin * Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com> 57722d8c7SRuslan Bukin * Copyright (c) 2015 Andrew Turner 67722d8c7SRuslan Bukin * 77722d8c7SRuslan Bukin * This software was developed by SRI International and the University of 87722d8c7SRuslan Bukin * Cambridge Computer Laboratory (Department of Computer Science and 97722d8c7SRuslan Bukin * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the 107722d8c7SRuslan Bukin * DARPA SSITH research programme. 117722d8c7SRuslan Bukin * 127722d8c7SRuslan Bukin * Redistribution and use in source and binary forms, with or without 137722d8c7SRuslan Bukin * modification, are permitted provided that the following conditions 147722d8c7SRuslan Bukin * are met: 157722d8c7SRuslan Bukin * 1. Redistributions of source code must retain the above copyright 167722d8c7SRuslan Bukin * notice, this list of conditions and the following disclaimer. 177722d8c7SRuslan Bukin * 2. Redistributions in binary form must reproduce the above copyright 187722d8c7SRuslan Bukin * notice, this list of conditions and the following disclaimer in the 197722d8c7SRuslan Bukin * documentation and/or other materials provided with the distribution. 207722d8c7SRuslan Bukin * 217722d8c7SRuslan Bukin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 227722d8c7SRuslan Bukin * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 237722d8c7SRuslan Bukin * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 247722d8c7SRuslan Bukin * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 257722d8c7SRuslan Bukin * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 267722d8c7SRuslan Bukin * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 277722d8c7SRuslan Bukin * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 287722d8c7SRuslan Bukin * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 297722d8c7SRuslan Bukin * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 307722d8c7SRuslan Bukin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 317722d8c7SRuslan Bukin * SUCH DAMAGE. 327722d8c7SRuslan Bukin */ 337722d8c7SRuslan Bukin 347722d8c7SRuslan Bukin#include <machine/asm.h> 357722d8c7SRuslan Bukin.arch_extension sec /* For smc */ 367722d8c7SRuslan Bukin.arch_extension virt /* For hvc */ 377722d8c7SRuslan Bukin 3848a7e53dSAndrew Turner.macro arm_smccc_1_0 insn 3948a7e53dSAndrew TurnerENTRY(arm_smccc_\insn) 4048a7e53dSAndrew Turner mov r12, sp 4148a7e53dSAndrew Turner push {r4-r7} 4248a7e53dSAndrew Turner ldm r12, {r4-r7} 4348a7e53dSAndrew Turner \insn #0 4448a7e53dSAndrew Turner pop {r4-r7} 4548a7e53dSAndrew Turner ldr r12, [sp, #(4 * 4)] 4648a7e53dSAndrew Turner cmp r12, #0 4748a7e53dSAndrew Turner beq 1f 4848a7e53dSAndrew Turner stm r12, {r0-r3} 4948a7e53dSAndrew Turner1: bx lr 5048a7e53dSAndrew TurnerEND(arm_smccc_\insn) 5148a7e53dSAndrew Turner.endm 5248a7e53dSAndrew Turner 537722d8c7SRuslan Bukin/* 547722d8c7SRuslan Bukin * int arm_smccc_hvc(register_t, register_t, register_t, register_t, 557722d8c7SRuslan Bukin * register_t, register_t, register_t, register_t, 567722d8c7SRuslan Bukin * struct arm_smccc_res *res) 577722d8c7SRuslan Bukin */ 5848a7e53dSAndrew Turnerarm_smccc_1_0 hvc 5948a7e53dSAndrew Turnerarm_smccc_1_0 smc 60