17722d8c7SRuslan Bukin/*- 27722d8c7SRuslan Bukin * SPDX-License-Identifier: BSD-2-Clause 37722d8c7SRuslan Bukin * 47722d8c7SRuslan Bukin * Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com> 57722d8c7SRuslan Bukin * 67722d8c7SRuslan Bukin * This software was developed by SRI International and the University of 77722d8c7SRuslan Bukin * Cambridge Computer Laboratory (Department of Computer Science and 87722d8c7SRuslan Bukin * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the 97722d8c7SRuslan Bukin * DARPA SSITH research programme. 107722d8c7SRuslan Bukin * 117722d8c7SRuslan Bukin * Redistribution and use in source and binary forms, with or without 127722d8c7SRuslan Bukin * modification, are permitted provided that the following conditions 137722d8c7SRuslan Bukin * are met: 147722d8c7SRuslan Bukin * 1. Redistributions of source code must retain the above copyright 157722d8c7SRuslan Bukin * notice, this list of conditions and the following disclaimer. 167722d8c7SRuslan Bukin * 2. Redistributions in binary form must reproduce the above copyright 177722d8c7SRuslan Bukin * notice, this list of conditions and the following disclaimer in the 187722d8c7SRuslan Bukin * documentation and/or other materials provided with the distribution. 197722d8c7SRuslan Bukin * 207722d8c7SRuslan Bukin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 217722d8c7SRuslan Bukin * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 227722d8c7SRuslan Bukin * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 237722d8c7SRuslan Bukin * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 247722d8c7SRuslan Bukin * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 257722d8c7SRuslan Bukin * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 267722d8c7SRuslan Bukin * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 277722d8c7SRuslan Bukin * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 287722d8c7SRuslan Bukin * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 297722d8c7SRuslan Bukin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 307722d8c7SRuslan Bukin * SUCH DAMAGE. 317722d8c7SRuslan Bukin */ 327722d8c7SRuslan Bukin 337722d8c7SRuslan Bukin#include <machine/asm.h> 3448a7e53dSAndrew Turner.macro arm_smccc_1_0 insn 3548a7e53dSAndrew TurnerENTRY(arm_smccc_\insn) 3648a7e53dSAndrew Turner \insn #0 377722d8c7SRuslan Bukin ldr x4, [sp] 387722d8c7SRuslan Bukin cbz x4, 1f 397722d8c7SRuslan Bukin stp x0, x1, [x4, #16 * 0] 407722d8c7SRuslan Bukin stp x2, x3, [x4, #16 * 1] 417722d8c7SRuslan Bukin1: ret 4248a7e53dSAndrew TurnerEND(arm_smccc_\insn) 4348a7e53dSAndrew Turner.endm 447722d8c7SRuslan Bukin 457722d8c7SRuslan Bukin/* 4648a7e53dSAndrew Turner * int arm_smccc_*(register_t, register_t, register_t, register_t, 477722d8c7SRuslan Bukin * register_t, register_t, register_t, register_t, 487722d8c7SRuslan Bukin * struct arm_smccc_res *res) 497722d8c7SRuslan Bukin */ 5048a7e53dSAndrew Turnerarm_smccc_1_0 hvc 5148a7e53dSAndrew Turnerarm_smccc_1_0 smc 527a58bf04SWei Hu 537a58bf04SWei Hu.macro arm_smccc_1_2 insn 547a58bf04SWei HuENTRY(arm_smccc_1_2_\insn) 557a58bf04SWei Hu stp x1, x19, [sp, #-16]! 567a58bf04SWei Hu mov x19, x0 577a58bf04SWei Hu ldp x0, x1, [x19, #16 * 0] 587a58bf04SWei Hu ldp x2, x3, [x19, #16 * 1] 597a58bf04SWei Hu ldp x4, x5, [x19, #16 * 2] 607a58bf04SWei Hu ldp x6, x7, [x19, #16 * 3] 617a58bf04SWei Hu ldp x8, x9, [x19, #16 * 4] 627a58bf04SWei Hu ldp x10, x11, [x19, #16 * 5] 637a58bf04SWei Hu ldp x12, x13, [x19, #16 * 6] 647a58bf04SWei Hu ldp x14, x15, [x19, #16 * 7] 657a58bf04SWei Hu ldp x16, x17, [x19, #16 * 8] 667a58bf04SWei Hu \insn #0 677a58bf04SWei Hu ldr x19, [sp] 687a58bf04SWei Hu cbz x19, 1f 697a58bf04SWei Hu stp x0, x1, [x19, #16 * 0] 707a58bf04SWei Hu stp x2, x3, [x19, #16 * 1] 717a58bf04SWei Hu stp x4, x5, [x19, #16 * 2] 727a58bf04SWei Hu stp x6, x7, [x19, #16 * 3] 737a58bf04SWei Hu stp x8, x9, [x19, #16 * 4] 747a58bf04SWei Hu stp x10, x11, [x19, #16 * 5] 757a58bf04SWei Hu stp x12, x13, [x19, #16 * 6] 767a58bf04SWei Hu stp x14, x15, [x19, #16 * 7] 777a58bf04SWei Hu stp x16, x17, [x19, #16 * 8] 786cc52efaSJohn Baldwin1: ldp xzr, x19, [sp], #16 796cc52efaSJohn Baldwin ret 807a58bf04SWei HuEND(arm_smccc_1_2\insn) 817a58bf04SWei Hu.endm 827a58bf04SWei Hu/* int arm_smccc_1_2_*(const struct arm_smccc_1_2_regs *args, 837a58bf04SWei Hu * struct arm_smccc_1_2_regs *res) 847a58bf04SWei Hu */ 857a58bf04SWei Huarm_smccc_1_2 hvc 867a58bf04SWei Huarm_smccc_1_2 smc 87