1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright(c) 2007-2022 Intel Corporation */ 3 /* $FreeBSD$ */ 4 #ifndef ADF_DRV_H 5 #define ADF_DRV_H 6 7 #include <dev/pci/pcivar.h> 8 #include "adf_accel_devices.h" 9 #include "icp_qat_fw_loader_handle.h" 10 #include "icp_qat_hal.h" 11 #include "adf_cfg_user.h" 12 #include "adf_uio.h" 13 #include "adf_uio_control.h" 14 15 #define QAT_UIO_IOC_MAGIC 'b' 16 #define ADF_MAJOR_VERSION 0 17 #define ADF_MINOR_VERSION 6 18 #define ADF_BUILD_VERSION 0 19 #define ADF_DRV_VERSION \ 20 __stringify(ADF_MAJOR_VERSION) "." __stringify( \ 21 ADF_MINOR_VERSION) "." __stringify(ADF_BUILD_VERSION) 22 23 #define IOCTL_GET_BUNDLE_SIZE _IOR(QAT_UIO_IOC_MAGIC, 0, int32_t) 24 #define IOCTL_ALLOC_BUNDLE _IOW(QAT_UIO_IOC_MAGIC, 1, int) 25 #define IOCTL_GET_ACCEL_TYPE _IOR(QAT_UIO_IOC_MAGIC, 2, uint32_t) 26 #define IOCTL_ADD_MEM_FD _IOW(QAT_UIO_IOC_MAGIC, 3, int) 27 #define ADF_STATUS_RESTARTING 0 28 #define ADF_STATUS_STARTING 1 29 #define ADF_STATUS_CONFIGURED 2 30 #define ADF_STATUS_STARTED 3 31 #define ADF_STATUS_AE_INITIALISED 4 32 #define ADF_STATUS_AE_UCODE_LOADED 5 33 #define ADF_STATUS_AE_STARTED 6 34 #define ADF_STATUS_PF_RUNNING 7 35 #define ADF_STATUS_IRQ_ALLOCATED 8 36 #define ADF_PCIE_FLR_ATTEMPT 10 37 #define ADF_STATUS_SYSCTL_CTX_INITIALISED 9 38 39 #define PCI_EXP_AERUCS 0x104 40 41 /* PMISC BAR upper and lower offsets in PCIe config space */ 42 #define ADF_PMISC_L_OFFSET 0x18 43 #define ADF_PMISC_U_OFFSET 0x1c 44 45 enum adf_dev_reset_mode { ADF_DEV_RESET_ASYNC = 0, ADF_DEV_RESET_SYNC }; 46 47 enum adf_event { 48 ADF_EVENT_INIT = 0, 49 ADF_EVENT_START, 50 ADF_EVENT_STOP, 51 ADF_EVENT_SHUTDOWN, 52 ADF_EVENT_RESTARTING, 53 ADF_EVENT_RESTARTED, 54 ADF_EVENT_ERROR, 55 }; 56 57 struct adf_state { 58 enum adf_event dev_state; 59 int dev_id; 60 }; 61 62 struct service_hndl { 63 int (*event_hld)(struct adf_accel_dev *accel_dev, enum adf_event event); 64 unsigned long init_status[ADF_DEVS_ARRAY_SIZE]; 65 unsigned long start_status[ADF_DEVS_ARRAY_SIZE]; 66 char *name; 67 struct list_head list; 68 }; 69 70 static inline int 71 get_current_node(void) 72 { 73 return PCPU_GET(domain); 74 } 75 76 int adf_service_register(struct service_hndl *service); 77 int adf_service_unregister(struct service_hndl *service); 78 79 int adf_dev_init(struct adf_accel_dev *accel_dev); 80 int adf_dev_start(struct adf_accel_dev *accel_dev); 81 int adf_dev_stop(struct adf_accel_dev *accel_dev); 82 void adf_dev_shutdown(struct adf_accel_dev *accel_dev); 83 int adf_dev_autoreset(struct adf_accel_dev *accel_dev); 84 int adf_dev_reset(struct adf_accel_dev *accel_dev, 85 enum adf_dev_reset_mode mode); 86 int adf_dev_aer_schedule_reset(struct adf_accel_dev *accel_dev, 87 enum adf_dev_reset_mode mode); 88 void adf_error_notifier(uintptr_t arg); 89 int adf_init_fatal_error_wq(void); 90 void adf_exit_fatal_error_wq(void); 91 int adf_notify_fatal_error(struct adf_accel_dev *accel_dev); 92 void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data); 93 void adf_clean_vf_map(bool); 94 int adf_sysctl_add_fw_versions(struct adf_accel_dev *accel_dev); 95 int adf_sysctl_remove_fw_versions(struct adf_accel_dev *accel_dev); 96 97 int adf_ctl_dev_register(void); 98 void adf_ctl_dev_unregister(void); 99 int adf_register_ctl_device_driver(void); 100 void adf_unregister_ctl_device_driver(void); 101 int adf_processes_dev_register(void); 102 void adf_processes_dev_unregister(void); 103 void adf_state_init(void); 104 void adf_state_destroy(void); 105 int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev, 106 struct adf_accel_dev *pf); 107 void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev, 108 struct adf_accel_dev *pf); 109 struct list_head *adf_devmgr_get_head(void); 110 struct adf_accel_dev *adf_devmgr_get_dev_by_id(uint32_t id); 111 struct adf_accel_dev *adf_devmgr_get_first(void); 112 struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(device_t pci_dev); 113 int adf_devmgr_verify_id(uint32_t *id); 114 void adf_devmgr_get_num_dev(uint32_t *num); 115 int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev); 116 int adf_dev_started(struct adf_accel_dev *accel_dev); 117 int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev); 118 int adf_dev_restarting_notify_sync(struct adf_accel_dev *accel_dev); 119 int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev); 120 int adf_dev_stop_notify_sync(struct adf_accel_dev *accel_dev); 121 int adf_ae_init(struct adf_accel_dev *accel_dev); 122 int adf_ae_shutdown(struct adf_accel_dev *accel_dev); 123 int adf_ae_fw_load(struct adf_accel_dev *accel_dev); 124 void adf_ae_fw_release(struct adf_accel_dev *accel_dev); 125 int adf_ae_start(struct adf_accel_dev *accel_dev); 126 int adf_ae_stop(struct adf_accel_dev *accel_dev); 127 128 int adf_aer_store_ppaerucm_reg(device_t pdev, 129 struct adf_hw_device_data *hw_data); 130 131 int adf_enable_aer(struct adf_accel_dev *accel_dev, device_t *adf); 132 void adf_disable_aer(struct adf_accel_dev *accel_dev); 133 void adf_reset_sbr(struct adf_accel_dev *accel_dev); 134 void adf_reset_flr(struct adf_accel_dev *accel_dev); 135 void adf_dev_pre_reset(struct adf_accel_dev *accel_dev); 136 void adf_dev_post_reset(struct adf_accel_dev *accel_dev); 137 void adf_dev_restore(struct adf_accel_dev *accel_dev); 138 int adf_init_aer(void); 139 void adf_exit_aer(void); 140 int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, 141 u32 ae, 142 void *in, 143 void *out); 144 struct icp_qat_fw_init_admin_req; 145 struct icp_qat_fw_init_admin_resp; 146 int adf_send_admin(struct adf_accel_dev *accel_dev, 147 struct icp_qat_fw_init_admin_req *req, 148 struct icp_qat_fw_init_admin_resp *resp, 149 u32 ae_mask); 150 int adf_config_device(struct adf_accel_dev *accel_dev); 151 152 int adf_init_admin_comms(struct adf_accel_dev *accel_dev); 153 void adf_exit_admin_comms(struct adf_accel_dev *accel_dev); 154 int adf_send_admin_init(struct adf_accel_dev *accel_dev); 155 int adf_get_fw_timestamp(struct adf_accel_dev *accel_dev, u64 *timestamp); 156 int adf_get_fw_pke_stats(struct adf_accel_dev *accel_dev, 157 u64 *suc_count, 158 u64 *unsuc_count); 159 int adf_dev_measure_clock(struct adf_accel_dev *accel_dev, 160 u32 *frequency, 161 u32 min, 162 u32 max); 163 int adf_clock_debugfs_add(struct adf_accel_dev *accel_dev); 164 u64 adf_clock_get_current_time(void); 165 int adf_init_arb(struct adf_accel_dev *accel_dev); 166 int adf_init_gen2_arb(struct adf_accel_dev *accel_dev); 167 void adf_exit_arb(struct adf_accel_dev *accel_dev); 168 void adf_disable_arb(struct adf_accel_dev *accel_dev); 169 void adf_update_ring_arb(struct adf_etr_ring_data *ring); 170 void adf_enable_ring_arb(struct adf_accel_dev *accel_dev, 171 void *csr_addr, 172 unsigned int bank_nr, 173 unsigned int mask); 174 void adf_disable_ring_arb(struct adf_accel_dev *accel_dev, 175 void *csr_addr, 176 unsigned int bank_nr, 177 unsigned int mask); 178 int adf_set_ssm_wdtimer(struct adf_accel_dev *accel_dev); 179 void adf_update_uio_ring_arb(struct adf_uio_control_bundle *bundle); 180 struct adf_accel_dev *adf_devmgr_get_dev_by_bdf(struct adf_pci_address *addr); 181 struct adf_accel_dev *adf_devmgr_get_dev_by_pci_bus(u8 bus); 182 int adf_get_vf_nr(struct adf_pci_address *vf_pci_addr, int *vf_nr); 183 u32 adf_get_slices_for_svc(struct adf_accel_dev *accel_dev, 184 enum adf_svc_type svc); 185 bool adf_is_bdf_equal(struct adf_pci_address *bdf1, 186 struct adf_pci_address *bdf2); 187 int adf_is_vf_nr_valid(struct adf_accel_dev *accel_dev, int vf_nr); 188 void adf_dev_get(struct adf_accel_dev *accel_dev); 189 void adf_dev_put(struct adf_accel_dev *accel_dev); 190 int adf_dev_in_use(struct adf_accel_dev *accel_dev); 191 int adf_init_etr_data(struct adf_accel_dev *accel_dev); 192 void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev); 193 194 struct qat_crypto_instance *qat_crypto_get_instance_node(int node); 195 void qat_crypto_put_instance(struct qat_crypto_instance *inst); 196 void qat_alg_callback(void *resp); 197 void qat_alg_asym_callback(void *resp); 198 int qat_algs_register(void); 199 void qat_algs_unregister(void); 200 int qat_asym_algs_register(void); 201 void qat_asym_algs_unregister(void); 202 203 int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev); 204 void adf_isr_resource_free(struct adf_accel_dev *accel_dev); 205 int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev); 206 void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev); 207 int adf_pfvf_comms_disabled(struct adf_accel_dev *accel_dev); 208 int qat_hal_init(struct adf_accel_dev *accel_dev); 209 void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle); 210 int qat_hal_start(struct icp_qat_fw_loader_handle *handle); 211 void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, 212 unsigned char ae, 213 unsigned int ctx_mask); 214 void qat_hal_reset(struct icp_qat_fw_loader_handle *handle); 215 int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle); 216 void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle, 217 unsigned char ae, 218 unsigned int ctx_mask); 219 int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle, 220 unsigned int ae); 221 int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle, 222 unsigned char ae, 223 enum icp_qat_uof_regtype lm_type, 224 unsigned char mode); 225 void qat_hal_set_ae_tindex_mode(struct icp_qat_fw_loader_handle *handle, 226 unsigned char ae, 227 unsigned char mode); 228 void qat_hal_set_ae_scs_mode(struct icp_qat_fw_loader_handle *handle, 229 unsigned char ae, 230 unsigned char mode); 231 int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle, 232 unsigned char ae, 233 unsigned char mode); 234 int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle, 235 unsigned char ae, 236 unsigned char mode); 237 void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle, 238 unsigned char ae, 239 unsigned int ctx_mask, 240 unsigned int upc); 241 void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle, 242 unsigned char ae, 243 unsigned int uaddr, 244 unsigned int words_num, 245 const uint64_t *uword); 246 void qat_hal_wr_coalesce_uwords(struct icp_qat_fw_loader_handle *handle, 247 unsigned char ae, 248 unsigned int uaddr, 249 unsigned int words_num, 250 uint64_t *uword); 251 252 void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, 253 unsigned char ae, 254 unsigned int uword_addr, 255 unsigned int words_num, 256 unsigned int *data); 257 int qat_hal_get_ins_num(void); 258 int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle, 259 unsigned char ae, 260 struct icp_qat_uof_batch_init *lm_init_header); 261 int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle, 262 unsigned char ae, 263 unsigned long ctx_mask, 264 enum icp_qat_uof_regtype reg_type, 265 unsigned short reg_num, 266 unsigned int regdata); 267 int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle, 268 unsigned char ae, 269 unsigned long ctx_mask, 270 enum icp_qat_uof_regtype reg_type, 271 unsigned short reg_num, 272 unsigned int regdata); 273 int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle, 274 unsigned char ae, 275 unsigned long ctx_mask, 276 enum icp_qat_uof_regtype reg_type, 277 unsigned short reg_num, 278 unsigned int regdata); 279 int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle, 280 unsigned char ae, 281 unsigned long ctx_mask, 282 unsigned short reg_num, 283 unsigned int regdata); 284 int qat_hal_wr_lm(struct icp_qat_fw_loader_handle *handle, 285 unsigned char ae, 286 unsigned short lm_addr, 287 unsigned int value); 288 int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle); 289 void qat_uclo_del_obj(struct icp_qat_fw_loader_handle *handle); 290 void qat_uclo_del_mof(struct icp_qat_fw_loader_handle *handle); 291 int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle, 292 const void *addr_ptr, 293 int mem_size); 294 int qat_uclo_map_obj(struct icp_qat_fw_loader_handle *handle, 295 const void *addr_ptr, 296 u32 mem_size, 297 const char *obj_name); 298 299 void qat_hal_get_scs_neigh_ae(unsigned char ae, unsigned char *ae_neigh); 300 int qat_uclo_set_cfg_ae_mask(struct icp_qat_fw_loader_handle *handle, 301 unsigned int cfg_ae_mask); 302 int adf_init_vf_wq(void); 303 void adf_exit_vf_wq(void); 304 void adf_flush_vf_wq(struct adf_accel_dev *accel_dev); 305 int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev); 306 int adf_pf2vf_handle_pf_rp_reset(struct adf_accel_dev *accel_dev, 307 struct pfvf_message msg); 308 bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev); 309 static inline int 310 adf_sriov_configure(device_t *pdev, int numvfs) 311 { 312 return 0; 313 } 314 315 static inline void 316 adf_disable_sriov(struct adf_accel_dev *accel_dev) 317 { 318 } 319 320 static inline void 321 adf_vf2pf_handler(struct adf_accel_vf_info *vf_info) 322 { 323 } 324 325 static inline int 326 adf_init_pf_wq(void) 327 { 328 return 0; 329 } 330 331 static inline void 332 adf_exit_pf_wq(void) 333 { 334 } 335 #endif 336