178ee8d1cSJulian Grajkowski /* SPDX-License-Identifier: BSD-3-Clause */ 278ee8d1cSJulian Grajkowski /* Copyright(c) 2007-2022 Intel Corporation */ 378ee8d1cSJulian Grajkowski /***************************************************************************** 478ee8d1cSJulian Grajkowski * @file icp_accel_devices.h 578ee8d1cSJulian Grajkowski * 678ee8d1cSJulian Grajkowski * @defgroup Acceleration Driver Framework 778ee8d1cSJulian Grajkowski * 878ee8d1cSJulian Grajkowski * @ingroup icp_Adf 978ee8d1cSJulian Grajkowski * 1078ee8d1cSJulian Grajkowski * @description 1178ee8d1cSJulian Grajkowski * This is the top level header file that contains the layout of the ADF 1278ee8d1cSJulian Grajkowski * icp_accel_dev_t structure and related macros/definitions. 1378ee8d1cSJulian Grajkowski * It can be used to dereference the icp_accel_dev_t *passed into upper 1478ee8d1cSJulian Grajkowski * layers. 1578ee8d1cSJulian Grajkowski * 1678ee8d1cSJulian Grajkowski *****************************************************************************/ 1778ee8d1cSJulian Grajkowski 1878ee8d1cSJulian Grajkowski #ifndef ICP_ACCEL_DEVICES_H_ 1978ee8d1cSJulian Grajkowski #define ICP_ACCEL_DEVICES_H_ 2078ee8d1cSJulian Grajkowski 2178ee8d1cSJulian Grajkowski #include "cpa.h" 2278ee8d1cSJulian Grajkowski #include "qat_utils.h" 2378ee8d1cSJulian Grajkowski #include "adf_accel_devices.h" 2478ee8d1cSJulian Grajkowski 2578ee8d1cSJulian Grajkowski #define ADF_CFG_NO_INSTANCE 0xFFFFFFFF 2678ee8d1cSJulian Grajkowski 2778ee8d1cSJulian Grajkowski #define ICP_DC_TX_RING_0 6 2878ee8d1cSJulian Grajkowski #define ICP_DC_TX_RING_1 7 2978ee8d1cSJulian Grajkowski #define ICP_RX_RINGS_OFFSET 8 3078ee8d1cSJulian Grajkowski #define ICP_RINGS_PER_BANK 16 3178ee8d1cSJulian Grajkowski 3278ee8d1cSJulian Grajkowski /* Number of worker threads per AE */ 3378ee8d1cSJulian Grajkowski #define ICP_ARB_WRK_THREAD_TO_SARB 12 3478ee8d1cSJulian Grajkowski #define MAX_ACCEL_NAME_LEN 16 3578ee8d1cSJulian Grajkowski #define ADF_DEVICE_NAME_LENGTH 32 3678ee8d1cSJulian Grajkowski #define ADF_DEVICE_TYPE_LENGTH 8 3778ee8d1cSJulian Grajkowski 3878ee8d1cSJulian Grajkowski #define ADF_CTL_DEVICE_NAME "/dev/qat_adf_ctl" 3978ee8d1cSJulian Grajkowski 4078ee8d1cSJulian Grajkowski /** 4178ee8d1cSJulian Grajkowski ***************************************************************************** 4278ee8d1cSJulian Grajkowski * @ingroup icp_AdfAccelHandle 4378ee8d1cSJulian Grajkowski * 4478ee8d1cSJulian Grajkowski * @description 4578ee8d1cSJulian Grajkowski * Accelerator capabilities 4678ee8d1cSJulian Grajkowski * 4778ee8d1cSJulian Grajkowski *****************************************************************************/ 4878ee8d1cSJulian Grajkowski typedef enum { 4978ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC = 0x01, 5078ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC = 0x02, 5178ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_CIPHER = 0x04, 5278ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_AUTHENTICATION = 0x08, 5378ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_RESERVED_1 = 0x10, 5478ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_COMPRESSION = 0x20, 5578ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_DEPRECATED = 0x40, 5678ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_RANDOM_NUMBER = 0x80, 5778ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_CRYPTO_ZUC = 0x100, 5878ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_SHA3 = 0x200, 5978ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_KPT = 0x400, 6078ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_RL = 0x800, 6178ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_HKDF = 0x1000, 6278ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_ECEDMONT = 0x2000, 6378ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN = 0x4000, 6478ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_SHA3_EXT = 0x8000, 6578ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_AESGCM_SPC = 0x10000, 6678ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_CHACHA_POLY = 0x20000, 6778ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_SM2 = 0x40000, 6878ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_SM3 = 0x80000, 6978ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_SM4 = 0x100000, 7078ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_INLINE = 0x200000, 7178ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY = 0x400000, 7278ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY64 = 0x800000, 7378ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_LZ4_COMPRESSION = 0x1000000, 7478ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_LZ4S_COMPRESSION = 0x2000000, 7578ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_AES_V2 = 0x4000000, 7678ee8d1cSJulian Grajkowski ICP_ACCEL_CAPABILITIES_KPT2 = 0x8000000, 7778ee8d1cSJulian Grajkowski } icp_accel_capabilities_t; 7878ee8d1cSJulian Grajkowski 7978ee8d1cSJulian Grajkowski /** 8078ee8d1cSJulian Grajkowski ***************************************************************************** 8178ee8d1cSJulian Grajkowski * @ingroup icp_AdfAccelHandle 8278ee8d1cSJulian Grajkowski * 8378ee8d1cSJulian Grajkowski * @description 8478ee8d1cSJulian Grajkowski * Device Configuration Data Structure 8578ee8d1cSJulian Grajkowski * 8678ee8d1cSJulian Grajkowski *****************************************************************************/ 8778ee8d1cSJulian Grajkowski 8878ee8d1cSJulian Grajkowski typedef enum device_type_e { 8978ee8d1cSJulian Grajkowski DEVICE_UNKNOWN = 0, 9078ee8d1cSJulian Grajkowski DEVICE_DH895XCC, 9178ee8d1cSJulian Grajkowski DEVICE_DH895XCCVF, 9278ee8d1cSJulian Grajkowski DEVICE_C62X, 9378ee8d1cSJulian Grajkowski DEVICE_C62XVF, 9478ee8d1cSJulian Grajkowski DEVICE_C3XXX, 9578ee8d1cSJulian Grajkowski DEVICE_C3XXXVF, 9678ee8d1cSJulian Grajkowski DEVICE_200XX, 9778ee8d1cSJulian Grajkowski DEVICE_200XXVF, 9878ee8d1cSJulian Grajkowski DEVICE_C4XXX, 99a977168cSMichal Gulbicki DEVICE_C4XXXVF, 100266b0663SKrzysztof Zdziarski DEVICE_D15XX, 101266b0663SKrzysztof Zdziarski DEVICE_D15XXVF, 102266b0663SKrzysztof Zdziarski DEVICE_4XXX, 103266b0663SKrzysztof Zdziarski DEVICE_4XXXVF 10478ee8d1cSJulian Grajkowski } device_type_t; 10578ee8d1cSJulian Grajkowski 10678ee8d1cSJulian Grajkowski /* 10778ee8d1cSJulian Grajkowski * Enumeration on Service Type 10878ee8d1cSJulian Grajkowski */ 10978ee8d1cSJulian Grajkowski typedef enum adf_service_type_s { 11078ee8d1cSJulian Grajkowski ADF_SERVICE_CRYPTO, 11178ee8d1cSJulian Grajkowski ADF_SERVICE_COMPRESS, 11278ee8d1cSJulian Grajkowski ADF_SERVICE_MAX /* this is always the last one */ 11378ee8d1cSJulian Grajkowski } adf_service_type_t; 11478ee8d1cSJulian Grajkowski 11578ee8d1cSJulian Grajkowski typedef struct accel_dev_s { 11678ee8d1cSJulian Grajkowski /* Some generic information */ 11778ee8d1cSJulian Grajkowski Cpa32U accelId; 11878ee8d1cSJulian Grajkowski Cpa8U *pAccelName; /* Name given to accelerator */ 11978ee8d1cSJulian Grajkowski Cpa32U aeMask; /* Acceleration Engine mask */ 12078ee8d1cSJulian Grajkowski device_type_t deviceType; /* Device Type */ 12178ee8d1cSJulian Grajkowski /* Device name for SAL */ 12278ee8d1cSJulian Grajkowski char deviceName[ADF_DEVICE_NAME_LENGTH + 1]; 12378ee8d1cSJulian Grajkowski Cpa32U accelCapabilitiesMask; /* Accelerator's capabilities 12478ee8d1cSJulian Grajkowski mask */ 12578ee8d1cSJulian Grajkowski Cpa32U dcExtendedFeatures; /* bit field of features */ 12678ee8d1cSJulian Grajkowski QatUtilsAtomic usageCounter; /* Usage counter. Prevents 12778ee8d1cSJulian Grajkowski shutting down the dev if not 0*/ 12878ee8d1cSJulian Grajkowski Cpa32U deviceMemAvail; /* Device memory for intermediate buffers */ 12978ee8d1cSJulian Grajkowski /* Component specific fields - cast to relevent layer */ 13078ee8d1cSJulian Grajkowski void *pRingInflight; /* For offload optimization */ 13178ee8d1cSJulian Grajkowski void *pSalHandle; /* For SAL*/ 13278ee8d1cSJulian Grajkowski void *pQatStats; /* For QATAL/SAL stats */ 13378ee8d1cSJulian Grajkowski void *ringInfoCallBack; /* Callback for user space 13478ee8d1cSJulian Grajkowski ring enabling */ 13578ee8d1cSJulian Grajkowski void *pShramConstants; /* Virtual address of Shram constants page */ 13678ee8d1cSJulian Grajkowski Cpa64U pShramConstantsDma; /* Bus address of Shram constants page */ 13778ee8d1cSJulian Grajkowski 13878ee8d1cSJulian Grajkowski /* Status of ADF and registered subsystems */ 13978ee8d1cSJulian Grajkowski Cpa32U adfSubsystemStatus; 14078ee8d1cSJulian Grajkowski /* Physical processor to which the dev is connected */ 14178ee8d1cSJulian Grajkowski Cpa8U pkg_id; 14278ee8d1cSJulian Grajkowski enum dev_sku_info sku; 14378ee8d1cSJulian Grajkowski Cpa32U pciDevId; 14478ee8d1cSJulian Grajkowski Cpa8U devFileName[ADF_DEVICE_NAME_LENGTH]; 14578ee8d1cSJulian Grajkowski Cpa32S csrFileHdl; 14678ee8d1cSJulian Grajkowski Cpa32S ringFileHdl; 14778ee8d1cSJulian Grajkowski void *accel; 14878ee8d1cSJulian Grajkowski 14978ee8d1cSJulian Grajkowski Cpa32U maxNumBanks; 15078ee8d1cSJulian Grajkowski Cpa32U maxNumRingsPerBank; 15178ee8d1cSJulian Grajkowski 15278ee8d1cSJulian Grajkowski /* pointer to dynamic instance resource manager */ 15378ee8d1cSJulian Grajkowski void *pInstMgr; 15478ee8d1cSJulian Grajkowski void *banks; /* banks information */ 15578ee8d1cSJulian Grajkowski struct adf_accel_dev *accel_dev; 15678ee8d1cSJulian Grajkowski struct accel_dev_s *pPrev; 15778ee8d1cSJulian Grajkowski struct accel_dev_s *pNext; 15878ee8d1cSJulian Grajkowski } icp_accel_dev_t; 15978ee8d1cSJulian Grajkowski 16078ee8d1cSJulian Grajkowski #endif /* ICP_ACCEL_HANDLE_H */ 161