1e34a491bSAdrian Chadd /*-
2e34a491bSAdrian Chadd * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>.
3e34a491bSAdrian Chadd *
4e34a491bSAdrian Chadd * Redistribution and use in source and binary forms, with or without
5e34a491bSAdrian Chadd * modification, are permitted provided that the following conditions
6e34a491bSAdrian Chadd * are met:
7e34a491bSAdrian Chadd * 1. Redistributions of source code must retain the above copyright
8e34a491bSAdrian Chadd * notice, this list of conditions and the following disclaimer.
9e34a491bSAdrian Chadd * 2. Redistributions in binary form must reproduce the above copyright
10e34a491bSAdrian Chadd * notice, this list of conditions and the following disclaimer in the
11e34a491bSAdrian Chadd * documentation and/or other materials provided with the distribution.
12e34a491bSAdrian Chadd *
13e34a491bSAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14e34a491bSAdrian Chadd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15e34a491bSAdrian Chadd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16e34a491bSAdrian Chadd * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17e34a491bSAdrian Chadd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18e34a491bSAdrian Chadd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19e34a491bSAdrian Chadd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20e34a491bSAdrian Chadd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21e34a491bSAdrian Chadd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22e34a491bSAdrian Chadd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23e34a491bSAdrian Chadd * SUCH DAMAGE.
24e34a491bSAdrian Chadd */
25e34a491bSAdrian Chadd
26e34a491bSAdrian Chadd #include <sys/param.h>
27e34a491bSAdrian Chadd #include <sys/systm.h>
28e34a491bSAdrian Chadd #include <sys/bus.h>
29e34a491bSAdrian Chadd #include <sys/lock.h>
30e34a491bSAdrian Chadd #include <sys/mutex.h>
31e34a491bSAdrian Chadd #include <sys/rman.h>
32e34a491bSAdrian Chadd #include <machine/bus.h>
33e34a491bSAdrian Chadd
34be82b3a0SEmmanuel Vadot #include <dev/clk/clk.h>
35be82b3a0SEmmanuel Vadot #include <dev/clk/clk_div.h>
36be82b3a0SEmmanuel Vadot #include <dev/clk/clk_fixed.h>
37be82b3a0SEmmanuel Vadot #include <dev/clk/clk_mux.h>
38e34a491bSAdrian Chadd
39e34a491bSAdrian Chadd #include "qcom_clk_fepll.h"
40e34a491bSAdrian Chadd
41e34a491bSAdrian Chadd #include "clkdev_if.h"
42e34a491bSAdrian Chadd
43e34a491bSAdrian Chadd #if 0
44e34a491bSAdrian Chadd #define DPRINTF(dev, msg...) device_printf(dev, "cpufreq_dt: " msg);
45e34a491bSAdrian Chadd #else
46e34a491bSAdrian Chadd #define DPRINTF(dev, msg...)
47e34a491bSAdrian Chadd #endif
48e34a491bSAdrian Chadd
49e34a491bSAdrian Chadd /*
50e34a491bSAdrian Chadd * This is the top-level PLL clock on the IPQ4018/IPQ4019.
51e34a491bSAdrian Chadd * It's a fixed PLL clock that feeds a bunch of divisors into
52e34a491bSAdrian Chadd * downstrem FEPLL* and DDR clocks.
53e34a491bSAdrian Chadd *
54e34a491bSAdrian Chadd * Now, on Linux the clock code creates multiple instances of this
55e34a491bSAdrian Chadd * with an inbuilt divisor. Here instead there'll be a single
56e34a491bSAdrian Chadd * instance of the FEPLL, and then normal divisors will feed into
57e34a491bSAdrian Chadd * the multiple PLL nodes.
58e34a491bSAdrian Chadd */
59e34a491bSAdrian Chadd
60e34a491bSAdrian Chadd struct qcom_clk_fepll_sc {
61e34a491bSAdrian Chadd struct clknode *clknode;
62e34a491bSAdrian Chadd uint32_t offset;
63e34a491bSAdrian Chadd uint32_t fdbkdiv_shift; /* FDBKDIV base */
64e34a491bSAdrian Chadd uint32_t fdbkdiv_width; /* FDBKDIV width */
65e34a491bSAdrian Chadd uint32_t refclkdiv_shift; /* REFCLKDIV base */
66e34a491bSAdrian Chadd uint32_t refclkdiv_width; /* REFCLKDIV width */
67e34a491bSAdrian Chadd };
68e34a491bSAdrian Chadd
69e34a491bSAdrian Chadd static int
qcom_clk_fepll_recalc(struct clknode * clk,uint64_t * freq)70e34a491bSAdrian Chadd qcom_clk_fepll_recalc(struct clknode *clk, uint64_t *freq)
71e34a491bSAdrian Chadd {
72e34a491bSAdrian Chadd struct qcom_clk_fepll_sc *sc;
73e34a491bSAdrian Chadd uint64_t vco, parent_rate;
74e34a491bSAdrian Chadd uint32_t reg, fdbkdiv, refclkdiv;
75e34a491bSAdrian Chadd
76e34a491bSAdrian Chadd sc = clknode_get_softc(clk);
77e34a491bSAdrian Chadd
78e34a491bSAdrian Chadd if (freq == NULL || *freq == 0) {
79e34a491bSAdrian Chadd device_printf(clknode_get_device(sc->clknode),
80e34a491bSAdrian Chadd "%s: called; NULL or 0 frequency\n",
81e34a491bSAdrian Chadd __func__);
82e34a491bSAdrian Chadd return (ENXIO);
83e34a491bSAdrian Chadd }
84e34a491bSAdrian Chadd
85e34a491bSAdrian Chadd parent_rate = *freq;
86e34a491bSAdrian Chadd
87e34a491bSAdrian Chadd CLKDEV_DEVICE_LOCK(clknode_get_device(sc->clknode));
88e34a491bSAdrian Chadd CLKDEV_READ_4(clknode_get_device(sc->clknode), sc->offset, ®);
89e34a491bSAdrian Chadd CLKDEV_DEVICE_UNLOCK(clknode_get_device(sc->clknode));
90e34a491bSAdrian Chadd
91e34a491bSAdrian Chadd fdbkdiv = (reg >> sc->fdbkdiv_shift) &
92e34a491bSAdrian Chadd ((1U << sc->fdbkdiv_width) - 1);
93e34a491bSAdrian Chadd refclkdiv = (reg >> sc->refclkdiv_shift) &
94e34a491bSAdrian Chadd ((1U << sc->refclkdiv_width) - 1);
95e34a491bSAdrian Chadd
96e34a491bSAdrian Chadd vco = parent_rate / refclkdiv;
97e34a491bSAdrian Chadd vco = vco * 2;
98e34a491bSAdrian Chadd vco = vco * fdbkdiv;
99e34a491bSAdrian Chadd
100e34a491bSAdrian Chadd *freq = vco;
101e34a491bSAdrian Chadd return (0);
102e34a491bSAdrian Chadd }
103e34a491bSAdrian Chadd
104e34a491bSAdrian Chadd static int
qcom_clk_fepll_init(struct clknode * clk,device_t dev)105e34a491bSAdrian Chadd qcom_clk_fepll_init(struct clknode *clk, device_t dev)
106e34a491bSAdrian Chadd {
107e34a491bSAdrian Chadd
108e34a491bSAdrian Chadd /*
109e34a491bSAdrian Chadd * There's only a single parent here for an FEPLL, so just set it
110e34a491bSAdrian Chadd * to 0; the caller doesn't need to supply it.
111e34a491bSAdrian Chadd */
112e34a491bSAdrian Chadd clknode_init_parent_idx(clk, 0);
113e34a491bSAdrian Chadd
114e34a491bSAdrian Chadd return (0);
115e34a491bSAdrian Chadd }
116e34a491bSAdrian Chadd
117e34a491bSAdrian Chadd static clknode_method_t qcom_clk_fepll_methods[] = {
118e34a491bSAdrian Chadd /* Device interface */
119e34a491bSAdrian Chadd CLKNODEMETHOD(clknode_init, qcom_clk_fepll_init),
120e34a491bSAdrian Chadd CLKNODEMETHOD(clknode_recalc_freq, qcom_clk_fepll_recalc),
121e34a491bSAdrian Chadd CLKNODEMETHOD_END
122e34a491bSAdrian Chadd };
123e34a491bSAdrian Chadd
124e34a491bSAdrian Chadd DEFINE_CLASS_1(qcom_clk_fepll, qcom_clk_fepll_class, qcom_clk_fepll_methods,
125e34a491bSAdrian Chadd sizeof(struct qcom_clk_fepll_sc), clknode_class);
126e34a491bSAdrian Chadd
127e34a491bSAdrian Chadd int
qcom_clk_fepll_register(struct clkdom * clkdom,struct qcom_clk_fepll_def * clkdef)128e34a491bSAdrian Chadd qcom_clk_fepll_register(struct clkdom *clkdom,
129e34a491bSAdrian Chadd struct qcom_clk_fepll_def *clkdef)
130e34a491bSAdrian Chadd {
131e34a491bSAdrian Chadd struct clknode *clk;
132e34a491bSAdrian Chadd struct qcom_clk_fepll_sc *sc;
133e34a491bSAdrian Chadd
134e34a491bSAdrian Chadd clk = clknode_create(clkdom, &qcom_clk_fepll_class, &clkdef->clkdef);
135e34a491bSAdrian Chadd if (clk == NULL)
136e34a491bSAdrian Chadd return (1);
137e34a491bSAdrian Chadd
138e34a491bSAdrian Chadd sc = clknode_get_softc(clk);
139e34a491bSAdrian Chadd sc->clknode = clk;
140e34a491bSAdrian Chadd
141e34a491bSAdrian Chadd sc->offset = clkdef->offset;
142e34a491bSAdrian Chadd sc->fdbkdiv_shift = clkdef->fdbkdiv_shift;
143e34a491bSAdrian Chadd sc->fdbkdiv_width = clkdef->fdbkdiv_width;
144e34a491bSAdrian Chadd sc->refclkdiv_shift = clkdef->refclkdiv_shift;
145e34a491bSAdrian Chadd sc->refclkdiv_width = clkdef->refclkdiv_width;
146e34a491bSAdrian Chadd
147e34a491bSAdrian Chadd clknode_register(clkdom, clk);
148e34a491bSAdrian Chadd
149e34a491bSAdrian Chadd return (0);
150e34a491bSAdrian Chadd }
151