1 /*- 2 * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/param.h> 27 #include <sys/systm.h> 28 #include <sys/bus.h> 29 #include <sys/lock.h> 30 #include <sys/mutex.h> 31 #include <sys/rman.h> 32 #include <machine/bus.h> 33 34 #include <dev/extres/clk/clk.h> 35 #include <dev/extres/clk/clk_div.h> 36 #include <dev/extres/clk/clk_fixed.h> 37 #include <dev/extres/clk/clk_mux.h> 38 39 #include "qcom_clk_ro_div.h" 40 41 #include "clkdev_if.h" 42 43 #if 0 44 #define DPRINTF(dev, msg...) device_printf(dev, "cpufreq_dt: " msg); 45 #else 46 #define DPRINTF(dev, msg...) 47 #endif 48 49 /* 50 * This is a read-only divisor table node. 51 * It represents some divisor that is setup by the boot environment 52 * and we don't have any need for the driver to go and fiddle with. 53 * 54 * It likely should just live in the extres/clk code. 55 */ 56 57 struct qcom_clk_ro_div_sc { 58 struct clknode *clknode; 59 uint32_t offset; 60 uint32_t shift; 61 uint32_t width; 62 struct qcom_clk_ro_div_tbl *div_tbl; 63 }; 64 65 static int 66 qcom_clk_ro_div_recalc(struct clknode *clk, uint64_t *freq) 67 { 68 struct qcom_clk_ro_div_sc *sc; 69 uint32_t reg, idx, div = 1; 70 int i; 71 72 sc = clknode_get_softc(clk); 73 74 if (freq == NULL || *freq == 0) { 75 printf("%s: called; NULL or 0 frequency\n", __func__); 76 return (ENXIO); 77 } 78 79 CLKDEV_DEVICE_LOCK(clknode_get_device(sc->clknode)); 80 CLKDEV_READ_4(clknode_get_device(sc->clknode), sc->offset, ®); 81 CLKDEV_DEVICE_UNLOCK(clknode_get_device(sc->clknode)); 82 83 idx = (reg >> sc->shift) & ((1U << sc->width) - 1); 84 85 for (i = 0; (sc->div_tbl[i].div != 0); i++) { 86 if (idx == sc->div_tbl[i].val) { 87 div = sc->div_tbl[i].div; 88 break; 89 } 90 } 91 92 DPRINTF(clknode_get_device(sc->clknode), 93 "%s: freq=%llu, idx=%u, div=%u, out_freq=%llu\n", 94 __func__, 95 *freq, 96 idx, 97 div, 98 *freq / div); 99 100 *freq = *freq / div; 101 return (0); 102 } 103 104 static int 105 qcom_clk_ro_div_init(struct clknode *clk, device_t dev) 106 { 107 108 /* 109 * There's only a single parent here for this divisor, 110 * so just set it to 0; the caller doesn't need to supply it. 111 */ 112 clknode_init_parent_idx(clk, 0); 113 114 return (0); 115 } 116 117 static clknode_method_t qcom_clk_ro_div_methods[] = { 118 /* Device interface */ 119 CLKNODEMETHOD(clknode_init, qcom_clk_ro_div_init), 120 CLKNODEMETHOD(clknode_recalc_freq, qcom_clk_ro_div_recalc), 121 CLKNODEMETHOD_END 122 }; 123 124 DEFINE_CLASS_1(qcom_clk_fepll, qcom_clk_ro_div_class, 125 qcom_clk_ro_div_methods, sizeof(struct qcom_clk_ro_div_sc), 126 clknode_class); 127 128 int 129 qcom_clk_ro_div_register(struct clkdom *clkdom, 130 struct qcom_clk_ro_div_def *clkdef) 131 { 132 struct clknode *clk; 133 struct qcom_clk_ro_div_sc *sc; 134 135 clk = clknode_create(clkdom, &qcom_clk_ro_div_class, 136 &clkdef->clkdef); 137 if (clk == NULL) 138 return (1); 139 140 sc = clknode_get_softc(clk); 141 sc->clknode = clk; 142 sc->offset = clkdef->offset; 143 sc->shift = clkdef->shift; 144 sc->width = clkdef->width; 145 sc->div_tbl = clkdef->div_tbl; 146 147 clknode_register(clkdom, clk); 148 149 return (0); 150 } 151