111e25f0dSDavid C Somayajulu /*
211e25f0dSDavid C Somayajulu * Copyright (c) 2017-2018 Cavium, Inc.
311e25f0dSDavid C Somayajulu * All rights reserved.
411e25f0dSDavid C Somayajulu *
511e25f0dSDavid C Somayajulu * Redistribution and use in source and binary forms, with or without
611e25f0dSDavid C Somayajulu * modification, are permitted provided that the following conditions
711e25f0dSDavid C Somayajulu * are met:
811e25f0dSDavid C Somayajulu *
911e25f0dSDavid C Somayajulu * 1. Redistributions of source code must retain the above copyright
1011e25f0dSDavid C Somayajulu * notice, this list of conditions and the following disclaimer.
1111e25f0dSDavid C Somayajulu * 2. Redistributions in binary form must reproduce the above copyright
1211e25f0dSDavid C Somayajulu * notice, this list of conditions and the following disclaimer in the
1311e25f0dSDavid C Somayajulu * documentation and/or other materials provided with the distribution.
1411e25f0dSDavid C Somayajulu *
1511e25f0dSDavid C Somayajulu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1611e25f0dSDavid C Somayajulu * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1711e25f0dSDavid C Somayajulu * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1811e25f0dSDavid C Somayajulu * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
1911e25f0dSDavid C Somayajulu * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2011e25f0dSDavid C Somayajulu * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2111e25f0dSDavid C Somayajulu * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2211e25f0dSDavid C Somayajulu * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2311e25f0dSDavid C Somayajulu * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2411e25f0dSDavid C Somayajulu * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2511e25f0dSDavid C Somayajulu * POSSIBILITY OF SUCH DAMAGE.
2611e25f0dSDavid C Somayajulu */
2711e25f0dSDavid C Somayajulu
2811e25f0dSDavid C Somayajulu /*
2911e25f0dSDavid C Somayajulu * File : ecore_dbg_fw_funcs.c
3011e25f0dSDavid C Somayajulu */
3111e25f0dSDavid C Somayajulu #include <sys/cdefs.h>
3211e25f0dSDavid C Somayajulu #include "bcm_osal.h"
3311e25f0dSDavid C Somayajulu #include "ecore.h"
3411e25f0dSDavid C Somayajulu #include "ecore_hw.h"
3511e25f0dSDavid C Somayajulu #include "ecore_mcp.h"
3611e25f0dSDavid C Somayajulu #include "spad_layout.h"
3711e25f0dSDavid C Somayajulu #include "nvm_map.h"
3811e25f0dSDavid C Somayajulu #include "reg_addr.h"
3911e25f0dSDavid C Somayajulu #include "ecore_hsi_common.h"
4011e25f0dSDavid C Somayajulu #include "ecore_hsi_debug_tools.h"
4111e25f0dSDavid C Somayajulu #include "mcp_public.h"
4211e25f0dSDavid C Somayajulu #include "nvm_map.h"
4311e25f0dSDavid C Somayajulu #ifndef USE_DBG_BIN_FILE
4411e25f0dSDavid C Somayajulu #include "ecore_dbg_values.h"
4511e25f0dSDavid C Somayajulu #endif
4611e25f0dSDavid C Somayajulu #include "ecore_dbg_fw_funcs.h"
4711e25f0dSDavid C Somayajulu
4811e25f0dSDavid C Somayajulu /* Memory groups enum */
4911e25f0dSDavid C Somayajulu enum mem_groups {
5011e25f0dSDavid C Somayajulu MEM_GROUP_PXP_MEM,
5111e25f0dSDavid C Somayajulu MEM_GROUP_DMAE_MEM,
5211e25f0dSDavid C Somayajulu MEM_GROUP_CM_MEM,
5311e25f0dSDavid C Somayajulu MEM_GROUP_QM_MEM,
54217ec208SDavid C Somayajulu MEM_GROUP_DORQ_MEM,
5511e25f0dSDavid C Somayajulu MEM_GROUP_BRB_RAM,
5611e25f0dSDavid C Somayajulu MEM_GROUP_BRB_MEM,
5711e25f0dSDavid C Somayajulu MEM_GROUP_PRS_MEM,
5811e25f0dSDavid C Somayajulu MEM_GROUP_IOR,
5911e25f0dSDavid C Somayajulu MEM_GROUP_BTB_RAM,
6011e25f0dSDavid C Somayajulu MEM_GROUP_CONN_CFC_MEM,
6111e25f0dSDavid C Somayajulu MEM_GROUP_TASK_CFC_MEM,
6211e25f0dSDavid C Somayajulu MEM_GROUP_CAU_PI,
6311e25f0dSDavid C Somayajulu MEM_GROUP_CAU_MEM,
6411e25f0dSDavid C Somayajulu MEM_GROUP_PXP_ILT,
65217ec208SDavid C Somayajulu MEM_GROUP_TM_MEM,
66217ec208SDavid C Somayajulu MEM_GROUP_SDM_MEM,
6711e25f0dSDavid C Somayajulu MEM_GROUP_PBUF,
68217ec208SDavid C Somayajulu MEM_GROUP_RAM,
6911e25f0dSDavid C Somayajulu MEM_GROUP_MULD_MEM,
7011e25f0dSDavid C Somayajulu MEM_GROUP_BTB_MEM,
719efd0ba7SDavid C Somayajulu MEM_GROUP_RDIF_CTX,
729efd0ba7SDavid C Somayajulu MEM_GROUP_TDIF_CTX,
739efd0ba7SDavid C Somayajulu MEM_GROUP_CFC_MEM,
7411e25f0dSDavid C Somayajulu MEM_GROUP_IGU_MEM,
7511e25f0dSDavid C Somayajulu MEM_GROUP_IGU_MSIX,
7611e25f0dSDavid C Somayajulu MEM_GROUP_CAU_SB,
7711e25f0dSDavid C Somayajulu MEM_GROUP_BMB_RAM,
7811e25f0dSDavid C Somayajulu MEM_GROUP_BMB_MEM,
7911e25f0dSDavid C Somayajulu MEM_GROUPS_NUM
8011e25f0dSDavid C Somayajulu };
8111e25f0dSDavid C Somayajulu
8211e25f0dSDavid C Somayajulu /* Memory groups names */
8311e25f0dSDavid C Somayajulu static const char* s_mem_group_names[] = {
8411e25f0dSDavid C Somayajulu "PXP_MEM",
8511e25f0dSDavid C Somayajulu "DMAE_MEM",
8611e25f0dSDavid C Somayajulu "CM_MEM",
8711e25f0dSDavid C Somayajulu "QM_MEM",
88217ec208SDavid C Somayajulu "DORQ_MEM",
8911e25f0dSDavid C Somayajulu "BRB_RAM",
9011e25f0dSDavid C Somayajulu "BRB_MEM",
9111e25f0dSDavid C Somayajulu "PRS_MEM",
9211e25f0dSDavid C Somayajulu "IOR",
9311e25f0dSDavid C Somayajulu "BTB_RAM",
9411e25f0dSDavid C Somayajulu "CONN_CFC_MEM",
9511e25f0dSDavid C Somayajulu "TASK_CFC_MEM",
9611e25f0dSDavid C Somayajulu "CAU_PI",
9711e25f0dSDavid C Somayajulu "CAU_MEM",
9811e25f0dSDavid C Somayajulu "PXP_ILT",
99217ec208SDavid C Somayajulu "TM_MEM",
100217ec208SDavid C Somayajulu "SDM_MEM",
10111e25f0dSDavid C Somayajulu "PBUF",
102217ec208SDavid C Somayajulu "RAM",
10311e25f0dSDavid C Somayajulu "MULD_MEM",
10411e25f0dSDavid C Somayajulu "BTB_MEM",
1059efd0ba7SDavid C Somayajulu "RDIF_CTX",
1069efd0ba7SDavid C Somayajulu "TDIF_CTX",
1079efd0ba7SDavid C Somayajulu "CFC_MEM",
10811e25f0dSDavid C Somayajulu "IGU_MEM",
10911e25f0dSDavid C Somayajulu "IGU_MSIX",
11011e25f0dSDavid C Somayajulu "CAU_SB",
11111e25f0dSDavid C Somayajulu "BMB_RAM",
11211e25f0dSDavid C Somayajulu "BMB_MEM",
11311e25f0dSDavid C Somayajulu };
11411e25f0dSDavid C Somayajulu
11511e25f0dSDavid C Somayajulu /* Idle check conditions */
11611e25f0dSDavid C Somayajulu
11711e25f0dSDavid C Somayajulu #ifndef __PREVENT_COND_ARR__
11811e25f0dSDavid C Somayajulu
cond5(const u32 * r,const u32 * imm)11911e25f0dSDavid C Somayajulu static u32 cond5(const u32 *r, const u32 *imm) {
12011e25f0dSDavid C Somayajulu return (((r[0] & imm[0]) != imm[1]) && ((r[1] & imm[2]) != imm[3]));
12111e25f0dSDavid C Somayajulu }
12211e25f0dSDavid C Somayajulu
cond7(const u32 * r,const u32 * imm)12311e25f0dSDavid C Somayajulu static u32 cond7(const u32 *r, const u32 *imm) {
12411e25f0dSDavid C Somayajulu return (((r[0] >> imm[0]) & imm[1]) != imm[2]);
12511e25f0dSDavid C Somayajulu }
12611e25f0dSDavid C Somayajulu
cond6(const u32 * r,const u32 * imm)12711e25f0dSDavid C Somayajulu static u32 cond6(const u32 *r, const u32 *imm) {
12811e25f0dSDavid C Somayajulu return ((r[0] & imm[0]) != imm[1]);
12911e25f0dSDavid C Somayajulu }
13011e25f0dSDavid C Somayajulu
cond9(const u32 * r,const u32 * imm)13111e25f0dSDavid C Somayajulu static u32 cond9(const u32 *r, const u32 *imm) {
13211e25f0dSDavid C Somayajulu return ((r[0] & imm[0]) >> imm[1]) != (((r[0] & imm[2]) >> imm[3]) | ((r[1] & imm[4]) << imm[5]));
13311e25f0dSDavid C Somayajulu }
13411e25f0dSDavid C Somayajulu
cond10(const u32 * r,const u32 * imm)13511e25f0dSDavid C Somayajulu static u32 cond10(const u32 *r, const u32 *imm) {
13611e25f0dSDavid C Somayajulu return ((r[0] & imm[0]) >> imm[1]) != (r[0] & imm[2]);
13711e25f0dSDavid C Somayajulu }
13811e25f0dSDavid C Somayajulu
cond4(const u32 * r,const u32 * imm)13911e25f0dSDavid C Somayajulu static u32 cond4(const u32 *r, const u32 *imm) {
14011e25f0dSDavid C Somayajulu return ((r[0] & ~imm[0]) != imm[1]);
14111e25f0dSDavid C Somayajulu }
14211e25f0dSDavid C Somayajulu
cond0(const u32 * r,const u32 * imm)14311e25f0dSDavid C Somayajulu static u32 cond0(const u32 *r, const u32 *imm) {
14411e25f0dSDavid C Somayajulu return ((r[0] & ~r[1]) != imm[0]);
14511e25f0dSDavid C Somayajulu }
14611e25f0dSDavid C Somayajulu
cond1(const u32 * r,const u32 * imm)14711e25f0dSDavid C Somayajulu static u32 cond1(const u32 *r, const u32 *imm) {
14811e25f0dSDavid C Somayajulu return (r[0] != imm[0]);
14911e25f0dSDavid C Somayajulu }
15011e25f0dSDavid C Somayajulu
cond11(const u32 * r,const u32 * imm)15111e25f0dSDavid C Somayajulu static u32 cond11(const u32 *r, const u32 *imm) {
15211e25f0dSDavid C Somayajulu return (r[0] != r[1] && r[2] == imm[0]);
15311e25f0dSDavid C Somayajulu }
15411e25f0dSDavid C Somayajulu
cond12(const u32 * r,const u32 * imm)15511e25f0dSDavid C Somayajulu static u32 cond12(const u32 *r, const u32 *imm) {
15611e25f0dSDavid C Somayajulu return (r[0] != r[1] && r[2] > imm[0]);
15711e25f0dSDavid C Somayajulu }
15811e25f0dSDavid C Somayajulu
cond3(const u32 * r,const u32 OSAL_UNUSED * imm)1599efd0ba7SDavid C Somayajulu static u32 cond3(const u32 *r, const u32 OSAL_UNUSED *imm) {
16011e25f0dSDavid C Somayajulu return (r[0] != r[1]);
16111e25f0dSDavid C Somayajulu }
16211e25f0dSDavid C Somayajulu
cond13(const u32 * r,const u32 * imm)16311e25f0dSDavid C Somayajulu static u32 cond13(const u32 *r, const u32 *imm) {
16411e25f0dSDavid C Somayajulu return (r[0] & imm[0]);
16511e25f0dSDavid C Somayajulu }
16611e25f0dSDavid C Somayajulu
cond8(const u32 * r,const u32 * imm)16711e25f0dSDavid C Somayajulu static u32 cond8(const u32 *r, const u32 *imm) {
16811e25f0dSDavid C Somayajulu return (r[0] < (r[1] - imm[0]));
16911e25f0dSDavid C Somayajulu }
17011e25f0dSDavid C Somayajulu
cond2(const u32 * r,const u32 * imm)17111e25f0dSDavid C Somayajulu static u32 cond2(const u32 *r, const u32 *imm) {
17211e25f0dSDavid C Somayajulu return (r[0] > imm[0]);
17311e25f0dSDavid C Somayajulu }
17411e25f0dSDavid C Somayajulu
17511e25f0dSDavid C Somayajulu /* Array of Idle Check conditions */
17611e25f0dSDavid C Somayajulu static u32 (*cond_arr[])(const u32 *r, const u32 *imm) = {
17711e25f0dSDavid C Somayajulu cond0,
17811e25f0dSDavid C Somayajulu cond1,
17911e25f0dSDavid C Somayajulu cond2,
18011e25f0dSDavid C Somayajulu cond3,
18111e25f0dSDavid C Somayajulu cond4,
18211e25f0dSDavid C Somayajulu cond5,
18311e25f0dSDavid C Somayajulu cond6,
18411e25f0dSDavid C Somayajulu cond7,
18511e25f0dSDavid C Somayajulu cond8,
18611e25f0dSDavid C Somayajulu cond9,
18711e25f0dSDavid C Somayajulu cond10,
18811e25f0dSDavid C Somayajulu cond11,
18911e25f0dSDavid C Somayajulu cond12,
19011e25f0dSDavid C Somayajulu cond13,
19111e25f0dSDavid C Somayajulu };
19211e25f0dSDavid C Somayajulu
19311e25f0dSDavid C Somayajulu #endif /* __PREVENT_COND_ARR__ */
19411e25f0dSDavid C Somayajulu
19511e25f0dSDavid C Somayajulu /******************************* Data Types **********************************/
19611e25f0dSDavid C Somayajulu
19711e25f0dSDavid C Somayajulu enum platform_ids {
19811e25f0dSDavid C Somayajulu PLATFORM_ASIC,
19911e25f0dSDavid C Somayajulu PLATFORM_EMUL_FULL,
20011e25f0dSDavid C Somayajulu PLATFORM_EMUL_REDUCED,
20111e25f0dSDavid C Somayajulu PLATFORM_FPGA,
20211e25f0dSDavid C Somayajulu MAX_PLATFORM_IDS
20311e25f0dSDavid C Somayajulu };
20411e25f0dSDavid C Somayajulu
20511e25f0dSDavid C Somayajulu struct chip_platform_defs {
20611e25f0dSDavid C Somayajulu u8 num_ports;
20711e25f0dSDavid C Somayajulu u8 num_pfs;
20811e25f0dSDavid C Somayajulu u8 num_vfs;
20911e25f0dSDavid C Somayajulu };
21011e25f0dSDavid C Somayajulu
21111e25f0dSDavid C Somayajulu /* Chip constant definitions */
21211e25f0dSDavid C Somayajulu struct chip_defs {
21311e25f0dSDavid C Somayajulu const char *name;
21411e25f0dSDavid C Somayajulu struct chip_platform_defs per_platform[MAX_PLATFORM_IDS];
21511e25f0dSDavid C Somayajulu };
21611e25f0dSDavid C Somayajulu
21711e25f0dSDavid C Somayajulu /* Platform constant definitions */
21811e25f0dSDavid C Somayajulu struct platform_defs {
21911e25f0dSDavid C Somayajulu const char *name;
22011e25f0dSDavid C Somayajulu u32 delay_factor;
221217ec208SDavid C Somayajulu u32 dmae_thresh;
222217ec208SDavid C Somayajulu u32 log_thresh;
22311e25f0dSDavid C Somayajulu };
22411e25f0dSDavid C Somayajulu
22511e25f0dSDavid C Somayajulu /* Storm constant definitions.
22611e25f0dSDavid C Somayajulu * Addresses are in bytes, sizes are in quad-regs.
22711e25f0dSDavid C Somayajulu */
22811e25f0dSDavid C Somayajulu struct storm_defs {
22911e25f0dSDavid C Somayajulu char letter;
23011e25f0dSDavid C Somayajulu enum block_id block_id;
23111e25f0dSDavid C Somayajulu enum dbg_bus_clients dbg_client_id[MAX_CHIP_IDS];
23211e25f0dSDavid C Somayajulu bool has_vfc;
23311e25f0dSDavid C Somayajulu u32 sem_fast_mem_addr;
23411e25f0dSDavid C Somayajulu u32 sem_frame_mode_addr;
23511e25f0dSDavid C Somayajulu u32 sem_slow_enable_addr;
23611e25f0dSDavid C Somayajulu u32 sem_slow_mode_addr;
23711e25f0dSDavid C Somayajulu u32 sem_slow_mode1_conf_addr;
23811e25f0dSDavid C Somayajulu u32 sem_sync_dbg_empty_addr;
23911e25f0dSDavid C Somayajulu u32 sem_slow_dbg_empty_addr;
24011e25f0dSDavid C Somayajulu u32 cm_ctx_wr_addr;
24111e25f0dSDavid C Somayajulu u32 cm_conn_ag_ctx_lid_size;
24211e25f0dSDavid C Somayajulu u32 cm_conn_ag_ctx_rd_addr;
24311e25f0dSDavid C Somayajulu u32 cm_conn_st_ctx_lid_size;
24411e25f0dSDavid C Somayajulu u32 cm_conn_st_ctx_rd_addr;
24511e25f0dSDavid C Somayajulu u32 cm_task_ag_ctx_lid_size;
24611e25f0dSDavid C Somayajulu u32 cm_task_ag_ctx_rd_addr;
24711e25f0dSDavid C Somayajulu u32 cm_task_st_ctx_lid_size;
24811e25f0dSDavid C Somayajulu u32 cm_task_st_ctx_rd_addr;
24911e25f0dSDavid C Somayajulu };
25011e25f0dSDavid C Somayajulu
25111e25f0dSDavid C Somayajulu /* Block constant definitions */
25211e25f0dSDavid C Somayajulu struct block_defs {
25311e25f0dSDavid C Somayajulu const char *name;
2549efd0ba7SDavid C Somayajulu bool exists[MAX_CHIP_IDS];
25511e25f0dSDavid C Somayajulu bool associated_to_storm;
25611e25f0dSDavid C Somayajulu
25711e25f0dSDavid C Somayajulu /* Valid only if associated_to_storm is true */
25811e25f0dSDavid C Somayajulu u32 storm_id;
25911e25f0dSDavid C Somayajulu enum dbg_bus_clients dbg_client_id[MAX_CHIP_IDS];
26011e25f0dSDavid C Somayajulu u32 dbg_select_addr;
26111e25f0dSDavid C Somayajulu u32 dbg_enable_addr;
26211e25f0dSDavid C Somayajulu u32 dbg_shift_addr;
26311e25f0dSDavid C Somayajulu u32 dbg_force_valid_addr;
26411e25f0dSDavid C Somayajulu u32 dbg_force_frame_addr;
26511e25f0dSDavid C Somayajulu bool has_reset_bit;
26611e25f0dSDavid C Somayajulu
26711e25f0dSDavid C Somayajulu /* If true, block is taken out of reset before dump */
26811e25f0dSDavid C Somayajulu bool unreset;
26911e25f0dSDavid C Somayajulu enum dbg_reset_regs reset_reg;
27011e25f0dSDavid C Somayajulu
27111e25f0dSDavid C Somayajulu /* Bit offset in reset register */
27211e25f0dSDavid C Somayajulu u8 reset_bit_offset;
27311e25f0dSDavid C Somayajulu };
27411e25f0dSDavid C Somayajulu
27511e25f0dSDavid C Somayajulu /* Reset register definitions */
27611e25f0dSDavid C Somayajulu struct reset_reg_defs {
27711e25f0dSDavid C Somayajulu u32 addr;
27811e25f0dSDavid C Somayajulu bool exists[MAX_CHIP_IDS];
2799efd0ba7SDavid C Somayajulu u32 unreset_val[MAX_CHIP_IDS];
28011e25f0dSDavid C Somayajulu };
28111e25f0dSDavid C Somayajulu
28211e25f0dSDavid C Somayajulu /* Debug Bus Constraint operation constant definitions */
28311e25f0dSDavid C Somayajulu struct dbg_bus_constraint_op_defs {
28411e25f0dSDavid C Somayajulu u8 hw_op_val;
28511e25f0dSDavid C Somayajulu bool is_cyclic;
28611e25f0dSDavid C Somayajulu };
28711e25f0dSDavid C Somayajulu
28811e25f0dSDavid C Somayajulu /* Storm Mode definitions */
28911e25f0dSDavid C Somayajulu struct storm_mode_defs {
29011e25f0dSDavid C Somayajulu const char *name;
29111e25f0dSDavid C Somayajulu bool is_fast_dbg;
29211e25f0dSDavid C Somayajulu u8 id_in_hw;
29311e25f0dSDavid C Somayajulu };
29411e25f0dSDavid C Somayajulu
29511e25f0dSDavid C Somayajulu struct grc_param_defs {
29611e25f0dSDavid C Somayajulu u32 default_val[MAX_CHIP_IDS];
29711e25f0dSDavid C Somayajulu u32 min;
29811e25f0dSDavid C Somayajulu u32 max;
29911e25f0dSDavid C Somayajulu bool is_preset;
30011e25f0dSDavid C Somayajulu u32 exclude_all_preset_val;
30111e25f0dSDavid C Somayajulu u32 crash_preset_val;
30211e25f0dSDavid C Somayajulu };
30311e25f0dSDavid C Somayajulu
30411e25f0dSDavid C Somayajulu /* address is in 128b units. Width is in bits. */
30511e25f0dSDavid C Somayajulu struct rss_mem_defs {
30611e25f0dSDavid C Somayajulu const char *mem_name;
30711e25f0dSDavid C Somayajulu const char *type_name;
30811e25f0dSDavid C Somayajulu u32 addr;
3099efd0ba7SDavid C Somayajulu u32 entry_width;
31011e25f0dSDavid C Somayajulu u32 num_entries[MAX_CHIP_IDS];
31111e25f0dSDavid C Somayajulu };
31211e25f0dSDavid C Somayajulu
31311e25f0dSDavid C Somayajulu struct vfc_ram_defs {
31411e25f0dSDavid C Somayajulu const char *mem_name;
31511e25f0dSDavid C Somayajulu const char *type_name;
31611e25f0dSDavid C Somayajulu u32 base_row;
31711e25f0dSDavid C Somayajulu u32 num_rows;
31811e25f0dSDavid C Somayajulu };
31911e25f0dSDavid C Somayajulu
32011e25f0dSDavid C Somayajulu struct big_ram_defs {
32111e25f0dSDavid C Somayajulu const char *instance_name;
32211e25f0dSDavid C Somayajulu enum mem_groups mem_group_id;
32311e25f0dSDavid C Somayajulu enum mem_groups ram_mem_group_id;
32411e25f0dSDavid C Somayajulu enum dbg_grc_params grc_param;
32511e25f0dSDavid C Somayajulu u32 addr_reg_addr;
32611e25f0dSDavid C Somayajulu u32 data_reg_addr;
327217ec208SDavid C Somayajulu u32 is_256b_reg_addr;
328217ec208SDavid C Somayajulu u32 is_256b_bit_offset[MAX_CHIP_IDS];
329217ec208SDavid C Somayajulu u32 ram_size[MAX_CHIP_IDS]; /* In dwords */
33011e25f0dSDavid C Somayajulu };
33111e25f0dSDavid C Somayajulu
33211e25f0dSDavid C Somayajulu struct phy_defs {
33311e25f0dSDavid C Somayajulu const char *phy_name;
33411e25f0dSDavid C Somayajulu
33511e25f0dSDavid C Somayajulu /* PHY base GRC address */
33611e25f0dSDavid C Somayajulu u32 base_addr;
33711e25f0dSDavid C Somayajulu
33811e25f0dSDavid C Somayajulu /* Relative address of indirect TBUS address register (bits 0..7) */
33911e25f0dSDavid C Somayajulu u32 tbus_addr_lo_addr;
34011e25f0dSDavid C Somayajulu
34111e25f0dSDavid C Somayajulu /* Relative address of indirect TBUS address register (bits 8..10) */
34211e25f0dSDavid C Somayajulu u32 tbus_addr_hi_addr;
34311e25f0dSDavid C Somayajulu
34411e25f0dSDavid C Somayajulu /* Relative address of indirect TBUS data register (bits 0..7) */
34511e25f0dSDavid C Somayajulu u32 tbus_data_lo_addr;
34611e25f0dSDavid C Somayajulu
34711e25f0dSDavid C Somayajulu /* Relative address of indirect TBUS data register (bits 8..11) */
34811e25f0dSDavid C Somayajulu u32 tbus_data_hi_addr;
34911e25f0dSDavid C Somayajulu };
35011e25f0dSDavid C Somayajulu
35111e25f0dSDavid C Somayajulu /******************************** Constants **********************************/
35211e25f0dSDavid C Somayajulu
35311e25f0dSDavid C Somayajulu #define MAX_LCIDS 320
35411e25f0dSDavid C Somayajulu #define MAX_LTIDS 320
35511e25f0dSDavid C Somayajulu
35611e25f0dSDavid C Somayajulu #define NUM_IOR_SETS 2
35711e25f0dSDavid C Somayajulu #define IORS_PER_SET 176
35811e25f0dSDavid C Somayajulu #define IOR_SET_OFFSET(set_id) ((set_id) * 256)
35911e25f0dSDavid C Somayajulu
36011e25f0dSDavid C Somayajulu #define BYTES_IN_DWORD sizeof(u32)
36111e25f0dSDavid C Somayajulu
36211e25f0dSDavid C Somayajulu /* Cyclic right */
36311e25f0dSDavid C Somayajulu #define SHR(val, val_width, amount) (((val) | ((val) << (val_width))) >> (amount)) & ((1 << (val_width)) - 1)
36411e25f0dSDavid C Somayajulu
36511e25f0dSDavid C Somayajulu /* In the macros below, size and offset are specified in bits */
36611e25f0dSDavid C Somayajulu #define CEIL_DWORDS(size) DIV_ROUND_UP(size, 32)
36711e25f0dSDavid C Somayajulu #define FIELD_BIT_OFFSET(type, field) type##_##field##_##OFFSET
36811e25f0dSDavid C Somayajulu #define FIELD_BIT_SIZE(type, field) type##_##field##_##SIZE
36911e25f0dSDavid C Somayajulu #define FIELD_DWORD_OFFSET(type, field) (int)(FIELD_BIT_OFFSET(type, field) / 32)
37011e25f0dSDavid C Somayajulu #define FIELD_DWORD_SHIFT(type, field) (FIELD_BIT_OFFSET(type, field) % 32)
37111e25f0dSDavid C Somayajulu #define FIELD_BIT_MASK(type, field) (((1 << FIELD_BIT_SIZE(type, field)) - 1) << FIELD_DWORD_SHIFT(type, field))
37211e25f0dSDavid C Somayajulu
37311e25f0dSDavid C Somayajulu #define SET_VAR_FIELD(var, type, field, val) var[FIELD_DWORD_OFFSET(type, field)] &= (~FIELD_BIT_MASK(type, field)); var[FIELD_DWORD_OFFSET(type, field)] |= (val) << FIELD_DWORD_SHIFT(type, field)
37411e25f0dSDavid C Somayajulu
37511e25f0dSDavid C Somayajulu #define ARR_REG_WR(dev, ptt, addr, arr, arr_size) for (i = 0; i < (arr_size); i++) ecore_wr(dev, ptt, addr, (arr)[i])
37611e25f0dSDavid C Somayajulu
37711e25f0dSDavid C Somayajulu #define ARR_REG_RD(dev, ptt, addr, arr, arr_size) for (i = 0; i < (arr_size); i++) (arr)[i] = ecore_rd(dev, ptt, addr)
37811e25f0dSDavid C Somayajulu
37911e25f0dSDavid C Somayajulu #define CHECK_ARR_SIZE(arr, size) OSAL_BUILD_BUG_ON(!(OSAL_ARRAY_SIZE(arr) == size))
38011e25f0dSDavid C Somayajulu
38111e25f0dSDavid C Somayajulu #ifndef DWORDS_TO_BYTES
38211e25f0dSDavid C Somayajulu #define DWORDS_TO_BYTES(dwords) ((dwords) * BYTES_IN_DWORD)
38311e25f0dSDavid C Somayajulu #endif
38411e25f0dSDavid C Somayajulu #ifndef BYTES_TO_DWORDS
38511e25f0dSDavid C Somayajulu #define BYTES_TO_DWORDS(bytes) ((bytes) / BYTES_IN_DWORD)
38611e25f0dSDavid C Somayajulu #endif
38711e25f0dSDavid C Somayajulu
38811e25f0dSDavid C Somayajulu /* extra lines include a signature line + optional latency events line */
38911e25f0dSDavid C Somayajulu #ifndef NUM_DBG_LINES
39011e25f0dSDavid C Somayajulu #define NUM_EXTRA_DBG_LINES(block_desc) (1 + (block_desc->has_latency_events ? 1 : 0))
39111e25f0dSDavid C Somayajulu #define NUM_DBG_LINES(block_desc) (block_desc->num_of_lines + NUM_EXTRA_DBG_LINES(block_desc))
39211e25f0dSDavid C Somayajulu #endif
39311e25f0dSDavid C Somayajulu
394217ec208SDavid C Somayajulu #define USE_DMAE true
395217ec208SDavid C Somayajulu #define PROTECT_WIDE_BUS true
396217ec208SDavid C Somayajulu
39711e25f0dSDavid C Somayajulu #define RAM_LINES_TO_DWORDS(lines) ((lines) * 2)
39811e25f0dSDavid C Somayajulu #define RAM_LINES_TO_BYTES(lines) DWORDS_TO_BYTES(RAM_LINES_TO_DWORDS(lines))
39911e25f0dSDavid C Somayajulu
40011e25f0dSDavid C Somayajulu #define REG_DUMP_LEN_SHIFT 24
40111e25f0dSDavid C Somayajulu #define MEM_DUMP_ENTRY_SIZE_DWORDS BYTES_TO_DWORDS(sizeof(struct dbg_dump_mem))
40211e25f0dSDavid C Somayajulu
40311e25f0dSDavid C Somayajulu #define IDLE_CHK_RULE_SIZE_DWORDS BYTES_TO_DWORDS(sizeof(struct dbg_idle_chk_rule))
40411e25f0dSDavid C Somayajulu
40511e25f0dSDavid C Somayajulu #define IDLE_CHK_RESULT_HDR_DWORDS BYTES_TO_DWORDS(sizeof(struct dbg_idle_chk_result_hdr))
40611e25f0dSDavid C Somayajulu
40711e25f0dSDavid C Somayajulu #define IDLE_CHK_RESULT_REG_HDR_DWORDS BYTES_TO_DWORDS(sizeof(struct dbg_idle_chk_result_reg_hdr))
40811e25f0dSDavid C Somayajulu
40911e25f0dSDavid C Somayajulu #define IDLE_CHK_MAX_ENTRIES_SIZE 32
41011e25f0dSDavid C Somayajulu
41111e25f0dSDavid C Somayajulu /* The sizes and offsets below are specified in bits */
41211e25f0dSDavid C Somayajulu #define VFC_CAM_CMD_STRUCT_SIZE 64
41311e25f0dSDavid C Somayajulu #define VFC_CAM_CMD_ROW_OFFSET 48
41411e25f0dSDavid C Somayajulu #define VFC_CAM_CMD_ROW_SIZE 9
41511e25f0dSDavid C Somayajulu #define VFC_CAM_ADDR_STRUCT_SIZE 16
41611e25f0dSDavid C Somayajulu #define VFC_CAM_ADDR_OP_OFFSET 0
41711e25f0dSDavid C Somayajulu #define VFC_CAM_ADDR_OP_SIZE 4
41811e25f0dSDavid C Somayajulu #define VFC_CAM_RESP_STRUCT_SIZE 256
41911e25f0dSDavid C Somayajulu #define VFC_RAM_ADDR_STRUCT_SIZE 16
42011e25f0dSDavid C Somayajulu #define VFC_RAM_ADDR_OP_OFFSET 0
42111e25f0dSDavid C Somayajulu #define VFC_RAM_ADDR_OP_SIZE 2
42211e25f0dSDavid C Somayajulu #define VFC_RAM_ADDR_ROW_OFFSET 2
42311e25f0dSDavid C Somayajulu #define VFC_RAM_ADDR_ROW_SIZE 10
42411e25f0dSDavid C Somayajulu #define VFC_RAM_RESP_STRUCT_SIZE 256
42511e25f0dSDavid C Somayajulu
42611e25f0dSDavid C Somayajulu #define VFC_CAM_CMD_DWORDS CEIL_DWORDS(VFC_CAM_CMD_STRUCT_SIZE)
42711e25f0dSDavid C Somayajulu #define VFC_CAM_ADDR_DWORDS CEIL_DWORDS(VFC_CAM_ADDR_STRUCT_SIZE)
42811e25f0dSDavid C Somayajulu #define VFC_CAM_RESP_DWORDS CEIL_DWORDS(VFC_CAM_RESP_STRUCT_SIZE)
42911e25f0dSDavid C Somayajulu #define VFC_RAM_CMD_DWORDS VFC_CAM_CMD_DWORDS
43011e25f0dSDavid C Somayajulu #define VFC_RAM_ADDR_DWORDS CEIL_DWORDS(VFC_RAM_ADDR_STRUCT_SIZE)
43111e25f0dSDavid C Somayajulu #define VFC_RAM_RESP_DWORDS CEIL_DWORDS(VFC_RAM_RESP_STRUCT_SIZE)
43211e25f0dSDavid C Somayajulu
43311e25f0dSDavid C Somayajulu #define NUM_VFC_RAM_TYPES 4
43411e25f0dSDavid C Somayajulu
43511e25f0dSDavid C Somayajulu #define VFC_CAM_NUM_ROWS 512
43611e25f0dSDavid C Somayajulu
43711e25f0dSDavid C Somayajulu #define VFC_OPCODE_CAM_RD 14
43811e25f0dSDavid C Somayajulu #define VFC_OPCODE_RAM_RD 0
43911e25f0dSDavid C Somayajulu
44011e25f0dSDavid C Somayajulu #define NUM_RSS_MEM_TYPES 5
44111e25f0dSDavid C Somayajulu
44211e25f0dSDavid C Somayajulu #define NUM_BIG_RAM_TYPES 3
44311e25f0dSDavid C Somayajulu
44411e25f0dSDavid C Somayajulu #define NUM_PHY_TBUS_ADDRESSES 2048
44511e25f0dSDavid C Somayajulu #define PHY_DUMP_SIZE_DWORDS (NUM_PHY_TBUS_ADDRESSES / 2)
44611e25f0dSDavid C Somayajulu
447217ec208SDavid C Somayajulu #define SEM_FAST_MODE23_SRC_ENABLE_VAL 0x0
448217ec208SDavid C Somayajulu #define SEM_FAST_MODE23_SRC_DISABLE_VAL 0x7
449217ec208SDavid C Somayajulu #define SEM_FAST_MODE4_SRC_ENABLE_VAL 0x0
450217ec208SDavid C Somayajulu #define SEM_FAST_MODE4_SRC_DISABLE_VAL 0x3
451217ec208SDavid C Somayajulu #define SEM_FAST_MODE6_SRC_ENABLE_VAL 0x10
452217ec208SDavid C Somayajulu #define SEM_FAST_MODE6_SRC_DISABLE_VAL 0x3f
45311e25f0dSDavid C Somayajulu
45411e25f0dSDavid C Somayajulu #define SEM_SLOW_MODE1_DATA_ENABLE 0x1
45511e25f0dSDavid C Somayajulu
45611e25f0dSDavid C Somayajulu #define VALUES_PER_CYCLE 4
45711e25f0dSDavid C Somayajulu #define MAX_CYCLE_VALUES_MASK ((1 << VALUES_PER_CYCLE) - 1)
45811e25f0dSDavid C Somayajulu
45911e25f0dSDavid C Somayajulu #define MAX_DWORDS_PER_CYCLE 8
46011e25f0dSDavid C Somayajulu
46111e25f0dSDavid C Somayajulu #define HW_ID_BITS 3
46211e25f0dSDavid C Somayajulu
46311e25f0dSDavid C Somayajulu #define NUM_CALENDAR_SLOTS 16
46411e25f0dSDavid C Somayajulu
46511e25f0dSDavid C Somayajulu #define MAX_TRIGGER_STATES 3
46611e25f0dSDavid C Somayajulu #define TRIGGER_SETS_PER_STATE 2
46711e25f0dSDavid C Somayajulu #define MAX_CONSTRAINTS 4
46811e25f0dSDavid C Somayajulu
469217ec208SDavid C Somayajulu #define SEM_FILTER_CID_EN_MASK 0x00b
470217ec208SDavid C Somayajulu #define SEM_FILTER_EID_MASK_EN_MASK 0x013
471217ec208SDavid C Somayajulu #define SEM_FILTER_EID_RANGE_EN_MASK 0x113
47211e25f0dSDavid C Somayajulu
47311e25f0dSDavid C Somayajulu #define CHUNK_SIZE_IN_DWORDS 64
47411e25f0dSDavid C Somayajulu #define CHUNK_SIZE_IN_BYTES DWORDS_TO_BYTES(CHUNK_SIZE_IN_DWORDS)
47511e25f0dSDavid C Somayajulu
47611e25f0dSDavid C Somayajulu #define INT_BUF_NUM_OF_LINES 192
47711e25f0dSDavid C Somayajulu #define INT_BUF_LINE_SIZE_IN_DWORDS 16
47811e25f0dSDavid C Somayajulu #define INT_BUF_SIZE_IN_DWORDS (INT_BUF_NUM_OF_LINES * INT_BUF_LINE_SIZE_IN_DWORDS)
47911e25f0dSDavid C Somayajulu #define INT_BUF_SIZE_IN_CHUNKS (INT_BUF_SIZE_IN_DWORDS / CHUNK_SIZE_IN_DWORDS)
48011e25f0dSDavid C Somayajulu
48111e25f0dSDavid C Somayajulu #define PCI_BUF_LINE_SIZE_IN_DWORDS 8
48211e25f0dSDavid C Somayajulu #define PCI_BUF_LINE_SIZE_IN_BYTES DWORDS_TO_BYTES(PCI_BUF_LINE_SIZE_IN_DWORDS)
48311e25f0dSDavid C Somayajulu
48411e25f0dSDavid C Somayajulu #define TARGET_EN_MASK_PCI 0x3
48511e25f0dSDavid C Somayajulu #define TARGET_EN_MASK_NIG 0x4
48611e25f0dSDavid C Somayajulu
48711e25f0dSDavid C Somayajulu #define PCI_REQ_CREDIT 1
48811e25f0dSDavid C Somayajulu #define PCI_PHYS_ADDR_TYPE 0
48911e25f0dSDavid C Somayajulu
49011e25f0dSDavid C Somayajulu #define OPAQUE_FID(pci_func) ((pci_func << 4) | 0xff00)
49111e25f0dSDavid C Somayajulu
49211e25f0dSDavid C Somayajulu #define RESET_REG_UNRESET_OFFSET 4
49311e25f0dSDavid C Somayajulu
49411e25f0dSDavid C Somayajulu #define PCI_PKT_SIZE_IN_CHUNKS 1
49511e25f0dSDavid C Somayajulu #define PCI_PKT_SIZE_IN_BYTES (PCI_PKT_SIZE_IN_CHUNKS * CHUNK_SIZE_IN_BYTES)
49611e25f0dSDavid C Somayajulu
49711e25f0dSDavid C Somayajulu #define NIG_PKT_SIZE_IN_CHUNKS 4
49811e25f0dSDavid C Somayajulu
49911e25f0dSDavid C Somayajulu #define FLUSH_DELAY_MS 500
50011e25f0dSDavid C Somayajulu #define STALL_DELAY_MS 500
50111e25f0dSDavid C Somayajulu
50211e25f0dSDavid C Somayajulu #define SRC_MAC_ADDR_LO16 0x0a0b
50311e25f0dSDavid C Somayajulu #define SRC_MAC_ADDR_HI32 0x0c0d0e0f
50411e25f0dSDavid C Somayajulu #define ETH_TYPE 0x1000
50511e25f0dSDavid C Somayajulu
50611e25f0dSDavid C Somayajulu #define STATIC_DEBUG_LINE_DWORDS 9
50711e25f0dSDavid C Somayajulu
50811e25f0dSDavid C Somayajulu #define NUM_COMMON_GLOBAL_PARAMS 8
50911e25f0dSDavid C Somayajulu
51011e25f0dSDavid C Somayajulu #define FW_IMG_KUKU 0
51111e25f0dSDavid C Somayajulu #define FW_IMG_MAIN 1
51211e25f0dSDavid C Somayajulu #define FW_IMG_L2B 2
51311e25f0dSDavid C Somayajulu
51411e25f0dSDavid C Somayajulu #ifndef REG_FIFO_ELEMENT_DWORDS
51511e25f0dSDavid C Somayajulu #define REG_FIFO_ELEMENT_DWORDS 2
51611e25f0dSDavid C Somayajulu #endif
51711e25f0dSDavid C Somayajulu #define REG_FIFO_DEPTH_ELEMENTS 32
51811e25f0dSDavid C Somayajulu #define REG_FIFO_DEPTH_DWORDS (REG_FIFO_ELEMENT_DWORDS * REG_FIFO_DEPTH_ELEMENTS)
51911e25f0dSDavid C Somayajulu
52011e25f0dSDavid C Somayajulu #ifndef IGU_FIFO_ELEMENT_DWORDS
52111e25f0dSDavid C Somayajulu #define IGU_FIFO_ELEMENT_DWORDS 4
52211e25f0dSDavid C Somayajulu #endif
52311e25f0dSDavid C Somayajulu #define IGU_FIFO_DEPTH_ELEMENTS 64
52411e25f0dSDavid C Somayajulu #define IGU_FIFO_DEPTH_DWORDS (IGU_FIFO_ELEMENT_DWORDS * IGU_FIFO_DEPTH_ELEMENTS)
52511e25f0dSDavid C Somayajulu
52611e25f0dSDavid C Somayajulu #define SEMI_SYNC_FIFO_POLLING_DELAY_MS 5
52711e25f0dSDavid C Somayajulu #define SEMI_SYNC_FIFO_POLLING_COUNT 20
52811e25f0dSDavid C Somayajulu
52911e25f0dSDavid C Somayajulu #ifndef PROTECTION_OVERRIDE_ELEMENT_DWORDS
53011e25f0dSDavid C Somayajulu #define PROTECTION_OVERRIDE_ELEMENT_DWORDS 2
53111e25f0dSDavid C Somayajulu #endif
53211e25f0dSDavid C Somayajulu #define PROTECTION_OVERRIDE_DEPTH_ELEMENTS 20
53311e25f0dSDavid C Somayajulu #define PROTECTION_OVERRIDE_DEPTH_DWORDS (PROTECTION_OVERRIDE_DEPTH_ELEMENTS * PROTECTION_OVERRIDE_ELEMENT_DWORDS)
53411e25f0dSDavid C Somayajulu
53511e25f0dSDavid C Somayajulu #define MCP_SPAD_TRACE_OFFSIZE_ADDR (MCP_REG_SCRATCH + OFFSETOF(struct static_init, sections[SPAD_SECTION_TRACE]))
53611e25f0dSDavid C Somayajulu
53711e25f0dSDavid C Somayajulu #define EMPTY_FW_VERSION_STR "???_???_???_???"
53811e25f0dSDavid C Somayajulu #define EMPTY_FW_IMAGE_STR "???????????????"
53911e25f0dSDavid C Somayajulu
54011e25f0dSDavid C Somayajulu /***************************** Constant Arrays *******************************/
54111e25f0dSDavid C Somayajulu
54211e25f0dSDavid C Somayajulu struct dbg_array {
54311e25f0dSDavid C Somayajulu const u32 *ptr;
54411e25f0dSDavid C Somayajulu u32 size_in_dwords;
54511e25f0dSDavid C Somayajulu };
54611e25f0dSDavid C Somayajulu
54711e25f0dSDavid C Somayajulu /* Debug arrays */
54811e25f0dSDavid C Somayajulu #ifdef USE_DBG_BIN_FILE
54911e25f0dSDavid C Somayajulu static struct dbg_array s_dbg_arrays[MAX_BIN_DBG_BUFFER_TYPE] = { { OSAL_NULL } };
55011e25f0dSDavid C Somayajulu #else
55111e25f0dSDavid C Somayajulu static struct dbg_array s_dbg_arrays[MAX_BIN_DBG_BUFFER_TYPE] = {
55211e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_MODE_TREE */
55311e25f0dSDavid C Somayajulu { (const u32 *)dbg_modes_tree_buf, OSAL_ARRAY_SIZE(dbg_modes_tree_buf)},
55411e25f0dSDavid C Somayajulu
55511e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_DUMP_REG */
55611e25f0dSDavid C Somayajulu { dump_reg, OSAL_ARRAY_SIZE(dump_reg) },
55711e25f0dSDavid C Somayajulu
55811e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_DUMP_MEM */
55911e25f0dSDavid C Somayajulu { dump_mem, OSAL_ARRAY_SIZE(dump_mem) },
56011e25f0dSDavid C Somayajulu
56111e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_IDLE_CHK_REGS */
56211e25f0dSDavid C Somayajulu { idle_chk_regs, OSAL_ARRAY_SIZE(idle_chk_regs) },
56311e25f0dSDavid C Somayajulu
56411e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_IDLE_CHK_IMMS */
56511e25f0dSDavid C Somayajulu { idle_chk_imms, OSAL_ARRAY_SIZE(idle_chk_imms) },
56611e25f0dSDavid C Somayajulu
56711e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_IDLE_CHK_RULES */
56811e25f0dSDavid C Somayajulu { idle_chk_rules, OSAL_ARRAY_SIZE(idle_chk_rules) },
56911e25f0dSDavid C Somayajulu
57011e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_IDLE_CHK_PARSING_DATA */
57111e25f0dSDavid C Somayajulu { OSAL_NULL, 0 },
57211e25f0dSDavid C Somayajulu
57311e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_ATTN_BLOCKS */
57411e25f0dSDavid C Somayajulu { attn_block, OSAL_ARRAY_SIZE(attn_block) },
57511e25f0dSDavid C Somayajulu
57611e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_ATTN_REGSS */
57711e25f0dSDavid C Somayajulu { attn_reg, OSAL_ARRAY_SIZE(attn_reg) },
57811e25f0dSDavid C Somayajulu
57911e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_ATTN_INDEXES */
58011e25f0dSDavid C Somayajulu { OSAL_NULL, 0 },
58111e25f0dSDavid C Somayajulu
58211e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_ATTN_NAME_OFFSETS */
58311e25f0dSDavid C Somayajulu { OSAL_NULL, 0 },
58411e25f0dSDavid C Somayajulu
58511e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_BUS_BLOCKS */
58611e25f0dSDavid C Somayajulu { dbg_bus_blocks, OSAL_ARRAY_SIZE(dbg_bus_blocks) },
58711e25f0dSDavid C Somayajulu
58811e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_BUS_LINES */
58911e25f0dSDavid C Somayajulu { dbg_bus_lines, OSAL_ARRAY_SIZE(dbg_bus_lines) },
59011e25f0dSDavid C Somayajulu
59111e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_BUS_BLOCKS_USER_DATA */
59211e25f0dSDavid C Somayajulu { OSAL_NULL, 0 },
59311e25f0dSDavid C Somayajulu
59411e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_BUS_LINE_NAME_OFFSETS */
59511e25f0dSDavid C Somayajulu { OSAL_NULL, 0 },
59611e25f0dSDavid C Somayajulu
59711e25f0dSDavid C Somayajulu /* BIN_BUF_DBG_PARSING_STRINGS */
59811e25f0dSDavid C Somayajulu { OSAL_NULL, 0 }
59911e25f0dSDavid C Somayajulu };
60011e25f0dSDavid C Somayajulu #endif
60111e25f0dSDavid C Somayajulu
60211e25f0dSDavid C Somayajulu /* Chip constant definitions array */
60311e25f0dSDavid C Somayajulu static struct chip_defs s_chip_defs[MAX_CHIP_IDS] = {
60411e25f0dSDavid C Somayajulu { "bb",
60511e25f0dSDavid C Somayajulu
60611e25f0dSDavid C Somayajulu /* ASIC */
60711e25f0dSDavid C Somayajulu { { MAX_NUM_PORTS_BB, MAX_NUM_PFS_BB, MAX_NUM_VFS_BB },
60811e25f0dSDavid C Somayajulu
60911e25f0dSDavid C Somayajulu /* EMUL_FULL */
61011e25f0dSDavid C Somayajulu { MAX_NUM_PORTS_BB, MAX_NUM_PFS_BB, MAX_NUM_VFS_BB },
61111e25f0dSDavid C Somayajulu
61211e25f0dSDavid C Somayajulu /* EMUL_REDUCED */
61311e25f0dSDavid C Somayajulu { MAX_NUM_PORTS_BB, MAX_NUM_PFS_BB, MAX_NUM_VFS_BB },
61411e25f0dSDavid C Somayajulu
61511e25f0dSDavid C Somayajulu /* FPGA */
61611e25f0dSDavid C Somayajulu { MAX_NUM_PORTS_BB, MAX_NUM_PFS_BB, MAX_NUM_VFS_BB } } },
61711e25f0dSDavid C Somayajulu
6189efd0ba7SDavid C Somayajulu { "ah",
61911e25f0dSDavid C Somayajulu
62011e25f0dSDavid C Somayajulu /* ASIC */
62111e25f0dSDavid C Somayajulu { { MAX_NUM_PORTS_K2, MAX_NUM_PFS_K2, MAX_NUM_VFS_K2 },
62211e25f0dSDavid C Somayajulu
62311e25f0dSDavid C Somayajulu /* EMUL_FULL */
62411e25f0dSDavid C Somayajulu { MAX_NUM_PORTS_K2, MAX_NUM_PFS_K2, MAX_NUM_VFS_K2 },
62511e25f0dSDavid C Somayajulu
62611e25f0dSDavid C Somayajulu /* EMUL_REDUCED */
62711e25f0dSDavid C Somayajulu { MAX_NUM_PORTS_K2, MAX_NUM_PFS_K2, MAX_NUM_VFS_K2 },
62811e25f0dSDavid C Somayajulu
62911e25f0dSDavid C Somayajulu /* FPGA */
6309efd0ba7SDavid C Somayajulu { MAX_NUM_PORTS_K2, 8, MAX_NUM_VFS_K2 } } },
6319efd0ba7SDavid C Somayajulu
6329efd0ba7SDavid C Somayajulu { "e5",
6339efd0ba7SDavid C Somayajulu
6349efd0ba7SDavid C Somayajulu /* ASIC */
6359efd0ba7SDavid C Somayajulu { { MAX_NUM_PORTS_E5, MAX_NUM_PFS_E5, MAX_NUM_VFS_E5 },
6369efd0ba7SDavid C Somayajulu
6379efd0ba7SDavid C Somayajulu /* EMUL_FULL */
6389efd0ba7SDavid C Somayajulu { MAX_NUM_PORTS_E5, MAX_NUM_PFS_E5, MAX_NUM_VFS_E5 },
6399efd0ba7SDavid C Somayajulu
6409efd0ba7SDavid C Somayajulu /* EMUL_REDUCED */
6419efd0ba7SDavid C Somayajulu { MAX_NUM_PORTS_E5, MAX_NUM_PFS_E5, MAX_NUM_VFS_E5 },
6429efd0ba7SDavid C Somayajulu
6439efd0ba7SDavid C Somayajulu /* FPGA */
6449efd0ba7SDavid C Somayajulu { MAX_NUM_PORTS_E5, 8, MAX_NUM_VFS_E5 } } }
64511e25f0dSDavid C Somayajulu };
64611e25f0dSDavid C Somayajulu
64711e25f0dSDavid C Somayajulu /* Storm constant definitions array */
64811e25f0dSDavid C Somayajulu static struct storm_defs s_storm_defs[] = {
64911e25f0dSDavid C Somayajulu /* Tstorm */
65011e25f0dSDavid C Somayajulu { 'T', BLOCK_TSEM,
6519efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT }, true,
65211e25f0dSDavid C Somayajulu TSEM_REG_FAST_MEMORY,
65311e25f0dSDavid C Somayajulu TSEM_REG_DBG_FRAME_MODE_BB_K2, TSEM_REG_SLOW_DBG_ACTIVE_BB_K2,
65411e25f0dSDavid C Somayajulu TSEM_REG_SLOW_DBG_MODE_BB_K2, TSEM_REG_DBG_MODE1_CFG_BB_K2,
65511e25f0dSDavid C Somayajulu TSEM_REG_SYNC_DBG_EMPTY, TSEM_REG_SLOW_DBG_EMPTY_BB_K2,
65611e25f0dSDavid C Somayajulu TCM_REG_CTX_RBC_ACCS,
65711e25f0dSDavid C Somayajulu 4, TCM_REG_AGG_CON_CTX,
65811e25f0dSDavid C Somayajulu 16, TCM_REG_SM_CON_CTX,
65911e25f0dSDavid C Somayajulu 2, TCM_REG_AGG_TASK_CTX,
66011e25f0dSDavid C Somayajulu 4, TCM_REG_SM_TASK_CTX },
66111e25f0dSDavid C Somayajulu
66211e25f0dSDavid C Somayajulu /* Mstorm */
66311e25f0dSDavid C Somayajulu { 'M', BLOCK_MSEM,
6649efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM }, false,
66511e25f0dSDavid C Somayajulu MSEM_REG_FAST_MEMORY,
66611e25f0dSDavid C Somayajulu MSEM_REG_DBG_FRAME_MODE_BB_K2, MSEM_REG_SLOW_DBG_ACTIVE_BB_K2,
66711e25f0dSDavid C Somayajulu MSEM_REG_SLOW_DBG_MODE_BB_K2, MSEM_REG_DBG_MODE1_CFG_BB_K2,
66811e25f0dSDavid C Somayajulu MSEM_REG_SYNC_DBG_EMPTY, MSEM_REG_SLOW_DBG_EMPTY_BB_K2,
66911e25f0dSDavid C Somayajulu MCM_REG_CTX_RBC_ACCS,
67011e25f0dSDavid C Somayajulu 1, MCM_REG_AGG_CON_CTX,
67111e25f0dSDavid C Somayajulu 10, MCM_REG_SM_CON_CTX,
67211e25f0dSDavid C Somayajulu 2, MCM_REG_AGG_TASK_CTX,
67311e25f0dSDavid C Somayajulu 7, MCM_REG_SM_TASK_CTX },
67411e25f0dSDavid C Somayajulu
67511e25f0dSDavid C Somayajulu /* Ustorm */
67611e25f0dSDavid C Somayajulu { 'U', BLOCK_USEM,
6779efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU }, false,
67811e25f0dSDavid C Somayajulu USEM_REG_FAST_MEMORY,
67911e25f0dSDavid C Somayajulu USEM_REG_DBG_FRAME_MODE_BB_K2, USEM_REG_SLOW_DBG_ACTIVE_BB_K2,
68011e25f0dSDavid C Somayajulu USEM_REG_SLOW_DBG_MODE_BB_K2, USEM_REG_DBG_MODE1_CFG_BB_K2,
68111e25f0dSDavid C Somayajulu USEM_REG_SYNC_DBG_EMPTY, USEM_REG_SLOW_DBG_EMPTY_BB_K2,
68211e25f0dSDavid C Somayajulu UCM_REG_CTX_RBC_ACCS,
68311e25f0dSDavid C Somayajulu 2, UCM_REG_AGG_CON_CTX,
68411e25f0dSDavid C Somayajulu 13, UCM_REG_SM_CON_CTX,
68511e25f0dSDavid C Somayajulu 3, UCM_REG_AGG_TASK_CTX,
68611e25f0dSDavid C Somayajulu 3, UCM_REG_SM_TASK_CTX },
68711e25f0dSDavid C Somayajulu
68811e25f0dSDavid C Somayajulu /* Xstorm */
68911e25f0dSDavid C Somayajulu { 'X', BLOCK_XSEM,
6909efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX }, false,
69111e25f0dSDavid C Somayajulu XSEM_REG_FAST_MEMORY,
69211e25f0dSDavid C Somayajulu XSEM_REG_DBG_FRAME_MODE_BB_K2, XSEM_REG_SLOW_DBG_ACTIVE_BB_K2,
69311e25f0dSDavid C Somayajulu XSEM_REG_SLOW_DBG_MODE_BB_K2, XSEM_REG_DBG_MODE1_CFG_BB_K2,
69411e25f0dSDavid C Somayajulu XSEM_REG_SYNC_DBG_EMPTY, XSEM_REG_SLOW_DBG_EMPTY_BB_K2,
69511e25f0dSDavid C Somayajulu XCM_REG_CTX_RBC_ACCS,
69611e25f0dSDavid C Somayajulu 9, XCM_REG_AGG_CON_CTX,
69711e25f0dSDavid C Somayajulu 15, XCM_REG_SM_CON_CTX,
69811e25f0dSDavid C Somayajulu 0, 0,
69911e25f0dSDavid C Somayajulu 0, 0 },
70011e25f0dSDavid C Somayajulu
70111e25f0dSDavid C Somayajulu /* Ystorm */
70211e25f0dSDavid C Somayajulu { 'Y', BLOCK_YSEM,
7039efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY, DBG_BUS_CLIENT_RBCY }, false,
70411e25f0dSDavid C Somayajulu YSEM_REG_FAST_MEMORY,
70511e25f0dSDavid C Somayajulu YSEM_REG_DBG_FRAME_MODE_BB_K2, YSEM_REG_SLOW_DBG_ACTIVE_BB_K2,
70611e25f0dSDavid C Somayajulu YSEM_REG_SLOW_DBG_MODE_BB_K2, YSEM_REG_DBG_MODE1_CFG_BB_K2,
70711e25f0dSDavid C Somayajulu YSEM_REG_SYNC_DBG_EMPTY, TSEM_REG_SLOW_DBG_EMPTY_BB_K2,
70811e25f0dSDavid C Somayajulu YCM_REG_CTX_RBC_ACCS,
70911e25f0dSDavid C Somayajulu 2, YCM_REG_AGG_CON_CTX,
71011e25f0dSDavid C Somayajulu 3, YCM_REG_SM_CON_CTX,
71111e25f0dSDavid C Somayajulu 2, YCM_REG_AGG_TASK_CTX,
71211e25f0dSDavid C Somayajulu 12, YCM_REG_SM_TASK_CTX },
71311e25f0dSDavid C Somayajulu
71411e25f0dSDavid C Somayajulu /* Pstorm */
71511e25f0dSDavid C Somayajulu { 'P', BLOCK_PSEM,
7169efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS }, true,
71711e25f0dSDavid C Somayajulu PSEM_REG_FAST_MEMORY,
71811e25f0dSDavid C Somayajulu PSEM_REG_DBG_FRAME_MODE_BB_K2, PSEM_REG_SLOW_DBG_ACTIVE_BB_K2,
71911e25f0dSDavid C Somayajulu PSEM_REG_SLOW_DBG_MODE_BB_K2, PSEM_REG_DBG_MODE1_CFG_BB_K2,
72011e25f0dSDavid C Somayajulu PSEM_REG_SYNC_DBG_EMPTY, PSEM_REG_SLOW_DBG_EMPTY_BB_K2,
72111e25f0dSDavid C Somayajulu PCM_REG_CTX_RBC_ACCS,
72211e25f0dSDavid C Somayajulu 0, 0,
72311e25f0dSDavid C Somayajulu 10, PCM_REG_SM_CON_CTX,
72411e25f0dSDavid C Somayajulu 0, 0,
72511e25f0dSDavid C Somayajulu 0, 0 }
72611e25f0dSDavid C Somayajulu };
72711e25f0dSDavid C Somayajulu
72811e25f0dSDavid C Somayajulu /* Block definitions array */
72911e25f0dSDavid C Somayajulu
73011e25f0dSDavid C Somayajulu static struct block_defs block_grc_defs = {
7319efd0ba7SDavid C Somayajulu "grc", { true, true, true }, false, 0,
7329efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCN, DBG_BUS_CLIENT_RBCN, DBG_BUS_CLIENT_RBCN },
73311e25f0dSDavid C Somayajulu GRC_REG_DBG_SELECT, GRC_REG_DBG_DWORD_ENABLE,
73411e25f0dSDavid C Somayajulu GRC_REG_DBG_SHIFT, GRC_REG_DBG_FORCE_VALID,
73511e25f0dSDavid C Somayajulu GRC_REG_DBG_FORCE_FRAME,
73611e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISC_PL_UA, 1 };
73711e25f0dSDavid C Somayajulu
73811e25f0dSDavid C Somayajulu static struct block_defs block_miscs_defs = {
7399efd0ba7SDavid C Somayajulu "miscs", { true, true, true }, false, 0,
7409efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
74111e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
74211e25f0dSDavid C Somayajulu false, false, MAX_DBG_RESET_REGS, 0 };
74311e25f0dSDavid C Somayajulu
74411e25f0dSDavid C Somayajulu static struct block_defs block_misc_defs = {
7459efd0ba7SDavid C Somayajulu "misc", { true, true, true }, false, 0,
7469efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
74711e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
74811e25f0dSDavid C Somayajulu false, false, MAX_DBG_RESET_REGS, 0 };
74911e25f0dSDavid C Somayajulu
75011e25f0dSDavid C Somayajulu static struct block_defs block_dbu_defs = {
7519efd0ba7SDavid C Somayajulu "dbu", { true, true, true }, false, 0,
7529efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
75311e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
75411e25f0dSDavid C Somayajulu false, false, MAX_DBG_RESET_REGS, 0 };
75511e25f0dSDavid C Somayajulu
75611e25f0dSDavid C Somayajulu static struct block_defs block_pglue_b_defs = {
7579efd0ba7SDavid C Somayajulu "pglue_b", { true, true, true }, false, 0,
7589efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCH, DBG_BUS_CLIENT_RBCH, DBG_BUS_CLIENT_RBCH },
75911e25f0dSDavid C Somayajulu PGLUE_B_REG_DBG_SELECT, PGLUE_B_REG_DBG_DWORD_ENABLE,
76011e25f0dSDavid C Somayajulu PGLUE_B_REG_DBG_SHIFT, PGLUE_B_REG_DBG_FORCE_VALID,
76111e25f0dSDavid C Somayajulu PGLUE_B_REG_DBG_FORCE_FRAME,
76211e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_HV, 1 };
76311e25f0dSDavid C Somayajulu
76411e25f0dSDavid C Somayajulu static struct block_defs block_cnig_defs = {
7659efd0ba7SDavid C Somayajulu "cnig", { true, true, true }, false, 0,
7669efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCW, DBG_BUS_CLIENT_RBCW },
76711e25f0dSDavid C Somayajulu CNIG_REG_DBG_SELECT_K2_E5, CNIG_REG_DBG_DWORD_ENABLE_K2_E5,
76811e25f0dSDavid C Somayajulu CNIG_REG_DBG_SHIFT_K2_E5, CNIG_REG_DBG_FORCE_VALID_K2_E5,
76911e25f0dSDavid C Somayajulu CNIG_REG_DBG_FORCE_FRAME_K2_E5,
77011e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_HV, 0 };
77111e25f0dSDavid C Somayajulu
77211e25f0dSDavid C Somayajulu static struct block_defs block_cpmu_defs = {
7739efd0ba7SDavid C Somayajulu "cpmu", { true, true, true }, false, 0,
7749efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
77511e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
77611e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_HV, 8 };
77711e25f0dSDavid C Somayajulu
77811e25f0dSDavid C Somayajulu static struct block_defs block_ncsi_defs = {
7799efd0ba7SDavid C Somayajulu "ncsi", { true, true, true }, false, 0,
7809efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ },
78111e25f0dSDavid C Somayajulu NCSI_REG_DBG_SELECT, NCSI_REG_DBG_DWORD_ENABLE,
78211e25f0dSDavid C Somayajulu NCSI_REG_DBG_SHIFT, NCSI_REG_DBG_FORCE_VALID,
78311e25f0dSDavid C Somayajulu NCSI_REG_DBG_FORCE_FRAME,
78411e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_HV, 5 };
78511e25f0dSDavid C Somayajulu
78611e25f0dSDavid C Somayajulu static struct block_defs block_opte_defs = {
7879efd0ba7SDavid C Somayajulu "opte", { true, true, false }, false, 0,
7889efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
78911e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
79011e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_HV, 4 };
79111e25f0dSDavid C Somayajulu
79211e25f0dSDavid C Somayajulu static struct block_defs block_bmb_defs = {
7939efd0ba7SDavid C Somayajulu "bmb", { true, true, true }, false, 0,
7949efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCB, DBG_BUS_CLIENT_RBCB },
79511e25f0dSDavid C Somayajulu BMB_REG_DBG_SELECT, BMB_REG_DBG_DWORD_ENABLE,
79611e25f0dSDavid C Somayajulu BMB_REG_DBG_SHIFT, BMB_REG_DBG_FORCE_VALID,
79711e25f0dSDavid C Somayajulu BMB_REG_DBG_FORCE_FRAME,
79811e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_UA, 7 };
79911e25f0dSDavid C Somayajulu
80011e25f0dSDavid C Somayajulu static struct block_defs block_pcie_defs = {
8019efd0ba7SDavid C Somayajulu "pcie", { true, true, true }, false, 0,
8029efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCH, DBG_BUS_CLIENT_RBCH },
80311e25f0dSDavid C Somayajulu PCIE_REG_DBG_COMMON_SELECT_K2_E5, PCIE_REG_DBG_COMMON_DWORD_ENABLE_K2_E5,
80411e25f0dSDavid C Somayajulu PCIE_REG_DBG_COMMON_SHIFT_K2_E5, PCIE_REG_DBG_COMMON_FORCE_VALID_K2_E5,
80511e25f0dSDavid C Somayajulu PCIE_REG_DBG_COMMON_FORCE_FRAME_K2_E5,
80611e25f0dSDavid C Somayajulu false, false, MAX_DBG_RESET_REGS, 0 };
80711e25f0dSDavid C Somayajulu
80811e25f0dSDavid C Somayajulu static struct block_defs block_mcp_defs = {
8099efd0ba7SDavid C Somayajulu "mcp", { true, true, true }, false, 0,
8109efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
81111e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
81211e25f0dSDavid C Somayajulu false, false, MAX_DBG_RESET_REGS, 0 };
81311e25f0dSDavid C Somayajulu
81411e25f0dSDavid C Somayajulu static struct block_defs block_mcp2_defs = {
8159efd0ba7SDavid C Somayajulu "mcp2", { true, true, true }, false, 0,
8169efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ },
81711e25f0dSDavid C Somayajulu MCP2_REG_DBG_SELECT, MCP2_REG_DBG_DWORD_ENABLE,
81811e25f0dSDavid C Somayajulu MCP2_REG_DBG_SHIFT, MCP2_REG_DBG_FORCE_VALID,
81911e25f0dSDavid C Somayajulu MCP2_REG_DBG_FORCE_FRAME,
82011e25f0dSDavid C Somayajulu false, false, MAX_DBG_RESET_REGS, 0 };
82111e25f0dSDavid C Somayajulu
82211e25f0dSDavid C Somayajulu static struct block_defs block_pswhst_defs = {
8239efd0ba7SDavid C Somayajulu "pswhst", { true, true, true }, false, 0,
8249efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP },
82511e25f0dSDavid C Somayajulu PSWHST_REG_DBG_SELECT, PSWHST_REG_DBG_DWORD_ENABLE,
82611e25f0dSDavid C Somayajulu PSWHST_REG_DBG_SHIFT, PSWHST_REG_DBG_FORCE_VALID,
82711e25f0dSDavid C Somayajulu PSWHST_REG_DBG_FORCE_FRAME,
82811e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISC_PL_HV, 0 };
82911e25f0dSDavid C Somayajulu
83011e25f0dSDavid C Somayajulu static struct block_defs block_pswhst2_defs = {
8319efd0ba7SDavid C Somayajulu "pswhst2", { true, true, true }, false, 0,
8329efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP },
83311e25f0dSDavid C Somayajulu PSWHST2_REG_DBG_SELECT, PSWHST2_REG_DBG_DWORD_ENABLE,
83411e25f0dSDavid C Somayajulu PSWHST2_REG_DBG_SHIFT, PSWHST2_REG_DBG_FORCE_VALID,
83511e25f0dSDavid C Somayajulu PSWHST2_REG_DBG_FORCE_FRAME,
83611e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISC_PL_HV, 0 };
83711e25f0dSDavid C Somayajulu
83811e25f0dSDavid C Somayajulu static struct block_defs block_pswrd_defs = {
8399efd0ba7SDavid C Somayajulu "pswrd", { true, true, true }, false, 0,
8409efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP },
84111e25f0dSDavid C Somayajulu PSWRD_REG_DBG_SELECT, PSWRD_REG_DBG_DWORD_ENABLE,
84211e25f0dSDavid C Somayajulu PSWRD_REG_DBG_SHIFT, PSWRD_REG_DBG_FORCE_VALID,
84311e25f0dSDavid C Somayajulu PSWRD_REG_DBG_FORCE_FRAME,
84411e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISC_PL_HV, 2 };
84511e25f0dSDavid C Somayajulu
84611e25f0dSDavid C Somayajulu static struct block_defs block_pswrd2_defs = {
8479efd0ba7SDavid C Somayajulu "pswrd2", { true, true, true }, false, 0,
8489efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP },
84911e25f0dSDavid C Somayajulu PSWRD2_REG_DBG_SELECT, PSWRD2_REG_DBG_DWORD_ENABLE,
85011e25f0dSDavid C Somayajulu PSWRD2_REG_DBG_SHIFT, PSWRD2_REG_DBG_FORCE_VALID,
85111e25f0dSDavid C Somayajulu PSWRD2_REG_DBG_FORCE_FRAME,
85211e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISC_PL_HV, 2 };
85311e25f0dSDavid C Somayajulu
85411e25f0dSDavid C Somayajulu static struct block_defs block_pswwr_defs = {
8559efd0ba7SDavid C Somayajulu "pswwr", { true, true, true }, false, 0,
8569efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP },
85711e25f0dSDavid C Somayajulu PSWWR_REG_DBG_SELECT, PSWWR_REG_DBG_DWORD_ENABLE,
85811e25f0dSDavid C Somayajulu PSWWR_REG_DBG_SHIFT, PSWWR_REG_DBG_FORCE_VALID,
85911e25f0dSDavid C Somayajulu PSWWR_REG_DBG_FORCE_FRAME,
86011e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISC_PL_HV, 3 };
86111e25f0dSDavid C Somayajulu
86211e25f0dSDavid C Somayajulu static struct block_defs block_pswwr2_defs = {
8639efd0ba7SDavid C Somayajulu "pswwr2", { true, true, true }, false, 0,
8649efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
86511e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
86611e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISC_PL_HV, 3 };
86711e25f0dSDavid C Somayajulu
86811e25f0dSDavid C Somayajulu static struct block_defs block_pswrq_defs = {
8699efd0ba7SDavid C Somayajulu "pswrq", { true, true, true }, false, 0,
8709efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP },
87111e25f0dSDavid C Somayajulu PSWRQ_REG_DBG_SELECT, PSWRQ_REG_DBG_DWORD_ENABLE,
87211e25f0dSDavid C Somayajulu PSWRQ_REG_DBG_SHIFT, PSWRQ_REG_DBG_FORCE_VALID,
87311e25f0dSDavid C Somayajulu PSWRQ_REG_DBG_FORCE_FRAME,
87411e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISC_PL_HV, 1 };
87511e25f0dSDavid C Somayajulu
87611e25f0dSDavid C Somayajulu static struct block_defs block_pswrq2_defs = {
8779efd0ba7SDavid C Somayajulu "pswrq2", { true, true, true }, false, 0,
8789efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP },
87911e25f0dSDavid C Somayajulu PSWRQ2_REG_DBG_SELECT, PSWRQ2_REG_DBG_DWORD_ENABLE,
88011e25f0dSDavid C Somayajulu PSWRQ2_REG_DBG_SHIFT, PSWRQ2_REG_DBG_FORCE_VALID,
88111e25f0dSDavid C Somayajulu PSWRQ2_REG_DBG_FORCE_FRAME,
88211e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISC_PL_HV, 1 };
88311e25f0dSDavid C Somayajulu
88411e25f0dSDavid C Somayajulu static struct block_defs block_pglcs_defs = {
8859efd0ba7SDavid C Somayajulu "pglcs", { true, true, true }, false, 0,
8869efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCH, DBG_BUS_CLIENT_RBCH },
88711e25f0dSDavid C Somayajulu PGLCS_REG_DBG_SELECT_K2_E5, PGLCS_REG_DBG_DWORD_ENABLE_K2_E5,
88811e25f0dSDavid C Somayajulu PGLCS_REG_DBG_SHIFT_K2_E5, PGLCS_REG_DBG_FORCE_VALID_K2_E5,
88911e25f0dSDavid C Somayajulu PGLCS_REG_DBG_FORCE_FRAME_K2_E5,
89011e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_HV, 2 };
89111e25f0dSDavid C Somayajulu
89211e25f0dSDavid C Somayajulu static struct block_defs block_ptu_defs ={
8939efd0ba7SDavid C Somayajulu "ptu", { true, true, true }, false, 0,
8949efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP },
89511e25f0dSDavid C Somayajulu PTU_REG_DBG_SELECT, PTU_REG_DBG_DWORD_ENABLE,
89611e25f0dSDavid C Somayajulu PTU_REG_DBG_SHIFT, PTU_REG_DBG_FORCE_VALID,
89711e25f0dSDavid C Somayajulu PTU_REG_DBG_FORCE_FRAME,
89811e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 20 };
89911e25f0dSDavid C Somayajulu
90011e25f0dSDavid C Somayajulu static struct block_defs block_dmae_defs = {
9019efd0ba7SDavid C Somayajulu "dmae", { true, true, true }, false, 0,
9029efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP },
90311e25f0dSDavid C Somayajulu DMAE_REG_DBG_SELECT, DMAE_REG_DBG_DWORD_ENABLE,
90411e25f0dSDavid C Somayajulu DMAE_REG_DBG_SHIFT, DMAE_REG_DBG_FORCE_VALID,
90511e25f0dSDavid C Somayajulu DMAE_REG_DBG_FORCE_FRAME,
90611e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 28 };
90711e25f0dSDavid C Somayajulu
90811e25f0dSDavid C Somayajulu static struct block_defs block_tcm_defs = {
9099efd0ba7SDavid C Somayajulu "tcm", { true, true, true }, true, DBG_TSTORM_ID,
9109efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT },
91111e25f0dSDavid C Somayajulu TCM_REG_DBG_SELECT, TCM_REG_DBG_DWORD_ENABLE,
91211e25f0dSDavid C Somayajulu TCM_REG_DBG_SHIFT, TCM_REG_DBG_FORCE_VALID,
91311e25f0dSDavid C Somayajulu TCM_REG_DBG_FORCE_FRAME,
91411e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 5 };
91511e25f0dSDavid C Somayajulu
91611e25f0dSDavid C Somayajulu static struct block_defs block_mcm_defs = {
9179efd0ba7SDavid C Somayajulu "mcm", { true, true, true }, true, DBG_MSTORM_ID,
9189efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM },
91911e25f0dSDavid C Somayajulu MCM_REG_DBG_SELECT, MCM_REG_DBG_DWORD_ENABLE,
92011e25f0dSDavid C Somayajulu MCM_REG_DBG_SHIFT, MCM_REG_DBG_FORCE_VALID,
92111e25f0dSDavid C Somayajulu MCM_REG_DBG_FORCE_FRAME,
92211e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 3 };
92311e25f0dSDavid C Somayajulu
92411e25f0dSDavid C Somayajulu static struct block_defs block_ucm_defs = {
9259efd0ba7SDavid C Somayajulu "ucm", { true, true, true }, true, DBG_USTORM_ID,
9269efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU },
92711e25f0dSDavid C Somayajulu UCM_REG_DBG_SELECT, UCM_REG_DBG_DWORD_ENABLE,
92811e25f0dSDavid C Somayajulu UCM_REG_DBG_SHIFT, UCM_REG_DBG_FORCE_VALID,
92911e25f0dSDavid C Somayajulu UCM_REG_DBG_FORCE_FRAME,
93011e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 8 };
93111e25f0dSDavid C Somayajulu
93211e25f0dSDavid C Somayajulu static struct block_defs block_xcm_defs = {
9339efd0ba7SDavid C Somayajulu "xcm", { true, true, true }, true, DBG_XSTORM_ID,
9349efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX },
93511e25f0dSDavid C Somayajulu XCM_REG_DBG_SELECT, XCM_REG_DBG_DWORD_ENABLE,
93611e25f0dSDavid C Somayajulu XCM_REG_DBG_SHIFT, XCM_REG_DBG_FORCE_VALID,
93711e25f0dSDavid C Somayajulu XCM_REG_DBG_FORCE_FRAME,
93811e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 19 };
93911e25f0dSDavid C Somayajulu
94011e25f0dSDavid C Somayajulu static struct block_defs block_ycm_defs = {
9419efd0ba7SDavid C Somayajulu "ycm", { true, true, true }, true, DBG_YSTORM_ID,
9429efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY, DBG_BUS_CLIENT_RBCY },
94311e25f0dSDavid C Somayajulu YCM_REG_DBG_SELECT, YCM_REG_DBG_DWORD_ENABLE,
94411e25f0dSDavid C Somayajulu YCM_REG_DBG_SHIFT, YCM_REG_DBG_FORCE_VALID,
94511e25f0dSDavid C Somayajulu YCM_REG_DBG_FORCE_FRAME,
94611e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 5 };
94711e25f0dSDavid C Somayajulu
94811e25f0dSDavid C Somayajulu static struct block_defs block_pcm_defs = {
9499efd0ba7SDavid C Somayajulu "pcm", { true, true, true }, true, DBG_PSTORM_ID,
9509efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS },
95111e25f0dSDavid C Somayajulu PCM_REG_DBG_SELECT, PCM_REG_DBG_DWORD_ENABLE,
95211e25f0dSDavid C Somayajulu PCM_REG_DBG_SHIFT, PCM_REG_DBG_FORCE_VALID,
95311e25f0dSDavid C Somayajulu PCM_REG_DBG_FORCE_FRAME,
95411e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 4 };
95511e25f0dSDavid C Somayajulu
95611e25f0dSDavid C Somayajulu static struct block_defs block_qm_defs = {
9579efd0ba7SDavid C Somayajulu "qm", { true, true, true }, false, 0,
9589efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCQ, DBG_BUS_CLIENT_RBCQ },
95911e25f0dSDavid C Somayajulu QM_REG_DBG_SELECT, QM_REG_DBG_DWORD_ENABLE,
96011e25f0dSDavid C Somayajulu QM_REG_DBG_SHIFT, QM_REG_DBG_FORCE_VALID,
96111e25f0dSDavid C Somayajulu QM_REG_DBG_FORCE_FRAME,
96211e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 16 };
96311e25f0dSDavid C Somayajulu
96411e25f0dSDavid C Somayajulu static struct block_defs block_tm_defs = {
9659efd0ba7SDavid C Somayajulu "tm", { true, true, true }, false, 0,
9669efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS },
96711e25f0dSDavid C Somayajulu TM_REG_DBG_SELECT, TM_REG_DBG_DWORD_ENABLE,
96811e25f0dSDavid C Somayajulu TM_REG_DBG_SHIFT, TM_REG_DBG_FORCE_VALID,
96911e25f0dSDavid C Somayajulu TM_REG_DBG_FORCE_FRAME,
97011e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 17 };
97111e25f0dSDavid C Somayajulu
97211e25f0dSDavid C Somayajulu static struct block_defs block_dorq_defs = {
9739efd0ba7SDavid C Somayajulu "dorq", { true, true, true }, false, 0,
9749efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY, DBG_BUS_CLIENT_RBCY },
97511e25f0dSDavid C Somayajulu DORQ_REG_DBG_SELECT, DORQ_REG_DBG_DWORD_ENABLE,
97611e25f0dSDavid C Somayajulu DORQ_REG_DBG_SHIFT, DORQ_REG_DBG_FORCE_VALID,
97711e25f0dSDavid C Somayajulu DORQ_REG_DBG_FORCE_FRAME,
97811e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 18 };
97911e25f0dSDavid C Somayajulu
98011e25f0dSDavid C Somayajulu static struct block_defs block_brb_defs = {
9819efd0ba7SDavid C Somayajulu "brb", { true, true, true }, false, 0,
9829efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCR },
98311e25f0dSDavid C Somayajulu BRB_REG_DBG_SELECT, BRB_REG_DBG_DWORD_ENABLE,
98411e25f0dSDavid C Somayajulu BRB_REG_DBG_SHIFT, BRB_REG_DBG_FORCE_VALID,
98511e25f0dSDavid C Somayajulu BRB_REG_DBG_FORCE_FRAME,
98611e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 0 };
98711e25f0dSDavid C Somayajulu
98811e25f0dSDavid C Somayajulu static struct block_defs block_src_defs = {
9899efd0ba7SDavid C Somayajulu "src", { true, true, true }, false, 0,
9909efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF },
99111e25f0dSDavid C Somayajulu SRC_REG_DBG_SELECT, SRC_REG_DBG_DWORD_ENABLE,
99211e25f0dSDavid C Somayajulu SRC_REG_DBG_SHIFT, SRC_REG_DBG_FORCE_VALID,
99311e25f0dSDavid C Somayajulu SRC_REG_DBG_FORCE_FRAME,
99411e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 2 };
99511e25f0dSDavid C Somayajulu
99611e25f0dSDavid C Somayajulu static struct block_defs block_prs_defs = {
9979efd0ba7SDavid C Somayajulu "prs", { true, true, true }, false, 0,
9989efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCR },
99911e25f0dSDavid C Somayajulu PRS_REG_DBG_SELECT, PRS_REG_DBG_DWORD_ENABLE,
100011e25f0dSDavid C Somayajulu PRS_REG_DBG_SHIFT, PRS_REG_DBG_FORCE_VALID,
100111e25f0dSDavid C Somayajulu PRS_REG_DBG_FORCE_FRAME,
100211e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 1 };
100311e25f0dSDavid C Somayajulu
100411e25f0dSDavid C Somayajulu static struct block_defs block_tsdm_defs = {
10059efd0ba7SDavid C Somayajulu "tsdm", { true, true, true }, true, DBG_TSTORM_ID,
10069efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT },
100711e25f0dSDavid C Somayajulu TSDM_REG_DBG_SELECT, TSDM_REG_DBG_DWORD_ENABLE,
100811e25f0dSDavid C Somayajulu TSDM_REG_DBG_SHIFT, TSDM_REG_DBG_FORCE_VALID,
100911e25f0dSDavid C Somayajulu TSDM_REG_DBG_FORCE_FRAME,
101011e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 3 };
101111e25f0dSDavid C Somayajulu
101211e25f0dSDavid C Somayajulu static struct block_defs block_msdm_defs = {
10139efd0ba7SDavid C Somayajulu "msdm", { true, true, true }, true, DBG_MSTORM_ID,
10149efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM },
101511e25f0dSDavid C Somayajulu MSDM_REG_DBG_SELECT, MSDM_REG_DBG_DWORD_ENABLE,
101611e25f0dSDavid C Somayajulu MSDM_REG_DBG_SHIFT, MSDM_REG_DBG_FORCE_VALID,
101711e25f0dSDavid C Somayajulu MSDM_REG_DBG_FORCE_FRAME,
101811e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 6 };
101911e25f0dSDavid C Somayajulu
102011e25f0dSDavid C Somayajulu static struct block_defs block_usdm_defs = {
10219efd0ba7SDavid C Somayajulu "usdm", { true, true, true }, true, DBG_USTORM_ID,
10229efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU },
102311e25f0dSDavid C Somayajulu USDM_REG_DBG_SELECT, USDM_REG_DBG_DWORD_ENABLE,
102411e25f0dSDavid C Somayajulu USDM_REG_DBG_SHIFT, USDM_REG_DBG_FORCE_VALID,
102511e25f0dSDavid C Somayajulu USDM_REG_DBG_FORCE_FRAME,
102611e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 7
102711e25f0dSDavid C Somayajulu };
102811e25f0dSDavid C Somayajulu static struct block_defs block_xsdm_defs = {
10299efd0ba7SDavid C Somayajulu "xsdm", { true, true, true }, true, DBG_XSTORM_ID,
10309efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX },
103111e25f0dSDavid C Somayajulu XSDM_REG_DBG_SELECT, XSDM_REG_DBG_DWORD_ENABLE,
103211e25f0dSDavid C Somayajulu XSDM_REG_DBG_SHIFT, XSDM_REG_DBG_FORCE_VALID,
103311e25f0dSDavid C Somayajulu XSDM_REG_DBG_FORCE_FRAME,
103411e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 20 };
103511e25f0dSDavid C Somayajulu
103611e25f0dSDavid C Somayajulu static struct block_defs block_ysdm_defs = {
10379efd0ba7SDavid C Somayajulu "ysdm", { true, true, true }, true, DBG_YSTORM_ID,
10389efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY, DBG_BUS_CLIENT_RBCY },
103911e25f0dSDavid C Somayajulu YSDM_REG_DBG_SELECT, YSDM_REG_DBG_DWORD_ENABLE,
104011e25f0dSDavid C Somayajulu YSDM_REG_DBG_SHIFT, YSDM_REG_DBG_FORCE_VALID,
104111e25f0dSDavid C Somayajulu YSDM_REG_DBG_FORCE_FRAME,
104211e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 8 };
104311e25f0dSDavid C Somayajulu
104411e25f0dSDavid C Somayajulu static struct block_defs block_psdm_defs = {
10459efd0ba7SDavid C Somayajulu "psdm", { true, true, true }, true, DBG_PSTORM_ID,
10469efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS },
104711e25f0dSDavid C Somayajulu PSDM_REG_DBG_SELECT, PSDM_REG_DBG_DWORD_ENABLE,
104811e25f0dSDavid C Somayajulu PSDM_REG_DBG_SHIFT, PSDM_REG_DBG_FORCE_VALID,
104911e25f0dSDavid C Somayajulu PSDM_REG_DBG_FORCE_FRAME,
105011e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 7 };
105111e25f0dSDavid C Somayajulu
105211e25f0dSDavid C Somayajulu static struct block_defs block_tsem_defs = {
10539efd0ba7SDavid C Somayajulu "tsem", { true, true, true }, true, DBG_TSTORM_ID,
10549efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT },
105511e25f0dSDavid C Somayajulu TSEM_REG_DBG_SELECT, TSEM_REG_DBG_DWORD_ENABLE,
105611e25f0dSDavid C Somayajulu TSEM_REG_DBG_SHIFT, TSEM_REG_DBG_FORCE_VALID,
105711e25f0dSDavid C Somayajulu TSEM_REG_DBG_FORCE_FRAME,
105811e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 4 };
105911e25f0dSDavid C Somayajulu
106011e25f0dSDavid C Somayajulu static struct block_defs block_msem_defs = {
10619efd0ba7SDavid C Somayajulu "msem", { true, true, true }, true, DBG_MSTORM_ID,
10629efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM },
106311e25f0dSDavid C Somayajulu MSEM_REG_DBG_SELECT, MSEM_REG_DBG_DWORD_ENABLE,
106411e25f0dSDavid C Somayajulu MSEM_REG_DBG_SHIFT, MSEM_REG_DBG_FORCE_VALID,
106511e25f0dSDavid C Somayajulu MSEM_REG_DBG_FORCE_FRAME,
106611e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 9 };
106711e25f0dSDavid C Somayajulu
106811e25f0dSDavid C Somayajulu static struct block_defs block_usem_defs = {
10699efd0ba7SDavid C Somayajulu "usem", { true, true, true }, true, DBG_USTORM_ID,
10709efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU },
107111e25f0dSDavid C Somayajulu USEM_REG_DBG_SELECT, USEM_REG_DBG_DWORD_ENABLE,
107211e25f0dSDavid C Somayajulu USEM_REG_DBG_SHIFT, USEM_REG_DBG_FORCE_VALID,
107311e25f0dSDavid C Somayajulu USEM_REG_DBG_FORCE_FRAME,
107411e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 9 };
107511e25f0dSDavid C Somayajulu
107611e25f0dSDavid C Somayajulu static struct block_defs block_xsem_defs = {
10779efd0ba7SDavid C Somayajulu "xsem", { true, true, true }, true, DBG_XSTORM_ID,
10789efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX },
107911e25f0dSDavid C Somayajulu XSEM_REG_DBG_SELECT, XSEM_REG_DBG_DWORD_ENABLE,
108011e25f0dSDavid C Somayajulu XSEM_REG_DBG_SHIFT, XSEM_REG_DBG_FORCE_VALID,
108111e25f0dSDavid C Somayajulu XSEM_REG_DBG_FORCE_FRAME,
108211e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 21 };
108311e25f0dSDavid C Somayajulu
108411e25f0dSDavid C Somayajulu static struct block_defs block_ysem_defs = {
10859efd0ba7SDavid C Somayajulu "ysem", { true, true, true }, true, DBG_YSTORM_ID,
10869efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY, DBG_BUS_CLIENT_RBCY },
108711e25f0dSDavid C Somayajulu YSEM_REG_DBG_SELECT, YSEM_REG_DBG_DWORD_ENABLE,
108811e25f0dSDavid C Somayajulu YSEM_REG_DBG_SHIFT, YSEM_REG_DBG_FORCE_VALID,
108911e25f0dSDavid C Somayajulu YSEM_REG_DBG_FORCE_FRAME,
109011e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 11 };
109111e25f0dSDavid C Somayajulu
109211e25f0dSDavid C Somayajulu static struct block_defs block_psem_defs = {
10939efd0ba7SDavid C Somayajulu "psem", { true, true, true }, true, DBG_PSTORM_ID,
10949efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS },
109511e25f0dSDavid C Somayajulu PSEM_REG_DBG_SELECT, PSEM_REG_DBG_DWORD_ENABLE,
109611e25f0dSDavid C Somayajulu PSEM_REG_DBG_SHIFT, PSEM_REG_DBG_FORCE_VALID,
109711e25f0dSDavid C Somayajulu PSEM_REG_DBG_FORCE_FRAME,
109811e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 10 };
109911e25f0dSDavid C Somayajulu
110011e25f0dSDavid C Somayajulu static struct block_defs block_rss_defs = {
11019efd0ba7SDavid C Somayajulu "rss", { true, true, true }, false, 0,
11029efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT },
110311e25f0dSDavid C Somayajulu RSS_REG_DBG_SELECT, RSS_REG_DBG_DWORD_ENABLE,
110411e25f0dSDavid C Somayajulu RSS_REG_DBG_SHIFT, RSS_REG_DBG_FORCE_VALID,
110511e25f0dSDavid C Somayajulu RSS_REG_DBG_FORCE_FRAME,
110611e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 18 };
110711e25f0dSDavid C Somayajulu
110811e25f0dSDavid C Somayajulu static struct block_defs block_tmld_defs = {
11099efd0ba7SDavid C Somayajulu "tmld", { true, true, true }, false, 0,
11109efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM },
111111e25f0dSDavid C Somayajulu TMLD_REG_DBG_SELECT, TMLD_REG_DBG_DWORD_ENABLE,
111211e25f0dSDavid C Somayajulu TMLD_REG_DBG_SHIFT, TMLD_REG_DBG_FORCE_VALID,
111311e25f0dSDavid C Somayajulu TMLD_REG_DBG_FORCE_FRAME,
111411e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 13 };
111511e25f0dSDavid C Somayajulu
111611e25f0dSDavid C Somayajulu static struct block_defs block_muld_defs = {
11179efd0ba7SDavid C Somayajulu "muld", { true, true, true }, false, 0,
11189efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU },
111911e25f0dSDavid C Somayajulu MULD_REG_DBG_SELECT, MULD_REG_DBG_DWORD_ENABLE,
112011e25f0dSDavid C Somayajulu MULD_REG_DBG_SHIFT, MULD_REG_DBG_FORCE_VALID,
112111e25f0dSDavid C Somayajulu MULD_REG_DBG_FORCE_FRAME,
112211e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 14 };
112311e25f0dSDavid C Somayajulu
112411e25f0dSDavid C Somayajulu static struct block_defs block_yuld_defs = {
11259efd0ba7SDavid C Somayajulu "yuld", { true, true, false }, false, 0,
11269efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU, MAX_DBG_BUS_CLIENTS },
112711e25f0dSDavid C Somayajulu YULD_REG_DBG_SELECT_BB_K2, YULD_REG_DBG_DWORD_ENABLE_BB_K2,
112811e25f0dSDavid C Somayajulu YULD_REG_DBG_SHIFT_BB_K2, YULD_REG_DBG_FORCE_VALID_BB_K2,
112911e25f0dSDavid C Somayajulu YULD_REG_DBG_FORCE_FRAME_BB_K2,
113011e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 15 };
113111e25f0dSDavid C Somayajulu
113211e25f0dSDavid C Somayajulu static struct block_defs block_xyld_defs = {
11339efd0ba7SDavid C Somayajulu "xyld", { true, true, true }, false, 0,
11349efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX },
113511e25f0dSDavid C Somayajulu XYLD_REG_DBG_SELECT, XYLD_REG_DBG_DWORD_ENABLE,
113611e25f0dSDavid C Somayajulu XYLD_REG_DBG_SHIFT, XYLD_REG_DBG_FORCE_VALID,
113711e25f0dSDavid C Somayajulu XYLD_REG_DBG_FORCE_FRAME,
113811e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 12 };
113911e25f0dSDavid C Somayajulu
1140217ec208SDavid C Somayajulu static struct block_defs block_ptld_defs = {
1141217ec208SDavid C Somayajulu "ptld", { false, false, true }, false, 0,
1142217ec208SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCT },
1143217ec208SDavid C Somayajulu PTLD_REG_DBG_SELECT_E5, PTLD_REG_DBG_DWORD_ENABLE_E5,
1144217ec208SDavid C Somayajulu PTLD_REG_DBG_SHIFT_E5, PTLD_REG_DBG_FORCE_VALID_E5,
1145217ec208SDavid C Somayajulu PTLD_REG_DBG_FORCE_FRAME_E5,
1146217ec208SDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 28 };
1147217ec208SDavid C Somayajulu
1148217ec208SDavid C Somayajulu static struct block_defs block_ypld_defs = {
1149217ec208SDavid C Somayajulu "ypld", { false, false, true }, false, 0,
1150217ec208SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCS },
1151217ec208SDavid C Somayajulu YPLD_REG_DBG_SELECT_E5, YPLD_REG_DBG_DWORD_ENABLE_E5,
1152217ec208SDavid C Somayajulu YPLD_REG_DBG_SHIFT_E5, YPLD_REG_DBG_FORCE_VALID_E5,
1153217ec208SDavid C Somayajulu YPLD_REG_DBG_FORCE_FRAME_E5,
1154217ec208SDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 27 };
1155217ec208SDavid C Somayajulu
115611e25f0dSDavid C Somayajulu static struct block_defs block_prm_defs = {
11579efd0ba7SDavid C Somayajulu "prm", { true, true, true }, false, 0,
11589efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM },
115911e25f0dSDavid C Somayajulu PRM_REG_DBG_SELECT, PRM_REG_DBG_DWORD_ENABLE,
116011e25f0dSDavid C Somayajulu PRM_REG_DBG_SHIFT, PRM_REG_DBG_FORCE_VALID,
116111e25f0dSDavid C Somayajulu PRM_REG_DBG_FORCE_FRAME,
116211e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 21 };
116311e25f0dSDavid C Somayajulu
116411e25f0dSDavid C Somayajulu static struct block_defs block_pbf_pb1_defs = {
11659efd0ba7SDavid C Somayajulu "pbf_pb1", { true, true, true }, false, 0,
11669efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCV, DBG_BUS_CLIENT_RBCV },
116711e25f0dSDavid C Somayajulu PBF_PB1_REG_DBG_SELECT, PBF_PB1_REG_DBG_DWORD_ENABLE,
116811e25f0dSDavid C Somayajulu PBF_PB1_REG_DBG_SHIFT, PBF_PB1_REG_DBG_FORCE_VALID,
116911e25f0dSDavid C Somayajulu PBF_PB1_REG_DBG_FORCE_FRAME,
117011e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 11 };
117111e25f0dSDavid C Somayajulu
117211e25f0dSDavid C Somayajulu static struct block_defs block_pbf_pb2_defs = {
11739efd0ba7SDavid C Somayajulu "pbf_pb2", { true, true, true }, false, 0,
11749efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCV, DBG_BUS_CLIENT_RBCV },
117511e25f0dSDavid C Somayajulu PBF_PB2_REG_DBG_SELECT, PBF_PB2_REG_DBG_DWORD_ENABLE,
117611e25f0dSDavid C Somayajulu PBF_PB2_REG_DBG_SHIFT, PBF_PB2_REG_DBG_FORCE_VALID,
117711e25f0dSDavid C Somayajulu PBF_PB2_REG_DBG_FORCE_FRAME,
117811e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 12 };
117911e25f0dSDavid C Somayajulu
118011e25f0dSDavid C Somayajulu static struct block_defs block_rpb_defs = {
11819efd0ba7SDavid C Somayajulu "rpb", { true, true, true }, false, 0,
11829efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM },
118311e25f0dSDavid C Somayajulu RPB_REG_DBG_SELECT, RPB_REG_DBG_DWORD_ENABLE,
118411e25f0dSDavid C Somayajulu RPB_REG_DBG_SHIFT, RPB_REG_DBG_FORCE_VALID,
118511e25f0dSDavid C Somayajulu RPB_REG_DBG_FORCE_FRAME,
118611e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 13 };
118711e25f0dSDavid C Somayajulu
118811e25f0dSDavid C Somayajulu static struct block_defs block_btb_defs = {
11899efd0ba7SDavid C Somayajulu "btb", { true, true, true }, false, 0,
11909efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCV, DBG_BUS_CLIENT_RBCV },
119111e25f0dSDavid C Somayajulu BTB_REG_DBG_SELECT, BTB_REG_DBG_DWORD_ENABLE,
119211e25f0dSDavid C Somayajulu BTB_REG_DBG_SHIFT, BTB_REG_DBG_FORCE_VALID,
119311e25f0dSDavid C Somayajulu BTB_REG_DBG_FORCE_FRAME,
119411e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 10 };
119511e25f0dSDavid C Somayajulu
119611e25f0dSDavid C Somayajulu static struct block_defs block_pbf_defs = {
11979efd0ba7SDavid C Somayajulu "pbf", { true, true, true }, false, 0,
11989efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCV, DBG_BUS_CLIENT_RBCV },
119911e25f0dSDavid C Somayajulu PBF_REG_DBG_SELECT, PBF_REG_DBG_DWORD_ENABLE,
120011e25f0dSDavid C Somayajulu PBF_REG_DBG_SHIFT, PBF_REG_DBG_FORCE_VALID,
120111e25f0dSDavid C Somayajulu PBF_REG_DBG_FORCE_FRAME,
120211e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 15 };
120311e25f0dSDavid C Somayajulu
120411e25f0dSDavid C Somayajulu static struct block_defs block_rdif_defs = {
12059efd0ba7SDavid C Somayajulu "rdif", { true, true, true }, false, 0,
12069efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM },
120711e25f0dSDavid C Somayajulu RDIF_REG_DBG_SELECT, RDIF_REG_DBG_DWORD_ENABLE,
120811e25f0dSDavid C Somayajulu RDIF_REG_DBG_SHIFT, RDIF_REG_DBG_FORCE_VALID,
120911e25f0dSDavid C Somayajulu RDIF_REG_DBG_FORCE_FRAME,
121011e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 16 };
121111e25f0dSDavid C Somayajulu
121211e25f0dSDavid C Somayajulu static struct block_defs block_tdif_defs = {
12139efd0ba7SDavid C Somayajulu "tdif", { true, true, true }, false, 0,
12149efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS },
121511e25f0dSDavid C Somayajulu TDIF_REG_DBG_SELECT, TDIF_REG_DBG_DWORD_ENABLE,
121611e25f0dSDavid C Somayajulu TDIF_REG_DBG_SHIFT, TDIF_REG_DBG_FORCE_VALID,
121711e25f0dSDavid C Somayajulu TDIF_REG_DBG_FORCE_FRAME,
121811e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 17 };
121911e25f0dSDavid C Somayajulu
122011e25f0dSDavid C Somayajulu static struct block_defs block_cdu_defs = {
12219efd0ba7SDavid C Somayajulu "cdu", { true, true, true }, false, 0,
12229efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF },
122311e25f0dSDavid C Somayajulu CDU_REG_DBG_SELECT, CDU_REG_DBG_DWORD_ENABLE,
122411e25f0dSDavid C Somayajulu CDU_REG_DBG_SHIFT, CDU_REG_DBG_FORCE_VALID,
122511e25f0dSDavid C Somayajulu CDU_REG_DBG_FORCE_FRAME,
122611e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 23 };
122711e25f0dSDavid C Somayajulu
122811e25f0dSDavid C Somayajulu static struct block_defs block_ccfc_defs = {
12299efd0ba7SDavid C Somayajulu "ccfc", { true, true, true }, false, 0,
12309efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF },
123111e25f0dSDavid C Somayajulu CCFC_REG_DBG_SELECT, CCFC_REG_DBG_DWORD_ENABLE,
123211e25f0dSDavid C Somayajulu CCFC_REG_DBG_SHIFT, CCFC_REG_DBG_FORCE_VALID,
123311e25f0dSDavid C Somayajulu CCFC_REG_DBG_FORCE_FRAME,
123411e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 24 };
123511e25f0dSDavid C Somayajulu
123611e25f0dSDavid C Somayajulu static struct block_defs block_tcfc_defs = {
12379efd0ba7SDavid C Somayajulu "tcfc", { true, true, true }, false, 0,
12389efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF },
123911e25f0dSDavid C Somayajulu TCFC_REG_DBG_SELECT, TCFC_REG_DBG_DWORD_ENABLE,
124011e25f0dSDavid C Somayajulu TCFC_REG_DBG_SHIFT, TCFC_REG_DBG_FORCE_VALID,
124111e25f0dSDavid C Somayajulu TCFC_REG_DBG_FORCE_FRAME,
124211e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 25 };
124311e25f0dSDavid C Somayajulu
124411e25f0dSDavid C Somayajulu static struct block_defs block_igu_defs = {
12459efd0ba7SDavid C Somayajulu "igu", { true, true, true }, false, 0,
12469efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP },
124711e25f0dSDavid C Somayajulu IGU_REG_DBG_SELECT, IGU_REG_DBG_DWORD_ENABLE,
124811e25f0dSDavid C Somayajulu IGU_REG_DBG_SHIFT, IGU_REG_DBG_FORCE_VALID,
124911e25f0dSDavid C Somayajulu IGU_REG_DBG_FORCE_FRAME,
125011e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 27 };
125111e25f0dSDavid C Somayajulu
125211e25f0dSDavid C Somayajulu static struct block_defs block_cau_defs = {
12539efd0ba7SDavid C Somayajulu "cau", { true, true, true }, false, 0,
12549efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP },
125511e25f0dSDavid C Somayajulu CAU_REG_DBG_SELECT, CAU_REG_DBG_DWORD_ENABLE,
125611e25f0dSDavid C Somayajulu CAU_REG_DBG_SHIFT, CAU_REG_DBG_FORCE_VALID,
125711e25f0dSDavid C Somayajulu CAU_REG_DBG_FORCE_FRAME,
125811e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 19 };
125911e25f0dSDavid C Somayajulu
1260217ec208SDavid C Somayajulu /* TODO: add debug bus parameters when E5 RGFS RF is added */
1261217ec208SDavid C Somayajulu static struct block_defs block_rgfs_defs = {
1262217ec208SDavid C Somayajulu "rgfs", { false, false, true }, false, 0,
1263217ec208SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
1264217ec208SDavid C Somayajulu 0, 0, 0, 0, 0,
1265217ec208SDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 29 };
1266217ec208SDavid C Somayajulu
1267217ec208SDavid C Somayajulu static struct block_defs block_rgsrc_defs = {
1268217ec208SDavid C Somayajulu "rgsrc", { false, false, true }, false, 0,
1269217ec208SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCH },
1270217ec208SDavid C Somayajulu RGSRC_REG_DBG_SELECT_E5, RGSRC_REG_DBG_DWORD_ENABLE_E5,
1271217ec208SDavid C Somayajulu RGSRC_REG_DBG_SHIFT_E5, RGSRC_REG_DBG_FORCE_VALID_E5,
1272217ec208SDavid C Somayajulu RGSRC_REG_DBG_FORCE_FRAME_E5,
1273217ec208SDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 30 };
1274217ec208SDavid C Somayajulu
1275217ec208SDavid C Somayajulu /* TODO: add debug bus parameters when E5 TGFS RF is added */
1276217ec208SDavid C Somayajulu static struct block_defs block_tgfs_defs = {
1277217ec208SDavid C Somayajulu "tgfs", { false, false, true }, false, 0,
1278217ec208SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
1279217ec208SDavid C Somayajulu 0, 0, 0, 0, 0,
1280217ec208SDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 30 };
1281217ec208SDavid C Somayajulu
1282217ec208SDavid C Somayajulu static struct block_defs block_tgsrc_defs = {
1283217ec208SDavid C Somayajulu "tgsrc", { false, false, true }, false, 0,
1284217ec208SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCV },
1285217ec208SDavid C Somayajulu TGSRC_REG_DBG_SELECT_E5, TGSRC_REG_DBG_DWORD_ENABLE_E5,
1286217ec208SDavid C Somayajulu TGSRC_REG_DBG_SHIFT_E5, TGSRC_REG_DBG_FORCE_VALID_E5,
1287217ec208SDavid C Somayajulu TGSRC_REG_DBG_FORCE_FRAME_E5,
1288217ec208SDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 31 };
1289217ec208SDavid C Somayajulu
129011e25f0dSDavid C Somayajulu static struct block_defs block_umac_defs = {
12919efd0ba7SDavid C Somayajulu "umac", { true, true, true }, false, 0,
12929efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ },
129311e25f0dSDavid C Somayajulu UMAC_REG_DBG_SELECT_K2_E5, UMAC_REG_DBG_DWORD_ENABLE_K2_E5,
129411e25f0dSDavid C Somayajulu UMAC_REG_DBG_SHIFT_K2_E5, UMAC_REG_DBG_FORCE_VALID_K2_E5,
129511e25f0dSDavid C Somayajulu UMAC_REG_DBG_FORCE_FRAME_K2_E5,
129611e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_HV, 6 };
129711e25f0dSDavid C Somayajulu
129811e25f0dSDavid C Somayajulu static struct block_defs block_xmac_defs = {
12999efd0ba7SDavid C Somayajulu "xmac", { true, false, false }, false, 0,
13009efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
130111e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
130211e25f0dSDavid C Somayajulu false, false, MAX_DBG_RESET_REGS, 0 };
130311e25f0dSDavid C Somayajulu
130411e25f0dSDavid C Somayajulu static struct block_defs block_dbg_defs = {
13059efd0ba7SDavid C Somayajulu "dbg", { true, true, true }, false, 0,
13069efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
130711e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
130811e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VAUX, 3 };
130911e25f0dSDavid C Somayajulu
131011e25f0dSDavid C Somayajulu static struct block_defs block_nig_defs = {
13119efd0ba7SDavid C Somayajulu "nig", { true, true, true }, false, 0,
13129efd0ba7SDavid C Somayajulu { DBG_BUS_CLIENT_RBCN, DBG_BUS_CLIENT_RBCN, DBG_BUS_CLIENT_RBCN },
131311e25f0dSDavid C Somayajulu NIG_REG_DBG_SELECT, NIG_REG_DBG_DWORD_ENABLE,
131411e25f0dSDavid C Somayajulu NIG_REG_DBG_SHIFT, NIG_REG_DBG_FORCE_VALID,
131511e25f0dSDavid C Somayajulu NIG_REG_DBG_FORCE_FRAME,
131611e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VAUX, 0 };
131711e25f0dSDavid C Somayajulu
131811e25f0dSDavid C Somayajulu static struct block_defs block_wol_defs = {
13199efd0ba7SDavid C Somayajulu "wol", { false, true, true }, false, 0,
13209efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ },
132111e25f0dSDavid C Somayajulu WOL_REG_DBG_SELECT_K2_E5, WOL_REG_DBG_DWORD_ENABLE_K2_E5,
132211e25f0dSDavid C Somayajulu WOL_REG_DBG_SHIFT_K2_E5, WOL_REG_DBG_FORCE_VALID_K2_E5,
132311e25f0dSDavid C Somayajulu WOL_REG_DBG_FORCE_FRAME_K2_E5,
132411e25f0dSDavid C Somayajulu true, true, DBG_RESET_REG_MISC_PL_PDA_VAUX, 7 };
132511e25f0dSDavid C Somayajulu
132611e25f0dSDavid C Somayajulu static struct block_defs block_bmbn_defs = {
13279efd0ba7SDavid C Somayajulu "bmbn", { false, true, true }, false, 0,
13289efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCB, DBG_BUS_CLIENT_RBCB },
132911e25f0dSDavid C Somayajulu BMBN_REG_DBG_SELECT_K2_E5, BMBN_REG_DBG_DWORD_ENABLE_K2_E5,
133011e25f0dSDavid C Somayajulu BMBN_REG_DBG_SHIFT_K2_E5, BMBN_REG_DBG_FORCE_VALID_K2_E5,
133111e25f0dSDavid C Somayajulu BMBN_REG_DBG_FORCE_FRAME_K2_E5,
133211e25f0dSDavid C Somayajulu false, false, MAX_DBG_RESET_REGS, 0 };
133311e25f0dSDavid C Somayajulu
133411e25f0dSDavid C Somayajulu static struct block_defs block_ipc_defs = {
13359efd0ba7SDavid C Somayajulu "ipc", { true, true, true }, false, 0,
13369efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
133711e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
133811e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_UA, 8 };
133911e25f0dSDavid C Somayajulu
134011e25f0dSDavid C Somayajulu static struct block_defs block_nwm_defs = {
13419efd0ba7SDavid C Somayajulu "nwm", { false, true, true }, false, 0,
13429efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCW, DBG_BUS_CLIENT_RBCW },
134311e25f0dSDavid C Somayajulu NWM_REG_DBG_SELECT_K2_E5, NWM_REG_DBG_DWORD_ENABLE_K2_E5,
134411e25f0dSDavid C Somayajulu NWM_REG_DBG_SHIFT_K2_E5, NWM_REG_DBG_FORCE_VALID_K2_E5,
134511e25f0dSDavid C Somayajulu NWM_REG_DBG_FORCE_FRAME_K2_E5,
134611e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_HV_2, 0 };
134711e25f0dSDavid C Somayajulu
134811e25f0dSDavid C Somayajulu static struct block_defs block_nws_defs = {
13499efd0ba7SDavid C Somayajulu "nws", { false, true, true }, false, 0,
13509efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCW, DBG_BUS_CLIENT_RBCW },
135111e25f0dSDavid C Somayajulu NWS_REG_DBG_SELECT_K2_E5, NWS_REG_DBG_DWORD_ENABLE_K2_E5,
135211e25f0dSDavid C Somayajulu NWS_REG_DBG_SHIFT_K2_E5, NWS_REG_DBG_FORCE_VALID_K2_E5,
135311e25f0dSDavid C Somayajulu NWS_REG_DBG_FORCE_FRAME_K2_E5,
135411e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_HV, 12 };
135511e25f0dSDavid C Somayajulu
135611e25f0dSDavid C Somayajulu static struct block_defs block_ms_defs = {
13579efd0ba7SDavid C Somayajulu "ms", { false, true, true }, false, 0,
13589efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ },
135911e25f0dSDavid C Somayajulu MS_REG_DBG_SELECT_K2_E5, MS_REG_DBG_DWORD_ENABLE_K2_E5,
136011e25f0dSDavid C Somayajulu MS_REG_DBG_SHIFT_K2_E5, MS_REG_DBG_FORCE_VALID_K2_E5,
136111e25f0dSDavid C Somayajulu MS_REG_DBG_FORCE_FRAME_K2_E5,
136211e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_HV, 13 };
136311e25f0dSDavid C Somayajulu
136411e25f0dSDavid C Somayajulu static struct block_defs block_phy_pcie_defs = {
13659efd0ba7SDavid C Somayajulu "phy_pcie", { false, true, true }, false, 0,
13669efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCH, DBG_BUS_CLIENT_RBCH },
136711e25f0dSDavid C Somayajulu PCIE_REG_DBG_COMMON_SELECT_K2_E5, PCIE_REG_DBG_COMMON_DWORD_ENABLE_K2_E5,
136811e25f0dSDavid C Somayajulu PCIE_REG_DBG_COMMON_SHIFT_K2_E5, PCIE_REG_DBG_COMMON_FORCE_VALID_K2_E5,
136911e25f0dSDavid C Somayajulu PCIE_REG_DBG_COMMON_FORCE_FRAME_K2_E5,
137011e25f0dSDavid C Somayajulu false, false, MAX_DBG_RESET_REGS, 0 };
137111e25f0dSDavid C Somayajulu
137211e25f0dSDavid C Somayajulu static struct block_defs block_led_defs = {
13739efd0ba7SDavid C Somayajulu "led", { false, true, true }, false, 0,
13749efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
137511e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
137611e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_HV, 14 };
137711e25f0dSDavid C Somayajulu
137811e25f0dSDavid C Somayajulu static struct block_defs block_avs_wrap_defs = {
13799efd0ba7SDavid C Somayajulu "avs_wrap", { false, true, false }, false, 0,
13809efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
138111e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
138211e25f0dSDavid C Somayajulu true, false, DBG_RESET_REG_MISCS_PL_UA, 11 };
138311e25f0dSDavid C Somayajulu
1384217ec208SDavid C Somayajulu static struct block_defs block_pxpreqbus_defs = {
1385217ec208SDavid C Somayajulu "pxpreqbus", { false, false, false }, false, 0,
13869efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
138711e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
1388217ec208SDavid C Somayajulu false, false, MAX_DBG_RESET_REGS, 0 };
138911e25f0dSDavid C Somayajulu
139011e25f0dSDavid C Somayajulu static struct block_defs block_misc_aeu_defs = {
13919efd0ba7SDavid C Somayajulu "misc_aeu", { true, true, true }, false, 0,
13929efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
139311e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
139411e25f0dSDavid C Somayajulu false, false, MAX_DBG_RESET_REGS, 0 };
139511e25f0dSDavid C Somayajulu
139611e25f0dSDavid C Somayajulu static struct block_defs block_bar0_map_defs = {
13979efd0ba7SDavid C Somayajulu "bar0_map", { true, true, true }, false, 0,
13989efd0ba7SDavid C Somayajulu { MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS },
139911e25f0dSDavid C Somayajulu 0, 0, 0, 0, 0,
140011e25f0dSDavid C Somayajulu false, false, MAX_DBG_RESET_REGS, 0 };
140111e25f0dSDavid C Somayajulu
140211e25f0dSDavid C Somayajulu static struct block_defs* s_block_defs[MAX_BLOCK_ID] = {
140311e25f0dSDavid C Somayajulu &block_grc_defs,
140411e25f0dSDavid C Somayajulu &block_miscs_defs,
140511e25f0dSDavid C Somayajulu &block_misc_defs,
140611e25f0dSDavid C Somayajulu &block_dbu_defs,
140711e25f0dSDavid C Somayajulu &block_pglue_b_defs,
140811e25f0dSDavid C Somayajulu &block_cnig_defs,
140911e25f0dSDavid C Somayajulu &block_cpmu_defs,
141011e25f0dSDavid C Somayajulu &block_ncsi_defs,
141111e25f0dSDavid C Somayajulu &block_opte_defs,
141211e25f0dSDavid C Somayajulu &block_bmb_defs,
141311e25f0dSDavid C Somayajulu &block_pcie_defs,
141411e25f0dSDavid C Somayajulu &block_mcp_defs,
141511e25f0dSDavid C Somayajulu &block_mcp2_defs,
141611e25f0dSDavid C Somayajulu &block_pswhst_defs,
141711e25f0dSDavid C Somayajulu &block_pswhst2_defs,
141811e25f0dSDavid C Somayajulu &block_pswrd_defs,
141911e25f0dSDavid C Somayajulu &block_pswrd2_defs,
142011e25f0dSDavid C Somayajulu &block_pswwr_defs,
142111e25f0dSDavid C Somayajulu &block_pswwr2_defs,
142211e25f0dSDavid C Somayajulu &block_pswrq_defs,
142311e25f0dSDavid C Somayajulu &block_pswrq2_defs,
142411e25f0dSDavid C Somayajulu &block_pglcs_defs,
142511e25f0dSDavid C Somayajulu &block_dmae_defs,
142611e25f0dSDavid C Somayajulu &block_ptu_defs,
142711e25f0dSDavid C Somayajulu &block_tcm_defs,
142811e25f0dSDavid C Somayajulu &block_mcm_defs,
142911e25f0dSDavid C Somayajulu &block_ucm_defs,
143011e25f0dSDavid C Somayajulu &block_xcm_defs,
143111e25f0dSDavid C Somayajulu &block_ycm_defs,
143211e25f0dSDavid C Somayajulu &block_pcm_defs,
143311e25f0dSDavid C Somayajulu &block_qm_defs,
143411e25f0dSDavid C Somayajulu &block_tm_defs,
143511e25f0dSDavid C Somayajulu &block_dorq_defs,
143611e25f0dSDavid C Somayajulu &block_brb_defs,
143711e25f0dSDavid C Somayajulu &block_src_defs,
143811e25f0dSDavid C Somayajulu &block_prs_defs,
143911e25f0dSDavid C Somayajulu &block_tsdm_defs,
144011e25f0dSDavid C Somayajulu &block_msdm_defs,
144111e25f0dSDavid C Somayajulu &block_usdm_defs,
144211e25f0dSDavid C Somayajulu &block_xsdm_defs,
144311e25f0dSDavid C Somayajulu &block_ysdm_defs,
144411e25f0dSDavid C Somayajulu &block_psdm_defs,
144511e25f0dSDavid C Somayajulu &block_tsem_defs,
144611e25f0dSDavid C Somayajulu &block_msem_defs,
144711e25f0dSDavid C Somayajulu &block_usem_defs,
144811e25f0dSDavid C Somayajulu &block_xsem_defs,
144911e25f0dSDavid C Somayajulu &block_ysem_defs,
145011e25f0dSDavid C Somayajulu &block_psem_defs,
145111e25f0dSDavid C Somayajulu &block_rss_defs,
145211e25f0dSDavid C Somayajulu &block_tmld_defs,
145311e25f0dSDavid C Somayajulu &block_muld_defs,
145411e25f0dSDavid C Somayajulu &block_yuld_defs,
145511e25f0dSDavid C Somayajulu &block_xyld_defs,
145611e25f0dSDavid C Somayajulu &block_ptld_defs,
145711e25f0dSDavid C Somayajulu &block_ypld_defs,
145811e25f0dSDavid C Somayajulu &block_prm_defs,
145911e25f0dSDavid C Somayajulu &block_pbf_pb1_defs,
146011e25f0dSDavid C Somayajulu &block_pbf_pb2_defs,
146111e25f0dSDavid C Somayajulu &block_rpb_defs,
146211e25f0dSDavid C Somayajulu &block_btb_defs,
146311e25f0dSDavid C Somayajulu &block_pbf_defs,
146411e25f0dSDavid C Somayajulu &block_rdif_defs,
146511e25f0dSDavid C Somayajulu &block_tdif_defs,
146611e25f0dSDavid C Somayajulu &block_cdu_defs,
146711e25f0dSDavid C Somayajulu &block_ccfc_defs,
146811e25f0dSDavid C Somayajulu &block_tcfc_defs,
146911e25f0dSDavid C Somayajulu &block_igu_defs,
147011e25f0dSDavid C Somayajulu &block_cau_defs,
147111e25f0dSDavid C Somayajulu &block_rgfs_defs,
147211e25f0dSDavid C Somayajulu &block_rgsrc_defs,
147311e25f0dSDavid C Somayajulu &block_tgfs_defs,
147411e25f0dSDavid C Somayajulu &block_tgsrc_defs,
147511e25f0dSDavid C Somayajulu &block_umac_defs,
147611e25f0dSDavid C Somayajulu &block_xmac_defs,
147711e25f0dSDavid C Somayajulu &block_dbg_defs,
147811e25f0dSDavid C Somayajulu &block_nig_defs,
147911e25f0dSDavid C Somayajulu &block_wol_defs,
148011e25f0dSDavid C Somayajulu &block_bmbn_defs,
148111e25f0dSDavid C Somayajulu &block_ipc_defs,
148211e25f0dSDavid C Somayajulu &block_nwm_defs,
148311e25f0dSDavid C Somayajulu &block_nws_defs,
148411e25f0dSDavid C Somayajulu &block_ms_defs,
148511e25f0dSDavid C Somayajulu &block_phy_pcie_defs,
148611e25f0dSDavid C Somayajulu &block_led_defs,
148711e25f0dSDavid C Somayajulu &block_avs_wrap_defs,
1488217ec208SDavid C Somayajulu &block_pxpreqbus_defs,
148911e25f0dSDavid C Somayajulu &block_misc_aeu_defs,
149011e25f0dSDavid C Somayajulu &block_bar0_map_defs,
149111e25f0dSDavid C Somayajulu
149211e25f0dSDavid C Somayajulu };
149311e25f0dSDavid C Somayajulu
149411e25f0dSDavid C Somayajulu /* Constraint operation types */
149511e25f0dSDavid C Somayajulu static struct dbg_bus_constraint_op_defs s_constraint_op_defs[] = {
149611e25f0dSDavid C Somayajulu /* DBG_BUS_CONSTRAINT_OP_EQ */
149711e25f0dSDavid C Somayajulu { 0, false },
149811e25f0dSDavid C Somayajulu
149911e25f0dSDavid C Somayajulu /* DBG_BUS_CONSTRAINT_OP_NE */
150011e25f0dSDavid C Somayajulu { 5, false },
150111e25f0dSDavid C Somayajulu
150211e25f0dSDavid C Somayajulu /* DBG_BUS_CONSTRAINT_OP_LT */
150311e25f0dSDavid C Somayajulu { 1, false },
150411e25f0dSDavid C Somayajulu
150511e25f0dSDavid C Somayajulu /* DBG_BUS_CONSTRAINT_OP_LTC */
150611e25f0dSDavid C Somayajulu { 1, true },
150711e25f0dSDavid C Somayajulu
150811e25f0dSDavid C Somayajulu /* DBG_BUS_CONSTRAINT_OP_LE */
150911e25f0dSDavid C Somayajulu { 2, false },
151011e25f0dSDavid C Somayajulu
151111e25f0dSDavid C Somayajulu /* DBG_BUS_CONSTRAINT_OP_LEC */
151211e25f0dSDavid C Somayajulu { 2, true },
151311e25f0dSDavid C Somayajulu
151411e25f0dSDavid C Somayajulu /* DBG_BUS_CONSTRAINT_OP_GT */
151511e25f0dSDavid C Somayajulu { 4, false },
151611e25f0dSDavid C Somayajulu
151711e25f0dSDavid C Somayajulu /* DBG_BUS_CONSTRAINT_OP_GTC */
151811e25f0dSDavid C Somayajulu { 4, true },
151911e25f0dSDavid C Somayajulu
152011e25f0dSDavid C Somayajulu /* DBG_BUS_CONSTRAINT_OP_GE */
152111e25f0dSDavid C Somayajulu { 3, false },
152211e25f0dSDavid C Somayajulu
152311e25f0dSDavid C Somayajulu /* DBG_BUS_CONSTRAINT_OP_GEC */
152411e25f0dSDavid C Somayajulu { 3, true }
152511e25f0dSDavid C Somayajulu };
152611e25f0dSDavid C Somayajulu
152711e25f0dSDavid C Somayajulu static const char* s_dbg_target_names[] = {
152811e25f0dSDavid C Somayajulu /* DBG_BUS_TARGET_ID_INT_BUF */
152911e25f0dSDavid C Somayajulu "int-buf",
153011e25f0dSDavid C Somayajulu
153111e25f0dSDavid C Somayajulu /* DBG_BUS_TARGET_ID_NIG */
153211e25f0dSDavid C Somayajulu "nw",
153311e25f0dSDavid C Somayajulu
153411e25f0dSDavid C Somayajulu /* DBG_BUS_TARGET_ID_PCI */
153511e25f0dSDavid C Somayajulu "pci-buf"
153611e25f0dSDavid C Somayajulu };
153711e25f0dSDavid C Somayajulu
153811e25f0dSDavid C Somayajulu static struct storm_mode_defs s_storm_mode_defs[] = {
153911e25f0dSDavid C Somayajulu /* DBG_BUS_STORM_MODE_PRINTF */
154011e25f0dSDavid C Somayajulu { "printf", true, 0 },
154111e25f0dSDavid C Somayajulu
154211e25f0dSDavid C Somayajulu /* DBG_BUS_STORM_MODE_PRAM_ADDR */
154311e25f0dSDavid C Somayajulu { "pram_addr", true, 1 },
154411e25f0dSDavid C Somayajulu
154511e25f0dSDavid C Somayajulu /* DBG_BUS_STORM_MODE_DRA_RW */
154611e25f0dSDavid C Somayajulu { "dra_rw", true, 2 },
154711e25f0dSDavid C Somayajulu
154811e25f0dSDavid C Somayajulu /* DBG_BUS_STORM_MODE_DRA_W */
154911e25f0dSDavid C Somayajulu { "dra_w", true, 3 },
155011e25f0dSDavid C Somayajulu
155111e25f0dSDavid C Somayajulu /* DBG_BUS_STORM_MODE_LD_ST_ADDR */
155211e25f0dSDavid C Somayajulu { "ld_st_addr", true, 4 },
155311e25f0dSDavid C Somayajulu
155411e25f0dSDavid C Somayajulu /* DBG_BUS_STORM_MODE_DRA_FSM */
155511e25f0dSDavid C Somayajulu { "dra_fsm", true, 5 },
155611e25f0dSDavid C Somayajulu
155711e25f0dSDavid C Somayajulu /* DBG_BUS_STORM_MODE_RH */
155811e25f0dSDavid C Somayajulu { "rh", true, 6 },
155911e25f0dSDavid C Somayajulu
156011e25f0dSDavid C Somayajulu /* DBG_BUS_STORM_MODE_FOC */
156111e25f0dSDavid C Somayajulu { "foc", false, 1 },
156211e25f0dSDavid C Somayajulu
156311e25f0dSDavid C Somayajulu /* DBG_BUS_STORM_MODE_EXT_STORE */
156411e25f0dSDavid C Somayajulu { "ext_store", false, 3 }
156511e25f0dSDavid C Somayajulu };
156611e25f0dSDavid C Somayajulu
156711e25f0dSDavid C Somayajulu static struct platform_defs s_platform_defs[] = {
156811e25f0dSDavid C Somayajulu /* PLATFORM_ASIC */
1569217ec208SDavid C Somayajulu { "asic", 1, 256, 32768 },
157011e25f0dSDavid C Somayajulu
157111e25f0dSDavid C Somayajulu /* PLATFORM_EMUL_FULL */
1572217ec208SDavid C Somayajulu { "emul_full", 2000, 8, 4096 },
157311e25f0dSDavid C Somayajulu
157411e25f0dSDavid C Somayajulu /* PLATFORM_EMUL_REDUCED */
1575217ec208SDavid C Somayajulu { "emul_reduced", 2000, 8, 4096 },
157611e25f0dSDavid C Somayajulu
157711e25f0dSDavid C Somayajulu /* PLATFORM_FPGA */
1578217ec208SDavid C Somayajulu { "fpga", 200, 32, 8192 }
157911e25f0dSDavid C Somayajulu };
158011e25f0dSDavid C Somayajulu
158111e25f0dSDavid C Somayajulu static struct grc_param_defs s_grc_param_defs[] = {
158211e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_TSTORM */
15839efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 1, 1 },
158411e25f0dSDavid C Somayajulu
158511e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_MSTORM */
15869efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 1, 1 },
158711e25f0dSDavid C Somayajulu
158811e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_USTORM */
15899efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 1, 1 },
159011e25f0dSDavid C Somayajulu
159111e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_XSTORM */
15929efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 1, 1 },
159311e25f0dSDavid C Somayajulu
159411e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_YSTORM */
15959efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 1, 1 },
159611e25f0dSDavid C Somayajulu
159711e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_PSTORM */
15989efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 1, 1 },
159911e25f0dSDavid C Somayajulu
160011e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_REGS */
16019efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
160211e25f0dSDavid C Somayajulu
160311e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_RAM */
16049efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
160511e25f0dSDavid C Somayajulu
160611e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_PBUF */
16079efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
160811e25f0dSDavid C Somayajulu
160911e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_IOR */
16109efd0ba7SDavid C Somayajulu { { 0, 0, 0 }, 0, 1, false, 0, 1 },
161111e25f0dSDavid C Somayajulu
161211e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_VFC */
16139efd0ba7SDavid C Somayajulu { { 0, 0, 0 }, 0, 1, false, 0, 1 },
161411e25f0dSDavid C Somayajulu
161511e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_CM_CTX */
16169efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
161711e25f0dSDavid C Somayajulu
161811e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_ILT */
16199efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
162011e25f0dSDavid C Somayajulu
162111e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_RSS */
16229efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
162311e25f0dSDavid C Somayajulu
162411e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_CAU */
16259efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
162611e25f0dSDavid C Somayajulu
162711e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_QM */
16289efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
162911e25f0dSDavid C Somayajulu
163011e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_MCP */
16319efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
163211e25f0dSDavid C Somayajulu
163311e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_RESERVED */
16349efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
163511e25f0dSDavid C Somayajulu
163611e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_CFC */
16379efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
163811e25f0dSDavid C Somayajulu
163911e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_IGU */
16409efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
164111e25f0dSDavid C Somayajulu
164211e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_BRB */
16439efd0ba7SDavid C Somayajulu { { 0, 0, 0 }, 0, 1, false, 0, 1 },
164411e25f0dSDavid C Somayajulu
164511e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_BTB */
16469efd0ba7SDavid C Somayajulu { { 0, 0, 0 }, 0, 1, false, 0, 1 },
164711e25f0dSDavid C Somayajulu
164811e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_BMB */
16499efd0ba7SDavid C Somayajulu { { 0, 0, 0 }, 0, 1, false, 0, 1 },
165011e25f0dSDavid C Somayajulu
165111e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_NIG */
16529efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
165311e25f0dSDavid C Somayajulu
165411e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_MULD */
16559efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
165611e25f0dSDavid C Somayajulu
165711e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_PRS */
16589efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
165911e25f0dSDavid C Somayajulu
166011e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_DMAE */
16619efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
166211e25f0dSDavid C Somayajulu
166311e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_TM */
16649efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
166511e25f0dSDavid C Somayajulu
166611e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_SDM */
16679efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
166811e25f0dSDavid C Somayajulu
166911e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_DIF */
16709efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
167111e25f0dSDavid C Somayajulu
167211e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_STATIC */
16739efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
167411e25f0dSDavid C Somayajulu
167511e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_UNSTALL */
16769efd0ba7SDavid C Somayajulu { { 0, 0, 0 }, 0, 1, false, 0, 0 },
167711e25f0dSDavid C Somayajulu
167811e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_NUM_LCIDS */
16799efd0ba7SDavid C Somayajulu { { MAX_LCIDS, MAX_LCIDS, MAX_LCIDS }, 1, MAX_LCIDS, false, MAX_LCIDS, MAX_LCIDS },
168011e25f0dSDavid C Somayajulu
168111e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_NUM_LTIDS */
16829efd0ba7SDavid C Somayajulu { { MAX_LTIDS, MAX_LTIDS, MAX_LTIDS }, 1, MAX_LTIDS, false, MAX_LTIDS, MAX_LTIDS },
168311e25f0dSDavid C Somayajulu
168411e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_EXCLUDE_ALL */
16859efd0ba7SDavid C Somayajulu { { 0, 0, 0 }, 0, 1, true, 0, 0 },
168611e25f0dSDavid C Somayajulu
168711e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_CRASH */
16889efd0ba7SDavid C Somayajulu { { 0, 0, 0 }, 0, 1, true, 0, 0 },
168911e25f0dSDavid C Somayajulu
169011e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_PARITY_SAFE */
16919efd0ba7SDavid C Somayajulu { { 0, 0, 0 }, 0, 1, false, 1, 0 },
169211e25f0dSDavid C Somayajulu
169311e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_CM */
16949efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
169511e25f0dSDavid C Somayajulu
169611e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_DUMP_PHY */
16979efd0ba7SDavid C Somayajulu { { 1, 1, 1 }, 0, 1, false, 0, 1 },
169811e25f0dSDavid C Somayajulu
169911e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_NO_MCP */
17009efd0ba7SDavid C Somayajulu { { 0, 0, 0 }, 0, 1, false, 0, 0 },
170111e25f0dSDavid C Somayajulu
170211e25f0dSDavid C Somayajulu /* DBG_GRC_PARAM_NO_FW_VER */
17039efd0ba7SDavid C Somayajulu { { 0, 0, 0 }, 0, 1, false, 0, 0 }
170411e25f0dSDavid C Somayajulu };
170511e25f0dSDavid C Somayajulu
170611e25f0dSDavid C Somayajulu static struct rss_mem_defs s_rss_mem_defs[] = {
17079efd0ba7SDavid C Somayajulu { "rss_mem_cid", "rss_cid", 0, 32,
17089efd0ba7SDavid C Somayajulu { 256, 320, 512 } },
170911e25f0dSDavid C Somayajulu
17109efd0ba7SDavid C Somayajulu { "rss_mem_key_msb", "rss_key", 1024, 256,
17119efd0ba7SDavid C Somayajulu { 128, 208, 257 } },
171211e25f0dSDavid C Somayajulu
17139efd0ba7SDavid C Somayajulu { "rss_mem_key_lsb", "rss_key", 2048, 64,
17149efd0ba7SDavid C Somayajulu { 128, 208, 257 } },
171511e25f0dSDavid C Somayajulu
17169efd0ba7SDavid C Somayajulu { "rss_mem_info", "rss_info", 3072, 16,
17179efd0ba7SDavid C Somayajulu { 128, 208, 256 } },
171811e25f0dSDavid C Somayajulu
17199efd0ba7SDavid C Somayajulu { "rss_mem_ind", "rss_ind", 4096, 16,
17209efd0ba7SDavid C Somayajulu { 16384, 26624, 32768 } }
172111e25f0dSDavid C Somayajulu };
172211e25f0dSDavid C Somayajulu
172311e25f0dSDavid C Somayajulu static struct vfc_ram_defs s_vfc_ram_defs[] = {
172411e25f0dSDavid C Somayajulu { "vfc_ram_tt1", "vfc_ram", 0, 512 },
172511e25f0dSDavid C Somayajulu { "vfc_ram_mtt2", "vfc_ram", 512, 128 },
172611e25f0dSDavid C Somayajulu { "vfc_ram_stt2", "vfc_ram", 640, 32 },
172711e25f0dSDavid C Somayajulu { "vfc_ram_ro_vect", "vfc_ram", 672, 32 }
172811e25f0dSDavid C Somayajulu };
172911e25f0dSDavid C Somayajulu
173011e25f0dSDavid C Somayajulu static struct big_ram_defs s_big_ram_defs[] = {
1731217ec208SDavid C Somayajulu { "BRB", MEM_GROUP_BRB_MEM, MEM_GROUP_BRB_RAM, DBG_GRC_PARAM_DUMP_BRB,
1732217ec208SDavid C Somayajulu BRB_REG_BIG_RAM_ADDRESS, BRB_REG_BIG_RAM_DATA, MISC_REG_BLOCK_256B_EN, { 0, 0, 0 },
1733217ec208SDavid C Somayajulu { 153600, 180224, 282624 } },
173411e25f0dSDavid C Somayajulu
1735217ec208SDavid C Somayajulu { "BTB", MEM_GROUP_BTB_MEM, MEM_GROUP_BTB_RAM, DBG_GRC_PARAM_DUMP_BTB,
1736217ec208SDavid C Somayajulu BTB_REG_BIG_RAM_ADDRESS, BTB_REG_BIG_RAM_DATA, MISC_REG_BLOCK_256B_EN, { 0, 1, 1 },
1737217ec208SDavid C Somayajulu { 92160, 117760, 168960 } },
173811e25f0dSDavid C Somayajulu
1739217ec208SDavid C Somayajulu { "BMB", MEM_GROUP_BMB_MEM, MEM_GROUP_BMB_RAM, DBG_GRC_PARAM_DUMP_BMB,
1740217ec208SDavid C Somayajulu BMB_REG_BIG_RAM_ADDRESS, BMB_REG_BIG_RAM_DATA, MISCS_REG_BLOCK_256B_EN, { 0, 0, 0 },
1741217ec208SDavid C Somayajulu { 36864, 36864, 36864 } }
174211e25f0dSDavid C Somayajulu };
174311e25f0dSDavid C Somayajulu
174411e25f0dSDavid C Somayajulu static struct reset_reg_defs s_reset_regs_defs[] = {
174511e25f0dSDavid C Somayajulu /* DBG_RESET_REG_MISCS_PL_UA */
17469efd0ba7SDavid C Somayajulu { MISCS_REG_RESET_PL_UA, { true, true, true }, { 0x0, 0x0, 0x0 } },
174711e25f0dSDavid C Somayajulu
174811e25f0dSDavid C Somayajulu /* DBG_RESET_REG_MISCS_PL_HV */
17499efd0ba7SDavid C Somayajulu { MISCS_REG_RESET_PL_HV, { true, true, true }, { 0x0, 0x400, 0x600 } },
175011e25f0dSDavid C Somayajulu
175111e25f0dSDavid C Somayajulu /* DBG_RESET_REG_MISCS_PL_HV_2 */
17529efd0ba7SDavid C Somayajulu { MISCS_REG_RESET_PL_HV_2_K2_E5, { false, true, true }, { 0x0, 0x0, 0x0 } },
175311e25f0dSDavid C Somayajulu
175411e25f0dSDavid C Somayajulu /* DBG_RESET_REG_MISC_PL_UA */
17559efd0ba7SDavid C Somayajulu { MISC_REG_RESET_PL_UA, { true, true, true }, { 0x0, 0x0, 0x0 } },
175611e25f0dSDavid C Somayajulu
175711e25f0dSDavid C Somayajulu /* DBG_RESET_REG_MISC_PL_HV */
17589efd0ba7SDavid C Somayajulu { MISC_REG_RESET_PL_HV, { true, true, true }, { 0x0, 0x0, 0x0 } },
175911e25f0dSDavid C Somayajulu
176011e25f0dSDavid C Somayajulu /* DBG_RESET_REG_MISC_PL_PDA_VMAIN_1 */
17619efd0ba7SDavid C Somayajulu { MISC_REG_RESET_PL_PDA_VMAIN_1, { true, true, true }, { 0x4404040, 0x4404040, 0x404040 } },
176211e25f0dSDavid C Somayajulu
176311e25f0dSDavid C Somayajulu /* DBG_RESET_REG_MISC_PL_PDA_VMAIN_2 */
17649efd0ba7SDavid C Somayajulu { MISC_REG_RESET_PL_PDA_VMAIN_2, { true, true, true }, { 0x7, 0x7c00007, 0x5c08007 } },
176511e25f0dSDavid C Somayajulu
176611e25f0dSDavid C Somayajulu /* DBG_RESET_REG_MISC_PL_PDA_VAUX */
17679efd0ba7SDavid C Somayajulu { MISC_REG_RESET_PL_PDA_VAUX, { true, true, true }, { 0x2, 0x2, 0x2 } },
176811e25f0dSDavid C Somayajulu };
176911e25f0dSDavid C Somayajulu
177011e25f0dSDavid C Somayajulu static struct phy_defs s_phy_defs[] = {
1771217ec208SDavid C Somayajulu { "nw_phy", NWS_REG_NWS_CMU_K2, PHY_NW_IP_REG_PHY0_TOP_TBUS_ADDR_7_0_K2_E5, PHY_NW_IP_REG_PHY0_TOP_TBUS_ADDR_15_8_K2_E5, PHY_NW_IP_REG_PHY0_TOP_TBUS_DATA_7_0_K2_E5, PHY_NW_IP_REG_PHY0_TOP_TBUS_DATA_11_8_K2_E5 },
177211e25f0dSDavid C Somayajulu { "sgmii_phy", MS_REG_MS_CMU_K2_E5, PHY_SGMII_IP_REG_AHB_CMU_CSR_0_X132_K2_E5, PHY_SGMII_IP_REG_AHB_CMU_CSR_0_X133_K2_E5, PHY_SGMII_IP_REG_AHB_CMU_CSR_0_X130_K2_E5, PHY_SGMII_IP_REG_AHB_CMU_CSR_0_X131_K2_E5 },
177311e25f0dSDavid C Somayajulu { "pcie_phy0", PHY_PCIE_REG_PHY0_K2_E5, PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X132_K2_E5, PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X133_K2_E5, PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X130_K2_E5, PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X131_K2_E5 },
177411e25f0dSDavid C Somayajulu { "pcie_phy1", PHY_PCIE_REG_PHY1_K2_E5, PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X132_K2_E5, PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X133_K2_E5, PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X130_K2_E5, PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X131_K2_E5 },
177511e25f0dSDavid C Somayajulu };
177611e25f0dSDavid C Somayajulu
177711e25f0dSDavid C Somayajulu /* The order of indexes that should be applied to a PCI buffer line */
177811e25f0dSDavid C Somayajulu static const u8 s_pci_buf_line_ind[PCI_BUF_LINE_SIZE_IN_DWORDS] = { 1, 0, 3, 2, 5, 4, 7, 6 };
177911e25f0dSDavid C Somayajulu
178011e25f0dSDavid C Somayajulu /******************************** Variables **********************************/
178111e25f0dSDavid C Somayajulu
178211e25f0dSDavid C Somayajulu /* The version of the calling app */
178311e25f0dSDavid C Somayajulu static u32 s_app_ver;
178411e25f0dSDavid C Somayajulu
178511e25f0dSDavid C Somayajulu /**************************** Private Functions ******************************/
178611e25f0dSDavid C Somayajulu
ecore_static_asserts(void)178711e25f0dSDavid C Somayajulu static void ecore_static_asserts(void)
178811e25f0dSDavid C Somayajulu {
178911e25f0dSDavid C Somayajulu CHECK_ARR_SIZE(s_dbg_arrays, MAX_BIN_DBG_BUFFER_TYPE);
179011e25f0dSDavid C Somayajulu CHECK_ARR_SIZE(s_big_ram_defs, NUM_BIG_RAM_TYPES);
179111e25f0dSDavid C Somayajulu CHECK_ARR_SIZE(s_vfc_ram_defs, NUM_VFC_RAM_TYPES);
179211e25f0dSDavid C Somayajulu CHECK_ARR_SIZE(s_rss_mem_defs, NUM_RSS_MEM_TYPES);
179311e25f0dSDavid C Somayajulu CHECK_ARR_SIZE(s_chip_defs, MAX_CHIP_IDS);
179411e25f0dSDavid C Somayajulu CHECK_ARR_SIZE(s_platform_defs, MAX_PLATFORM_IDS);
179511e25f0dSDavid C Somayajulu CHECK_ARR_SIZE(s_storm_defs, MAX_DBG_STORMS);
179611e25f0dSDavid C Somayajulu CHECK_ARR_SIZE(s_constraint_op_defs, MAX_DBG_BUS_CONSTRAINT_OPS);
179711e25f0dSDavid C Somayajulu CHECK_ARR_SIZE(s_dbg_target_names, MAX_DBG_BUS_TARGETS);
179811e25f0dSDavid C Somayajulu CHECK_ARR_SIZE(s_storm_mode_defs, MAX_DBG_BUS_STORM_MODES);
179911e25f0dSDavid C Somayajulu CHECK_ARR_SIZE(s_grc_param_defs, MAX_DBG_GRC_PARAMS);
180011e25f0dSDavid C Somayajulu CHECK_ARR_SIZE(s_reset_regs_defs, MAX_DBG_RESET_REGS);
180111e25f0dSDavid C Somayajulu }
180211e25f0dSDavid C Somayajulu
180311e25f0dSDavid C Somayajulu /* Reads and returns a single dword from the specified unaligned buffer. */
ecore_read_unaligned_dword(u8 * buf)180411e25f0dSDavid C Somayajulu static u32 ecore_read_unaligned_dword(u8 *buf)
180511e25f0dSDavid C Somayajulu {
180611e25f0dSDavid C Somayajulu u32 dword;
180711e25f0dSDavid C Somayajulu
180811e25f0dSDavid C Somayajulu OSAL_MEMCPY((u8 *)&dword, buf, sizeof(dword));
180911e25f0dSDavid C Somayajulu return dword;
181011e25f0dSDavid C Somayajulu }
181111e25f0dSDavid C Somayajulu
181211e25f0dSDavid C Somayajulu /* Returns the difference in bytes between the specified physical addresses.
181311e25f0dSDavid C Somayajulu * Assumes that the first address is bigger then the second, and that the
181411e25f0dSDavid C Somayajulu * difference is a 32-bit value.
181511e25f0dSDavid C Somayajulu */
ecore_phys_addr_diff(struct dbg_bus_mem_addr * a,struct dbg_bus_mem_addr * b)181611e25f0dSDavid C Somayajulu static u32 ecore_phys_addr_diff(struct dbg_bus_mem_addr *a,
181711e25f0dSDavid C Somayajulu struct dbg_bus_mem_addr *b)
181811e25f0dSDavid C Somayajulu {
181911e25f0dSDavid C Somayajulu return a->hi == b->hi ? a->lo - b->lo : b->lo - a->lo;
182011e25f0dSDavid C Somayajulu }
182111e25f0dSDavid C Somayajulu
182211e25f0dSDavid C Somayajulu /* Sets the value of the specified GRC param */
ecore_grc_set_param(struct ecore_hwfn * p_hwfn,enum dbg_grc_params grc_param,u32 val)182311e25f0dSDavid C Somayajulu static void ecore_grc_set_param(struct ecore_hwfn *p_hwfn,
182411e25f0dSDavid C Somayajulu enum dbg_grc_params grc_param,
182511e25f0dSDavid C Somayajulu u32 val)
182611e25f0dSDavid C Somayajulu {
182711e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
182811e25f0dSDavid C Somayajulu
182911e25f0dSDavid C Somayajulu dev_data->grc.param_val[grc_param] = val;
183011e25f0dSDavid C Somayajulu }
183111e25f0dSDavid C Somayajulu
183211e25f0dSDavid C Somayajulu /* Returns the value of the specified GRC param */
ecore_grc_get_param(struct ecore_hwfn * p_hwfn,enum dbg_grc_params grc_param)183311e25f0dSDavid C Somayajulu static u32 ecore_grc_get_param(struct ecore_hwfn *p_hwfn,
183411e25f0dSDavid C Somayajulu enum dbg_grc_params grc_param)
183511e25f0dSDavid C Somayajulu {
183611e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
183711e25f0dSDavid C Somayajulu
183811e25f0dSDavid C Somayajulu return dev_data->grc.param_val[grc_param];
183911e25f0dSDavid C Somayajulu }
184011e25f0dSDavid C Somayajulu
184111e25f0dSDavid C Somayajulu /* Initializes the GRC parameters */
ecore_dbg_grc_init_params(struct ecore_hwfn * p_hwfn)184211e25f0dSDavid C Somayajulu static void ecore_dbg_grc_init_params(struct ecore_hwfn *p_hwfn)
184311e25f0dSDavid C Somayajulu {
184411e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
184511e25f0dSDavid C Somayajulu
184611e25f0dSDavid C Somayajulu if (!dev_data->grc.params_initialized) {
184711e25f0dSDavid C Somayajulu ecore_dbg_grc_set_params_default(p_hwfn);
184811e25f0dSDavid C Somayajulu dev_data->grc.params_initialized = 1;
184911e25f0dSDavid C Somayajulu }
185011e25f0dSDavid C Somayajulu }
185111e25f0dSDavid C Somayajulu
185211e25f0dSDavid C Somayajulu /* Initializes debug data for the specified device */
ecore_dbg_dev_init(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)185311e25f0dSDavid C Somayajulu static enum dbg_status ecore_dbg_dev_init(struct ecore_hwfn *p_hwfn,
185411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt)
185511e25f0dSDavid C Somayajulu {
185611e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
185711e25f0dSDavid C Somayajulu
185811e25f0dSDavid C Somayajulu if (dev_data->initialized)
185911e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
186011e25f0dSDavid C Somayajulu
186111e25f0dSDavid C Somayajulu if (!s_app_ver)
186211e25f0dSDavid C Somayajulu return DBG_STATUS_APP_VERSION_NOT_SET;
186311e25f0dSDavid C Somayajulu
18649efd0ba7SDavid C Somayajulu if (ECORE_IS_E5(p_hwfn->p_dev)) {
18659efd0ba7SDavid C Somayajulu dev_data->chip_id = CHIP_E5;
18669efd0ba7SDavid C Somayajulu dev_data->mode_enable[MODE_E5] = 1;
18679efd0ba7SDavid C Somayajulu }
18689efd0ba7SDavid C Somayajulu else if (ECORE_IS_K2(p_hwfn->p_dev)) {
186911e25f0dSDavid C Somayajulu dev_data->chip_id = CHIP_K2;
187011e25f0dSDavid C Somayajulu dev_data->mode_enable[MODE_K2] = 1;
187111e25f0dSDavid C Somayajulu }
187211e25f0dSDavid C Somayajulu else if (ECORE_IS_BB_B0(p_hwfn->p_dev)) {
187311e25f0dSDavid C Somayajulu dev_data->chip_id = CHIP_BB;
187411e25f0dSDavid C Somayajulu dev_data->mode_enable[MODE_BB] = 1;
187511e25f0dSDavid C Somayajulu }
187611e25f0dSDavid C Somayajulu else {
187711e25f0dSDavid C Somayajulu return DBG_STATUS_UNKNOWN_CHIP;
187811e25f0dSDavid C Somayajulu }
187911e25f0dSDavid C Somayajulu
188011e25f0dSDavid C Somayajulu #ifdef ASIC_ONLY
188111e25f0dSDavid C Somayajulu dev_data->platform_id = PLATFORM_ASIC;
188211e25f0dSDavid C Somayajulu dev_data->mode_enable[MODE_ASIC] = 1;
188311e25f0dSDavid C Somayajulu #else
188411e25f0dSDavid C Somayajulu if (CHIP_REV_IS_ASIC(p_hwfn->p_dev)) {
188511e25f0dSDavid C Somayajulu dev_data->platform_id = PLATFORM_ASIC;
188611e25f0dSDavid C Somayajulu dev_data->mode_enable[MODE_ASIC] = 1;
188711e25f0dSDavid C Somayajulu }
188811e25f0dSDavid C Somayajulu else if (CHIP_REV_IS_EMUL(p_hwfn->p_dev)) {
188911e25f0dSDavid C Somayajulu if (ecore_rd(p_hwfn, p_ptt, MISCS_REG_ECO_RESERVED) & 0x20000000) {
189011e25f0dSDavid C Somayajulu dev_data->platform_id = PLATFORM_EMUL_FULL;
189111e25f0dSDavid C Somayajulu dev_data->mode_enable[MODE_EMUL_FULL] = 1;
189211e25f0dSDavid C Somayajulu }
189311e25f0dSDavid C Somayajulu else {
189411e25f0dSDavid C Somayajulu dev_data->platform_id = PLATFORM_EMUL_REDUCED;
189511e25f0dSDavid C Somayajulu dev_data->mode_enable[MODE_EMUL_REDUCED] = 1;
189611e25f0dSDavid C Somayajulu }
189711e25f0dSDavid C Somayajulu }
189811e25f0dSDavid C Somayajulu else if (CHIP_REV_IS_FPGA(p_hwfn->p_dev)) {
189911e25f0dSDavid C Somayajulu dev_data->platform_id = PLATFORM_FPGA;
190011e25f0dSDavid C Somayajulu dev_data->mode_enable[MODE_FPGA] = 1;
190111e25f0dSDavid C Somayajulu }
190211e25f0dSDavid C Somayajulu else {
190311e25f0dSDavid C Somayajulu return DBG_STATUS_UNKNOWN_CHIP;
190411e25f0dSDavid C Somayajulu }
190511e25f0dSDavid C Somayajulu #endif
190611e25f0dSDavid C Somayajulu
190711e25f0dSDavid C Somayajulu /* Initializes the GRC parameters */
190811e25f0dSDavid C Somayajulu ecore_dbg_grc_init_params(p_hwfn);
190911e25f0dSDavid C Somayajulu
1910217ec208SDavid C Somayajulu dev_data->use_dmae = USE_DMAE;
1911217ec208SDavid C Somayajulu dev_data->num_regs_read = 0;
1912217ec208SDavid C Somayajulu dev_data->initialized = 1;
191311e25f0dSDavid C Somayajulu
191411e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
191511e25f0dSDavid C Somayajulu }
191611e25f0dSDavid C Somayajulu
get_dbg_bus_block_desc(struct ecore_hwfn * p_hwfn,enum block_id block_id)1917134b0936SMark O'Donovan static const struct dbg_bus_block *get_dbg_bus_block_desc(struct ecore_hwfn *p_hwfn,
191811e25f0dSDavid C Somayajulu enum block_id block_id)
191911e25f0dSDavid C Somayajulu {
192011e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
192111e25f0dSDavid C Somayajulu
1922134b0936SMark O'Donovan return (const struct dbg_bus_block *)&dbg_bus_blocks[block_id * MAX_CHIP_IDS + dev_data->chip_id];
192311e25f0dSDavid C Somayajulu }
192411e25f0dSDavid C Somayajulu
192511e25f0dSDavid C Somayajulu /* Returns OSAL_NULL for signature line, latency line and non-existing lines */
get_dbg_bus_line_desc(struct ecore_hwfn * p_hwfn,enum block_id block_id)1926134b0936SMark O'Donovan static const struct dbg_bus_line *get_dbg_bus_line_desc(struct ecore_hwfn *p_hwfn,
192711e25f0dSDavid C Somayajulu enum block_id block_id)
192811e25f0dSDavid C Somayajulu {
192911e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
193011e25f0dSDavid C Somayajulu struct dbg_bus_block_data *block_bus;
1931134b0936SMark O'Donovan const struct dbg_bus_block *block_desc;
1932134b0936SMark O'Donovan u32 index;
193311e25f0dSDavid C Somayajulu
193411e25f0dSDavid C Somayajulu block_bus = &dev_data->bus.blocks[block_id];
193511e25f0dSDavid C Somayajulu block_desc = get_dbg_bus_block_desc(p_hwfn, block_id);
193611e25f0dSDavid C Somayajulu
193711e25f0dSDavid C Somayajulu if (!block_bus->line_num ||
193811e25f0dSDavid C Somayajulu (block_bus->line_num == 1 && block_desc->has_latency_events) ||
193911e25f0dSDavid C Somayajulu block_bus->line_num >= NUM_DBG_LINES(block_desc))
194011e25f0dSDavid C Somayajulu return OSAL_NULL;
194111e25f0dSDavid C Somayajulu
1942134b0936SMark O'Donovan index = block_desc->lines_offset + block_bus->line_num - NUM_EXTRA_DBG_LINES(block_desc);
1943134b0936SMark O'Donovan
1944134b0936SMark O'Donovan return (const struct dbg_bus_line *)&dbg_bus_lines[index];
194511e25f0dSDavid C Somayajulu }
194611e25f0dSDavid C Somayajulu
194711e25f0dSDavid C Somayajulu /* Reads the FW info structure for the specified Storm from the chip,
194811e25f0dSDavid C Somayajulu * and writes it to the specified fw_info pointer.
194911e25f0dSDavid C Somayajulu */
ecore_read_fw_info(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u8 storm_id,struct fw_info * fw_info)195011e25f0dSDavid C Somayajulu static void ecore_read_fw_info(struct ecore_hwfn *p_hwfn,
195111e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
195211e25f0dSDavid C Somayajulu u8 storm_id,
195311e25f0dSDavid C Somayajulu struct fw_info *fw_info)
195411e25f0dSDavid C Somayajulu {
195511e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
195611e25f0dSDavid C Somayajulu struct fw_info_location fw_info_location;
195711e25f0dSDavid C Somayajulu u32 addr, i, *dest;
195811e25f0dSDavid C Somayajulu
195911e25f0dSDavid C Somayajulu OSAL_MEMSET(&fw_info_location, 0, sizeof(fw_info_location));
196011e25f0dSDavid C Somayajulu OSAL_MEMSET(fw_info, 0, sizeof(*fw_info));
196111e25f0dSDavid C Somayajulu
196211e25f0dSDavid C Somayajulu /* Read first the address that points to fw_info location.
196311e25f0dSDavid C Somayajulu * The address is located in the last line of the Storm RAM.
196411e25f0dSDavid C Somayajulu */
1965217ec208SDavid C Somayajulu addr = storm->sem_fast_mem_addr + SEM_FAST_REG_INT_RAM +
1966217ec208SDavid C Somayajulu (ECORE_IS_E5(p_hwfn->p_dev) ?
1967217ec208SDavid C Somayajulu DWORDS_TO_BYTES(SEM_FAST_REG_INT_RAM_SIZE_E5) :
1968217ec208SDavid C Somayajulu DWORDS_TO_BYTES(SEM_FAST_REG_INT_RAM_SIZE_BB_K2))
1969217ec208SDavid C Somayajulu - sizeof(fw_info_location);
1970217ec208SDavid C Somayajulu
197111e25f0dSDavid C Somayajulu dest = (u32 *)&fw_info_location;
197211e25f0dSDavid C Somayajulu
197311e25f0dSDavid C Somayajulu for (i = 0; i < BYTES_TO_DWORDS(sizeof(fw_info_location)); i++, addr += BYTES_IN_DWORD)
197411e25f0dSDavid C Somayajulu dest[i] = ecore_rd(p_hwfn, p_ptt, addr);
197511e25f0dSDavid C Somayajulu
197611e25f0dSDavid C Somayajulu /* Read FW version info from Storm RAM */
197711e25f0dSDavid C Somayajulu if (fw_info_location.size > 0 && fw_info_location.size <= sizeof(*fw_info)) {
197811e25f0dSDavid C Somayajulu addr = fw_info_location.grc_addr;
197911e25f0dSDavid C Somayajulu dest = (u32 *)fw_info;
198011e25f0dSDavid C Somayajulu for (i = 0; i < BYTES_TO_DWORDS(fw_info_location.size); i++, addr += BYTES_IN_DWORD)
198111e25f0dSDavid C Somayajulu dest[i] = ecore_rd(p_hwfn, p_ptt, addr);
198211e25f0dSDavid C Somayajulu }
198311e25f0dSDavid C Somayajulu }
198411e25f0dSDavid C Somayajulu
198511e25f0dSDavid C Somayajulu /* Dumps the specified string to the specified buffer.
198611e25f0dSDavid C Somayajulu * Returns the dumped size in bytes.
198711e25f0dSDavid C Somayajulu */
ecore_dump_str(char * dump_buf,bool dump,const char * str)198811e25f0dSDavid C Somayajulu static u32 ecore_dump_str(char *dump_buf,
198911e25f0dSDavid C Somayajulu bool dump,
199011e25f0dSDavid C Somayajulu const char *str)
199111e25f0dSDavid C Somayajulu {
199211e25f0dSDavid C Somayajulu if (dump)
199311e25f0dSDavid C Somayajulu OSAL_STRCPY(dump_buf, str);
199411e25f0dSDavid C Somayajulu
199511e25f0dSDavid C Somayajulu return (u32)OSAL_STRLEN(str) + 1;
199611e25f0dSDavid C Somayajulu }
199711e25f0dSDavid C Somayajulu
199811e25f0dSDavid C Somayajulu /* Dumps zeros to align the specified buffer to dwords.
199911e25f0dSDavid C Somayajulu * Returns the dumped size in bytes.
200011e25f0dSDavid C Somayajulu */
ecore_dump_align(char * dump_buf,bool dump,u32 byte_offset)200111e25f0dSDavid C Somayajulu static u32 ecore_dump_align(char *dump_buf,
200211e25f0dSDavid C Somayajulu bool dump,
200311e25f0dSDavid C Somayajulu u32 byte_offset)
200411e25f0dSDavid C Somayajulu {
200511e25f0dSDavid C Somayajulu u8 offset_in_dword, align_size;
200611e25f0dSDavid C Somayajulu
200711e25f0dSDavid C Somayajulu offset_in_dword = (u8)(byte_offset & 0x3);
200811e25f0dSDavid C Somayajulu align_size = offset_in_dword ? BYTES_IN_DWORD - offset_in_dword : 0;
200911e25f0dSDavid C Somayajulu
201011e25f0dSDavid C Somayajulu if (dump && align_size)
201111e25f0dSDavid C Somayajulu OSAL_MEMSET(dump_buf, 0, align_size);
201211e25f0dSDavid C Somayajulu
201311e25f0dSDavid C Somayajulu return align_size;
201411e25f0dSDavid C Somayajulu }
201511e25f0dSDavid C Somayajulu
201611e25f0dSDavid C Somayajulu /* Writes the specified string param to the specified buffer.
201711e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
201811e25f0dSDavid C Somayajulu */
ecore_dump_str_param(u32 * dump_buf,bool dump,const char * param_name,const char * param_val)201911e25f0dSDavid C Somayajulu static u32 ecore_dump_str_param(u32 *dump_buf,
202011e25f0dSDavid C Somayajulu bool dump,
202111e25f0dSDavid C Somayajulu const char *param_name,
202211e25f0dSDavid C Somayajulu const char *param_val)
202311e25f0dSDavid C Somayajulu {
202411e25f0dSDavid C Somayajulu char *char_buf = (char *)dump_buf;
202511e25f0dSDavid C Somayajulu u32 offset = 0;
202611e25f0dSDavid C Somayajulu
202711e25f0dSDavid C Somayajulu /* Dump param name */
202811e25f0dSDavid C Somayajulu offset += ecore_dump_str(char_buf + offset, dump, param_name);
202911e25f0dSDavid C Somayajulu
203011e25f0dSDavid C Somayajulu /* Indicate a string param value */
203111e25f0dSDavid C Somayajulu if (dump)
203211e25f0dSDavid C Somayajulu *(char_buf + offset) = 1;
203311e25f0dSDavid C Somayajulu offset++;
203411e25f0dSDavid C Somayajulu
203511e25f0dSDavid C Somayajulu /* Dump param value */
203611e25f0dSDavid C Somayajulu offset += ecore_dump_str(char_buf + offset, dump, param_val);
203711e25f0dSDavid C Somayajulu
203811e25f0dSDavid C Somayajulu /* Align buffer to next dword */
203911e25f0dSDavid C Somayajulu offset += ecore_dump_align(char_buf + offset, dump, offset);
204011e25f0dSDavid C Somayajulu
204111e25f0dSDavid C Somayajulu return BYTES_TO_DWORDS(offset);
204211e25f0dSDavid C Somayajulu }
204311e25f0dSDavid C Somayajulu
204411e25f0dSDavid C Somayajulu /* Writes the specified numeric param to the specified buffer.
204511e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
204611e25f0dSDavid C Somayajulu */
ecore_dump_num_param(u32 * dump_buf,bool dump,const char * param_name,u32 param_val)204711e25f0dSDavid C Somayajulu static u32 ecore_dump_num_param(u32 *dump_buf,
204811e25f0dSDavid C Somayajulu bool dump,
204911e25f0dSDavid C Somayajulu const char *param_name,
205011e25f0dSDavid C Somayajulu u32 param_val)
205111e25f0dSDavid C Somayajulu {
205211e25f0dSDavid C Somayajulu char *char_buf = (char *)dump_buf;
205311e25f0dSDavid C Somayajulu u32 offset = 0;
205411e25f0dSDavid C Somayajulu
205511e25f0dSDavid C Somayajulu /* Dump param name */
205611e25f0dSDavid C Somayajulu offset += ecore_dump_str(char_buf + offset, dump, param_name);
205711e25f0dSDavid C Somayajulu
205811e25f0dSDavid C Somayajulu /* Indicate a numeric param value */
205911e25f0dSDavid C Somayajulu if (dump)
206011e25f0dSDavid C Somayajulu *(char_buf + offset) = 0;
206111e25f0dSDavid C Somayajulu offset++;
206211e25f0dSDavid C Somayajulu
206311e25f0dSDavid C Somayajulu /* Align buffer to next dword */
206411e25f0dSDavid C Somayajulu offset += ecore_dump_align(char_buf + offset, dump, offset);
206511e25f0dSDavid C Somayajulu
206611e25f0dSDavid C Somayajulu /* Dump param value (and change offset from bytes to dwords) */
206711e25f0dSDavid C Somayajulu offset = BYTES_TO_DWORDS(offset);
206811e25f0dSDavid C Somayajulu if (dump)
206911e25f0dSDavid C Somayajulu *(dump_buf + offset) = param_val;
207011e25f0dSDavid C Somayajulu offset++;
207111e25f0dSDavid C Somayajulu
207211e25f0dSDavid C Somayajulu return offset;
207311e25f0dSDavid C Somayajulu }
207411e25f0dSDavid C Somayajulu
207511e25f0dSDavid C Somayajulu /* Reads the FW version and writes it as a param to the specified buffer.
207611e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
207711e25f0dSDavid C Somayajulu */
ecore_dump_fw_ver_param(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)207811e25f0dSDavid C Somayajulu static u32 ecore_dump_fw_ver_param(struct ecore_hwfn *p_hwfn,
207911e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
208011e25f0dSDavid C Somayajulu u32 *dump_buf,
208111e25f0dSDavid C Somayajulu bool dump)
208211e25f0dSDavid C Somayajulu {
208311e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
208411e25f0dSDavid C Somayajulu char fw_ver_str[16] = EMPTY_FW_VERSION_STR;
208511e25f0dSDavid C Somayajulu char fw_img_str[16] = EMPTY_FW_IMAGE_STR;
208611e25f0dSDavid C Somayajulu struct fw_info fw_info = { { 0 }, { 0 } };
208711e25f0dSDavid C Somayajulu u32 offset = 0;
208811e25f0dSDavid C Somayajulu
208911e25f0dSDavid C Somayajulu if (dump && !ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_FW_VER)) {
209011e25f0dSDavid C Somayajulu /* Read FW image/version from PRAM in a non-reset SEMI */
209111e25f0dSDavid C Somayajulu bool found = false;
209211e25f0dSDavid C Somayajulu u8 storm_id;
209311e25f0dSDavid C Somayajulu
209411e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS && !found; storm_id++) {
209511e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
209611e25f0dSDavid C Somayajulu
209711e25f0dSDavid C Somayajulu /* Read FW version/image */
209811e25f0dSDavid C Somayajulu if (dev_data->block_in_reset[storm->block_id])
209911e25f0dSDavid C Somayajulu continue;
210011e25f0dSDavid C Somayajulu
210111e25f0dSDavid C Somayajulu /* Read FW info for the current Storm */
210211e25f0dSDavid C Somayajulu ecore_read_fw_info(p_hwfn, p_ptt, storm_id, &fw_info);
210311e25f0dSDavid C Somayajulu
210411e25f0dSDavid C Somayajulu /* Create FW version/image strings */
210511e25f0dSDavid C Somayajulu if (OSAL_SNPRINTF(fw_ver_str, sizeof(fw_ver_str), "%d_%d_%d_%d", fw_info.ver.num.major, fw_info.ver.num.minor, fw_info.ver.num.rev, fw_info.ver.num.eng) < 0)
210611e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "Unexpected debug error: invalid FW version string\n");
210711e25f0dSDavid C Somayajulu switch (fw_info.ver.image_id) {
210811e25f0dSDavid C Somayajulu case FW_IMG_KUKU: OSAL_STRCPY(fw_img_str, "kuku"); break;
210911e25f0dSDavid C Somayajulu case FW_IMG_MAIN: OSAL_STRCPY(fw_img_str, "main"); break;
211011e25f0dSDavid C Somayajulu case FW_IMG_L2B: OSAL_STRCPY(fw_img_str, "l2b"); break;
211111e25f0dSDavid C Somayajulu default: OSAL_STRCPY(fw_img_str, "unknown"); break;
211211e25f0dSDavid C Somayajulu }
211311e25f0dSDavid C Somayajulu
211411e25f0dSDavid C Somayajulu found = true;
211511e25f0dSDavid C Somayajulu }
211611e25f0dSDavid C Somayajulu }
211711e25f0dSDavid C Somayajulu
211811e25f0dSDavid C Somayajulu /* Dump FW version, image and timestamp */
211911e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "fw-version", fw_ver_str);
212011e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "fw-image", fw_img_str);
212111e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "fw-timestamp", fw_info.ver.timestamp);
212211e25f0dSDavid C Somayajulu
212311e25f0dSDavid C Somayajulu return offset;
212411e25f0dSDavid C Somayajulu }
212511e25f0dSDavid C Somayajulu
212611e25f0dSDavid C Somayajulu /* Reads the MFW version and writes it as a param to the specified buffer.
212711e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
212811e25f0dSDavid C Somayajulu */
ecore_dump_mfw_ver_param(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)212911e25f0dSDavid C Somayajulu static u32 ecore_dump_mfw_ver_param(struct ecore_hwfn *p_hwfn,
213011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
213111e25f0dSDavid C Somayajulu u32 *dump_buf,
213211e25f0dSDavid C Somayajulu bool dump)
213311e25f0dSDavid C Somayajulu {
213411e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
213511e25f0dSDavid C Somayajulu char mfw_ver_str[16] = EMPTY_FW_VERSION_STR;
213611e25f0dSDavid C Somayajulu
21379efd0ba7SDavid C Somayajulu if (dump && dev_data->platform_id == PLATFORM_ASIC && !ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_FW_VER)) {
213811e25f0dSDavid C Somayajulu u32 public_data_addr, global_section_offsize_addr, global_section_offsize, global_section_addr, mfw_ver;
213911e25f0dSDavid C Somayajulu
214011e25f0dSDavid C Somayajulu /* Find MCP public data GRC address. Needs to be ORed with
214111e25f0dSDavid C Somayajulu * MCP_REG_SCRATCH due to a HW bug.
214211e25f0dSDavid C Somayajulu */
214311e25f0dSDavid C Somayajulu public_data_addr = ecore_rd(p_hwfn, p_ptt, MISC_REG_SHARED_MEM_ADDR) | MCP_REG_SCRATCH;
214411e25f0dSDavid C Somayajulu
214511e25f0dSDavid C Somayajulu /* Find MCP public global section offset */
214611e25f0dSDavid C Somayajulu global_section_offsize_addr = public_data_addr + OFFSETOF(struct mcp_public_data, sections) + sizeof(offsize_t) * PUBLIC_GLOBAL;
214711e25f0dSDavid C Somayajulu global_section_offsize = ecore_rd(p_hwfn, p_ptt, global_section_offsize_addr);
214811e25f0dSDavid C Somayajulu global_section_addr = MCP_REG_SCRATCH + (global_section_offsize & OFFSIZE_OFFSET_MASK) * 4;
214911e25f0dSDavid C Somayajulu
215011e25f0dSDavid C Somayajulu /* Read MFW version from MCP public global section */
215111e25f0dSDavid C Somayajulu mfw_ver = ecore_rd(p_hwfn, p_ptt, global_section_addr + OFFSETOF(struct public_global, mfw_ver));
215211e25f0dSDavid C Somayajulu
215311e25f0dSDavid C Somayajulu /* Dump MFW version param */
215411e25f0dSDavid C Somayajulu if (OSAL_SNPRINTF(mfw_ver_str, sizeof(mfw_ver_str), "%d_%d_%d_%d", (u8)(mfw_ver >> 24), (u8)(mfw_ver >> 16), (u8)(mfw_ver >> 8), (u8)mfw_ver) < 0)
215511e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "Unexpected debug error: invalid MFW version string\n");
215611e25f0dSDavid C Somayajulu }
215711e25f0dSDavid C Somayajulu
215811e25f0dSDavid C Somayajulu return ecore_dump_str_param(dump_buf, dump, "mfw-version", mfw_ver_str);
215911e25f0dSDavid C Somayajulu }
216011e25f0dSDavid C Somayajulu
216111e25f0dSDavid C Somayajulu /* Writes a section header to the specified buffer.
216211e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
216311e25f0dSDavid C Somayajulu */
ecore_dump_section_hdr(u32 * dump_buf,bool dump,const char * name,u32 num_params)216411e25f0dSDavid C Somayajulu static u32 ecore_dump_section_hdr(u32 *dump_buf,
216511e25f0dSDavid C Somayajulu bool dump,
216611e25f0dSDavid C Somayajulu const char *name,
216711e25f0dSDavid C Somayajulu u32 num_params)
216811e25f0dSDavid C Somayajulu {
216911e25f0dSDavid C Somayajulu return ecore_dump_num_param(dump_buf, dump, name, num_params);
217011e25f0dSDavid C Somayajulu }
217111e25f0dSDavid C Somayajulu
217211e25f0dSDavid C Somayajulu /* Writes the common global params to the specified buffer.
217311e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
217411e25f0dSDavid C Somayajulu */
ecore_dump_common_global_params(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u8 num_specific_global_params)217511e25f0dSDavid C Somayajulu static u32 ecore_dump_common_global_params(struct ecore_hwfn *p_hwfn,
217611e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
217711e25f0dSDavid C Somayajulu u32 *dump_buf,
217811e25f0dSDavid C Somayajulu bool dump,
217911e25f0dSDavid C Somayajulu u8 num_specific_global_params)
218011e25f0dSDavid C Somayajulu {
218111e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
218211e25f0dSDavid C Somayajulu u32 offset = 0;
218311e25f0dSDavid C Somayajulu u8 num_params;
218411e25f0dSDavid C Somayajulu
218511e25f0dSDavid C Somayajulu /* Dump global params section header */
218611e25f0dSDavid C Somayajulu num_params = NUM_COMMON_GLOBAL_PARAMS + num_specific_global_params;
218711e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "global_params", num_params);
218811e25f0dSDavid C Somayajulu
218911e25f0dSDavid C Somayajulu /* Store params */
219011e25f0dSDavid C Somayajulu offset += ecore_dump_fw_ver_param(p_hwfn, p_ptt, dump_buf + offset, dump);
219111e25f0dSDavid C Somayajulu offset += ecore_dump_mfw_ver_param(p_hwfn, p_ptt, dump_buf + offset, dump);
219211e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "tools-version", TOOLS_VERSION);
219311e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "chip", s_chip_defs[dev_data->chip_id].name);
219411e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "platform", s_platform_defs[dev_data->platform_id].name);
219511e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "pci-func", p_hwfn->abs_pf_id);
219611e25f0dSDavid C Somayajulu
219711e25f0dSDavid C Somayajulu return offset;
219811e25f0dSDavid C Somayajulu }
219911e25f0dSDavid C Somayajulu
220011e25f0dSDavid C Somayajulu /* Writes the "last" section (including CRC) to the specified buffer at the
220111e25f0dSDavid C Somayajulu * given offset. Returns the dumped size in dwords.
220211e25f0dSDavid C Somayajulu */
ecore_dump_last_section(u32 * dump_buf,u32 offset,bool dump)2203217ec208SDavid C Somayajulu static u32 ecore_dump_last_section(u32 *dump_buf,
2204217ec208SDavid C Somayajulu u32 offset,
2205217ec208SDavid C Somayajulu bool dump)
220611e25f0dSDavid C Somayajulu {
220711e25f0dSDavid C Somayajulu u32 start_offset = offset;
220811e25f0dSDavid C Somayajulu
220911e25f0dSDavid C Somayajulu /* Dump CRC section header */
221011e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "last", 0);
221111e25f0dSDavid C Somayajulu
221211e25f0dSDavid C Somayajulu /* Calculate CRC32 and add it to the dword after the "last" section */
221311e25f0dSDavid C Somayajulu if (dump)
221411e25f0dSDavid C Somayajulu *(dump_buf + offset) = ~OSAL_CRC32(0xffffffff, (u8 *)dump_buf, DWORDS_TO_BYTES(offset));
221511e25f0dSDavid C Somayajulu
221611e25f0dSDavid C Somayajulu offset++;
221711e25f0dSDavid C Somayajulu
221811e25f0dSDavid C Somayajulu return offset - start_offset;
221911e25f0dSDavid C Somayajulu }
222011e25f0dSDavid C Somayajulu
222111e25f0dSDavid C Somayajulu /* Update blocks reset state */
ecore_update_blocks_reset_state(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)222211e25f0dSDavid C Somayajulu static void ecore_update_blocks_reset_state(struct ecore_hwfn *p_hwfn,
222311e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt)
222411e25f0dSDavid C Somayajulu {
222511e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
222611e25f0dSDavid C Somayajulu u32 reg_val[MAX_DBG_RESET_REGS] = { 0 };
222711e25f0dSDavid C Somayajulu u32 i;
222811e25f0dSDavid C Somayajulu
222911e25f0dSDavid C Somayajulu /* Read reset registers */
223011e25f0dSDavid C Somayajulu for (i = 0; i < MAX_DBG_RESET_REGS; i++)
223111e25f0dSDavid C Somayajulu if (s_reset_regs_defs[i].exists[dev_data->chip_id])
223211e25f0dSDavid C Somayajulu reg_val[i] = ecore_rd(p_hwfn, p_ptt, s_reset_regs_defs[i].addr);
223311e25f0dSDavid C Somayajulu
223411e25f0dSDavid C Somayajulu /* Check if blocks are in reset */
223511e25f0dSDavid C Somayajulu for (i = 0; i < MAX_BLOCK_ID; i++) {
223611e25f0dSDavid C Somayajulu struct block_defs *block = s_block_defs[i];
223711e25f0dSDavid C Somayajulu
223811e25f0dSDavid C Somayajulu dev_data->block_in_reset[i] = block->has_reset_bit && !(reg_val[block->reset_reg] & (1 << block->reset_bit_offset));
223911e25f0dSDavid C Somayajulu }
224011e25f0dSDavid C Somayajulu }
224111e25f0dSDavid C Somayajulu
224211e25f0dSDavid C Somayajulu /* Enable / disable the Debug block */
ecore_bus_enable_dbg_block(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,bool enable)224311e25f0dSDavid C Somayajulu static void ecore_bus_enable_dbg_block(struct ecore_hwfn *p_hwfn,
224411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
224511e25f0dSDavid C Somayajulu bool enable)
224611e25f0dSDavid C Somayajulu {
224711e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_DBG_BLOCK_ON, enable ? 1 : 0);
224811e25f0dSDavid C Somayajulu }
224911e25f0dSDavid C Somayajulu
225011e25f0dSDavid C Somayajulu /* Resets the Debug block */
ecore_bus_reset_dbg_block(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)225111e25f0dSDavid C Somayajulu static void ecore_bus_reset_dbg_block(struct ecore_hwfn *p_hwfn,
225211e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt)
225311e25f0dSDavid C Somayajulu {
225411e25f0dSDavid C Somayajulu u32 dbg_reset_reg_addr, old_reset_reg_val, new_reset_reg_val;
225511e25f0dSDavid C Somayajulu struct block_defs *dbg_block = s_block_defs[BLOCK_DBG];
225611e25f0dSDavid C Somayajulu
225711e25f0dSDavid C Somayajulu dbg_reset_reg_addr = s_reset_regs_defs[dbg_block->reset_reg].addr;
225811e25f0dSDavid C Somayajulu old_reset_reg_val = ecore_rd(p_hwfn, p_ptt, dbg_reset_reg_addr);
225911e25f0dSDavid C Somayajulu new_reset_reg_val = old_reset_reg_val & ~(1 << dbg_block->reset_bit_offset);
226011e25f0dSDavid C Somayajulu
226111e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, dbg_reset_reg_addr, new_reset_reg_val);
226211e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, dbg_reset_reg_addr, old_reset_reg_val);
226311e25f0dSDavid C Somayajulu }
226411e25f0dSDavid C Somayajulu
ecore_bus_set_framing_mode(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum dbg_bus_frame_modes mode)226511e25f0dSDavid C Somayajulu static void ecore_bus_set_framing_mode(struct ecore_hwfn *p_hwfn,
226611e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
226711e25f0dSDavid C Somayajulu enum dbg_bus_frame_modes mode)
226811e25f0dSDavid C Somayajulu {
226911e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_FRAMING_MODE, (u8)mode);
227011e25f0dSDavid C Somayajulu }
227111e25f0dSDavid C Somayajulu
227211e25f0dSDavid C Somayajulu /* Enable / disable Debug Bus clients according to the specified mask
227311e25f0dSDavid C Somayajulu * (1 = enable, 0 = disable).
227411e25f0dSDavid C Somayajulu */
ecore_bus_enable_clients(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 client_mask)227511e25f0dSDavid C Somayajulu static void ecore_bus_enable_clients(struct ecore_hwfn *p_hwfn,
227611e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
227711e25f0dSDavid C Somayajulu u32 client_mask)
227811e25f0dSDavid C Somayajulu {
227911e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_CLIENT_ENABLE, client_mask);
228011e25f0dSDavid C Somayajulu }
228111e25f0dSDavid C Somayajulu
228211e25f0dSDavid C Somayajulu /* Enables the specified Storm for Debug Bus. Assumes a valid Storm ID. */
ecore_bus_enable_storm(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum dbg_storms storm_id)228311e25f0dSDavid C Somayajulu static void ecore_bus_enable_storm(struct ecore_hwfn *p_hwfn,
228411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
2285217ec208SDavid C Somayajulu enum dbg_storms storm_id)
228611e25f0dSDavid C Somayajulu {
228711e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
2288217ec208SDavid C Somayajulu u32 base_addr, sem_filter_params = 0;
228911e25f0dSDavid C Somayajulu struct dbg_bus_storm_data *storm_bus;
229011e25f0dSDavid C Somayajulu struct storm_mode_defs *storm_mode;
229111e25f0dSDavid C Somayajulu struct storm_defs *storm;
229211e25f0dSDavid C Somayajulu
229311e25f0dSDavid C Somayajulu storm = &s_storm_defs[storm_id];
229411e25f0dSDavid C Somayajulu storm_bus = &dev_data->bus.storms[storm_id];
229511e25f0dSDavid C Somayajulu storm_mode = &s_storm_mode_defs[storm_bus->mode];
229611e25f0dSDavid C Somayajulu base_addr = storm->sem_fast_mem_addr;
229711e25f0dSDavid C Somayajulu
229811e25f0dSDavid C Somayajulu /* Config SEM */
229911e25f0dSDavid C Somayajulu if (storm_mode->is_fast_dbg) {
230011e25f0dSDavid C Somayajulu /* Enable fast debug */
230111e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, storm->sem_frame_mode_addr, DBG_BUS_SEMI_FRAME_MODE_0SLOW_4FAST);
230211e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DEBUG_MODE, storm_mode->id_in_hw);
230311e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DEBUG_ACTIVE, 1);
230411e25f0dSDavid C Somayajulu
2305217ec208SDavid C Somayajulu /* Enable messages. Must be done after enabling
2306217ec208SDavid C Somayajulu * SEM_FAST_REG_DEBUG_ACTIVE, otherwise messages will
230711e25f0dSDavid C Somayajulu * be dropped after the SEMI sync fifo is filled.
230811e25f0dSDavid C Somayajulu */
2309217ec208SDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DBG_MODE23_SRC_DISABLE, SEM_FAST_MODE23_SRC_ENABLE_VAL);
2310217ec208SDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DBG_MODE4_SRC_DISABLE, SEM_FAST_MODE4_SRC_ENABLE_VAL);
2311217ec208SDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DBG_MODE6_SRC_DISABLE, SEM_FAST_MODE6_SRC_ENABLE_VAL);
231211e25f0dSDavid C Somayajulu }
231311e25f0dSDavid C Somayajulu else {
2314217ec208SDavid C Somayajulu /* Enable slow debug */
231511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, storm->sem_frame_mode_addr, DBG_BUS_SEMI_FRAME_MODE_4SLOW_0FAST);
231611e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, storm->sem_slow_enable_addr, 1);
231711e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, storm->sem_slow_mode_addr, storm_mode->id_in_hw);
231811e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, storm->sem_slow_mode1_conf_addr, SEM_SLOW_MODE1_DATA_ENABLE);
231911e25f0dSDavid C Somayajulu }
232011e25f0dSDavid C Somayajulu
232111e25f0dSDavid C Somayajulu /* Config SEM cid filter */
232211e25f0dSDavid C Somayajulu if (storm_bus->cid_filter_en) {
232311e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_FILTER_CID, storm_bus->cid);
232411e25f0dSDavid C Somayajulu sem_filter_params |= SEM_FILTER_CID_EN_MASK;
232511e25f0dSDavid C Somayajulu }
232611e25f0dSDavid C Somayajulu
232711e25f0dSDavid C Somayajulu /* Config SEM eid filter */
232811e25f0dSDavid C Somayajulu if (storm_bus->eid_filter_en) {
232911e25f0dSDavid C Somayajulu const union dbg_bus_storm_eid_params *eid_filter = &storm_bus->eid_filter_params;
233011e25f0dSDavid C Somayajulu
233111e25f0dSDavid C Somayajulu if (storm_bus->eid_range_not_mask) {
233211e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_EVENT_ID_RANGE_STRT, eid_filter->range.min);
233311e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_EVENT_ID_RANGE_END, eid_filter->range.max);
233411e25f0dSDavid C Somayajulu sem_filter_params |= SEM_FILTER_EID_RANGE_EN_MASK;
233511e25f0dSDavid C Somayajulu }
233611e25f0dSDavid C Somayajulu else {
233711e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_FILTER_EVENT_ID, eid_filter->mask.val);
233811e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_EVENT_ID_MASK, ~eid_filter->mask.mask);
233911e25f0dSDavid C Somayajulu sem_filter_params |= SEM_FILTER_EID_MASK_EN_MASK;
234011e25f0dSDavid C Somayajulu }
234111e25f0dSDavid C Somayajulu }
234211e25f0dSDavid C Somayajulu
234311e25f0dSDavid C Somayajulu /* Config accumulaed SEM filter parameters (if any) */
234411e25f0dSDavid C Somayajulu if (sem_filter_params)
234511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_RECORD_FILTER_ENABLE, sem_filter_params);
234611e25f0dSDavid C Somayajulu }
234711e25f0dSDavid C Somayajulu
234811e25f0dSDavid C Somayajulu /* Disables Debug Bus block inputs */
ecore_bus_disable_inputs(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,bool empty_semi_fifos)234911e25f0dSDavid C Somayajulu static enum dbg_status ecore_bus_disable_inputs(struct ecore_hwfn *p_hwfn,
235011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
235111e25f0dSDavid C Somayajulu bool empty_semi_fifos)
235211e25f0dSDavid C Somayajulu {
235311e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
235411e25f0dSDavid C Somayajulu u8 storm_id, num_fifos_to_empty = MAX_DBG_STORMS;
235511e25f0dSDavid C Somayajulu bool is_fifo_empty[MAX_DBG_STORMS] = { false };
235611e25f0dSDavid C Somayajulu u32 block_id;
235711e25f0dSDavid C Somayajulu
235811e25f0dSDavid C Somayajulu /* Disable messages output in all Storms */
235911e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
236011e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
236111e25f0dSDavid C Somayajulu
2362217ec208SDavid C Somayajulu if (dev_data->block_in_reset[storm->block_id])
2363217ec208SDavid C Somayajulu continue;
2364217ec208SDavid C Somayajulu
2365217ec208SDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, storm->sem_fast_mem_addr + SEM_FAST_REG_DBG_MODE23_SRC_DISABLE, SEM_FAST_MODE23_SRC_DISABLE_VAL);
2366217ec208SDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, storm->sem_fast_mem_addr + SEM_FAST_REG_DBG_MODE4_SRC_DISABLE, SEM_FAST_MODE4_SRC_DISABLE_VAL);
2367217ec208SDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, storm->sem_fast_mem_addr + SEM_FAST_REG_DBG_MODE6_SRC_DISABLE, SEM_FAST_MODE6_SRC_DISABLE_VAL);
236811e25f0dSDavid C Somayajulu }
236911e25f0dSDavid C Somayajulu
237011e25f0dSDavid C Somayajulu /* Try to empty the SEMI sync fifo. Must be done after messages output
2371217ec208SDavid C Somayajulu * were disabled in all Storms.
237211e25f0dSDavid C Somayajulu */
237311e25f0dSDavid C Somayajulu while (num_fifos_to_empty) {
237411e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
237511e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
237611e25f0dSDavid C Somayajulu
237711e25f0dSDavid C Somayajulu if (is_fifo_empty[storm_id])
237811e25f0dSDavid C Somayajulu continue;
237911e25f0dSDavid C Somayajulu
238011e25f0dSDavid C Somayajulu /* Check if sync fifo got empty */
238111e25f0dSDavid C Somayajulu if (dev_data->block_in_reset[storm->block_id] || ecore_rd(p_hwfn, p_ptt, storm->sem_sync_dbg_empty_addr)) {
238211e25f0dSDavid C Somayajulu is_fifo_empty[storm_id] = true;
238311e25f0dSDavid C Somayajulu num_fifos_to_empty--;
238411e25f0dSDavid C Somayajulu }
238511e25f0dSDavid C Somayajulu }
238611e25f0dSDavid C Somayajulu
238711e25f0dSDavid C Somayajulu /* Check if need to continue polling */
238811e25f0dSDavid C Somayajulu if (num_fifos_to_empty) {
238911e25f0dSDavid C Somayajulu u32 polling_ms = SEMI_SYNC_FIFO_POLLING_DELAY_MS * s_platform_defs[dev_data->platform_id].delay_factor;
239011e25f0dSDavid C Somayajulu u32 polling_count = 0;
239111e25f0dSDavid C Somayajulu
239211e25f0dSDavid C Somayajulu if (empty_semi_fifos && polling_count < SEMI_SYNC_FIFO_POLLING_COUNT) {
239311e25f0dSDavid C Somayajulu OSAL_MSLEEP(polling_ms);
239411e25f0dSDavid C Somayajulu polling_count++;
239511e25f0dSDavid C Somayajulu }
239611e25f0dSDavid C Somayajulu else {
239711e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, false, "Warning: failed to empty the SEMI sync FIFO. It means that the last few messages from the SEMI could not be sent to the DBG block. This can happen when the DBG block is blocked (e.g. due to a PCI problem).\n");
239811e25f0dSDavid C Somayajulu break;
239911e25f0dSDavid C Somayajulu }
240011e25f0dSDavid C Somayajulu }
240111e25f0dSDavid C Somayajulu }
240211e25f0dSDavid C Somayajulu
240311e25f0dSDavid C Somayajulu /* Disable debug in all Storms */
240411e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
240511e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
240611e25f0dSDavid C Somayajulu u32 base_addr = storm->sem_fast_mem_addr;
240711e25f0dSDavid C Somayajulu
240811e25f0dSDavid C Somayajulu if (dev_data->block_in_reset[storm->block_id])
240911e25f0dSDavid C Somayajulu continue;
241011e25f0dSDavid C Somayajulu
241111e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DEBUG_ACTIVE, 0);
241211e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_RECORD_FILTER_ENABLE, DBG_BUS_FILTER_TYPE_OFF);
241311e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, storm->sem_frame_mode_addr, DBG_BUS_FRAME_MODE_4HW_0ST);
241411e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, storm->sem_slow_enable_addr, 0);
241511e25f0dSDavid C Somayajulu }
241611e25f0dSDavid C Somayajulu
241711e25f0dSDavid C Somayajulu /* Disable all clients */
241811e25f0dSDavid C Somayajulu ecore_bus_enable_clients(p_hwfn, p_ptt, 0);
241911e25f0dSDavid C Somayajulu
242011e25f0dSDavid C Somayajulu /* Disable all blocks */
242111e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) {
242211e25f0dSDavid C Somayajulu struct block_defs *block = s_block_defs[block_id];
242311e25f0dSDavid C Somayajulu
24249efd0ba7SDavid C Somayajulu if (block->dbg_client_id[dev_data->chip_id] != MAX_DBG_BUS_CLIENTS && !dev_data->block_in_reset[block_id])
242511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, block->dbg_enable_addr, 0);
242611e25f0dSDavid C Somayajulu }
242711e25f0dSDavid C Somayajulu
242811e25f0dSDavid C Somayajulu /* Disable timestamp */
242911e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TIMESTAMP_VALID_EN, 0);
243011e25f0dSDavid C Somayajulu
243111e25f0dSDavid C Somayajulu /* Disable filters and triggers */
243211e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_FILTER_ENABLE, DBG_BUS_FILTER_TYPE_OFF);
243311e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_ENABLE, 0);
243411e25f0dSDavid C Somayajulu
243511e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
243611e25f0dSDavid C Somayajulu }
243711e25f0dSDavid C Somayajulu
243811e25f0dSDavid C Somayajulu /* Sets a Debug Bus trigger/filter constraint */
ecore_bus_set_constraint(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,bool is_filter,u8 constraint_id,u8 hw_op_val,u32 data_val,u32 data_mask,u8 frame_bit,u8 frame_mask,u16 dword_offset,u16 range,u8 cyclic_bit,u8 must_bit)243911e25f0dSDavid C Somayajulu static void ecore_bus_set_constraint(struct ecore_hwfn *p_hwfn,
244011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
244111e25f0dSDavid C Somayajulu bool is_filter,
244211e25f0dSDavid C Somayajulu u8 constraint_id,
244311e25f0dSDavid C Somayajulu u8 hw_op_val,
244411e25f0dSDavid C Somayajulu u32 data_val,
244511e25f0dSDavid C Somayajulu u32 data_mask,
244611e25f0dSDavid C Somayajulu u8 frame_bit,
244711e25f0dSDavid C Somayajulu u8 frame_mask,
244811e25f0dSDavid C Somayajulu u16 dword_offset,
244911e25f0dSDavid C Somayajulu u16 range,
245011e25f0dSDavid C Somayajulu u8 cyclic_bit,
245111e25f0dSDavid C Somayajulu u8 must_bit)
245211e25f0dSDavid C Somayajulu {
245311e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
245411e25f0dSDavid C Somayajulu u32 reg_offset = constraint_id * BYTES_IN_DWORD;
245511e25f0dSDavid C Somayajulu u8 curr_trigger_state;
245611e25f0dSDavid C Somayajulu
245711e25f0dSDavid C Somayajulu /* For trigger only - set register offset according to state */
245811e25f0dSDavid C Somayajulu if (!is_filter) {
245911e25f0dSDavid C Somayajulu curr_trigger_state = dev_data->bus.next_trigger_state - 1;
246011e25f0dSDavid C Somayajulu reg_offset += curr_trigger_state * TRIGGER_SETS_PER_STATE * MAX_CONSTRAINTS * BYTES_IN_DWORD;
246111e25f0dSDavid C Somayajulu }
246211e25f0dSDavid C Somayajulu
246311e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_OPRTN_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_OPRTN_0) + reg_offset, hw_op_val);
246411e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_DATA_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_DATA_0) + reg_offset, data_val);
246511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_DATA_MASK_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_DATA_MASK_0) + reg_offset, data_mask);
246611e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_FRAME_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_FRAME_0) + reg_offset, frame_bit);
246711e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_FRAME_MASK_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_FRAME_MASK_0) + reg_offset, frame_mask);
246811e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_OFFSET_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_OFFSET_0) + reg_offset, dword_offset);
246911e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_RANGE_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_RANGE_0) + reg_offset, range);
247011e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_CYCLIC_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_CYCLIC_0) + reg_offset, cyclic_bit);
247111e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_MUST_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_MUST_0) + reg_offset, must_bit);
247211e25f0dSDavid C Somayajulu }
247311e25f0dSDavid C Somayajulu
247411e25f0dSDavid C Somayajulu /* Reads the specified DBG Bus internal buffer range and copy it to the
247511e25f0dSDavid C Somayajulu * specified buffer. Returns the dumped size in dwords.
247611e25f0dSDavid C Somayajulu */
ecore_bus_dump_int_buf_range(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u32 start_line,u32 end_line)247711e25f0dSDavid C Somayajulu static u32 ecore_bus_dump_int_buf_range(struct ecore_hwfn *p_hwfn,
247811e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
247911e25f0dSDavid C Somayajulu u32 *dump_buf,
248011e25f0dSDavid C Somayajulu bool dump,
248111e25f0dSDavid C Somayajulu u32 start_line,
248211e25f0dSDavid C Somayajulu u32 end_line)
248311e25f0dSDavid C Somayajulu {
248411e25f0dSDavid C Somayajulu u32 line, reg_addr, i, offset = 0;
248511e25f0dSDavid C Somayajulu
248611e25f0dSDavid C Somayajulu if (!dump)
248711e25f0dSDavid C Somayajulu return (end_line - start_line + 1) * INT_BUF_LINE_SIZE_IN_DWORDS;
248811e25f0dSDavid C Somayajulu
248911e25f0dSDavid C Somayajulu for (line = start_line, reg_addr = DBG_REG_INTR_BUFFER + DWORDS_TO_BYTES(start_line * INT_BUF_LINE_SIZE_IN_DWORDS);
249011e25f0dSDavid C Somayajulu line <= end_line;
249111e25f0dSDavid C Somayajulu line++, offset += INT_BUF_LINE_SIZE_IN_DWORDS)
249211e25f0dSDavid C Somayajulu for (i = 0; i < INT_BUF_LINE_SIZE_IN_DWORDS; i++, reg_addr += BYTES_IN_DWORD)
249311e25f0dSDavid C Somayajulu dump_buf[offset + INT_BUF_LINE_SIZE_IN_DWORDS - 1 - i] = ecore_rd(p_hwfn, p_ptt, reg_addr);
249411e25f0dSDavid C Somayajulu
249511e25f0dSDavid C Somayajulu return offset;
249611e25f0dSDavid C Somayajulu }
249711e25f0dSDavid C Somayajulu
249811e25f0dSDavid C Somayajulu /* Reads the DBG Bus internal buffer and copy its contents to a buffer.
249911e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
250011e25f0dSDavid C Somayajulu */
ecore_bus_dump_int_buf(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)250111e25f0dSDavid C Somayajulu static u32 ecore_bus_dump_int_buf(struct ecore_hwfn *p_hwfn,
250211e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
250311e25f0dSDavid C Somayajulu u32 *dump_buf,
250411e25f0dSDavid C Somayajulu bool dump)
250511e25f0dSDavid C Somayajulu {
250611e25f0dSDavid C Somayajulu u32 last_written_line, offset = 0;
250711e25f0dSDavid C Somayajulu
250811e25f0dSDavid C Somayajulu last_written_line = ecore_rd(p_hwfn, p_ptt, DBG_REG_INTR_BUFFER_WR_PTR);
250911e25f0dSDavid C Somayajulu
251011e25f0dSDavid C Somayajulu if (ecore_rd(p_hwfn, p_ptt, DBG_REG_WRAP_ON_INT_BUFFER)) {
251111e25f0dSDavid C Somayajulu /* Internal buffer was wrapped: first dump from write pointer
251211e25f0dSDavid C Somayajulu * to buffer end, then dump from buffer start to write pointer.
251311e25f0dSDavid C Somayajulu */
251411e25f0dSDavid C Somayajulu if (last_written_line < INT_BUF_NUM_OF_LINES - 1)
251511e25f0dSDavid C Somayajulu offset += ecore_bus_dump_int_buf_range(p_hwfn, p_ptt, dump_buf + offset, dump, last_written_line + 1, INT_BUF_NUM_OF_LINES - 1);
251611e25f0dSDavid C Somayajulu offset += ecore_bus_dump_int_buf_range(p_hwfn, p_ptt, dump_buf + offset, dump, 0, last_written_line);
251711e25f0dSDavid C Somayajulu }
251811e25f0dSDavid C Somayajulu else if (last_written_line) {
251911e25f0dSDavid C Somayajulu /* Internal buffer wasn't wrapped: dump from buffer start until
252011e25f0dSDavid C Somayajulu * write pointer.
252111e25f0dSDavid C Somayajulu */
252211e25f0dSDavid C Somayajulu if (!ecore_rd(p_hwfn, p_ptt, DBG_REG_INTR_BUFFER_RD_PTR))
252311e25f0dSDavid C Somayajulu offset += ecore_bus_dump_int_buf_range(p_hwfn, p_ptt, dump_buf + offset, dump, 0, last_written_line);
252411e25f0dSDavid C Somayajulu else
252511e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "Unexpected Debug Bus error: internal buffer read pointer is not zero\n");
252611e25f0dSDavid C Somayajulu }
252711e25f0dSDavid C Somayajulu
252811e25f0dSDavid C Somayajulu return offset;
252911e25f0dSDavid C Somayajulu }
253011e25f0dSDavid C Somayajulu
253111e25f0dSDavid C Somayajulu /* Reads the specified DBG Bus PCI buffer range and copy it to the specified
253211e25f0dSDavid C Somayajulu * buffer. Returns the dumped size in dwords.
253311e25f0dSDavid C Somayajulu */
ecore_bus_dump_pci_buf_range(struct ecore_hwfn * p_hwfn,u32 * dump_buf,bool dump,u32 start_line,u32 end_line)253411e25f0dSDavid C Somayajulu static u32 ecore_bus_dump_pci_buf_range(struct ecore_hwfn *p_hwfn,
253511e25f0dSDavid C Somayajulu u32 *dump_buf,
253611e25f0dSDavid C Somayajulu bool dump,
253711e25f0dSDavid C Somayajulu u32 start_line,
253811e25f0dSDavid C Somayajulu u32 end_line)
253911e25f0dSDavid C Somayajulu {
254011e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
254111e25f0dSDavid C Somayajulu u32 offset = 0;
254211e25f0dSDavid C Somayajulu
254311e25f0dSDavid C Somayajulu /* Extract PCI buffer pointer from virtual address */
254411e25f0dSDavid C Somayajulu void *virt_addr_lo = &dev_data->bus.pci_buf.virt_addr.lo;
254511e25f0dSDavid C Somayajulu u32 *pci_buf_start = (u32 *)(osal_uintptr_t)*((u64 *)virt_addr_lo);
254611e25f0dSDavid C Somayajulu u32 *pci_buf, line, i;
254711e25f0dSDavid C Somayajulu
254811e25f0dSDavid C Somayajulu if (!dump)
254911e25f0dSDavid C Somayajulu return (end_line - start_line + 1) * PCI_BUF_LINE_SIZE_IN_DWORDS;
255011e25f0dSDavid C Somayajulu
255111e25f0dSDavid C Somayajulu for (line = start_line, pci_buf = pci_buf_start + start_line * PCI_BUF_LINE_SIZE_IN_DWORDS;
255211e25f0dSDavid C Somayajulu line <= end_line;
255311e25f0dSDavid C Somayajulu line++, offset += PCI_BUF_LINE_SIZE_IN_DWORDS)
255411e25f0dSDavid C Somayajulu for (i = 0; i < PCI_BUF_LINE_SIZE_IN_DWORDS; i++, pci_buf++)
255511e25f0dSDavid C Somayajulu dump_buf[offset + s_pci_buf_line_ind[i]] = *pci_buf;
255611e25f0dSDavid C Somayajulu
255711e25f0dSDavid C Somayajulu return offset;
255811e25f0dSDavid C Somayajulu }
255911e25f0dSDavid C Somayajulu
256011e25f0dSDavid C Somayajulu /* Copies the DBG Bus PCI buffer to the specified buffer.
256111e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
256211e25f0dSDavid C Somayajulu */
ecore_bus_dump_pci_buf(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)256311e25f0dSDavid C Somayajulu static u32 ecore_bus_dump_pci_buf(struct ecore_hwfn *p_hwfn,
256411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
256511e25f0dSDavid C Somayajulu u32 *dump_buf,
256611e25f0dSDavid C Somayajulu bool dump)
256711e25f0dSDavid C Somayajulu {
256811e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
256911e25f0dSDavid C Somayajulu u32 next_wr_byte_offset, next_wr_line_offset;
257011e25f0dSDavid C Somayajulu struct dbg_bus_mem_addr next_wr_phys_addr;
257111e25f0dSDavid C Somayajulu u32 pci_buf_size_in_lines, offset = 0;
257211e25f0dSDavid C Somayajulu
257311e25f0dSDavid C Somayajulu pci_buf_size_in_lines = dev_data->bus.pci_buf.size / PCI_BUF_LINE_SIZE_IN_BYTES;
257411e25f0dSDavid C Somayajulu
257511e25f0dSDavid C Somayajulu /* Extract write pointer (physical address) */
257611e25f0dSDavid C Somayajulu next_wr_phys_addr.lo = ecore_rd(p_hwfn, p_ptt, DBG_REG_EXT_BUFFER_WR_PTR);
257711e25f0dSDavid C Somayajulu next_wr_phys_addr.hi = ecore_rd(p_hwfn, p_ptt, DBG_REG_EXT_BUFFER_WR_PTR + BYTES_IN_DWORD);
257811e25f0dSDavid C Somayajulu
257911e25f0dSDavid C Somayajulu /* Convert write pointer to offset */
258011e25f0dSDavid C Somayajulu next_wr_byte_offset = ecore_phys_addr_diff(&next_wr_phys_addr, &dev_data->bus.pci_buf.phys_addr);
258111e25f0dSDavid C Somayajulu if ((next_wr_byte_offset % PCI_BUF_LINE_SIZE_IN_BYTES) || next_wr_byte_offset > dev_data->bus.pci_buf.size)
258211e25f0dSDavid C Somayajulu return 0;
258311e25f0dSDavid C Somayajulu next_wr_line_offset = next_wr_byte_offset / PCI_BUF_LINE_SIZE_IN_BYTES;
258411e25f0dSDavid C Somayajulu
258511e25f0dSDavid C Somayajulu /* PCI buffer wrapped: first dump from write pointer to buffer end. */
258611e25f0dSDavid C Somayajulu if (ecore_rd(p_hwfn, p_ptt, DBG_REG_WRAP_ON_EXT_BUFFER))
258711e25f0dSDavid C Somayajulu offset += ecore_bus_dump_pci_buf_range(p_hwfn, dump_buf + offset, dump, next_wr_line_offset, pci_buf_size_in_lines - 1);
258811e25f0dSDavid C Somayajulu
258911e25f0dSDavid C Somayajulu /* Dump from buffer start until write pointer */
259011e25f0dSDavid C Somayajulu if (next_wr_line_offset)
259111e25f0dSDavid C Somayajulu offset += ecore_bus_dump_pci_buf_range(p_hwfn, dump_buf + offset, dump, 0, next_wr_line_offset - 1);
259211e25f0dSDavid C Somayajulu
259311e25f0dSDavid C Somayajulu return offset;
259411e25f0dSDavid C Somayajulu }
259511e25f0dSDavid C Somayajulu
259611e25f0dSDavid C Somayajulu /* Copies the DBG Bus recorded data to the specified buffer.
259711e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
259811e25f0dSDavid C Somayajulu */
ecore_bus_dump_data(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)259911e25f0dSDavid C Somayajulu static u32 ecore_bus_dump_data(struct ecore_hwfn *p_hwfn,
260011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
260111e25f0dSDavid C Somayajulu u32 *dump_buf,
260211e25f0dSDavid C Somayajulu bool dump)
260311e25f0dSDavid C Somayajulu {
260411e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
260511e25f0dSDavid C Somayajulu
260611e25f0dSDavid C Somayajulu switch (dev_data->bus.target) {
260711e25f0dSDavid C Somayajulu case DBG_BUS_TARGET_ID_INT_BUF:
260811e25f0dSDavid C Somayajulu return ecore_bus_dump_int_buf(p_hwfn, p_ptt, dump_buf, dump);
260911e25f0dSDavid C Somayajulu case DBG_BUS_TARGET_ID_PCI:
261011e25f0dSDavid C Somayajulu return ecore_bus_dump_pci_buf(p_hwfn, p_ptt, dump_buf, dump);
261111e25f0dSDavid C Somayajulu default:
261211e25f0dSDavid C Somayajulu break;
261311e25f0dSDavid C Somayajulu }
261411e25f0dSDavid C Somayajulu
261511e25f0dSDavid C Somayajulu return 0;
261611e25f0dSDavid C Somayajulu }
261711e25f0dSDavid C Somayajulu
261811e25f0dSDavid C Somayajulu /* Frees the Debug Bus PCI buffer */
ecore_bus_free_pci_buf(struct ecore_hwfn * p_hwfn)261911e25f0dSDavid C Somayajulu static void ecore_bus_free_pci_buf(struct ecore_hwfn *p_hwfn)
262011e25f0dSDavid C Somayajulu {
262111e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
262211e25f0dSDavid C Somayajulu dma_addr_t pci_buf_phys_addr;
262311e25f0dSDavid C Somayajulu void *virt_addr_lo;
262411e25f0dSDavid C Somayajulu u32 *pci_buf;
262511e25f0dSDavid C Somayajulu
262611e25f0dSDavid C Somayajulu /* Extract PCI buffer pointer from virtual address */
262711e25f0dSDavid C Somayajulu virt_addr_lo = &dev_data->bus.pci_buf.virt_addr.lo;
262811e25f0dSDavid C Somayajulu pci_buf = (u32 *)(osal_uintptr_t)*((u64 *)virt_addr_lo);
262911e25f0dSDavid C Somayajulu
263011e25f0dSDavid C Somayajulu if (!dev_data->bus.pci_buf.size)
263111e25f0dSDavid C Somayajulu return;
263211e25f0dSDavid C Somayajulu
263311e25f0dSDavid C Somayajulu OSAL_MEMCPY(&pci_buf_phys_addr, &dev_data->bus.pci_buf.phys_addr, sizeof(pci_buf_phys_addr));
263411e25f0dSDavid C Somayajulu
263511e25f0dSDavid C Somayajulu OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, pci_buf, pci_buf_phys_addr, dev_data->bus.pci_buf.size);
263611e25f0dSDavid C Somayajulu
263711e25f0dSDavid C Somayajulu dev_data->bus.pci_buf.size = 0;
263811e25f0dSDavid C Somayajulu }
263911e25f0dSDavid C Somayajulu
264011e25f0dSDavid C Somayajulu /* Dumps the list of DBG Bus inputs (blocks/Storms) to the specified buffer.
264111e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
264211e25f0dSDavid C Somayajulu */
ecore_bus_dump_inputs(struct ecore_hwfn * p_hwfn,u32 * dump_buf,bool dump)264311e25f0dSDavid C Somayajulu static u32 ecore_bus_dump_inputs(struct ecore_hwfn *p_hwfn,
264411e25f0dSDavid C Somayajulu u32 *dump_buf,
264511e25f0dSDavid C Somayajulu bool dump)
264611e25f0dSDavid C Somayajulu {
264711e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
264811e25f0dSDavid C Somayajulu char storm_name[8] = "?storm";
264911e25f0dSDavid C Somayajulu u32 block_id, offset = 0;
265011e25f0dSDavid C Somayajulu u8 storm_id;
265111e25f0dSDavid C Somayajulu
265211e25f0dSDavid C Somayajulu /* Store storms */
265311e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
265411e25f0dSDavid C Somayajulu struct dbg_bus_storm_data *storm_bus = &dev_data->bus.storms[storm_id];
265511e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
265611e25f0dSDavid C Somayajulu
265711e25f0dSDavid C Somayajulu if (!dev_data->bus.storms[storm_id].enabled)
265811e25f0dSDavid C Somayajulu continue;
265911e25f0dSDavid C Somayajulu
266011e25f0dSDavid C Somayajulu /* Dump section header */
266111e25f0dSDavid C Somayajulu storm_name[0] = storm->letter;
266211e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "bus_input", 3);
266311e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "name", storm_name);
266411e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "id", storm_bus->hw_id);
266511e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "mode", s_storm_mode_defs[storm_bus->mode].name);
266611e25f0dSDavid C Somayajulu }
266711e25f0dSDavid C Somayajulu
266811e25f0dSDavid C Somayajulu /* Store blocks */
266911e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) {
267011e25f0dSDavid C Somayajulu struct dbg_bus_block_data *block_bus = &dev_data->bus.blocks[block_id];
267111e25f0dSDavid C Somayajulu struct block_defs *block = s_block_defs[block_id];
267211e25f0dSDavid C Somayajulu
267311e25f0dSDavid C Somayajulu if (!GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK))
267411e25f0dSDavid C Somayajulu continue;
267511e25f0dSDavid C Somayajulu
267611e25f0dSDavid C Somayajulu /* Dump section header */
267711e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "bus_input", 4);
267811e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "name", block->name);
267911e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "line", block_bus->line_num);
268011e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "en", GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK));
268111e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "shr", GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_RIGHT_SHIFT));
268211e25f0dSDavid C Somayajulu }
268311e25f0dSDavid C Somayajulu
268411e25f0dSDavid C Somayajulu return offset;
268511e25f0dSDavid C Somayajulu }
268611e25f0dSDavid C Somayajulu
268711e25f0dSDavid C Somayajulu /* Dumps the Debug Bus header (params, inputs, data header) to the specified
268811e25f0dSDavid C Somayajulu * buffer. Returns the dumped size in dwords.
268911e25f0dSDavid C Somayajulu */
ecore_bus_dump_hdr(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)269011e25f0dSDavid C Somayajulu static u32 ecore_bus_dump_hdr(struct ecore_hwfn *p_hwfn,
269111e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
269211e25f0dSDavid C Somayajulu u32 *dump_buf,
269311e25f0dSDavid C Somayajulu bool dump)
269411e25f0dSDavid C Somayajulu {
269511e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
269611e25f0dSDavid C Somayajulu char hw_id_mask_str[16];
269711e25f0dSDavid C Somayajulu u32 offset = 0;
269811e25f0dSDavid C Somayajulu
269911e25f0dSDavid C Somayajulu if (OSAL_SNPRINTF(hw_id_mask_str, sizeof(hw_id_mask_str), "0x%x", dev_data->bus.hw_id_mask) < 0)
270011e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "Unexpected debug error: invalid HW ID mask\n");
270111e25f0dSDavid C Somayajulu
270211e25f0dSDavid C Somayajulu /* Dump global params */
270311e25f0dSDavid C Somayajulu offset += ecore_dump_common_global_params(p_hwfn, p_ptt, dump_buf + offset, dump, 5);
270411e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "dump-type", "debug-bus");
270511e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "wrap-mode", dev_data->bus.one_shot_en ? "one-shot" : "wrap-around");
270611e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "hw-dwords", dev_data->bus.hw_dwords);
270711e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "hw-id-mask", hw_id_mask_str);
270811e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "target", s_dbg_target_names[dev_data->bus.target]);
270911e25f0dSDavid C Somayajulu
271011e25f0dSDavid C Somayajulu offset += ecore_bus_dump_inputs(p_hwfn, dump_buf + offset, dump);
271111e25f0dSDavid C Somayajulu
271211e25f0dSDavid C Somayajulu if (dev_data->bus.target != DBG_BUS_TARGET_ID_NIG) {
271311e25f0dSDavid C Somayajulu u32 recorded_dwords = 0;
271411e25f0dSDavid C Somayajulu
271511e25f0dSDavid C Somayajulu if (dump)
271611e25f0dSDavid C Somayajulu recorded_dwords = ecore_bus_dump_data(p_hwfn, p_ptt, OSAL_NULL, false);
271711e25f0dSDavid C Somayajulu
271811e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "bus_data", 1);
271911e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "size", recorded_dwords);
272011e25f0dSDavid C Somayajulu }
272111e25f0dSDavid C Somayajulu
272211e25f0dSDavid C Somayajulu return offset;
272311e25f0dSDavid C Somayajulu }
272411e25f0dSDavid C Somayajulu
ecore_is_mode_match(struct ecore_hwfn * p_hwfn,u16 * modes_buf_offset)272511e25f0dSDavid C Somayajulu static bool ecore_is_mode_match(struct ecore_hwfn *p_hwfn,
272611e25f0dSDavid C Somayajulu u16 *modes_buf_offset)
272711e25f0dSDavid C Somayajulu {
272811e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
272911e25f0dSDavid C Somayajulu bool arg1, arg2;
273011e25f0dSDavid C Somayajulu u8 tree_val;
273111e25f0dSDavid C Somayajulu
273211e25f0dSDavid C Somayajulu /* Get next element from modes tree buffer */
2733134b0936SMark O'Donovan tree_val = ((const u8 *)s_dbg_arrays[BIN_BUF_DBG_MODE_TREE].ptr)[(*modes_buf_offset)++];
273411e25f0dSDavid C Somayajulu
273511e25f0dSDavid C Somayajulu switch (tree_val) {
273611e25f0dSDavid C Somayajulu case INIT_MODE_OP_NOT:
273711e25f0dSDavid C Somayajulu return !ecore_is_mode_match(p_hwfn, modes_buf_offset);
273811e25f0dSDavid C Somayajulu case INIT_MODE_OP_OR:
273911e25f0dSDavid C Somayajulu case INIT_MODE_OP_AND:
274011e25f0dSDavid C Somayajulu arg1 = ecore_is_mode_match(p_hwfn, modes_buf_offset);
274111e25f0dSDavid C Somayajulu arg2 = ecore_is_mode_match(p_hwfn, modes_buf_offset);
274211e25f0dSDavid C Somayajulu return (tree_val == INIT_MODE_OP_OR) ? (arg1 || arg2) : (arg1 && arg2);
274311e25f0dSDavid C Somayajulu default: return dev_data->mode_enable[tree_val - MAX_INIT_MODE_OPS] > 0;
274411e25f0dSDavid C Somayajulu }
274511e25f0dSDavid C Somayajulu }
274611e25f0dSDavid C Somayajulu
274711e25f0dSDavid C Somayajulu /* Returns true if the specified entity (indicated by GRC param) should be
274811e25f0dSDavid C Somayajulu * included in the dump, false otherwise.
274911e25f0dSDavid C Somayajulu */
ecore_grc_is_included(struct ecore_hwfn * p_hwfn,enum dbg_grc_params grc_param)275011e25f0dSDavid C Somayajulu static bool ecore_grc_is_included(struct ecore_hwfn *p_hwfn,
275111e25f0dSDavid C Somayajulu enum dbg_grc_params grc_param)
275211e25f0dSDavid C Somayajulu {
275311e25f0dSDavid C Somayajulu return ecore_grc_get_param(p_hwfn, grc_param) > 0;
275411e25f0dSDavid C Somayajulu }
275511e25f0dSDavid C Somayajulu
275611e25f0dSDavid C Somayajulu /* Returns true of the specified Storm should be included in the dump, false
275711e25f0dSDavid C Somayajulu * otherwise.
275811e25f0dSDavid C Somayajulu */
ecore_grc_is_storm_included(struct ecore_hwfn * p_hwfn,enum dbg_storms storm)275911e25f0dSDavid C Somayajulu static bool ecore_grc_is_storm_included(struct ecore_hwfn *p_hwfn,
276011e25f0dSDavid C Somayajulu enum dbg_storms storm)
276111e25f0dSDavid C Somayajulu {
276211e25f0dSDavid C Somayajulu return ecore_grc_get_param(p_hwfn, (enum dbg_grc_params)storm) > 0;
276311e25f0dSDavid C Somayajulu }
276411e25f0dSDavid C Somayajulu
276511e25f0dSDavid C Somayajulu /* Returns true if the specified memory should be included in the dump, false
276611e25f0dSDavid C Somayajulu * otherwise.
276711e25f0dSDavid C Somayajulu */
ecore_grc_is_mem_included(struct ecore_hwfn * p_hwfn,enum block_id block_id,u8 mem_group_id)276811e25f0dSDavid C Somayajulu static bool ecore_grc_is_mem_included(struct ecore_hwfn *p_hwfn,
276911e25f0dSDavid C Somayajulu enum block_id block_id,
277011e25f0dSDavid C Somayajulu u8 mem_group_id)
277111e25f0dSDavid C Somayajulu {
277211e25f0dSDavid C Somayajulu struct block_defs *block = s_block_defs[block_id];
277311e25f0dSDavid C Somayajulu u8 i;
277411e25f0dSDavid C Somayajulu
277511e25f0dSDavid C Somayajulu /* Check Storm match */
277611e25f0dSDavid C Somayajulu if (block->associated_to_storm &&
277711e25f0dSDavid C Somayajulu !ecore_grc_is_storm_included(p_hwfn, (enum dbg_storms)block->storm_id))
277811e25f0dSDavid C Somayajulu return false;
277911e25f0dSDavid C Somayajulu
278011e25f0dSDavid C Somayajulu for (i = 0; i < NUM_BIG_RAM_TYPES; i++) {
278111e25f0dSDavid C Somayajulu struct big_ram_defs *big_ram = &s_big_ram_defs[i];
278211e25f0dSDavid C Somayajulu
278311e25f0dSDavid C Somayajulu if (mem_group_id == big_ram->mem_group_id || mem_group_id == big_ram->ram_mem_group_id)
278411e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, big_ram->grc_param);
278511e25f0dSDavid C Somayajulu }
278611e25f0dSDavid C Somayajulu
278711e25f0dSDavid C Somayajulu switch (mem_group_id) {
278811e25f0dSDavid C Somayajulu case MEM_GROUP_PXP_ILT:
278911e25f0dSDavid C Somayajulu case MEM_GROUP_PXP_MEM:
279011e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_PXP);
279111e25f0dSDavid C Somayajulu case MEM_GROUP_RAM:
279211e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_RAM);
279311e25f0dSDavid C Somayajulu case MEM_GROUP_PBUF:
279411e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_PBUF);
279511e25f0dSDavid C Somayajulu case MEM_GROUP_CAU_MEM:
279611e25f0dSDavid C Somayajulu case MEM_GROUP_CAU_SB:
279711e25f0dSDavid C Somayajulu case MEM_GROUP_CAU_PI:
279811e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CAU);
279911e25f0dSDavid C Somayajulu case MEM_GROUP_QM_MEM:
280011e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_QM);
280111e25f0dSDavid C Somayajulu case MEM_GROUP_CFC_MEM:
280211e25f0dSDavid C Somayajulu case MEM_GROUP_CONN_CFC_MEM:
280311e25f0dSDavid C Somayajulu case MEM_GROUP_TASK_CFC_MEM:
28049efd0ba7SDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CFC) || ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CM_CTX);
280511e25f0dSDavid C Somayajulu case MEM_GROUP_IGU_MEM:
280611e25f0dSDavid C Somayajulu case MEM_GROUP_IGU_MSIX:
280711e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_IGU);
280811e25f0dSDavid C Somayajulu case MEM_GROUP_MULD_MEM:
280911e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_MULD);
281011e25f0dSDavid C Somayajulu case MEM_GROUP_PRS_MEM:
281111e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_PRS);
281211e25f0dSDavid C Somayajulu case MEM_GROUP_DMAE_MEM:
281311e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_DMAE);
281411e25f0dSDavid C Somayajulu case MEM_GROUP_TM_MEM:
281511e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_TM);
281611e25f0dSDavid C Somayajulu case MEM_GROUP_SDM_MEM:
281711e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_SDM);
281811e25f0dSDavid C Somayajulu case MEM_GROUP_TDIF_CTX:
281911e25f0dSDavid C Somayajulu case MEM_GROUP_RDIF_CTX:
282011e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_DIF);
282111e25f0dSDavid C Somayajulu case MEM_GROUP_CM_MEM:
282211e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CM);
282311e25f0dSDavid C Somayajulu case MEM_GROUP_IOR:
282411e25f0dSDavid C Somayajulu return ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_IOR);
282511e25f0dSDavid C Somayajulu default:
282611e25f0dSDavid C Somayajulu return true;
282711e25f0dSDavid C Somayajulu }
282811e25f0dSDavid C Somayajulu }
282911e25f0dSDavid C Somayajulu
283011e25f0dSDavid C Somayajulu /* Stalls all Storms */
ecore_grc_stall_storms(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,bool stall)283111e25f0dSDavid C Somayajulu static void ecore_grc_stall_storms(struct ecore_hwfn *p_hwfn,
283211e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
283311e25f0dSDavid C Somayajulu bool stall)
283411e25f0dSDavid C Somayajulu {
283511e25f0dSDavid C Somayajulu u32 reg_addr;
283611e25f0dSDavid C Somayajulu u8 storm_id;
283711e25f0dSDavid C Somayajulu
283811e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
283911e25f0dSDavid C Somayajulu if (!ecore_grc_is_storm_included(p_hwfn, (enum dbg_storms)storm_id))
284011e25f0dSDavid C Somayajulu continue;
284111e25f0dSDavid C Somayajulu
284211e25f0dSDavid C Somayajulu reg_addr = s_storm_defs[storm_id].sem_fast_mem_addr + SEM_FAST_REG_STALL_0_BB_K2;
284311e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, reg_addr, stall ? 1 : 0);
284411e25f0dSDavid C Somayajulu }
284511e25f0dSDavid C Somayajulu
284611e25f0dSDavid C Somayajulu OSAL_MSLEEP(STALL_DELAY_MS);
284711e25f0dSDavid C Somayajulu }
284811e25f0dSDavid C Somayajulu
284911e25f0dSDavid C Somayajulu /* Takes all blocks out of reset */
ecore_grc_unreset_blocks(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)285011e25f0dSDavid C Somayajulu static void ecore_grc_unreset_blocks(struct ecore_hwfn *p_hwfn,
285111e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt)
285211e25f0dSDavid C Somayajulu {
285311e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
285411e25f0dSDavid C Somayajulu u32 reg_val[MAX_DBG_RESET_REGS] = { 0 };
285511e25f0dSDavid C Somayajulu u32 block_id, i;
285611e25f0dSDavid C Somayajulu
285711e25f0dSDavid C Somayajulu /* Fill reset regs values */
285811e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) {
285911e25f0dSDavid C Somayajulu struct block_defs *block = s_block_defs[block_id];
286011e25f0dSDavid C Somayajulu
28619efd0ba7SDavid C Somayajulu if (block->exists[dev_data->chip_id] && block->has_reset_bit && block->unreset)
286211e25f0dSDavid C Somayajulu reg_val[block->reset_reg] |= (1 << block->reset_bit_offset);
286311e25f0dSDavid C Somayajulu }
286411e25f0dSDavid C Somayajulu
286511e25f0dSDavid C Somayajulu /* Write reset registers */
286611e25f0dSDavid C Somayajulu for (i = 0; i < MAX_DBG_RESET_REGS; i++) {
286711e25f0dSDavid C Somayajulu if (!s_reset_regs_defs[i].exists[dev_data->chip_id])
286811e25f0dSDavid C Somayajulu continue;
286911e25f0dSDavid C Somayajulu
28709efd0ba7SDavid C Somayajulu reg_val[i] |= s_reset_regs_defs[i].unreset_val[dev_data->chip_id];
287111e25f0dSDavid C Somayajulu
287211e25f0dSDavid C Somayajulu if (reg_val[i])
287311e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, s_reset_regs_defs[i].addr + RESET_REG_UNRESET_OFFSET, reg_val[i]);
287411e25f0dSDavid C Somayajulu }
287511e25f0dSDavid C Somayajulu }
287611e25f0dSDavid C Somayajulu
287711e25f0dSDavid C Somayajulu /* Returns the attention block data of the specified block */
ecore_get_block_attn_data(enum block_id block_id,enum dbg_attn_type attn_type)287811e25f0dSDavid C Somayajulu static const struct dbg_attn_block_type_data* ecore_get_block_attn_data(enum block_id block_id,
287911e25f0dSDavid C Somayajulu enum dbg_attn_type attn_type)
288011e25f0dSDavid C Somayajulu {
288111e25f0dSDavid C Somayajulu const struct dbg_attn_block *base_attn_block_arr = (const struct dbg_attn_block *)s_dbg_arrays[BIN_BUF_DBG_ATTN_BLOCKS].ptr;
288211e25f0dSDavid C Somayajulu
288311e25f0dSDavid C Somayajulu return &base_attn_block_arr[block_id].per_type_data[attn_type];
288411e25f0dSDavid C Somayajulu }
288511e25f0dSDavid C Somayajulu
288611e25f0dSDavid C Somayajulu /* Returns the attention registers of the specified block */
ecore_get_block_attn_regs(enum block_id block_id,enum dbg_attn_type attn_type,u8 * num_attn_regs)288711e25f0dSDavid C Somayajulu static const struct dbg_attn_reg* ecore_get_block_attn_regs(enum block_id block_id,
288811e25f0dSDavid C Somayajulu enum dbg_attn_type attn_type,
288911e25f0dSDavid C Somayajulu u8 *num_attn_regs)
289011e25f0dSDavid C Somayajulu {
289111e25f0dSDavid C Somayajulu const struct dbg_attn_block_type_data *block_type_data = ecore_get_block_attn_data(block_id, attn_type);
289211e25f0dSDavid C Somayajulu
289311e25f0dSDavid C Somayajulu *num_attn_regs = block_type_data->num_regs;
289411e25f0dSDavid C Somayajulu
289511e25f0dSDavid C Somayajulu return &((const struct dbg_attn_reg *)s_dbg_arrays[BIN_BUF_DBG_ATTN_REGS].ptr)[block_type_data->regs_offset];
289611e25f0dSDavid C Somayajulu }
289711e25f0dSDavid C Somayajulu
289811e25f0dSDavid C Somayajulu /* For each block, clear the status of all parities */
ecore_grc_clear_all_prty(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)289911e25f0dSDavid C Somayajulu static void ecore_grc_clear_all_prty(struct ecore_hwfn *p_hwfn,
290011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt)
290111e25f0dSDavid C Somayajulu {
290211e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
290311e25f0dSDavid C Somayajulu const struct dbg_attn_reg *attn_reg_arr;
290411e25f0dSDavid C Somayajulu u8 reg_idx, num_attn_regs;
290511e25f0dSDavid C Somayajulu u32 block_id;
290611e25f0dSDavid C Somayajulu
290711e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) {
290811e25f0dSDavid C Somayajulu if (dev_data->block_in_reset[block_id])
290911e25f0dSDavid C Somayajulu continue;
291011e25f0dSDavid C Somayajulu
291111e25f0dSDavid C Somayajulu attn_reg_arr = ecore_get_block_attn_regs((enum block_id)block_id, ATTN_TYPE_PARITY, &num_attn_regs);
291211e25f0dSDavid C Somayajulu
291311e25f0dSDavid C Somayajulu for (reg_idx = 0; reg_idx < num_attn_regs; reg_idx++) {
291411e25f0dSDavid C Somayajulu const struct dbg_attn_reg *reg_data = &attn_reg_arr[reg_idx];
291511e25f0dSDavid C Somayajulu u16 modes_buf_offset;
291611e25f0dSDavid C Somayajulu bool eval_mode;
291711e25f0dSDavid C Somayajulu
291811e25f0dSDavid C Somayajulu /* Check mode */
291911e25f0dSDavid C Somayajulu eval_mode = GET_FIELD(reg_data->mode.data, DBG_MODE_HDR_EVAL_MODE) > 0;
292011e25f0dSDavid C Somayajulu modes_buf_offset = GET_FIELD(reg_data->mode.data, DBG_MODE_HDR_MODES_BUF_OFFSET);
292111e25f0dSDavid C Somayajulu
292211e25f0dSDavid C Somayajulu /* If Mode match: clear parity status */
292311e25f0dSDavid C Somayajulu if (!eval_mode || ecore_is_mode_match(p_hwfn, &modes_buf_offset))
292411e25f0dSDavid C Somayajulu ecore_rd(p_hwfn, p_ptt, DWORDS_TO_BYTES(reg_data->sts_clr_address));
292511e25f0dSDavid C Somayajulu }
292611e25f0dSDavid C Somayajulu }
292711e25f0dSDavid C Somayajulu }
292811e25f0dSDavid C Somayajulu
292911e25f0dSDavid C Somayajulu /* Dumps GRC registers section header. Returns the dumped size in dwords.
293011e25f0dSDavid C Somayajulu * the following parameters are dumped:
293111e25f0dSDavid C Somayajulu * - count: no. of dumped entries
293211e25f0dSDavid C Somayajulu * - split: split type
293311e25f0dSDavid C Somayajulu * - id: split ID (dumped only if split_id >= 0)
293411e25f0dSDavid C Somayajulu * - param_name: user parameter value (dumped only if param_name != OSAL_NULL
293511e25f0dSDavid C Somayajulu * and param_val != OSAL_NULL).
293611e25f0dSDavid C Somayajulu */
ecore_grc_dump_regs_hdr(u32 * dump_buf,bool dump,u32 num_reg_entries,const char * split_type,int split_id,const char * param_name,const char * param_val)293711e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_regs_hdr(u32 *dump_buf,
293811e25f0dSDavid C Somayajulu bool dump,
293911e25f0dSDavid C Somayajulu u32 num_reg_entries,
294011e25f0dSDavid C Somayajulu const char *split_type,
294111e25f0dSDavid C Somayajulu int split_id,
294211e25f0dSDavid C Somayajulu const char *param_name,
294311e25f0dSDavid C Somayajulu const char *param_val)
294411e25f0dSDavid C Somayajulu {
294511e25f0dSDavid C Somayajulu u8 num_params = 2 + (split_id >= 0 ? 1 : 0) + (param_name ? 1 : 0);
294611e25f0dSDavid C Somayajulu u32 offset = 0;
294711e25f0dSDavid C Somayajulu
294811e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "grc_regs", num_params);
294911e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "count", num_reg_entries);
295011e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "split", split_type);
295111e25f0dSDavid C Somayajulu if (split_id >= 0)
295211e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "id", split_id);
295311e25f0dSDavid C Somayajulu if (param_name && param_val)
295411e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, param_name, param_val);
295511e25f0dSDavid C Somayajulu
295611e25f0dSDavid C Somayajulu return offset;
295711e25f0dSDavid C Somayajulu }
295811e25f0dSDavid C Somayajulu
2959217ec208SDavid C Somayajulu /* Reads the specified registers into the specified buffer.
2960217ec208SDavid C Somayajulu * The addr and len arguments are specified in dwords.
2961217ec208SDavid C Somayajulu */
ecore_read_regs(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * buf,u32 addr,u32 len)2962217ec208SDavid C Somayajulu void ecore_read_regs(struct ecore_hwfn *p_hwfn,
2963217ec208SDavid C Somayajulu struct ecore_ptt *p_ptt,
2964217ec208SDavid C Somayajulu u32 *buf,
2965217ec208SDavid C Somayajulu u32 addr,
2966217ec208SDavid C Somayajulu u32 len)
2967217ec208SDavid C Somayajulu {
2968217ec208SDavid C Somayajulu u32 i;
2969217ec208SDavid C Somayajulu
2970217ec208SDavid C Somayajulu for (i = 0; i < len; i++)
2971217ec208SDavid C Somayajulu buf[i] = ecore_rd(p_hwfn, p_ptt, DWORDS_TO_BYTES(addr + i));
2972217ec208SDavid C Somayajulu }
2973217ec208SDavid C Somayajulu
297411e25f0dSDavid C Somayajulu /* Dumps the GRC registers in the specified address range.
297511e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
297611e25f0dSDavid C Somayajulu * The addr and len arguments are specified in dwords.
297711e25f0dSDavid C Somayajulu */
ecore_grc_dump_addr_range(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u32 addr,u32 len,bool wide_bus)297811e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_addr_range(struct ecore_hwfn *p_hwfn,
297911e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
298011e25f0dSDavid C Somayajulu u32 *dump_buf,
298111e25f0dSDavid C Somayajulu bool dump,
298211e25f0dSDavid C Somayajulu u32 addr,
298311e25f0dSDavid C Somayajulu u32 len,
2984217ec208SDavid C Somayajulu bool wide_bus)
298511e25f0dSDavid C Somayajulu {
2986217ec208SDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
298711e25f0dSDavid C Somayajulu
298811e25f0dSDavid C Somayajulu if (!dump)
298911e25f0dSDavid C Somayajulu return len;
299011e25f0dSDavid C Somayajulu
2991217ec208SDavid C Somayajulu /* Print log if needed */
2992217ec208SDavid C Somayajulu dev_data->num_regs_read += len;
2993217ec208SDavid C Somayajulu if (dev_data->num_regs_read >= s_platform_defs[dev_data->platform_id].log_thresh) {
2994217ec208SDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "Dumping %d registers...\n", dev_data->num_regs_read);
2995217ec208SDavid C Somayajulu dev_data->num_regs_read = 0;
2996217ec208SDavid C Somayajulu }
299711e25f0dSDavid C Somayajulu
2998217ec208SDavid C Somayajulu /* Try reading using DMAE */
2999217ec208SDavid C Somayajulu if (dev_data->use_dmae && (len >= s_platform_defs[dev_data->platform_id].dmae_thresh || (PROTECT_WIDE_BUS && wide_bus))) {
3000217ec208SDavid C Somayajulu if (!ecore_dmae_grc2host(p_hwfn, p_ptt, DWORDS_TO_BYTES(addr), (u64)(osal_uintptr_t)(dump_buf), len, OSAL_NULL))
3001217ec208SDavid C Somayajulu return len;
3002217ec208SDavid C Somayajulu dev_data->use_dmae = 0;
3003217ec208SDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "Failed reading from chip using DMAE, using GRC instead\n");
3004217ec208SDavid C Somayajulu }
3005217ec208SDavid C Somayajulu
3006217ec208SDavid C Somayajulu /* Read registers */
3007217ec208SDavid C Somayajulu ecore_read_regs(p_hwfn, p_ptt, dump_buf, addr, len);
3008217ec208SDavid C Somayajulu
3009217ec208SDavid C Somayajulu return len;
301011e25f0dSDavid C Somayajulu }
301111e25f0dSDavid C Somayajulu
301211e25f0dSDavid C Somayajulu /* Dumps GRC registers sequence header. Returns the dumped size in dwords.
301311e25f0dSDavid C Somayajulu * The addr and len arguments are specified in dwords.
301411e25f0dSDavid C Somayajulu */
ecore_grc_dump_reg_entry_hdr(u32 * dump_buf,bool dump,u32 addr,u32 len)301511e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_reg_entry_hdr(u32 *dump_buf,
301611e25f0dSDavid C Somayajulu bool dump,
301711e25f0dSDavid C Somayajulu u32 addr,
301811e25f0dSDavid C Somayajulu u32 len)
301911e25f0dSDavid C Somayajulu {
302011e25f0dSDavid C Somayajulu if (dump)
302111e25f0dSDavid C Somayajulu *dump_buf = addr | (len << REG_DUMP_LEN_SHIFT);
302211e25f0dSDavid C Somayajulu
302311e25f0dSDavid C Somayajulu return 1;
302411e25f0dSDavid C Somayajulu }
302511e25f0dSDavid C Somayajulu
302611e25f0dSDavid C Somayajulu /* Dumps GRC registers sequence. Returns the dumped size in dwords.
302711e25f0dSDavid C Somayajulu * The addr and len arguments are specified in dwords.
302811e25f0dSDavid C Somayajulu */
ecore_grc_dump_reg_entry(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u32 addr,u32 len,bool wide_bus)302911e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_reg_entry(struct ecore_hwfn *p_hwfn,
303011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
303111e25f0dSDavid C Somayajulu u32 *dump_buf,
303211e25f0dSDavid C Somayajulu bool dump,
303311e25f0dSDavid C Somayajulu u32 addr,
303411e25f0dSDavid C Somayajulu u32 len,
3035217ec208SDavid C Somayajulu bool wide_bus)
303611e25f0dSDavid C Somayajulu {
303711e25f0dSDavid C Somayajulu u32 offset = 0;
303811e25f0dSDavid C Somayajulu
303911e25f0dSDavid C Somayajulu offset += ecore_grc_dump_reg_entry_hdr(dump_buf, dump, addr, len);
304011e25f0dSDavid C Somayajulu offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, dump_buf + offset, dump, addr, len, wide_bus);
304111e25f0dSDavid C Somayajulu
304211e25f0dSDavid C Somayajulu return offset;
304311e25f0dSDavid C Somayajulu }
304411e25f0dSDavid C Somayajulu
304511e25f0dSDavid C Somayajulu /* Dumps GRC registers sequence with skip cycle.
304611e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
304711e25f0dSDavid C Somayajulu * - addr: start GRC address in dwords
304811e25f0dSDavid C Somayajulu * - total_len: total no. of dwords to dump
304911e25f0dSDavid C Somayajulu * - read_len: no. consecutive dwords to read
305011e25f0dSDavid C Somayajulu * - skip_len: no. of dwords to skip (and fill with zeros)
305111e25f0dSDavid C Somayajulu */
ecore_grc_dump_reg_entry_skip(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u32 addr,u32 total_len,u32 read_len,u32 skip_len)305211e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_reg_entry_skip(struct ecore_hwfn *p_hwfn,
305311e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
305411e25f0dSDavid C Somayajulu u32 *dump_buf,
305511e25f0dSDavid C Somayajulu bool dump,
305611e25f0dSDavid C Somayajulu u32 addr,
305711e25f0dSDavid C Somayajulu u32 total_len,
305811e25f0dSDavid C Somayajulu u32 read_len,
305911e25f0dSDavid C Somayajulu u32 skip_len)
306011e25f0dSDavid C Somayajulu {
306111e25f0dSDavid C Somayajulu u32 offset = 0, reg_offset = 0;
306211e25f0dSDavid C Somayajulu
306311e25f0dSDavid C Somayajulu offset += ecore_grc_dump_reg_entry_hdr(dump_buf, dump, addr, total_len);
306411e25f0dSDavid C Somayajulu
306511e25f0dSDavid C Somayajulu if (!dump)
306611e25f0dSDavid C Somayajulu return offset + total_len;
306711e25f0dSDavid C Somayajulu
306811e25f0dSDavid C Somayajulu while (reg_offset < total_len) {
306911e25f0dSDavid C Somayajulu u32 curr_len = OSAL_MIN_T(u32, read_len, total_len - reg_offset);
307011e25f0dSDavid C Somayajulu
307111e25f0dSDavid C Somayajulu offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, dump_buf + offset, dump, addr, curr_len, false);
307211e25f0dSDavid C Somayajulu reg_offset += curr_len;
307311e25f0dSDavid C Somayajulu addr += curr_len;
307411e25f0dSDavid C Somayajulu
307511e25f0dSDavid C Somayajulu if (reg_offset < total_len) {
307611e25f0dSDavid C Somayajulu curr_len = OSAL_MIN_T(u32, skip_len, total_len - skip_len);
307711e25f0dSDavid C Somayajulu OSAL_MEMSET(dump_buf + offset, 0, DWORDS_TO_BYTES(curr_len));
307811e25f0dSDavid C Somayajulu offset += curr_len;
307911e25f0dSDavid C Somayajulu reg_offset += curr_len;
308011e25f0dSDavid C Somayajulu addr += curr_len;
308111e25f0dSDavid C Somayajulu }
308211e25f0dSDavid C Somayajulu }
308311e25f0dSDavid C Somayajulu
308411e25f0dSDavid C Somayajulu return offset;
308511e25f0dSDavid C Somayajulu }
308611e25f0dSDavid C Somayajulu
308711e25f0dSDavid C Somayajulu /* Dumps GRC registers entries. Returns the dumped size in dwords. */
ecore_grc_dump_regs_entries(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,struct dbg_array input_regs_arr,u32 * dump_buf,bool dump,bool block_enable[MAX_BLOCK_ID],u32 * num_dumped_reg_entries)308811e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_regs_entries(struct ecore_hwfn *p_hwfn,
308911e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
309011e25f0dSDavid C Somayajulu struct dbg_array input_regs_arr,
309111e25f0dSDavid C Somayajulu u32 *dump_buf,
309211e25f0dSDavid C Somayajulu bool dump,
309311e25f0dSDavid C Somayajulu bool block_enable[MAX_BLOCK_ID],
309411e25f0dSDavid C Somayajulu u32 *num_dumped_reg_entries)
309511e25f0dSDavid C Somayajulu {
309611e25f0dSDavid C Somayajulu u32 i, offset = 0, input_offset = 0;
309711e25f0dSDavid C Somayajulu bool mode_match = true;
309811e25f0dSDavid C Somayajulu
309911e25f0dSDavid C Somayajulu *num_dumped_reg_entries = 0;
310011e25f0dSDavid C Somayajulu
310111e25f0dSDavid C Somayajulu while (input_offset < input_regs_arr.size_in_dwords) {
310211e25f0dSDavid C Somayajulu const struct dbg_dump_cond_hdr *cond_hdr = (const struct dbg_dump_cond_hdr *)&input_regs_arr.ptr[input_offset++];
310311e25f0dSDavid C Somayajulu u16 modes_buf_offset;
310411e25f0dSDavid C Somayajulu bool eval_mode;
310511e25f0dSDavid C Somayajulu
310611e25f0dSDavid C Somayajulu /* Check mode/block */
310711e25f0dSDavid C Somayajulu eval_mode = GET_FIELD(cond_hdr->mode.data, DBG_MODE_HDR_EVAL_MODE) > 0;
310811e25f0dSDavid C Somayajulu if (eval_mode) {
310911e25f0dSDavid C Somayajulu modes_buf_offset = GET_FIELD(cond_hdr->mode.data, DBG_MODE_HDR_MODES_BUF_OFFSET);
311011e25f0dSDavid C Somayajulu mode_match = ecore_is_mode_match(p_hwfn, &modes_buf_offset);
311111e25f0dSDavid C Somayajulu }
311211e25f0dSDavid C Somayajulu
311311e25f0dSDavid C Somayajulu if (!mode_match || !block_enable[cond_hdr->block_id]) {
311411e25f0dSDavid C Somayajulu input_offset += cond_hdr->data_size;
311511e25f0dSDavid C Somayajulu continue;
311611e25f0dSDavid C Somayajulu }
311711e25f0dSDavid C Somayajulu
311811e25f0dSDavid C Somayajulu for (i = 0; i < cond_hdr->data_size; i++, input_offset++) {
311911e25f0dSDavid C Somayajulu const struct dbg_dump_reg *reg = (const struct dbg_dump_reg *)&input_regs_arr.ptr[input_offset];
312011e25f0dSDavid C Somayajulu
312111e25f0dSDavid C Somayajulu offset += ecore_grc_dump_reg_entry(p_hwfn, p_ptt, dump_buf + offset, dump,
312211e25f0dSDavid C Somayajulu GET_FIELD(reg->data, DBG_DUMP_REG_ADDRESS),
312311e25f0dSDavid C Somayajulu GET_FIELD(reg->data, DBG_DUMP_REG_LENGTH),
312411e25f0dSDavid C Somayajulu GET_FIELD(reg->data, DBG_DUMP_REG_WIDE_BUS));
312511e25f0dSDavid C Somayajulu (*num_dumped_reg_entries)++;
312611e25f0dSDavid C Somayajulu }
312711e25f0dSDavid C Somayajulu }
312811e25f0dSDavid C Somayajulu
312911e25f0dSDavid C Somayajulu return offset;
313011e25f0dSDavid C Somayajulu }
313111e25f0dSDavid C Somayajulu
313211e25f0dSDavid C Somayajulu /* Dumps GRC registers entries. Returns the dumped size in dwords. */
ecore_grc_dump_split_data(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,struct dbg_array input_regs_arr,u32 * dump_buf,bool dump,bool block_enable[MAX_BLOCK_ID],const char * split_type_name,u32 split_id,const char * param_name,const char * param_val)313311e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_split_data(struct ecore_hwfn *p_hwfn,
313411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
313511e25f0dSDavid C Somayajulu struct dbg_array input_regs_arr,
313611e25f0dSDavid C Somayajulu u32 *dump_buf,
313711e25f0dSDavid C Somayajulu bool dump,
313811e25f0dSDavid C Somayajulu bool block_enable[MAX_BLOCK_ID],
313911e25f0dSDavid C Somayajulu const char *split_type_name,
314011e25f0dSDavid C Somayajulu u32 split_id,
314111e25f0dSDavid C Somayajulu const char *param_name,
314211e25f0dSDavid C Somayajulu const char *param_val)
314311e25f0dSDavid C Somayajulu {
314411e25f0dSDavid C Somayajulu u32 num_dumped_reg_entries, offset;
314511e25f0dSDavid C Somayajulu
314611e25f0dSDavid C Somayajulu /* Calculate register dump header size (and skip it for now) */
314711e25f0dSDavid C Somayajulu offset = ecore_grc_dump_regs_hdr(dump_buf, false, 0, split_type_name, split_id, param_name, param_val);
314811e25f0dSDavid C Somayajulu
314911e25f0dSDavid C Somayajulu /* Dump registers */
315011e25f0dSDavid C Somayajulu offset += ecore_grc_dump_regs_entries(p_hwfn, p_ptt, input_regs_arr, dump_buf + offset, dump, block_enable, &num_dumped_reg_entries);
315111e25f0dSDavid C Somayajulu
315211e25f0dSDavid C Somayajulu /* Write register dump header */
315311e25f0dSDavid C Somayajulu if (dump && num_dumped_reg_entries > 0)
315411e25f0dSDavid C Somayajulu ecore_grc_dump_regs_hdr(dump_buf, dump, num_dumped_reg_entries, split_type_name, split_id, param_name, param_val);
315511e25f0dSDavid C Somayajulu
315611e25f0dSDavid C Somayajulu return num_dumped_reg_entries > 0 ? offset : 0;
315711e25f0dSDavid C Somayajulu }
315811e25f0dSDavid C Somayajulu
315911e25f0dSDavid C Somayajulu /* Dumps registers according to the input registers array. Returns the dumped
316011e25f0dSDavid C Somayajulu * size in dwords.
316111e25f0dSDavid C Somayajulu */
ecore_grc_dump_registers(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,bool block_enable[MAX_BLOCK_ID],const char * param_name,const char * param_val)316211e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_registers(struct ecore_hwfn *p_hwfn,
316311e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
316411e25f0dSDavid C Somayajulu u32 *dump_buf,
316511e25f0dSDavid C Somayajulu bool dump,
316611e25f0dSDavid C Somayajulu bool block_enable[MAX_BLOCK_ID],
316711e25f0dSDavid C Somayajulu const char *param_name,
316811e25f0dSDavid C Somayajulu const char *param_val)
316911e25f0dSDavid C Somayajulu {
317011e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
317111e25f0dSDavid C Somayajulu struct chip_platform_defs *chip_platform;
317211e25f0dSDavid C Somayajulu u32 offset = 0, input_offset = 0;
317311e25f0dSDavid C Somayajulu u8 port_id, pf_id, vf_id;
317411e25f0dSDavid C Somayajulu
317511e25f0dSDavid C Somayajulu chip_platform = &s_chip_defs[dev_data->chip_id].per_platform[dev_data->platform_id];
317611e25f0dSDavid C Somayajulu
317711e25f0dSDavid C Somayajulu while (input_offset < s_dbg_arrays[BIN_BUF_DBG_DUMP_REG].size_in_dwords) {
317811e25f0dSDavid C Somayajulu const struct dbg_dump_split_hdr *split_hdr;
317911e25f0dSDavid C Somayajulu struct dbg_array curr_input_regs_arr;
318011e25f0dSDavid C Somayajulu u32 split_data_size;
318111e25f0dSDavid C Somayajulu u8 split_type_id;
318211e25f0dSDavid C Somayajulu
318311e25f0dSDavid C Somayajulu split_hdr = (const struct dbg_dump_split_hdr *)&s_dbg_arrays[BIN_BUF_DBG_DUMP_REG].ptr[input_offset++];
318411e25f0dSDavid C Somayajulu split_type_id = GET_FIELD(split_hdr->hdr, DBG_DUMP_SPLIT_HDR_SPLIT_TYPE_ID);
318511e25f0dSDavid C Somayajulu split_data_size = GET_FIELD(split_hdr->hdr, DBG_DUMP_SPLIT_HDR_DATA_SIZE);
318611e25f0dSDavid C Somayajulu curr_input_regs_arr.ptr = &s_dbg_arrays[BIN_BUF_DBG_DUMP_REG].ptr[input_offset];
318711e25f0dSDavid C Somayajulu curr_input_regs_arr.size_in_dwords = split_data_size;
318811e25f0dSDavid C Somayajulu
318911e25f0dSDavid C Somayajulu switch(split_type_id) {
319011e25f0dSDavid C Somayajulu case SPLIT_TYPE_NONE:
319111e25f0dSDavid C Somayajulu offset += ecore_grc_dump_split_data(p_hwfn, p_ptt, curr_input_regs_arr, dump_buf + offset, dump, block_enable, "eng", (u32)(-1), param_name, param_val);
319211e25f0dSDavid C Somayajulu break;
319311e25f0dSDavid C Somayajulu
319411e25f0dSDavid C Somayajulu case SPLIT_TYPE_PORT:
319511e25f0dSDavid C Somayajulu for (port_id = 0; port_id < chip_platform->num_ports; port_id++) {
319611e25f0dSDavid C Somayajulu if (dump)
319711e25f0dSDavid C Somayajulu ecore_port_pretend(p_hwfn, p_ptt, port_id);
319811e25f0dSDavid C Somayajulu offset += ecore_grc_dump_split_data(p_hwfn, p_ptt, curr_input_regs_arr, dump_buf + offset, dump, block_enable, "port", port_id, param_name, param_val);
319911e25f0dSDavid C Somayajulu }
320011e25f0dSDavid C Somayajulu break;
320111e25f0dSDavid C Somayajulu
320211e25f0dSDavid C Somayajulu case SPLIT_TYPE_PF:
320311e25f0dSDavid C Somayajulu case SPLIT_TYPE_PORT_PF:
320411e25f0dSDavid C Somayajulu for (pf_id = 0; pf_id < chip_platform->num_pfs; pf_id++) {
320511e25f0dSDavid C Somayajulu if (dump)
320611e25f0dSDavid C Somayajulu ecore_fid_pretend(p_hwfn, p_ptt, (pf_id << PXP_PRETEND_CONCRETE_FID_PFID_SHIFT));
320711e25f0dSDavid C Somayajulu offset += ecore_grc_dump_split_data(p_hwfn, p_ptt, curr_input_regs_arr, dump_buf + offset, dump, block_enable, "pf", pf_id, param_name, param_val);
320811e25f0dSDavid C Somayajulu }
320911e25f0dSDavid C Somayajulu break;
321011e25f0dSDavid C Somayajulu
321111e25f0dSDavid C Somayajulu case SPLIT_TYPE_VF:
321211e25f0dSDavid C Somayajulu for (vf_id = 0; vf_id < chip_platform->num_vfs; vf_id++) {
321311e25f0dSDavid C Somayajulu if (dump)
321411e25f0dSDavid C Somayajulu ecore_fid_pretend(p_hwfn, p_ptt, (1 << PXP_PRETEND_CONCRETE_FID_VFVALID_SHIFT) | (vf_id << PXP_PRETEND_CONCRETE_FID_VFID_SHIFT));
321511e25f0dSDavid C Somayajulu offset += ecore_grc_dump_split_data(p_hwfn, p_ptt, curr_input_regs_arr, dump_buf + offset, dump, block_enable, "vf", vf_id, param_name, param_val);
321611e25f0dSDavid C Somayajulu }
321711e25f0dSDavid C Somayajulu break;
321811e25f0dSDavid C Somayajulu
321911e25f0dSDavid C Somayajulu default:
322011e25f0dSDavid C Somayajulu break;
322111e25f0dSDavid C Somayajulu }
322211e25f0dSDavid C Somayajulu
322311e25f0dSDavid C Somayajulu input_offset += split_data_size;
322411e25f0dSDavid C Somayajulu }
322511e25f0dSDavid C Somayajulu
322611e25f0dSDavid C Somayajulu /* Pretend to original PF */
322711e25f0dSDavid C Somayajulu if (dump)
322811e25f0dSDavid C Somayajulu ecore_fid_pretend(p_hwfn, p_ptt, (p_hwfn->rel_pf_id << PXP_PRETEND_CONCRETE_FID_PFID_SHIFT));
322911e25f0dSDavid C Somayajulu
323011e25f0dSDavid C Somayajulu return offset;
323111e25f0dSDavid C Somayajulu }
323211e25f0dSDavid C Somayajulu
323311e25f0dSDavid C Somayajulu /* Dump reset registers. Returns the dumped size in dwords. */
ecore_grc_dump_reset_regs(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)323411e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_reset_regs(struct ecore_hwfn *p_hwfn,
323511e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
323611e25f0dSDavid C Somayajulu u32 *dump_buf,
323711e25f0dSDavid C Somayajulu bool dump)
323811e25f0dSDavid C Somayajulu {
323911e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
324011e25f0dSDavid C Somayajulu u32 i, offset = 0, num_regs = 0;
324111e25f0dSDavid C Somayajulu
324211e25f0dSDavid C Somayajulu /* Calculate header size */
324311e25f0dSDavid C Somayajulu offset += ecore_grc_dump_regs_hdr(dump_buf, false, 0, "eng", -1, OSAL_NULL, OSAL_NULL);
324411e25f0dSDavid C Somayajulu
324511e25f0dSDavid C Somayajulu /* Write reset registers */
324611e25f0dSDavid C Somayajulu for (i = 0; i < MAX_DBG_RESET_REGS; i++) {
324711e25f0dSDavid C Somayajulu if (!s_reset_regs_defs[i].exists[dev_data->chip_id])
324811e25f0dSDavid C Somayajulu continue;
324911e25f0dSDavid C Somayajulu
325011e25f0dSDavid C Somayajulu offset += ecore_grc_dump_reg_entry(p_hwfn, p_ptt, dump_buf + offset, dump, BYTES_TO_DWORDS(s_reset_regs_defs[i].addr), 1, false);
325111e25f0dSDavid C Somayajulu num_regs++;
325211e25f0dSDavid C Somayajulu }
325311e25f0dSDavid C Somayajulu
325411e25f0dSDavid C Somayajulu /* Write header */
325511e25f0dSDavid C Somayajulu if (dump)
325611e25f0dSDavid C Somayajulu ecore_grc_dump_regs_hdr(dump_buf, true, num_regs, "eng", -1, OSAL_NULL, OSAL_NULL);
325711e25f0dSDavid C Somayajulu
325811e25f0dSDavid C Somayajulu return offset;
325911e25f0dSDavid C Somayajulu }
326011e25f0dSDavid C Somayajulu
326111e25f0dSDavid C Somayajulu /* Dump registers that are modified during GRC Dump and therefore must be
326211e25f0dSDavid C Somayajulu * dumped first. Returns the dumped size in dwords.
326311e25f0dSDavid C Somayajulu */
ecore_grc_dump_modified_regs(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)326411e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_modified_regs(struct ecore_hwfn *p_hwfn,
326511e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
326611e25f0dSDavid C Somayajulu u32 *dump_buf,
326711e25f0dSDavid C Somayajulu bool dump)
326811e25f0dSDavid C Somayajulu {
326911e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
327011e25f0dSDavid C Somayajulu u32 block_id, offset = 0, num_reg_entries = 0;
327111e25f0dSDavid C Somayajulu const struct dbg_attn_reg *attn_reg_arr;
327211e25f0dSDavid C Somayajulu u8 storm_id, reg_idx, num_attn_regs;
327311e25f0dSDavid C Somayajulu
327411e25f0dSDavid C Somayajulu /* Calculate header size */
327511e25f0dSDavid C Somayajulu offset += ecore_grc_dump_regs_hdr(dump_buf, false, 0, "eng", -1, OSAL_NULL, OSAL_NULL);
327611e25f0dSDavid C Somayajulu
327711e25f0dSDavid C Somayajulu /* Write parity registers */
327811e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) {
327911e25f0dSDavid C Somayajulu if (dev_data->block_in_reset[block_id] && dump)
328011e25f0dSDavid C Somayajulu continue;
328111e25f0dSDavid C Somayajulu
328211e25f0dSDavid C Somayajulu attn_reg_arr = ecore_get_block_attn_regs((enum block_id)block_id, ATTN_TYPE_PARITY, &num_attn_regs);
328311e25f0dSDavid C Somayajulu
328411e25f0dSDavid C Somayajulu for (reg_idx = 0; reg_idx < num_attn_regs; reg_idx++) {
328511e25f0dSDavid C Somayajulu const struct dbg_attn_reg *reg_data = &attn_reg_arr[reg_idx];
328611e25f0dSDavid C Somayajulu u16 modes_buf_offset;
328711e25f0dSDavid C Somayajulu bool eval_mode;
328811e25f0dSDavid C Somayajulu
328911e25f0dSDavid C Somayajulu /* Check mode */
329011e25f0dSDavid C Somayajulu eval_mode = GET_FIELD(reg_data->mode.data, DBG_MODE_HDR_EVAL_MODE) > 0;
329111e25f0dSDavid C Somayajulu modes_buf_offset = GET_FIELD(reg_data->mode.data, DBG_MODE_HDR_MODES_BUF_OFFSET);
329211e25f0dSDavid C Somayajulu if (eval_mode && !ecore_is_mode_match(p_hwfn, &modes_buf_offset))
329311e25f0dSDavid C Somayajulu continue;
329411e25f0dSDavid C Somayajulu
329511e25f0dSDavid C Somayajulu /* Mode match: read & dump registers */
329611e25f0dSDavid C Somayajulu offset += ecore_grc_dump_reg_entry(p_hwfn, p_ptt, dump_buf + offset, dump, reg_data->mask_address, 1, false);
329711e25f0dSDavid C Somayajulu offset += ecore_grc_dump_reg_entry(p_hwfn, p_ptt, dump_buf + offset, dump, GET_FIELD(reg_data->data, DBG_ATTN_REG_STS_ADDRESS), 1, false);
329811e25f0dSDavid C Somayajulu num_reg_entries += 2;
329911e25f0dSDavid C Somayajulu }
330011e25f0dSDavid C Somayajulu }
330111e25f0dSDavid C Somayajulu
330211e25f0dSDavid C Somayajulu /* Write Storm stall status registers */
330311e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
330411e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
330511e25f0dSDavid C Somayajulu
330611e25f0dSDavid C Somayajulu if (dev_data->block_in_reset[storm->block_id] && dump)
330711e25f0dSDavid C Somayajulu continue;
330811e25f0dSDavid C Somayajulu
330911e25f0dSDavid C Somayajulu offset += ecore_grc_dump_reg_entry(p_hwfn, p_ptt, dump_buf + offset, dump,
331011e25f0dSDavid C Somayajulu BYTES_TO_DWORDS(storm->sem_fast_mem_addr + SEM_FAST_REG_STALLED), 1, false);
331111e25f0dSDavid C Somayajulu num_reg_entries++;
331211e25f0dSDavid C Somayajulu }
331311e25f0dSDavid C Somayajulu
331411e25f0dSDavid C Somayajulu /* Write header */
331511e25f0dSDavid C Somayajulu if (dump)
331611e25f0dSDavid C Somayajulu ecore_grc_dump_regs_hdr(dump_buf, true, num_reg_entries, "eng", -1, OSAL_NULL, OSAL_NULL);
331711e25f0dSDavid C Somayajulu
331811e25f0dSDavid C Somayajulu return offset;
331911e25f0dSDavid C Somayajulu }
332011e25f0dSDavid C Somayajulu
332111e25f0dSDavid C Somayajulu /* Dumps registers that can't be represented in the debug arrays */
ecore_grc_dump_special_regs(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)332211e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_special_regs(struct ecore_hwfn *p_hwfn,
332311e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
332411e25f0dSDavid C Somayajulu u32 *dump_buf,
332511e25f0dSDavid C Somayajulu bool dump)
332611e25f0dSDavid C Somayajulu {
332711e25f0dSDavid C Somayajulu u32 offset = 0;
332811e25f0dSDavid C Somayajulu
332911e25f0dSDavid C Somayajulu offset += ecore_grc_dump_regs_hdr(dump_buf, dump, 2, "eng", -1, OSAL_NULL, OSAL_NULL);
333011e25f0dSDavid C Somayajulu
333111e25f0dSDavid C Somayajulu /* Dump R/TDIF_REG_DEBUG_ERROR_INFO_SIZE (every 8'th register should be
333211e25f0dSDavid C Somayajulu * skipped).
333311e25f0dSDavid C Somayajulu */
333411e25f0dSDavid C Somayajulu offset += ecore_grc_dump_reg_entry_skip(p_hwfn, p_ptt, dump_buf + offset, dump, BYTES_TO_DWORDS(RDIF_REG_DEBUG_ERROR_INFO), RDIF_REG_DEBUG_ERROR_INFO_SIZE, 7, 1);
333511e25f0dSDavid C Somayajulu offset += ecore_grc_dump_reg_entry_skip(p_hwfn, p_ptt, dump_buf + offset, dump, BYTES_TO_DWORDS(TDIF_REG_DEBUG_ERROR_INFO), TDIF_REG_DEBUG_ERROR_INFO_SIZE, 7, 1);
333611e25f0dSDavid C Somayajulu
333711e25f0dSDavid C Somayajulu return offset;
333811e25f0dSDavid C Somayajulu }
333911e25f0dSDavid C Somayajulu
334011e25f0dSDavid C Somayajulu /* Dumps a GRC memory header (section and params). Returns the dumped size in
334111e25f0dSDavid C Somayajulu * dwords. The following parameters are dumped:
334211e25f0dSDavid C Somayajulu * - name: dumped only if it's not OSAL_NULL.
334311e25f0dSDavid C Somayajulu * - addr: in dwords, dumped only if name is OSAL_NULL.
334411e25f0dSDavid C Somayajulu * - len: in dwords, always dumped.
334511e25f0dSDavid C Somayajulu * - width: dumped if it's not zero.
334611e25f0dSDavid C Somayajulu * - packed: dumped only if it's not false.
334711e25f0dSDavid C Somayajulu * - mem_group: always dumped.
334811e25f0dSDavid C Somayajulu * - is_storm: true only if the memory is related to a Storm.
334911e25f0dSDavid C Somayajulu * - storm_letter: valid only if is_storm is true.
335011e25f0dSDavid C Somayajulu *
335111e25f0dSDavid C Somayajulu */
ecore_grc_dump_mem_hdr(struct ecore_hwfn * p_hwfn,u32 * dump_buf,bool dump,const char * name,u32 addr,u32 len,u32 bit_width,bool packed,const char * mem_group,bool is_storm,char storm_letter)335211e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_mem_hdr(struct ecore_hwfn *p_hwfn,
335311e25f0dSDavid C Somayajulu u32 *dump_buf,
335411e25f0dSDavid C Somayajulu bool dump,
335511e25f0dSDavid C Somayajulu const char *name,
335611e25f0dSDavid C Somayajulu u32 addr,
335711e25f0dSDavid C Somayajulu u32 len,
335811e25f0dSDavid C Somayajulu u32 bit_width,
335911e25f0dSDavid C Somayajulu bool packed,
336011e25f0dSDavid C Somayajulu const char *mem_group,
336111e25f0dSDavid C Somayajulu bool is_storm,
336211e25f0dSDavid C Somayajulu char storm_letter)
336311e25f0dSDavid C Somayajulu {
336411e25f0dSDavid C Somayajulu u8 num_params = 3;
336511e25f0dSDavid C Somayajulu u32 offset = 0;
336611e25f0dSDavid C Somayajulu char buf[64];
336711e25f0dSDavid C Somayajulu
336811e25f0dSDavid C Somayajulu if (!len)
336911e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "Unexpected GRC Dump error: dumped memory size must be non-zero\n");
337011e25f0dSDavid C Somayajulu
337111e25f0dSDavid C Somayajulu if (bit_width)
337211e25f0dSDavid C Somayajulu num_params++;
337311e25f0dSDavid C Somayajulu if (packed)
337411e25f0dSDavid C Somayajulu num_params++;
337511e25f0dSDavid C Somayajulu
337611e25f0dSDavid C Somayajulu /* Dump section header */
337711e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "grc_mem", num_params);
337811e25f0dSDavid C Somayajulu
337911e25f0dSDavid C Somayajulu if (name) {
338011e25f0dSDavid C Somayajulu /* Dump name */
338111e25f0dSDavid C Somayajulu if (is_storm) {
338211e25f0dSDavid C Somayajulu OSAL_STRCPY(buf, "?STORM_");
338311e25f0dSDavid C Somayajulu buf[0] = storm_letter;
338411e25f0dSDavid C Somayajulu OSAL_STRCPY(buf + OSAL_STRLEN(buf), name);
338511e25f0dSDavid C Somayajulu }
338611e25f0dSDavid C Somayajulu else {
338711e25f0dSDavid C Somayajulu OSAL_STRCPY(buf, name);
338811e25f0dSDavid C Somayajulu }
338911e25f0dSDavid C Somayajulu
339011e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "name", buf);
339111e25f0dSDavid C Somayajulu }
339211e25f0dSDavid C Somayajulu else {
339311e25f0dSDavid C Somayajulu /* Dump address */
339411e25f0dSDavid C Somayajulu u32 addr_in_bytes = DWORDS_TO_BYTES(addr);
339511e25f0dSDavid C Somayajulu
339611e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "addr", addr_in_bytes);
339711e25f0dSDavid C Somayajulu }
339811e25f0dSDavid C Somayajulu
339911e25f0dSDavid C Somayajulu /* Dump len */
340011e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "len", len);
340111e25f0dSDavid C Somayajulu
340211e25f0dSDavid C Somayajulu /* Dump bit width */
340311e25f0dSDavid C Somayajulu if (bit_width)
340411e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "width", bit_width);
340511e25f0dSDavid C Somayajulu
340611e25f0dSDavid C Somayajulu /* Dump packed */
340711e25f0dSDavid C Somayajulu if (packed)
340811e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "packed", 1);
340911e25f0dSDavid C Somayajulu
341011e25f0dSDavid C Somayajulu /* Dump reg type */
341111e25f0dSDavid C Somayajulu if (is_storm) {
341211e25f0dSDavid C Somayajulu OSAL_STRCPY(buf, "?STORM_");
341311e25f0dSDavid C Somayajulu buf[0] = storm_letter;
341411e25f0dSDavid C Somayajulu OSAL_STRCPY(buf + OSAL_STRLEN(buf), mem_group);
341511e25f0dSDavid C Somayajulu }
341611e25f0dSDavid C Somayajulu else {
341711e25f0dSDavid C Somayajulu OSAL_STRCPY(buf, mem_group);
341811e25f0dSDavid C Somayajulu }
341911e25f0dSDavid C Somayajulu
342011e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "type", buf);
342111e25f0dSDavid C Somayajulu
342211e25f0dSDavid C Somayajulu return offset;
342311e25f0dSDavid C Somayajulu }
342411e25f0dSDavid C Somayajulu
342511e25f0dSDavid C Somayajulu /* Dumps a single GRC memory. If name is OSAL_NULL, the memory is stored by address.
342611e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
342711e25f0dSDavid C Somayajulu * The addr and len arguments are specified in dwords.
342811e25f0dSDavid C Somayajulu */
ecore_grc_dump_mem(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,const char * name,u32 addr,u32 len,bool wide_bus,u32 bit_width,bool packed,const char * mem_group,bool is_storm,char storm_letter)342911e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_mem(struct ecore_hwfn *p_hwfn,
343011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
343111e25f0dSDavid C Somayajulu u32 *dump_buf,
343211e25f0dSDavid C Somayajulu bool dump,
343311e25f0dSDavid C Somayajulu const char *name,
343411e25f0dSDavid C Somayajulu u32 addr,
343511e25f0dSDavid C Somayajulu u32 len,
343611e25f0dSDavid C Somayajulu bool wide_bus,
343711e25f0dSDavid C Somayajulu u32 bit_width,
343811e25f0dSDavid C Somayajulu bool packed,
343911e25f0dSDavid C Somayajulu const char *mem_group,
344011e25f0dSDavid C Somayajulu bool is_storm,
344111e25f0dSDavid C Somayajulu char storm_letter)
344211e25f0dSDavid C Somayajulu {
344311e25f0dSDavid C Somayajulu u32 offset = 0;
344411e25f0dSDavid C Somayajulu
344511e25f0dSDavid C Somayajulu offset += ecore_grc_dump_mem_hdr(p_hwfn, dump_buf + offset, dump, name, addr, len, bit_width, packed, mem_group, is_storm, storm_letter);
344611e25f0dSDavid C Somayajulu offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, dump_buf + offset, dump, addr, len, wide_bus);
344711e25f0dSDavid C Somayajulu
344811e25f0dSDavid C Somayajulu return offset;
344911e25f0dSDavid C Somayajulu }
345011e25f0dSDavid C Somayajulu
345111e25f0dSDavid C Somayajulu /* Dumps GRC memories entries. Returns the dumped size in dwords. */
ecore_grc_dump_mem_entries(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,struct dbg_array input_mems_arr,u32 * dump_buf,bool dump)345211e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_mem_entries(struct ecore_hwfn *p_hwfn,
345311e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
345411e25f0dSDavid C Somayajulu struct dbg_array input_mems_arr,
345511e25f0dSDavid C Somayajulu u32 *dump_buf,
345611e25f0dSDavid C Somayajulu bool dump)
345711e25f0dSDavid C Somayajulu {
345811e25f0dSDavid C Somayajulu u32 i, offset = 0, input_offset = 0;
345911e25f0dSDavid C Somayajulu bool mode_match = true;
346011e25f0dSDavid C Somayajulu
346111e25f0dSDavid C Somayajulu while (input_offset < input_mems_arr.size_in_dwords) {
346211e25f0dSDavid C Somayajulu const struct dbg_dump_cond_hdr *cond_hdr;
346311e25f0dSDavid C Somayajulu u16 modes_buf_offset;
346411e25f0dSDavid C Somayajulu u32 num_entries;
346511e25f0dSDavid C Somayajulu bool eval_mode;
346611e25f0dSDavid C Somayajulu
346711e25f0dSDavid C Somayajulu cond_hdr = (const struct dbg_dump_cond_hdr *)&input_mems_arr.ptr[input_offset++];
346811e25f0dSDavid C Somayajulu num_entries = cond_hdr->data_size / MEM_DUMP_ENTRY_SIZE_DWORDS;
346911e25f0dSDavid C Somayajulu
347011e25f0dSDavid C Somayajulu /* Check required mode */
347111e25f0dSDavid C Somayajulu eval_mode = GET_FIELD(cond_hdr->mode.data, DBG_MODE_HDR_EVAL_MODE) > 0;
347211e25f0dSDavid C Somayajulu if (eval_mode) {
347311e25f0dSDavid C Somayajulu modes_buf_offset = GET_FIELD(cond_hdr->mode.data, DBG_MODE_HDR_MODES_BUF_OFFSET);
347411e25f0dSDavid C Somayajulu mode_match = ecore_is_mode_match(p_hwfn, &modes_buf_offset);
347511e25f0dSDavid C Somayajulu }
347611e25f0dSDavid C Somayajulu
347711e25f0dSDavid C Somayajulu if (!mode_match) {
347811e25f0dSDavid C Somayajulu input_offset += cond_hdr->data_size;
347911e25f0dSDavid C Somayajulu continue;
348011e25f0dSDavid C Somayajulu }
348111e25f0dSDavid C Somayajulu
348211e25f0dSDavid C Somayajulu for (i = 0; i < num_entries; i++, input_offset += MEM_DUMP_ENTRY_SIZE_DWORDS) {
348311e25f0dSDavid C Somayajulu const struct dbg_dump_mem *mem = (const struct dbg_dump_mem *)&input_mems_arr.ptr[input_offset];
348411e25f0dSDavid C Somayajulu u8 mem_group_id = GET_FIELD(mem->dword0, DBG_DUMP_MEM_MEM_GROUP_ID);
348511e25f0dSDavid C Somayajulu bool is_storm = false, mem_wide_bus;
348611e25f0dSDavid C Somayajulu char storm_letter = 'a';
348711e25f0dSDavid C Somayajulu u32 mem_addr, mem_len;
348811e25f0dSDavid C Somayajulu
348911e25f0dSDavid C Somayajulu if (mem_group_id >= MEM_GROUPS_NUM) {
349011e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "Invalid mem_group_id\n");
349111e25f0dSDavid C Somayajulu return 0;
349211e25f0dSDavid C Somayajulu }
349311e25f0dSDavid C Somayajulu
349411e25f0dSDavid C Somayajulu if (!ecore_grc_is_mem_included(p_hwfn, (enum block_id)cond_hdr->block_id, mem_group_id))
349511e25f0dSDavid C Somayajulu continue;
349611e25f0dSDavid C Somayajulu
349711e25f0dSDavid C Somayajulu mem_addr = GET_FIELD(mem->dword0, DBG_DUMP_MEM_ADDRESS);
349811e25f0dSDavid C Somayajulu mem_len = GET_FIELD(mem->dword1, DBG_DUMP_MEM_LENGTH);
349911e25f0dSDavid C Somayajulu mem_wide_bus = GET_FIELD(mem->dword1, DBG_DUMP_MEM_WIDE_BUS);
350011e25f0dSDavid C Somayajulu
350111e25f0dSDavid C Somayajulu /* Update memory length for CCFC/TCFC memories
350211e25f0dSDavid C Somayajulu * according to number of LCIDs/LTIDs.
350311e25f0dSDavid C Somayajulu */
350411e25f0dSDavid C Somayajulu if (mem_group_id == MEM_GROUP_CONN_CFC_MEM) {
350511e25f0dSDavid C Somayajulu if (mem_len % MAX_LCIDS) {
350611e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "Invalid CCFC connection memory size\n");
350711e25f0dSDavid C Somayajulu return 0;
350811e25f0dSDavid C Somayajulu }
350911e25f0dSDavid C Somayajulu
351011e25f0dSDavid C Somayajulu mem_len = ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NUM_LCIDS) * (mem_len / MAX_LCIDS);
351111e25f0dSDavid C Somayajulu }
351211e25f0dSDavid C Somayajulu else if (mem_group_id == MEM_GROUP_TASK_CFC_MEM) {
351311e25f0dSDavid C Somayajulu if (mem_len % MAX_LTIDS) {
351411e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "Invalid TCFC task memory size\n");
351511e25f0dSDavid C Somayajulu return 0;
351611e25f0dSDavid C Somayajulu }
351711e25f0dSDavid C Somayajulu
351811e25f0dSDavid C Somayajulu mem_len = ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NUM_LTIDS) * (mem_len / MAX_LTIDS);
351911e25f0dSDavid C Somayajulu }
352011e25f0dSDavid C Somayajulu
352111e25f0dSDavid C Somayajulu /* If memory is associated with Storm, udpate Storm
352211e25f0dSDavid C Somayajulu * details.
352311e25f0dSDavid C Somayajulu */
352411e25f0dSDavid C Somayajulu if (s_block_defs[cond_hdr->block_id]->associated_to_storm) {
352511e25f0dSDavid C Somayajulu is_storm = true;
352611e25f0dSDavid C Somayajulu storm_letter = s_storm_defs[s_block_defs[cond_hdr->block_id]->storm_id].letter;
352711e25f0dSDavid C Somayajulu }
352811e25f0dSDavid C Somayajulu
352911e25f0dSDavid C Somayajulu /* Dump memory */
353011e25f0dSDavid C Somayajulu offset += ecore_grc_dump_mem(p_hwfn, p_ptt, dump_buf + offset, dump, OSAL_NULL, mem_addr, mem_len, mem_wide_bus,
353111e25f0dSDavid C Somayajulu 0, false, s_mem_group_names[mem_group_id], is_storm, storm_letter);
353211e25f0dSDavid C Somayajulu }
353311e25f0dSDavid C Somayajulu }
353411e25f0dSDavid C Somayajulu
353511e25f0dSDavid C Somayajulu return offset;
353611e25f0dSDavid C Somayajulu }
353711e25f0dSDavid C Somayajulu
353811e25f0dSDavid C Somayajulu /* Dumps GRC memories according to the input array dump_mem.
353911e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
354011e25f0dSDavid C Somayajulu */
ecore_grc_dump_memories(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)354111e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_memories(struct ecore_hwfn *p_hwfn,
354211e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
354311e25f0dSDavid C Somayajulu u32 *dump_buf,
354411e25f0dSDavid C Somayajulu bool dump)
354511e25f0dSDavid C Somayajulu {
354611e25f0dSDavid C Somayajulu u32 offset = 0, input_offset = 0;
354711e25f0dSDavid C Somayajulu
354811e25f0dSDavid C Somayajulu while (input_offset < s_dbg_arrays[BIN_BUF_DBG_DUMP_MEM].size_in_dwords) {
354911e25f0dSDavid C Somayajulu const struct dbg_dump_split_hdr *split_hdr;
355011e25f0dSDavid C Somayajulu struct dbg_array curr_input_mems_arr;
355111e25f0dSDavid C Somayajulu u32 split_data_size;
355211e25f0dSDavid C Somayajulu u8 split_type_id;
355311e25f0dSDavid C Somayajulu
355411e25f0dSDavid C Somayajulu split_hdr = (const struct dbg_dump_split_hdr *)&s_dbg_arrays[BIN_BUF_DBG_DUMP_MEM].ptr[input_offset++];
355511e25f0dSDavid C Somayajulu split_type_id = GET_FIELD(split_hdr->hdr, DBG_DUMP_SPLIT_HDR_SPLIT_TYPE_ID);
355611e25f0dSDavid C Somayajulu split_data_size = GET_FIELD(split_hdr->hdr, DBG_DUMP_SPLIT_HDR_DATA_SIZE);
355711e25f0dSDavid C Somayajulu curr_input_mems_arr.ptr = &s_dbg_arrays[BIN_BUF_DBG_DUMP_MEM].ptr[input_offset];
355811e25f0dSDavid C Somayajulu curr_input_mems_arr.size_in_dwords = split_data_size;
355911e25f0dSDavid C Somayajulu
356011e25f0dSDavid C Somayajulu switch (split_type_id) {
356111e25f0dSDavid C Somayajulu case SPLIT_TYPE_NONE:
356211e25f0dSDavid C Somayajulu offset += ecore_grc_dump_mem_entries(p_hwfn, p_ptt, curr_input_mems_arr, dump_buf + offset, dump);
356311e25f0dSDavid C Somayajulu break;
356411e25f0dSDavid C Somayajulu
356511e25f0dSDavid C Somayajulu default:
356611e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "Dumping split memories is currently not supported\n");
356711e25f0dSDavid C Somayajulu break;
356811e25f0dSDavid C Somayajulu }
356911e25f0dSDavid C Somayajulu
357011e25f0dSDavid C Somayajulu input_offset += split_data_size;
357111e25f0dSDavid C Somayajulu }
357211e25f0dSDavid C Somayajulu
357311e25f0dSDavid C Somayajulu return offset;
357411e25f0dSDavid C Somayajulu }
357511e25f0dSDavid C Somayajulu
357611e25f0dSDavid C Somayajulu /* Dumps GRC context data for the specified Storm.
357711e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
357811e25f0dSDavid C Somayajulu * The lid_size argument is specified in quad-regs.
357911e25f0dSDavid C Somayajulu */
ecore_grc_dump_ctx_data(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,const char * name,u32 num_lids,u32 lid_size,u32 rd_reg_addr,u8 storm_id)358011e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_ctx_data(struct ecore_hwfn *p_hwfn,
358111e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
358211e25f0dSDavid C Somayajulu u32 *dump_buf,
358311e25f0dSDavid C Somayajulu bool dump,
358411e25f0dSDavid C Somayajulu const char *name,
358511e25f0dSDavid C Somayajulu u32 num_lids,
358611e25f0dSDavid C Somayajulu u32 lid_size,
358711e25f0dSDavid C Somayajulu u32 rd_reg_addr,
358811e25f0dSDavid C Somayajulu u8 storm_id)
358911e25f0dSDavid C Somayajulu {
359011e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
359111e25f0dSDavid C Somayajulu u32 i, lid, total_size, offset = 0;
359211e25f0dSDavid C Somayajulu
359311e25f0dSDavid C Somayajulu if (!lid_size)
359411e25f0dSDavid C Somayajulu return 0;
359511e25f0dSDavid C Somayajulu
359611e25f0dSDavid C Somayajulu lid_size *= BYTES_IN_DWORD;
359711e25f0dSDavid C Somayajulu total_size = num_lids * lid_size;
359811e25f0dSDavid C Somayajulu
359911e25f0dSDavid C Somayajulu offset += ecore_grc_dump_mem_hdr(p_hwfn, dump_buf + offset, dump, name, 0, total_size, lid_size * 32, false, name, true, storm->letter);
360011e25f0dSDavid C Somayajulu
360111e25f0dSDavid C Somayajulu if (!dump)
360211e25f0dSDavid C Somayajulu return offset + total_size;
360311e25f0dSDavid C Somayajulu
360411e25f0dSDavid C Somayajulu /* Dump context data */
360511e25f0dSDavid C Somayajulu for (lid = 0; lid < num_lids; lid++) {
360611e25f0dSDavid C Somayajulu for (i = 0; i < lid_size; i++, offset++) {
360711e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, storm->cm_ctx_wr_addr, (i << 9) | lid);
360811e25f0dSDavid C Somayajulu *(dump_buf + offset) = ecore_rd(p_hwfn, p_ptt, rd_reg_addr);
360911e25f0dSDavid C Somayajulu }
361011e25f0dSDavid C Somayajulu }
361111e25f0dSDavid C Somayajulu
361211e25f0dSDavid C Somayajulu return offset;
361311e25f0dSDavid C Somayajulu }
361411e25f0dSDavid C Somayajulu
361511e25f0dSDavid C Somayajulu /* Dumps GRC contexts. Returns the dumped size in dwords. */
ecore_grc_dump_ctx(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)361611e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_ctx(struct ecore_hwfn *p_hwfn,
361711e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
361811e25f0dSDavid C Somayajulu u32 *dump_buf,
361911e25f0dSDavid C Somayajulu bool dump)
362011e25f0dSDavid C Somayajulu {
362111e25f0dSDavid C Somayajulu u32 offset = 0;
362211e25f0dSDavid C Somayajulu u8 storm_id;
362311e25f0dSDavid C Somayajulu
362411e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
362511e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
362611e25f0dSDavid C Somayajulu
362711e25f0dSDavid C Somayajulu if (!ecore_grc_is_storm_included(p_hwfn, (enum dbg_storms)storm_id))
362811e25f0dSDavid C Somayajulu continue;
362911e25f0dSDavid C Somayajulu
363011e25f0dSDavid C Somayajulu /* Dump Conn AG context size */
363111e25f0dSDavid C Somayajulu offset += ecore_grc_dump_ctx_data(p_hwfn, p_ptt, dump_buf + offset, dump, "CONN_AG_CTX", ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NUM_LCIDS),
363211e25f0dSDavid C Somayajulu storm->cm_conn_ag_ctx_lid_size, storm->cm_conn_ag_ctx_rd_addr, storm_id);
363311e25f0dSDavid C Somayajulu
363411e25f0dSDavid C Somayajulu /* Dump Conn ST context size */
363511e25f0dSDavid C Somayajulu offset += ecore_grc_dump_ctx_data(p_hwfn, p_ptt, dump_buf + offset, dump, "CONN_ST_CTX", ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NUM_LCIDS),
363611e25f0dSDavid C Somayajulu storm->cm_conn_st_ctx_lid_size, storm->cm_conn_st_ctx_rd_addr, storm_id);
363711e25f0dSDavid C Somayajulu
363811e25f0dSDavid C Somayajulu /* Dump Task AG context size */
363911e25f0dSDavid C Somayajulu offset += ecore_grc_dump_ctx_data(p_hwfn, p_ptt, dump_buf + offset, dump, "TASK_AG_CTX", ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NUM_LTIDS),
364011e25f0dSDavid C Somayajulu storm->cm_task_ag_ctx_lid_size, storm->cm_task_ag_ctx_rd_addr, storm_id);
364111e25f0dSDavid C Somayajulu
364211e25f0dSDavid C Somayajulu /* Dump Task ST context size */
364311e25f0dSDavid C Somayajulu offset += ecore_grc_dump_ctx_data(p_hwfn, p_ptt, dump_buf + offset, dump, "TASK_ST_CTX", ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NUM_LTIDS),
364411e25f0dSDavid C Somayajulu storm->cm_task_st_ctx_lid_size, storm->cm_task_st_ctx_rd_addr, storm_id);
364511e25f0dSDavid C Somayajulu }
364611e25f0dSDavid C Somayajulu
364711e25f0dSDavid C Somayajulu return offset;
364811e25f0dSDavid C Somayajulu }
364911e25f0dSDavid C Somayajulu
365011e25f0dSDavid C Somayajulu /* Dumps GRC IORs data. Returns the dumped size in dwords. */
ecore_grc_dump_iors(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)365111e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_iors(struct ecore_hwfn *p_hwfn,
365211e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
365311e25f0dSDavid C Somayajulu u32 *dump_buf,
365411e25f0dSDavid C Somayajulu bool dump)
365511e25f0dSDavid C Somayajulu {
365611e25f0dSDavid C Somayajulu char buf[10] = "IOR_SET_?";
365711e25f0dSDavid C Somayajulu u32 addr, offset = 0;
365811e25f0dSDavid C Somayajulu u8 storm_id, set_id;
365911e25f0dSDavid C Somayajulu
366011e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
366111e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
366211e25f0dSDavid C Somayajulu
366311e25f0dSDavid C Somayajulu if (!ecore_grc_is_storm_included(p_hwfn, (enum dbg_storms)storm_id))
366411e25f0dSDavid C Somayajulu continue;
366511e25f0dSDavid C Somayajulu
366611e25f0dSDavid C Somayajulu for (set_id = 0; set_id < NUM_IOR_SETS; set_id++) {
366711e25f0dSDavid C Somayajulu addr = BYTES_TO_DWORDS(storm->sem_fast_mem_addr + SEM_FAST_REG_STORM_REG_FILE) + IOR_SET_OFFSET(set_id);
366811e25f0dSDavid C Somayajulu buf[OSAL_STRLEN(buf) - 1] = '0' + set_id;
366911e25f0dSDavid C Somayajulu offset += ecore_grc_dump_mem(p_hwfn, p_ptt, dump_buf + offset, dump, buf, addr, IORS_PER_SET, false, 32, false, "ior", true, storm->letter);
367011e25f0dSDavid C Somayajulu }
367111e25f0dSDavid C Somayajulu }
367211e25f0dSDavid C Somayajulu
367311e25f0dSDavid C Somayajulu return offset;
367411e25f0dSDavid C Somayajulu }
367511e25f0dSDavid C Somayajulu
367611e25f0dSDavid C Somayajulu /* Dump VFC CAM. Returns the dumped size in dwords. */
ecore_grc_dump_vfc_cam(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u8 storm_id)367711e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_vfc_cam(struct ecore_hwfn *p_hwfn,
367811e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
367911e25f0dSDavid C Somayajulu u32 *dump_buf,
368011e25f0dSDavid C Somayajulu bool dump,
368111e25f0dSDavid C Somayajulu u8 storm_id)
368211e25f0dSDavid C Somayajulu {
368311e25f0dSDavid C Somayajulu u32 total_size = VFC_CAM_NUM_ROWS * VFC_CAM_RESP_DWORDS;
368411e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
368511e25f0dSDavid C Somayajulu u32 cam_addr[VFC_CAM_ADDR_DWORDS] = { 0 };
368611e25f0dSDavid C Somayajulu u32 cam_cmd[VFC_CAM_CMD_DWORDS] = { 0 };
368711e25f0dSDavid C Somayajulu u32 row, i, offset = 0;
368811e25f0dSDavid C Somayajulu
368911e25f0dSDavid C Somayajulu offset += ecore_grc_dump_mem_hdr(p_hwfn, dump_buf + offset, dump, "vfc_cam", 0, total_size, 256, false, "vfc_cam", true, storm->letter);
369011e25f0dSDavid C Somayajulu
369111e25f0dSDavid C Somayajulu if (!dump)
369211e25f0dSDavid C Somayajulu return offset + total_size;
369311e25f0dSDavid C Somayajulu
369411e25f0dSDavid C Somayajulu /* Prepare CAM address */
369511e25f0dSDavid C Somayajulu SET_VAR_FIELD(cam_addr, VFC_CAM_ADDR, OP, VFC_OPCODE_CAM_RD);
369611e25f0dSDavid C Somayajulu
369711e25f0dSDavid C Somayajulu for (row = 0; row < VFC_CAM_NUM_ROWS; row++, offset += VFC_CAM_RESP_DWORDS) {
369811e25f0dSDavid C Somayajulu /* Write VFC CAM command */
369911e25f0dSDavid C Somayajulu SET_VAR_FIELD(cam_cmd, VFC_CAM_CMD, ROW, row);
370011e25f0dSDavid C Somayajulu ARR_REG_WR(p_hwfn, p_ptt, storm->sem_fast_mem_addr + SEM_FAST_REG_VFC_DATA_WR, cam_cmd, VFC_CAM_CMD_DWORDS);
370111e25f0dSDavid C Somayajulu
370211e25f0dSDavid C Somayajulu /* Write VFC CAM address */
370311e25f0dSDavid C Somayajulu ARR_REG_WR(p_hwfn, p_ptt, storm->sem_fast_mem_addr + SEM_FAST_REG_VFC_ADDR, cam_addr, VFC_CAM_ADDR_DWORDS);
370411e25f0dSDavid C Somayajulu
370511e25f0dSDavid C Somayajulu /* Read VFC CAM read response */
370611e25f0dSDavid C Somayajulu ARR_REG_RD(p_hwfn, p_ptt, storm->sem_fast_mem_addr + SEM_FAST_REG_VFC_DATA_RD, dump_buf + offset, VFC_CAM_RESP_DWORDS);
370711e25f0dSDavid C Somayajulu }
370811e25f0dSDavid C Somayajulu
370911e25f0dSDavid C Somayajulu return offset;
371011e25f0dSDavid C Somayajulu }
371111e25f0dSDavid C Somayajulu
371211e25f0dSDavid C Somayajulu /* Dump VFC RAM. Returns the dumped size in dwords. */
ecore_grc_dump_vfc_ram(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u8 storm_id,struct vfc_ram_defs * ram_defs)371311e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_vfc_ram(struct ecore_hwfn *p_hwfn,
371411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
371511e25f0dSDavid C Somayajulu u32 *dump_buf,
371611e25f0dSDavid C Somayajulu bool dump,
371711e25f0dSDavid C Somayajulu u8 storm_id,
371811e25f0dSDavid C Somayajulu struct vfc_ram_defs *ram_defs)
371911e25f0dSDavid C Somayajulu {
372011e25f0dSDavid C Somayajulu u32 total_size = ram_defs->num_rows * VFC_RAM_RESP_DWORDS;
372111e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
372211e25f0dSDavid C Somayajulu u32 ram_addr[VFC_RAM_ADDR_DWORDS] = { 0 };
372311e25f0dSDavid C Somayajulu u32 ram_cmd[VFC_RAM_CMD_DWORDS] = { 0 };
372411e25f0dSDavid C Somayajulu u32 row, i, offset = 0;
372511e25f0dSDavid C Somayajulu
372611e25f0dSDavid C Somayajulu offset += ecore_grc_dump_mem_hdr(p_hwfn, dump_buf + offset, dump, ram_defs->mem_name, 0, total_size, 256, false, ram_defs->type_name, true, storm->letter);
372711e25f0dSDavid C Somayajulu
372811e25f0dSDavid C Somayajulu /* Prepare RAM address */
372911e25f0dSDavid C Somayajulu SET_VAR_FIELD(ram_addr, VFC_RAM_ADDR, OP, VFC_OPCODE_RAM_RD);
373011e25f0dSDavid C Somayajulu
373111e25f0dSDavid C Somayajulu if (!dump)
373211e25f0dSDavid C Somayajulu return offset + total_size;
373311e25f0dSDavid C Somayajulu
373411e25f0dSDavid C Somayajulu for (row = ram_defs->base_row; row < ram_defs->base_row + ram_defs->num_rows; row++, offset += VFC_RAM_RESP_DWORDS) {
373511e25f0dSDavid C Somayajulu /* Write VFC RAM command */
373611e25f0dSDavid C Somayajulu ARR_REG_WR(p_hwfn, p_ptt, storm->sem_fast_mem_addr + SEM_FAST_REG_VFC_DATA_WR, ram_cmd, VFC_RAM_CMD_DWORDS);
373711e25f0dSDavid C Somayajulu
373811e25f0dSDavid C Somayajulu /* Write VFC RAM address */
373911e25f0dSDavid C Somayajulu SET_VAR_FIELD(ram_addr, VFC_RAM_ADDR, ROW, row);
374011e25f0dSDavid C Somayajulu ARR_REG_WR(p_hwfn, p_ptt, storm->sem_fast_mem_addr + SEM_FAST_REG_VFC_ADDR, ram_addr, VFC_RAM_ADDR_DWORDS);
374111e25f0dSDavid C Somayajulu
374211e25f0dSDavid C Somayajulu /* Read VFC RAM read response */
374311e25f0dSDavid C Somayajulu ARR_REG_RD(p_hwfn, p_ptt, storm->sem_fast_mem_addr + SEM_FAST_REG_VFC_DATA_RD, dump_buf + offset, VFC_RAM_RESP_DWORDS);
374411e25f0dSDavid C Somayajulu }
374511e25f0dSDavid C Somayajulu
374611e25f0dSDavid C Somayajulu return offset;
374711e25f0dSDavid C Somayajulu }
374811e25f0dSDavid C Somayajulu
374911e25f0dSDavid C Somayajulu /* Dumps GRC VFC data. Returns the dumped size in dwords. */
ecore_grc_dump_vfc(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)375011e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_vfc(struct ecore_hwfn *p_hwfn,
375111e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
375211e25f0dSDavid C Somayajulu u32 *dump_buf,
375311e25f0dSDavid C Somayajulu bool dump)
375411e25f0dSDavid C Somayajulu {
375511e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
375611e25f0dSDavid C Somayajulu u8 storm_id, i;
375711e25f0dSDavid C Somayajulu u32 offset = 0;
375811e25f0dSDavid C Somayajulu
375911e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
376011e25f0dSDavid C Somayajulu if (!ecore_grc_is_storm_included(p_hwfn, (enum dbg_storms)storm_id) ||
376111e25f0dSDavid C Somayajulu !s_storm_defs[storm_id].has_vfc ||
376211e25f0dSDavid C Somayajulu (storm_id == DBG_PSTORM_ID && dev_data->platform_id != PLATFORM_ASIC))
376311e25f0dSDavid C Somayajulu continue;
376411e25f0dSDavid C Somayajulu
376511e25f0dSDavid C Somayajulu /* Read CAM */
376611e25f0dSDavid C Somayajulu offset += ecore_grc_dump_vfc_cam(p_hwfn, p_ptt, dump_buf + offset, dump, storm_id);
376711e25f0dSDavid C Somayajulu
376811e25f0dSDavid C Somayajulu /* Read RAM */
376911e25f0dSDavid C Somayajulu for (i = 0; i < NUM_VFC_RAM_TYPES; i++)
377011e25f0dSDavid C Somayajulu offset += ecore_grc_dump_vfc_ram(p_hwfn, p_ptt, dump_buf + offset, dump, storm_id, &s_vfc_ram_defs[i]);
377111e25f0dSDavid C Somayajulu }
377211e25f0dSDavid C Somayajulu
377311e25f0dSDavid C Somayajulu return offset;
377411e25f0dSDavid C Somayajulu }
377511e25f0dSDavid C Somayajulu
377611e25f0dSDavid C Somayajulu /* Dumps GRC RSS data. Returns the dumped size in dwords. */
ecore_grc_dump_rss(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)377711e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_rss(struct ecore_hwfn *p_hwfn,
377811e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
377911e25f0dSDavid C Somayajulu u32 *dump_buf,
378011e25f0dSDavid C Somayajulu bool dump)
378111e25f0dSDavid C Somayajulu {
378211e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
378311e25f0dSDavid C Somayajulu u32 offset = 0;
378411e25f0dSDavid C Somayajulu u8 rss_mem_id;
378511e25f0dSDavid C Somayajulu
378611e25f0dSDavid C Somayajulu for (rss_mem_id = 0; rss_mem_id < NUM_RSS_MEM_TYPES; rss_mem_id++) {
37879efd0ba7SDavid C Somayajulu u32 rss_addr, num_entries, total_dwords;
378811e25f0dSDavid C Somayajulu struct rss_mem_defs *rss_defs;
378911e25f0dSDavid C Somayajulu bool packed;
379011e25f0dSDavid C Somayajulu
379111e25f0dSDavid C Somayajulu rss_defs = &s_rss_mem_defs[rss_mem_id];
379211e25f0dSDavid C Somayajulu rss_addr = rss_defs->addr;
379311e25f0dSDavid C Somayajulu num_entries = rss_defs->num_entries[dev_data->chip_id];
37949efd0ba7SDavid C Somayajulu total_dwords = (num_entries * rss_defs->entry_width) / 32;
37959efd0ba7SDavid C Somayajulu packed = (rss_defs->entry_width == 16);
379611e25f0dSDavid C Somayajulu
379711e25f0dSDavid C Somayajulu offset += ecore_grc_dump_mem_hdr(p_hwfn, dump_buf + offset, dump, rss_defs->mem_name, 0, total_dwords,
37989efd0ba7SDavid C Somayajulu rss_defs->entry_width, packed, rss_defs->type_name, false, 0);
379911e25f0dSDavid C Somayajulu
380011e25f0dSDavid C Somayajulu /* Dump RSS data */
380111e25f0dSDavid C Somayajulu if (!dump) {
380211e25f0dSDavid C Somayajulu offset += total_dwords;
380311e25f0dSDavid C Somayajulu continue;
380411e25f0dSDavid C Somayajulu }
380511e25f0dSDavid C Somayajulu
38069efd0ba7SDavid C Somayajulu while (total_dwords) {
38079efd0ba7SDavid C Somayajulu u32 num_dwords_to_read = OSAL_MIN_T(u32, RSS_REG_RSS_RAM_DATA_SIZE, total_dwords);
380811e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_ADDR, rss_addr);
38099efd0ba7SDavid C Somayajulu offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, dump_buf + offset, dump, BYTES_TO_DWORDS(RSS_REG_RSS_RAM_DATA), num_dwords_to_read, false);
38109efd0ba7SDavid C Somayajulu total_dwords -= num_dwords_to_read;
38119efd0ba7SDavid C Somayajulu rss_addr++;
381211e25f0dSDavid C Somayajulu }
381311e25f0dSDavid C Somayajulu }
381411e25f0dSDavid C Somayajulu
381511e25f0dSDavid C Somayajulu return offset;
381611e25f0dSDavid C Somayajulu }
381711e25f0dSDavid C Somayajulu
381811e25f0dSDavid C Somayajulu /* Dumps GRC Big RAM. Returns the dumped size in dwords. */
ecore_grc_dump_big_ram(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u8 big_ram_id)381911e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_big_ram(struct ecore_hwfn *p_hwfn,
382011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
382111e25f0dSDavid C Somayajulu u32 *dump_buf,
382211e25f0dSDavid C Somayajulu bool dump,
382311e25f0dSDavid C Somayajulu u8 big_ram_id)
382411e25f0dSDavid C Somayajulu {
382511e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
3826217ec208SDavid C Somayajulu u32 block_size, ram_size, offset = 0, reg_val, i;
382711e25f0dSDavid C Somayajulu char mem_name[12] = "???_BIG_RAM";
382811e25f0dSDavid C Somayajulu char type_name[8] = "???_RAM";
382911e25f0dSDavid C Somayajulu struct big_ram_defs *big_ram;
383011e25f0dSDavid C Somayajulu
383111e25f0dSDavid C Somayajulu big_ram = &s_big_ram_defs[big_ram_id];
3832217ec208SDavid C Somayajulu ram_size = big_ram->ram_size[dev_data->chip_id];
3833217ec208SDavid C Somayajulu
3834217ec208SDavid C Somayajulu reg_val = ecore_rd(p_hwfn, p_ptt, big_ram->is_256b_reg_addr);
3835217ec208SDavid C Somayajulu block_size = reg_val & (1 << big_ram->is_256b_bit_offset[dev_data->chip_id]) ? 256 : 128;
383611e25f0dSDavid C Somayajulu
383711e25f0dSDavid C Somayajulu OSAL_STRNCPY(type_name, big_ram->instance_name, OSAL_STRLEN(big_ram->instance_name));
383811e25f0dSDavid C Somayajulu OSAL_STRNCPY(mem_name, big_ram->instance_name, OSAL_STRLEN(big_ram->instance_name));
383911e25f0dSDavid C Somayajulu
384011e25f0dSDavid C Somayajulu /* Dump memory header */
3841217ec208SDavid C Somayajulu offset += ecore_grc_dump_mem_hdr(p_hwfn, dump_buf + offset, dump, mem_name, 0, ram_size, block_size * 8, false, type_name, false, 0);
384211e25f0dSDavid C Somayajulu
384311e25f0dSDavid C Somayajulu /* Read and dump Big RAM data */
384411e25f0dSDavid C Somayajulu if (!dump)
384511e25f0dSDavid C Somayajulu return offset + ram_size;
384611e25f0dSDavid C Somayajulu
384711e25f0dSDavid C Somayajulu /* Dump Big RAM */
3848217ec208SDavid C Somayajulu for (i = 0; i < DIV_ROUND_UP(ram_size, BRB_REG_BIG_RAM_DATA_SIZE); i++) {
384911e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, big_ram->addr_reg_addr, i);
3850217ec208SDavid C Somayajulu offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, dump_buf + offset, dump, BYTES_TO_DWORDS(big_ram->data_reg_addr), BRB_REG_BIG_RAM_DATA_SIZE, false);
385111e25f0dSDavid C Somayajulu }
385211e25f0dSDavid C Somayajulu
385311e25f0dSDavid C Somayajulu return offset;
385411e25f0dSDavid C Somayajulu }
385511e25f0dSDavid C Somayajulu
ecore_grc_dump_mcp(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)385611e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_mcp(struct ecore_hwfn *p_hwfn,
385711e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
385811e25f0dSDavid C Somayajulu u32 *dump_buf,
385911e25f0dSDavid C Somayajulu bool dump)
386011e25f0dSDavid C Somayajulu {
38619efd0ba7SDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
386211e25f0dSDavid C Somayajulu bool block_enable[MAX_BLOCK_ID] = { 0 };
386311e25f0dSDavid C Somayajulu bool halted = false;
386411e25f0dSDavid C Somayajulu u32 offset = 0;
386511e25f0dSDavid C Somayajulu
386611e25f0dSDavid C Somayajulu /* Halt MCP */
38679efd0ba7SDavid C Somayajulu if (dump && dev_data->platform_id == PLATFORM_ASIC && !ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_MCP)) {
386811e25f0dSDavid C Somayajulu halted = !ecore_mcp_halt(p_hwfn, p_ptt);
386911e25f0dSDavid C Somayajulu if (!halted)
387011e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, false, "MCP halt failed!\n");
387111e25f0dSDavid C Somayajulu }
387211e25f0dSDavid C Somayajulu
387311e25f0dSDavid C Somayajulu /* Dump MCP scratchpad */
3874217ec208SDavid C Somayajulu offset += ecore_grc_dump_mem(p_hwfn, p_ptt, dump_buf + offset, dump, OSAL_NULL, BYTES_TO_DWORDS(MCP_REG_SCRATCH),
3875217ec208SDavid C Somayajulu ECORE_IS_E5(p_hwfn->p_dev) ? MCP_REG_SCRATCH_SIZE_E5 : MCP_REG_SCRATCH_SIZE_BB_K2, false, 0, false, "MCP", false, 0);
387611e25f0dSDavid C Somayajulu
387711e25f0dSDavid C Somayajulu /* Dump MCP cpu_reg_file */
3878217ec208SDavid C Somayajulu offset += ecore_grc_dump_mem(p_hwfn, p_ptt, dump_buf + offset, dump, OSAL_NULL, BYTES_TO_DWORDS(MCP_REG_CPU_REG_FILE),
3879217ec208SDavid C Somayajulu MCP_REG_CPU_REG_FILE_SIZE, false, 0, false, "MCP", false, 0);
388011e25f0dSDavid C Somayajulu
388111e25f0dSDavid C Somayajulu /* Dump MCP registers */
388211e25f0dSDavid C Somayajulu block_enable[BLOCK_MCP] = true;
388311e25f0dSDavid C Somayajulu offset += ecore_grc_dump_registers(p_hwfn, p_ptt, dump_buf + offset, dump, block_enable, "block", "MCP");
388411e25f0dSDavid C Somayajulu
388511e25f0dSDavid C Somayajulu /* Dump required non-MCP registers */
388611e25f0dSDavid C Somayajulu offset += ecore_grc_dump_regs_hdr(dump_buf + offset, dump, 1, "eng", -1, "block", "MCP");
388711e25f0dSDavid C Somayajulu offset += ecore_grc_dump_reg_entry(p_hwfn, p_ptt, dump_buf + offset, dump, BYTES_TO_DWORDS(MISC_REG_SHARED_MEM_ADDR), 1, false);
388811e25f0dSDavid C Somayajulu
388911e25f0dSDavid C Somayajulu /* Release MCP */
389011e25f0dSDavid C Somayajulu if (halted && ecore_mcp_resume(p_hwfn, p_ptt))
389111e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, false, "Failed to resume MCP after halt!\n");
389211e25f0dSDavid C Somayajulu
389311e25f0dSDavid C Somayajulu return offset;
389411e25f0dSDavid C Somayajulu }
389511e25f0dSDavid C Somayajulu
389611e25f0dSDavid C Somayajulu /* Dumps the tbus indirect memory for all PHYs. */
ecore_grc_dump_phy(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)389711e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_phy(struct ecore_hwfn *p_hwfn,
389811e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
389911e25f0dSDavid C Somayajulu u32 *dump_buf,
390011e25f0dSDavid C Somayajulu bool dump)
390111e25f0dSDavid C Somayajulu {
390211e25f0dSDavid C Somayajulu u32 offset = 0, tbus_lo_offset, tbus_hi_offset;
390311e25f0dSDavid C Somayajulu char mem_name[32];
390411e25f0dSDavid C Somayajulu u8 phy_id;
390511e25f0dSDavid C Somayajulu
390611e25f0dSDavid C Somayajulu for (phy_id = 0; phy_id < OSAL_ARRAY_SIZE(s_phy_defs); phy_id++) {
390711e25f0dSDavid C Somayajulu u32 addr_lo_addr, addr_hi_addr, data_lo_addr, data_hi_addr;
390811e25f0dSDavid C Somayajulu struct phy_defs *phy_defs;
390911e25f0dSDavid C Somayajulu u8 *bytes_buf;
391011e25f0dSDavid C Somayajulu
391111e25f0dSDavid C Somayajulu phy_defs = &s_phy_defs[phy_id];
391211e25f0dSDavid C Somayajulu addr_lo_addr = phy_defs->base_addr + phy_defs->tbus_addr_lo_addr;
391311e25f0dSDavid C Somayajulu addr_hi_addr = phy_defs->base_addr + phy_defs->tbus_addr_hi_addr;
391411e25f0dSDavid C Somayajulu data_lo_addr = phy_defs->base_addr + phy_defs->tbus_data_lo_addr;
391511e25f0dSDavid C Somayajulu data_hi_addr = phy_defs->base_addr + phy_defs->tbus_data_hi_addr;
391611e25f0dSDavid C Somayajulu
391711e25f0dSDavid C Somayajulu if (OSAL_SNPRINTF(mem_name, sizeof(mem_name), "tbus_%s", phy_defs->phy_name) < 0)
391811e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "Unexpected debug error: invalid PHY memory name\n");
391911e25f0dSDavid C Somayajulu
392011e25f0dSDavid C Somayajulu offset += ecore_grc_dump_mem_hdr(p_hwfn, dump_buf + offset, dump, mem_name, 0, PHY_DUMP_SIZE_DWORDS, 16, true, mem_name, false, 0);
392111e25f0dSDavid C Somayajulu
392211e25f0dSDavid C Somayajulu if (!dump) {
392311e25f0dSDavid C Somayajulu offset += PHY_DUMP_SIZE_DWORDS;
392411e25f0dSDavid C Somayajulu continue;
392511e25f0dSDavid C Somayajulu }
392611e25f0dSDavid C Somayajulu
3927217ec208SDavid C Somayajulu bytes_buf = (u8 *)(dump_buf + offset);
392811e25f0dSDavid C Somayajulu for (tbus_hi_offset = 0; tbus_hi_offset < (NUM_PHY_TBUS_ADDRESSES >> 8); tbus_hi_offset++) {
392911e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, addr_hi_addr, tbus_hi_offset);
393011e25f0dSDavid C Somayajulu for (tbus_lo_offset = 0; tbus_lo_offset < 256; tbus_lo_offset++) {
393111e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, addr_lo_addr, tbus_lo_offset);
393211e25f0dSDavid C Somayajulu *(bytes_buf++) = (u8)ecore_rd(p_hwfn, p_ptt, data_lo_addr);
393311e25f0dSDavid C Somayajulu *(bytes_buf++) = (u8)ecore_rd(p_hwfn, p_ptt, data_hi_addr);
393411e25f0dSDavid C Somayajulu }
393511e25f0dSDavid C Somayajulu }
393611e25f0dSDavid C Somayajulu
393711e25f0dSDavid C Somayajulu offset += PHY_DUMP_SIZE_DWORDS;
393811e25f0dSDavid C Somayajulu }
393911e25f0dSDavid C Somayajulu
394011e25f0dSDavid C Somayajulu return offset;
394111e25f0dSDavid C Somayajulu }
394211e25f0dSDavid C Somayajulu
ecore_config_dbg_line(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum block_id block_id,u8 line_id,u8 enable_mask,u8 right_shift,u8 force_valid_mask,u8 force_frame_mask)394311e25f0dSDavid C Somayajulu static void ecore_config_dbg_line(struct ecore_hwfn *p_hwfn,
394411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
394511e25f0dSDavid C Somayajulu enum block_id block_id,
394611e25f0dSDavid C Somayajulu u8 line_id,
394711e25f0dSDavid C Somayajulu u8 enable_mask,
394811e25f0dSDavid C Somayajulu u8 right_shift,
394911e25f0dSDavid C Somayajulu u8 force_valid_mask,
395011e25f0dSDavid C Somayajulu u8 force_frame_mask)
395111e25f0dSDavid C Somayajulu {
395211e25f0dSDavid C Somayajulu struct block_defs *block = s_block_defs[block_id];
395311e25f0dSDavid C Somayajulu
395411e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, block->dbg_select_addr, line_id);
395511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, block->dbg_enable_addr, enable_mask);
395611e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, block->dbg_shift_addr, right_shift);
395711e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, block->dbg_force_valid_addr, force_valid_mask);
395811e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, block->dbg_force_frame_addr, force_frame_mask);
395911e25f0dSDavid C Somayajulu }
396011e25f0dSDavid C Somayajulu
396111e25f0dSDavid C Somayajulu /* Dumps Static Debug data. Returns the dumped size in dwords. */
ecore_grc_dump_static_debug(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)396211e25f0dSDavid C Somayajulu static u32 ecore_grc_dump_static_debug(struct ecore_hwfn *p_hwfn,
396311e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
396411e25f0dSDavid C Somayajulu u32 *dump_buf,
396511e25f0dSDavid C Somayajulu bool dump)
396611e25f0dSDavid C Somayajulu {
396711e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
396811e25f0dSDavid C Somayajulu u32 block_id, line_id, offset = 0;
396911e25f0dSDavid C Somayajulu
3970217ec208SDavid C Somayajulu /* don't dump static debug if a debug bus recording is in progress */
3971217ec208SDavid C Somayajulu if (dump && ecore_rd(p_hwfn, p_ptt, DBG_REG_DBG_BLOCK_ON))
397211e25f0dSDavid C Somayajulu return 0;
397311e25f0dSDavid C Somayajulu
397411e25f0dSDavid C Somayajulu if (dump) {
397511e25f0dSDavid C Somayajulu /* Disable all blocks debug output */
397611e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) {
397711e25f0dSDavid C Somayajulu struct block_defs *block = s_block_defs[block_id];
397811e25f0dSDavid C Somayajulu
39799efd0ba7SDavid C Somayajulu if (block->dbg_client_id[dev_data->chip_id] != MAX_DBG_BUS_CLIENTS)
398011e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, block->dbg_enable_addr, 0);
398111e25f0dSDavid C Somayajulu }
398211e25f0dSDavid C Somayajulu
398311e25f0dSDavid C Somayajulu ecore_bus_reset_dbg_block(p_hwfn, p_ptt);
398411e25f0dSDavid C Somayajulu ecore_bus_set_framing_mode(p_hwfn, p_ptt, DBG_BUS_FRAME_MODE_8HW_0ST);
398511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_DEBUG_TARGET, DBG_BUS_TARGET_ID_INT_BUF);
398611e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_FULL_MODE, 1);
398711e25f0dSDavid C Somayajulu ecore_bus_enable_dbg_block(p_hwfn, p_ptt, true);
398811e25f0dSDavid C Somayajulu }
398911e25f0dSDavid C Somayajulu
399011e25f0dSDavid C Somayajulu /* Dump all static debug lines for each relevant block */
399111e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) {
399211e25f0dSDavid C Somayajulu struct block_defs *block = s_block_defs[block_id];
3993134b0936SMark O'Donovan const struct dbg_bus_block *block_desc;
399411e25f0dSDavid C Somayajulu u32 block_dwords;
399511e25f0dSDavid C Somayajulu
39969efd0ba7SDavid C Somayajulu if (block->dbg_client_id[dev_data->chip_id] == MAX_DBG_BUS_CLIENTS)
399711e25f0dSDavid C Somayajulu continue;
399811e25f0dSDavid C Somayajulu
399911e25f0dSDavid C Somayajulu block_desc = get_dbg_bus_block_desc(p_hwfn, (enum block_id)block_id);
400011e25f0dSDavid C Somayajulu block_dwords = NUM_DBG_LINES(block_desc) * STATIC_DEBUG_LINE_DWORDS;
400111e25f0dSDavid C Somayajulu
400211e25f0dSDavid C Somayajulu /* Dump static section params */
400311e25f0dSDavid C Somayajulu offset += ecore_grc_dump_mem_hdr(p_hwfn, dump_buf + offset, dump, block->name, 0, block_dwords, 32, false, "STATIC", false, 0);
400411e25f0dSDavid C Somayajulu
400511e25f0dSDavid C Somayajulu if (!dump) {
400611e25f0dSDavid C Somayajulu offset += block_dwords;
400711e25f0dSDavid C Somayajulu continue;
400811e25f0dSDavid C Somayajulu }
400911e25f0dSDavid C Somayajulu
401011e25f0dSDavid C Somayajulu /* If all lines are invalid - dump zeros */
401111e25f0dSDavid C Somayajulu if (dev_data->block_in_reset[block_id]) {
401211e25f0dSDavid C Somayajulu OSAL_MEMSET(dump_buf + offset, 0, DWORDS_TO_BYTES(block_dwords));
401311e25f0dSDavid C Somayajulu offset += block_dwords;
401411e25f0dSDavid C Somayajulu continue;
401511e25f0dSDavid C Somayajulu }
401611e25f0dSDavid C Somayajulu
401711e25f0dSDavid C Somayajulu /* Enable block's client */
401811e25f0dSDavid C Somayajulu ecore_bus_enable_clients(p_hwfn, p_ptt, 1 << block->dbg_client_id[dev_data->chip_id]);
401911e25f0dSDavid C Somayajulu for (line_id = 0; line_id < (u32)NUM_DBG_LINES(block_desc); line_id++) {
402011e25f0dSDavid C Somayajulu /* Configure debug line ID */
402111e25f0dSDavid C Somayajulu ecore_config_dbg_line(p_hwfn, p_ptt, (enum block_id)block_id, (u8)line_id, 0xf, 0, 0, 0);
402211e25f0dSDavid C Somayajulu
402311e25f0dSDavid C Somayajulu /* Read debug line info */
402411e25f0dSDavid C Somayajulu offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, dump_buf + offset, dump, BYTES_TO_DWORDS(DBG_REG_CALENDAR_OUT_DATA), STATIC_DEBUG_LINE_DWORDS, true);
402511e25f0dSDavid C Somayajulu }
402611e25f0dSDavid C Somayajulu
402711e25f0dSDavid C Somayajulu /* Disable block's client and debug output */
402811e25f0dSDavid C Somayajulu ecore_bus_enable_clients(p_hwfn, p_ptt, 0);
402911e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, block->dbg_enable_addr, 0);
403011e25f0dSDavid C Somayajulu }
403111e25f0dSDavid C Somayajulu
403211e25f0dSDavid C Somayajulu if (dump) {
403311e25f0dSDavid C Somayajulu ecore_bus_enable_dbg_block(p_hwfn, p_ptt, false);
403411e25f0dSDavid C Somayajulu ecore_bus_enable_clients(p_hwfn, p_ptt, 0);
403511e25f0dSDavid C Somayajulu }
403611e25f0dSDavid C Somayajulu
403711e25f0dSDavid C Somayajulu return offset;
403811e25f0dSDavid C Somayajulu }
403911e25f0dSDavid C Somayajulu
404011e25f0dSDavid C Somayajulu /* Performs GRC Dump to the specified buffer.
404111e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
404211e25f0dSDavid C Somayajulu */
ecore_grc_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u32 * num_dumped_dwords)404311e25f0dSDavid C Somayajulu static enum dbg_status ecore_grc_dump(struct ecore_hwfn *p_hwfn,
404411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
404511e25f0dSDavid C Somayajulu u32 *dump_buf,
404611e25f0dSDavid C Somayajulu bool dump,
404711e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
404811e25f0dSDavid C Somayajulu {
404911e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
40509efd0ba7SDavid C Somayajulu bool is_asic, parities_masked = false;
405111e25f0dSDavid C Somayajulu u8 i, port_mode = 0;
405211e25f0dSDavid C Somayajulu u32 offset = 0;
405311e25f0dSDavid C Somayajulu
40549efd0ba7SDavid C Somayajulu is_asic = dev_data->platform_id == PLATFORM_ASIC;
405511e25f0dSDavid C Somayajulu
405611e25f0dSDavid C Somayajulu *num_dumped_dwords = 0;
405711e25f0dSDavid C Somayajulu
405811e25f0dSDavid C Somayajulu if (dump) {
405911e25f0dSDavid C Somayajulu /* Find port mode */
406011e25f0dSDavid C Somayajulu switch (ecore_rd(p_hwfn, p_ptt, MISC_REG_PORT_MODE)) {
406111e25f0dSDavid C Somayajulu case 0: port_mode = 1; break;
406211e25f0dSDavid C Somayajulu case 1: port_mode = 2; break;
406311e25f0dSDavid C Somayajulu case 2: port_mode = 4; break;
406411e25f0dSDavid C Somayajulu }
406511e25f0dSDavid C Somayajulu
406611e25f0dSDavid C Somayajulu /* Update reset state */
406711e25f0dSDavid C Somayajulu ecore_update_blocks_reset_state(p_hwfn, p_ptt);
406811e25f0dSDavid C Somayajulu }
406911e25f0dSDavid C Somayajulu
407011e25f0dSDavid C Somayajulu /* Dump global params */
407111e25f0dSDavid C Somayajulu offset += ecore_dump_common_global_params(p_hwfn, p_ptt, dump_buf + offset, dump, 4);
407211e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "dump-type", "grc-dump");
407311e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "num-lcids", ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NUM_LCIDS));
407411e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "num-ltids", ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NUM_LTIDS));
407511e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "num-ports", port_mode);
407611e25f0dSDavid C Somayajulu
407711e25f0dSDavid C Somayajulu /* Dump reset registers (dumped before taking blocks out of reset ) */
407811e25f0dSDavid C Somayajulu if (ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_REGS))
407911e25f0dSDavid C Somayajulu offset += ecore_grc_dump_reset_regs(p_hwfn, p_ptt, dump_buf + offset, dump);
408011e25f0dSDavid C Somayajulu
408111e25f0dSDavid C Somayajulu /* Take all blocks out of reset (using reset registers) */
408211e25f0dSDavid C Somayajulu if (dump) {
408311e25f0dSDavid C Somayajulu ecore_grc_unreset_blocks(p_hwfn, p_ptt);
408411e25f0dSDavid C Somayajulu ecore_update_blocks_reset_state(p_hwfn, p_ptt);
408511e25f0dSDavid C Somayajulu }
408611e25f0dSDavid C Somayajulu
408711e25f0dSDavid C Somayajulu /* Disable all parities using MFW command */
40889efd0ba7SDavid C Somayajulu if (dump && is_asic && !ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_MCP)) {
408911e25f0dSDavid C Somayajulu parities_masked = !ecore_mcp_mask_parities(p_hwfn, p_ptt, 1);
409011e25f0dSDavid C Somayajulu if (!parities_masked) {
409111e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, false, "Failed to mask parities using MFW\n");
409211e25f0dSDavid C Somayajulu if (ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_PARITY_SAFE))
409311e25f0dSDavid C Somayajulu return DBG_STATUS_MCP_COULD_NOT_MASK_PRTY;
409411e25f0dSDavid C Somayajulu }
409511e25f0dSDavid C Somayajulu }
409611e25f0dSDavid C Somayajulu
409711e25f0dSDavid C Somayajulu /* Dump modified registers (dumped before modifying them) */
409811e25f0dSDavid C Somayajulu if (ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_REGS))
409911e25f0dSDavid C Somayajulu offset += ecore_grc_dump_modified_regs(p_hwfn, p_ptt, dump_buf + offset, dump);
410011e25f0dSDavid C Somayajulu
410111e25f0dSDavid C Somayajulu /* Stall storms */
410211e25f0dSDavid C Somayajulu if (dump && (ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_IOR) || ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_VFC)))
410311e25f0dSDavid C Somayajulu ecore_grc_stall_storms(p_hwfn, p_ptt, true);
410411e25f0dSDavid C Somayajulu
410511e25f0dSDavid C Somayajulu /* Dump all regs */
410611e25f0dSDavid C Somayajulu if (ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_REGS)) {
410711e25f0dSDavid C Somayajulu bool block_enable[MAX_BLOCK_ID];
410811e25f0dSDavid C Somayajulu
410911e25f0dSDavid C Somayajulu /* Dump all blocks except MCP */
411011e25f0dSDavid C Somayajulu for (i = 0; i < MAX_BLOCK_ID; i++)
411111e25f0dSDavid C Somayajulu block_enable[i] = true;
411211e25f0dSDavid C Somayajulu block_enable[BLOCK_MCP] = false;
411311e25f0dSDavid C Somayajulu offset += ecore_grc_dump_registers(p_hwfn, p_ptt, dump_buf + offset, dump, block_enable, OSAL_NULL, OSAL_NULL);
411411e25f0dSDavid C Somayajulu
411511e25f0dSDavid C Somayajulu /* Dump special registers */
411611e25f0dSDavid C Somayajulu offset += ecore_grc_dump_special_regs(p_hwfn, p_ptt, dump_buf + offset, dump);
411711e25f0dSDavid C Somayajulu }
411811e25f0dSDavid C Somayajulu
411911e25f0dSDavid C Somayajulu /* Dump memories */
412011e25f0dSDavid C Somayajulu offset += ecore_grc_dump_memories(p_hwfn, p_ptt, dump_buf + offset, dump);
412111e25f0dSDavid C Somayajulu
412211e25f0dSDavid C Somayajulu /* Dump MCP */
412311e25f0dSDavid C Somayajulu if (ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_MCP))
412411e25f0dSDavid C Somayajulu offset += ecore_grc_dump_mcp(p_hwfn, p_ptt, dump_buf + offset, dump);
412511e25f0dSDavid C Somayajulu
412611e25f0dSDavid C Somayajulu /* Dump context */
412711e25f0dSDavid C Somayajulu if (ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CM_CTX))
412811e25f0dSDavid C Somayajulu offset += ecore_grc_dump_ctx(p_hwfn, p_ptt, dump_buf + offset, dump);
412911e25f0dSDavid C Somayajulu
413011e25f0dSDavid C Somayajulu /* Dump RSS memories */
413111e25f0dSDavid C Somayajulu if (ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_RSS))
413211e25f0dSDavid C Somayajulu offset += ecore_grc_dump_rss(p_hwfn, p_ptt, dump_buf + offset, dump);
413311e25f0dSDavid C Somayajulu
413411e25f0dSDavid C Somayajulu /* Dump Big RAM */
413511e25f0dSDavid C Somayajulu for (i = 0; i < NUM_BIG_RAM_TYPES; i++)
413611e25f0dSDavid C Somayajulu if (ecore_grc_is_included(p_hwfn, s_big_ram_defs[i].grc_param))
413711e25f0dSDavid C Somayajulu offset += ecore_grc_dump_big_ram(p_hwfn, p_ptt, dump_buf + offset, dump, i);
413811e25f0dSDavid C Somayajulu
413911e25f0dSDavid C Somayajulu /* Dump IORs */
414011e25f0dSDavid C Somayajulu if (ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_IOR))
414111e25f0dSDavid C Somayajulu offset += ecore_grc_dump_iors(p_hwfn, p_ptt, dump_buf + offset, dump);
414211e25f0dSDavid C Somayajulu
414311e25f0dSDavid C Somayajulu /* Dump VFC */
414411e25f0dSDavid C Somayajulu if (ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_VFC))
414511e25f0dSDavid C Somayajulu offset += ecore_grc_dump_vfc(p_hwfn, p_ptt, dump_buf + offset, dump);
414611e25f0dSDavid C Somayajulu
414711e25f0dSDavid C Somayajulu /* Dump PHY tbus */
414811e25f0dSDavid C Somayajulu if (ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_PHY) && dev_data->chip_id == CHIP_K2 && dev_data->platform_id == PLATFORM_ASIC)
414911e25f0dSDavid C Somayajulu offset += ecore_grc_dump_phy(p_hwfn, p_ptt, dump_buf + offset, dump);
415011e25f0dSDavid C Somayajulu
415111e25f0dSDavid C Somayajulu /* Dump static debug data */
415211e25f0dSDavid C Somayajulu if (ecore_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_STATIC) && dev_data->bus.state == DBG_BUS_STATE_IDLE)
415311e25f0dSDavid C Somayajulu offset += ecore_grc_dump_static_debug(p_hwfn, p_ptt, dump_buf + offset, dump);
415411e25f0dSDavid C Somayajulu
415511e25f0dSDavid C Somayajulu /* Dump last section */
41569efd0ba7SDavid C Somayajulu offset += ecore_dump_last_section(dump_buf, offset, dump);
415711e25f0dSDavid C Somayajulu
415811e25f0dSDavid C Somayajulu if (dump) {
415911e25f0dSDavid C Somayajulu /* Unstall storms */
416011e25f0dSDavid C Somayajulu if (ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_UNSTALL))
416111e25f0dSDavid C Somayajulu ecore_grc_stall_storms(p_hwfn, p_ptt, false);
416211e25f0dSDavid C Somayajulu
416311e25f0dSDavid C Somayajulu /* Clear parity status */
41649efd0ba7SDavid C Somayajulu if (is_asic)
416511e25f0dSDavid C Somayajulu ecore_grc_clear_all_prty(p_hwfn, p_ptt);
416611e25f0dSDavid C Somayajulu
416711e25f0dSDavid C Somayajulu /* Enable all parities using MFW command */
416811e25f0dSDavid C Somayajulu if (parities_masked)
416911e25f0dSDavid C Somayajulu ecore_mcp_mask_parities(p_hwfn, p_ptt, 0);
417011e25f0dSDavid C Somayajulu }
417111e25f0dSDavid C Somayajulu
417211e25f0dSDavid C Somayajulu *num_dumped_dwords = offset;
417311e25f0dSDavid C Somayajulu
417411e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
417511e25f0dSDavid C Somayajulu }
417611e25f0dSDavid C Somayajulu
417711e25f0dSDavid C Somayajulu /* Writes the specified failing Idle Check rule to the specified buffer.
417811e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
417911e25f0dSDavid C Somayajulu */
ecore_idle_chk_dump_failure(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u16 rule_id,const struct dbg_idle_chk_rule * rule,u16 fail_entry_id,u32 * cond_reg_values)418011e25f0dSDavid C Somayajulu static u32 ecore_idle_chk_dump_failure(struct ecore_hwfn *p_hwfn,
418111e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
418211e25f0dSDavid C Somayajulu u32 *dump_buf,
418311e25f0dSDavid C Somayajulu bool dump,
418411e25f0dSDavid C Somayajulu u16 rule_id,
418511e25f0dSDavid C Somayajulu const struct dbg_idle_chk_rule *rule,
418611e25f0dSDavid C Somayajulu u16 fail_entry_id,
418711e25f0dSDavid C Somayajulu u32 *cond_reg_values)
418811e25f0dSDavid C Somayajulu {
418911e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
419011e25f0dSDavid C Somayajulu const struct dbg_idle_chk_cond_reg *cond_regs;
419111e25f0dSDavid C Somayajulu const struct dbg_idle_chk_info_reg *info_regs;
419211e25f0dSDavid C Somayajulu u32 i, next_reg_offset = 0, offset = 0;
419311e25f0dSDavid C Somayajulu struct dbg_idle_chk_result_hdr *hdr;
419411e25f0dSDavid C Somayajulu const union dbg_idle_chk_reg *regs;
419511e25f0dSDavid C Somayajulu u8 reg_id;
419611e25f0dSDavid C Somayajulu
419711e25f0dSDavid C Somayajulu hdr = (struct dbg_idle_chk_result_hdr *)dump_buf;
419811e25f0dSDavid C Somayajulu regs = &((const union dbg_idle_chk_reg *)s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_REGS].ptr)[rule->reg_offset];
419911e25f0dSDavid C Somayajulu cond_regs = ®s[0].cond_reg;
420011e25f0dSDavid C Somayajulu info_regs = ®s[rule->num_cond_regs].info_reg;
420111e25f0dSDavid C Somayajulu
420211e25f0dSDavid C Somayajulu /* Dump rule data */
420311e25f0dSDavid C Somayajulu if (dump) {
420411e25f0dSDavid C Somayajulu OSAL_MEMSET(hdr, 0, sizeof(*hdr));
420511e25f0dSDavid C Somayajulu hdr->rule_id = rule_id;
420611e25f0dSDavid C Somayajulu hdr->mem_entry_id = fail_entry_id;
420711e25f0dSDavid C Somayajulu hdr->severity = rule->severity;
420811e25f0dSDavid C Somayajulu hdr->num_dumped_cond_regs = rule->num_cond_regs;
420911e25f0dSDavid C Somayajulu }
421011e25f0dSDavid C Somayajulu
421111e25f0dSDavid C Somayajulu offset += IDLE_CHK_RESULT_HDR_DWORDS;
421211e25f0dSDavid C Somayajulu
421311e25f0dSDavid C Somayajulu /* Dump condition register values */
421411e25f0dSDavid C Somayajulu for (reg_id = 0; reg_id < rule->num_cond_regs; reg_id++) {
421511e25f0dSDavid C Somayajulu const struct dbg_idle_chk_cond_reg *reg = &cond_regs[reg_id];
421611e25f0dSDavid C Somayajulu struct dbg_idle_chk_result_reg_hdr *reg_hdr;
421711e25f0dSDavid C Somayajulu
421811e25f0dSDavid C Somayajulu reg_hdr = (struct dbg_idle_chk_result_reg_hdr *)(dump_buf + offset);
421911e25f0dSDavid C Somayajulu
422011e25f0dSDavid C Somayajulu /* Write register header */
422111e25f0dSDavid C Somayajulu if (!dump) {
422211e25f0dSDavid C Somayajulu offset += IDLE_CHK_RESULT_REG_HDR_DWORDS + reg->entry_size;
422311e25f0dSDavid C Somayajulu continue;
422411e25f0dSDavid C Somayajulu }
422511e25f0dSDavid C Somayajulu
422611e25f0dSDavid C Somayajulu offset += IDLE_CHK_RESULT_REG_HDR_DWORDS;
422711e25f0dSDavid C Somayajulu OSAL_MEMSET(reg_hdr, 0, sizeof(*reg_hdr));
422811e25f0dSDavid C Somayajulu reg_hdr->start_entry = reg->start_entry;
422911e25f0dSDavid C Somayajulu reg_hdr->size = reg->entry_size;
423011e25f0dSDavid C Somayajulu SET_FIELD(reg_hdr->data, DBG_IDLE_CHK_RESULT_REG_HDR_IS_MEM, reg->num_entries > 1 || reg->start_entry > 0 ? 1 : 0);
423111e25f0dSDavid C Somayajulu SET_FIELD(reg_hdr->data, DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID, reg_id);
423211e25f0dSDavid C Somayajulu
423311e25f0dSDavid C Somayajulu /* Write register values */
423411e25f0dSDavid C Somayajulu for (i = 0; i < reg_hdr->size; i++, next_reg_offset++, offset++)
423511e25f0dSDavid C Somayajulu dump_buf[offset] = cond_reg_values[next_reg_offset];
423611e25f0dSDavid C Somayajulu }
423711e25f0dSDavid C Somayajulu
423811e25f0dSDavid C Somayajulu /* Dump info register values */
423911e25f0dSDavid C Somayajulu for (reg_id = 0; reg_id < rule->num_info_regs; reg_id++) {
424011e25f0dSDavid C Somayajulu const struct dbg_idle_chk_info_reg *reg = &info_regs[reg_id];
424111e25f0dSDavid C Somayajulu u32 block_id;
424211e25f0dSDavid C Somayajulu
424311e25f0dSDavid C Somayajulu /* Check if register's block is in reset */
424411e25f0dSDavid C Somayajulu if (!dump) {
424511e25f0dSDavid C Somayajulu offset += IDLE_CHK_RESULT_REG_HDR_DWORDS + reg->size;
424611e25f0dSDavid C Somayajulu continue;
424711e25f0dSDavid C Somayajulu }
424811e25f0dSDavid C Somayajulu
424911e25f0dSDavid C Somayajulu block_id = GET_FIELD(reg->data, DBG_IDLE_CHK_INFO_REG_BLOCK_ID);
425011e25f0dSDavid C Somayajulu if (block_id >= MAX_BLOCK_ID) {
425111e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "Invalid block_id\n");
425211e25f0dSDavid C Somayajulu return 0;
425311e25f0dSDavid C Somayajulu }
425411e25f0dSDavid C Somayajulu
425511e25f0dSDavid C Somayajulu if (!dev_data->block_in_reset[block_id]) {
425611e25f0dSDavid C Somayajulu struct dbg_idle_chk_result_reg_hdr *reg_hdr;
425711e25f0dSDavid C Somayajulu bool wide_bus, eval_mode, mode_match = true;
425811e25f0dSDavid C Somayajulu u16 modes_buf_offset;
425911e25f0dSDavid C Somayajulu u32 addr;
426011e25f0dSDavid C Somayajulu
426111e25f0dSDavid C Somayajulu reg_hdr = (struct dbg_idle_chk_result_reg_hdr *)(dump_buf + offset);
426211e25f0dSDavid C Somayajulu
426311e25f0dSDavid C Somayajulu /* Check mode */
426411e25f0dSDavid C Somayajulu eval_mode = GET_FIELD(reg->mode.data, DBG_MODE_HDR_EVAL_MODE) > 0;
426511e25f0dSDavid C Somayajulu if (eval_mode) {
426611e25f0dSDavid C Somayajulu modes_buf_offset = GET_FIELD(reg->mode.data, DBG_MODE_HDR_MODES_BUF_OFFSET);
426711e25f0dSDavid C Somayajulu mode_match = ecore_is_mode_match(p_hwfn, &modes_buf_offset);
426811e25f0dSDavid C Somayajulu }
426911e25f0dSDavid C Somayajulu
427011e25f0dSDavid C Somayajulu if (!mode_match)
427111e25f0dSDavid C Somayajulu continue;
427211e25f0dSDavid C Somayajulu
427311e25f0dSDavid C Somayajulu addr = GET_FIELD(reg->data, DBG_IDLE_CHK_INFO_REG_ADDRESS);
427411e25f0dSDavid C Somayajulu wide_bus = GET_FIELD(reg->data, DBG_IDLE_CHK_INFO_REG_WIDE_BUS);
427511e25f0dSDavid C Somayajulu
427611e25f0dSDavid C Somayajulu /* Write register header */
427711e25f0dSDavid C Somayajulu offset += IDLE_CHK_RESULT_REG_HDR_DWORDS;
427811e25f0dSDavid C Somayajulu hdr->num_dumped_info_regs++;
427911e25f0dSDavid C Somayajulu OSAL_MEMSET(reg_hdr, 0, sizeof(*reg_hdr));
428011e25f0dSDavid C Somayajulu reg_hdr->size = reg->size;
428111e25f0dSDavid C Somayajulu SET_FIELD(reg_hdr->data, DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID, rule->num_cond_regs + reg_id);
428211e25f0dSDavid C Somayajulu
428311e25f0dSDavid C Somayajulu /* Write register values */
428411e25f0dSDavid C Somayajulu offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, dump_buf + offset, dump, addr, reg->size, wide_bus);
428511e25f0dSDavid C Somayajulu }
428611e25f0dSDavid C Somayajulu }
428711e25f0dSDavid C Somayajulu
428811e25f0dSDavid C Somayajulu return offset;
428911e25f0dSDavid C Somayajulu }
429011e25f0dSDavid C Somayajulu
429111e25f0dSDavid C Somayajulu /* Dumps idle check rule entries. Returns the dumped size in dwords. */
ecore_idle_chk_dump_rule_entries(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,const struct dbg_idle_chk_rule * input_rules,u32 num_input_rules,u32 * num_failing_rules)429211e25f0dSDavid C Somayajulu static u32 ecore_idle_chk_dump_rule_entries(struct ecore_hwfn *p_hwfn,
429311e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
429411e25f0dSDavid C Somayajulu u32 *dump_buf,
429511e25f0dSDavid C Somayajulu bool dump,
429611e25f0dSDavid C Somayajulu const struct dbg_idle_chk_rule *input_rules,
429711e25f0dSDavid C Somayajulu u32 num_input_rules,
429811e25f0dSDavid C Somayajulu u32 *num_failing_rules)
429911e25f0dSDavid C Somayajulu {
430011e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
430111e25f0dSDavid C Somayajulu u32 cond_reg_values[IDLE_CHK_MAX_ENTRIES_SIZE];
430211e25f0dSDavid C Somayajulu u32 i, offset = 0;
430311e25f0dSDavid C Somayajulu u16 entry_id;
430411e25f0dSDavid C Somayajulu u8 reg_id;
430511e25f0dSDavid C Somayajulu
430611e25f0dSDavid C Somayajulu *num_failing_rules = 0;
430711e25f0dSDavid C Somayajulu
430811e25f0dSDavid C Somayajulu for (i = 0; i < num_input_rules; i++) {
430911e25f0dSDavid C Somayajulu const struct dbg_idle_chk_cond_reg *cond_regs;
431011e25f0dSDavid C Somayajulu const struct dbg_idle_chk_rule *rule;
431111e25f0dSDavid C Somayajulu const union dbg_idle_chk_reg *regs;
431211e25f0dSDavid C Somayajulu u16 num_reg_entries = 1;
431311e25f0dSDavid C Somayajulu bool check_rule = true;
431411e25f0dSDavid C Somayajulu const u32 *imm_values;
431511e25f0dSDavid C Somayajulu
431611e25f0dSDavid C Somayajulu rule = &input_rules[i];
431711e25f0dSDavid C Somayajulu regs = &((const union dbg_idle_chk_reg *)s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_REGS].ptr)[rule->reg_offset];
431811e25f0dSDavid C Somayajulu cond_regs = ®s[0].cond_reg;
431911e25f0dSDavid C Somayajulu imm_values = &s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_IMMS].ptr[rule->imm_offset];
432011e25f0dSDavid C Somayajulu
432111e25f0dSDavid C Somayajulu /* Check if all condition register blocks are out of reset, and
432211e25f0dSDavid C Somayajulu * find maximal number of entries (all condition registers that
432311e25f0dSDavid C Somayajulu * are memories must have the same size, which is > 1).
432411e25f0dSDavid C Somayajulu */
432511e25f0dSDavid C Somayajulu for (reg_id = 0; reg_id < rule->num_cond_regs && check_rule; reg_id++) {
432611e25f0dSDavid C Somayajulu u32 block_id = GET_FIELD(cond_regs[reg_id].data, DBG_IDLE_CHK_COND_REG_BLOCK_ID);
432711e25f0dSDavid C Somayajulu
432811e25f0dSDavid C Somayajulu if (block_id >= MAX_BLOCK_ID) {
432911e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "Invalid block_id\n");
433011e25f0dSDavid C Somayajulu return 0;
433111e25f0dSDavid C Somayajulu }
433211e25f0dSDavid C Somayajulu
433311e25f0dSDavid C Somayajulu check_rule = !dev_data->block_in_reset[block_id];
433411e25f0dSDavid C Somayajulu if (cond_regs[reg_id].num_entries > num_reg_entries)
433511e25f0dSDavid C Somayajulu num_reg_entries = cond_regs[reg_id].num_entries;
433611e25f0dSDavid C Somayajulu }
433711e25f0dSDavid C Somayajulu
433811e25f0dSDavid C Somayajulu if (!check_rule && dump)
433911e25f0dSDavid C Somayajulu continue;
434011e25f0dSDavid C Somayajulu
43419efd0ba7SDavid C Somayajulu if (!dump) {
43429efd0ba7SDavid C Somayajulu u32 entry_dump_size = ecore_idle_chk_dump_failure(p_hwfn, p_ptt, dump_buf + offset, false, rule->rule_id, rule, 0, OSAL_NULL);
43439efd0ba7SDavid C Somayajulu
43449efd0ba7SDavid C Somayajulu offset += num_reg_entries * entry_dump_size;
43459efd0ba7SDavid C Somayajulu (*num_failing_rules) += num_reg_entries;
43469efd0ba7SDavid C Somayajulu continue;
43479efd0ba7SDavid C Somayajulu }
43489efd0ba7SDavid C Somayajulu
434911e25f0dSDavid C Somayajulu /* Go over all register entries (number of entries is the same for all
435011e25f0dSDavid C Somayajulu * condition registers).
435111e25f0dSDavid C Somayajulu */
435211e25f0dSDavid C Somayajulu for (entry_id = 0; entry_id < num_reg_entries; entry_id++) {
435311e25f0dSDavid C Somayajulu u32 next_reg_offset = 0;
435411e25f0dSDavid C Somayajulu
435511e25f0dSDavid C Somayajulu /* Read current entry of all condition registers */
435611e25f0dSDavid C Somayajulu for (reg_id = 0; reg_id < rule->num_cond_regs; reg_id++) {
435711e25f0dSDavid C Somayajulu const struct dbg_idle_chk_cond_reg *reg = &cond_regs[reg_id];
435811e25f0dSDavid C Somayajulu u32 padded_entry_size, addr;
435911e25f0dSDavid C Somayajulu bool wide_bus;
436011e25f0dSDavid C Somayajulu
436111e25f0dSDavid C Somayajulu /* Find GRC address (if it's a memory, the address of the
436211e25f0dSDavid C Somayajulu * specific entry is calculated).
436311e25f0dSDavid C Somayajulu */
436411e25f0dSDavid C Somayajulu addr = GET_FIELD(reg->data, DBG_IDLE_CHK_COND_REG_ADDRESS);
436511e25f0dSDavid C Somayajulu wide_bus = GET_FIELD(reg->data, DBG_IDLE_CHK_COND_REG_WIDE_BUS);
436611e25f0dSDavid C Somayajulu if (reg->num_entries > 1 || reg->start_entry > 0) {
436711e25f0dSDavid C Somayajulu padded_entry_size = reg->entry_size > 1 ? OSAL_ROUNDUP_POW_OF_TWO(reg->entry_size) : 1;
436811e25f0dSDavid C Somayajulu addr += (reg->start_entry + entry_id) * padded_entry_size;
436911e25f0dSDavid C Somayajulu }
437011e25f0dSDavid C Somayajulu
437111e25f0dSDavid C Somayajulu /* Read registers */
437211e25f0dSDavid C Somayajulu if (next_reg_offset + reg->entry_size >= IDLE_CHK_MAX_ENTRIES_SIZE) {
437311e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, true, "idle check registers entry is too large\n");
437411e25f0dSDavid C Somayajulu return 0;
437511e25f0dSDavid C Somayajulu }
437611e25f0dSDavid C Somayajulu
437711e25f0dSDavid C Somayajulu next_reg_offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, cond_reg_values + next_reg_offset, dump, addr, reg->entry_size, wide_bus);
437811e25f0dSDavid C Somayajulu }
437911e25f0dSDavid C Somayajulu
438011e25f0dSDavid C Somayajulu /* Call rule condition function. if returns true, it's a failure.*/
438111e25f0dSDavid C Somayajulu if ((*cond_arr[rule->cond_id])(cond_reg_values, imm_values)) {
438211e25f0dSDavid C Somayajulu offset += ecore_idle_chk_dump_failure(p_hwfn, p_ptt, dump_buf + offset, dump, rule->rule_id, rule, entry_id, cond_reg_values);
438311e25f0dSDavid C Somayajulu (*num_failing_rules)++;
438411e25f0dSDavid C Somayajulu }
438511e25f0dSDavid C Somayajulu }
438611e25f0dSDavid C Somayajulu }
438711e25f0dSDavid C Somayajulu
438811e25f0dSDavid C Somayajulu return offset;
438911e25f0dSDavid C Somayajulu }
439011e25f0dSDavid C Somayajulu
439111e25f0dSDavid C Somayajulu /* Performs Idle Check Dump to the specified buffer.
439211e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
439311e25f0dSDavid C Somayajulu */
ecore_idle_chk_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)439411e25f0dSDavid C Somayajulu static u32 ecore_idle_chk_dump(struct ecore_hwfn *p_hwfn,
439511e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
439611e25f0dSDavid C Somayajulu u32 *dump_buf,
439711e25f0dSDavid C Somayajulu bool dump)
439811e25f0dSDavid C Somayajulu {
439911e25f0dSDavid C Somayajulu u32 num_failing_rules_offset, offset = 0, input_offset = 0, num_failing_rules = 0;
440011e25f0dSDavid C Somayajulu
440111e25f0dSDavid C Somayajulu /* Dump global params */
440211e25f0dSDavid C Somayajulu offset += ecore_dump_common_global_params(p_hwfn, p_ptt, dump_buf + offset, dump, 1);
440311e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "dump-type", "idle-chk");
440411e25f0dSDavid C Somayajulu
440511e25f0dSDavid C Somayajulu /* Dump idle check section header with a single parameter */
440611e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "idle_chk", 1);
440711e25f0dSDavid C Somayajulu num_failing_rules_offset = offset;
440811e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "num_rules", 0);
440911e25f0dSDavid C Somayajulu
441011e25f0dSDavid C Somayajulu while (input_offset < s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_RULES].size_in_dwords) {
441111e25f0dSDavid C Somayajulu const struct dbg_idle_chk_cond_hdr *cond_hdr = (const struct dbg_idle_chk_cond_hdr *)&s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_RULES].ptr[input_offset++];
441211e25f0dSDavid C Somayajulu bool eval_mode, mode_match = true;
441311e25f0dSDavid C Somayajulu u32 curr_failing_rules;
441411e25f0dSDavid C Somayajulu u16 modes_buf_offset;
441511e25f0dSDavid C Somayajulu
441611e25f0dSDavid C Somayajulu /* Check mode */
441711e25f0dSDavid C Somayajulu eval_mode = GET_FIELD(cond_hdr->mode.data, DBG_MODE_HDR_EVAL_MODE) > 0;
441811e25f0dSDavid C Somayajulu if (eval_mode) {
441911e25f0dSDavid C Somayajulu modes_buf_offset = GET_FIELD(cond_hdr->mode.data, DBG_MODE_HDR_MODES_BUF_OFFSET);
442011e25f0dSDavid C Somayajulu mode_match = ecore_is_mode_match(p_hwfn, &modes_buf_offset);
442111e25f0dSDavid C Somayajulu }
442211e25f0dSDavid C Somayajulu
442311e25f0dSDavid C Somayajulu if (mode_match) {
442411e25f0dSDavid C Somayajulu offset += ecore_idle_chk_dump_rule_entries(p_hwfn, p_ptt, dump_buf + offset, dump, (const struct dbg_idle_chk_rule *)&s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_RULES].ptr[input_offset], cond_hdr->data_size / IDLE_CHK_RULE_SIZE_DWORDS, &curr_failing_rules);
442511e25f0dSDavid C Somayajulu num_failing_rules += curr_failing_rules;
442611e25f0dSDavid C Somayajulu }
442711e25f0dSDavid C Somayajulu
442811e25f0dSDavid C Somayajulu input_offset += cond_hdr->data_size;
442911e25f0dSDavid C Somayajulu }
443011e25f0dSDavid C Somayajulu
443111e25f0dSDavid C Somayajulu /* Overwrite num_rules parameter */
443211e25f0dSDavid C Somayajulu if (dump)
443311e25f0dSDavid C Somayajulu ecore_dump_num_param(dump_buf + num_failing_rules_offset, dump, "num_rules", num_failing_rules);
443411e25f0dSDavid C Somayajulu
443511e25f0dSDavid C Somayajulu /* Dump last section */
44369efd0ba7SDavid C Somayajulu offset += ecore_dump_last_section(dump_buf, offset, dump);
443711e25f0dSDavid C Somayajulu
443811e25f0dSDavid C Somayajulu return offset;
443911e25f0dSDavid C Somayajulu }
444011e25f0dSDavid C Somayajulu
444111e25f0dSDavid C Somayajulu /* Finds the meta data image in NVRAM */
ecore_find_nvram_image(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 image_type,u32 * nvram_offset_bytes,u32 * nvram_size_bytes)444211e25f0dSDavid C Somayajulu static enum dbg_status ecore_find_nvram_image(struct ecore_hwfn *p_hwfn,
444311e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
444411e25f0dSDavid C Somayajulu u32 image_type,
444511e25f0dSDavid C Somayajulu u32 *nvram_offset_bytes,
444611e25f0dSDavid C Somayajulu u32 *nvram_size_bytes)
444711e25f0dSDavid C Somayajulu {
444811e25f0dSDavid C Somayajulu u32 ret_mcp_resp, ret_mcp_param, ret_txn_size;
444911e25f0dSDavid C Somayajulu struct mcp_file_att file_att;
445011e25f0dSDavid C Somayajulu int nvm_result;
445111e25f0dSDavid C Somayajulu
445211e25f0dSDavid C Somayajulu /* Call NVRAM get file command */
445311e25f0dSDavid C Somayajulu nvm_result = ecore_mcp_nvm_rd_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_NVM_GET_FILE_ATT, image_type, &ret_mcp_resp, &ret_mcp_param, &ret_txn_size, (u32 *)&file_att);
445411e25f0dSDavid C Somayajulu
445511e25f0dSDavid C Somayajulu /* Check response */
445611e25f0dSDavid C Somayajulu if (nvm_result || (ret_mcp_resp & FW_MSG_CODE_MASK) != FW_MSG_CODE_NVM_OK)
445711e25f0dSDavid C Somayajulu return DBG_STATUS_NVRAM_GET_IMAGE_FAILED;
445811e25f0dSDavid C Somayajulu
445911e25f0dSDavid C Somayajulu /* Update return values */
446011e25f0dSDavid C Somayajulu *nvram_offset_bytes = file_att.nvm_start_addr;
446111e25f0dSDavid C Somayajulu *nvram_size_bytes = file_att.len;
446211e25f0dSDavid C Somayajulu
446311e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "find_nvram_image: found NVRAM image of type %d in NVRAM offset %d bytes with size %d bytes\n", image_type, *nvram_offset_bytes, *nvram_size_bytes);
446411e25f0dSDavid C Somayajulu
446511e25f0dSDavid C Somayajulu /* Check alignment */
446611e25f0dSDavid C Somayajulu if (*nvram_size_bytes & 0x3)
446711e25f0dSDavid C Somayajulu return DBG_STATUS_NON_ALIGNED_NVRAM_IMAGE;
446811e25f0dSDavid C Somayajulu
446911e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
447011e25f0dSDavid C Somayajulu }
447111e25f0dSDavid C Somayajulu
447211e25f0dSDavid C Somayajulu /* Reads data from NVRAM */
ecore_nvram_read(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 nvram_offset_bytes,u32 nvram_size_bytes,u32 * ret_buf)447311e25f0dSDavid C Somayajulu static enum dbg_status ecore_nvram_read(struct ecore_hwfn *p_hwfn,
447411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
447511e25f0dSDavid C Somayajulu u32 nvram_offset_bytes,
447611e25f0dSDavid C Somayajulu u32 nvram_size_bytes,
447711e25f0dSDavid C Somayajulu u32 *ret_buf)
447811e25f0dSDavid C Somayajulu {
447911e25f0dSDavid C Somayajulu u32 ret_mcp_resp, ret_mcp_param, ret_read_size, bytes_to_copy;
448011e25f0dSDavid C Somayajulu s32 bytes_left = nvram_size_bytes;
448111e25f0dSDavid C Somayajulu u32 read_offset = 0;
448211e25f0dSDavid C Somayajulu
448311e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "nvram_read: reading image of size %d bytes from NVRAM\n", nvram_size_bytes);
448411e25f0dSDavid C Somayajulu
448511e25f0dSDavid C Somayajulu do {
448611e25f0dSDavid C Somayajulu bytes_to_copy = (bytes_left > MCP_DRV_NVM_BUF_LEN) ? MCP_DRV_NVM_BUF_LEN : bytes_left;
448711e25f0dSDavid C Somayajulu
448811e25f0dSDavid C Somayajulu /* Call NVRAM read command */
44899efd0ba7SDavid C Somayajulu if (ecore_mcp_nvm_rd_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_NVM_READ_NVRAM, (nvram_offset_bytes + read_offset) | (bytes_to_copy << DRV_MB_PARAM_NVM_LEN_OFFSET), &ret_mcp_resp, &ret_mcp_param, &ret_read_size, (u32 *)((u8 *)ret_buf + read_offset)))
449011e25f0dSDavid C Somayajulu return DBG_STATUS_NVRAM_READ_FAILED;
449111e25f0dSDavid C Somayajulu
449211e25f0dSDavid C Somayajulu /* Check response */
449311e25f0dSDavid C Somayajulu if ((ret_mcp_resp & FW_MSG_CODE_MASK) != FW_MSG_CODE_NVM_OK)
449411e25f0dSDavid C Somayajulu return DBG_STATUS_NVRAM_READ_FAILED;
449511e25f0dSDavid C Somayajulu
449611e25f0dSDavid C Somayajulu /* Update read offset */
449711e25f0dSDavid C Somayajulu read_offset += ret_read_size;
449811e25f0dSDavid C Somayajulu bytes_left -= ret_read_size;
449911e25f0dSDavid C Somayajulu } while (bytes_left > 0);
450011e25f0dSDavid C Somayajulu
450111e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
450211e25f0dSDavid C Somayajulu }
450311e25f0dSDavid C Somayajulu
450411e25f0dSDavid C Somayajulu /* Get info on the MCP Trace data in the scratchpad:
450511e25f0dSDavid C Somayajulu * - trace_data_grc_addr (OUT): trace data GRC address in bytes
450611e25f0dSDavid C Somayajulu * - trace_data_size (OUT): trace data size in bytes (without the header)
450711e25f0dSDavid C Somayajulu */
ecore_mcp_trace_get_data_info(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * trace_data_grc_addr,u32 * trace_data_size)450811e25f0dSDavid C Somayajulu static enum dbg_status ecore_mcp_trace_get_data_info(struct ecore_hwfn *p_hwfn,
450911e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
451011e25f0dSDavid C Somayajulu u32 *trace_data_grc_addr,
451111e25f0dSDavid C Somayajulu u32 *trace_data_size)
451211e25f0dSDavid C Somayajulu {
451311e25f0dSDavid C Somayajulu u32 spad_trace_offsize, signature;
451411e25f0dSDavid C Somayajulu
451511e25f0dSDavid C Somayajulu /* Read trace section offsize structure from MCP scratchpad */
451611e25f0dSDavid C Somayajulu spad_trace_offsize = ecore_rd(p_hwfn, p_ptt, MCP_SPAD_TRACE_OFFSIZE_ADDR);
451711e25f0dSDavid C Somayajulu
451811e25f0dSDavid C Somayajulu /* Extract trace section address from offsize (in scratchpad) */
451911e25f0dSDavid C Somayajulu *trace_data_grc_addr = MCP_REG_SCRATCH + SECTION_OFFSET(spad_trace_offsize);
452011e25f0dSDavid C Somayajulu
452111e25f0dSDavid C Somayajulu /* Read signature from MCP trace section */
452211e25f0dSDavid C Somayajulu signature = ecore_rd(p_hwfn, p_ptt, *trace_data_grc_addr + OFFSETOF(struct mcp_trace, signature));
452311e25f0dSDavid C Somayajulu
452411e25f0dSDavid C Somayajulu if (signature != MFW_TRACE_SIGNATURE)
452511e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_TRACE_SIGNATURE;
452611e25f0dSDavid C Somayajulu
452711e25f0dSDavid C Somayajulu /* Read trace size from MCP trace section */
452811e25f0dSDavid C Somayajulu *trace_data_size = ecore_rd(p_hwfn, p_ptt, *trace_data_grc_addr + OFFSETOF(struct mcp_trace, size));
452911e25f0dSDavid C Somayajulu
453011e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
453111e25f0dSDavid C Somayajulu }
453211e25f0dSDavid C Somayajulu
453311e25f0dSDavid C Somayajulu /* Reads MCP trace meta data image from NVRAM
453411e25f0dSDavid C Somayajulu * - running_bundle_id (OUT): running bundle ID (invalid when loaded from file)
453511e25f0dSDavid C Somayajulu * - trace_meta_offset (OUT): trace meta offset in NVRAM in bytes (invalid when
453611e25f0dSDavid C Somayajulu * loaded from file).
453711e25f0dSDavid C Somayajulu * - trace_meta_size (OUT): size in bytes of the trace meta data.
453811e25f0dSDavid C Somayajulu */
ecore_mcp_trace_get_meta_info(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 trace_data_size_bytes,u32 * running_bundle_id,u32 * trace_meta_offset,u32 * trace_meta_size)453911e25f0dSDavid C Somayajulu static enum dbg_status ecore_mcp_trace_get_meta_info(struct ecore_hwfn *p_hwfn,
454011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
454111e25f0dSDavid C Somayajulu u32 trace_data_size_bytes,
454211e25f0dSDavid C Somayajulu u32 *running_bundle_id,
454311e25f0dSDavid C Somayajulu u32 *trace_meta_offset,
454411e25f0dSDavid C Somayajulu u32 *trace_meta_size)
454511e25f0dSDavid C Somayajulu {
454611e25f0dSDavid C Somayajulu u32 spad_trace_offsize, nvram_image_type, running_mfw_addr;
454711e25f0dSDavid C Somayajulu
454811e25f0dSDavid C Somayajulu /* Read MCP trace section offsize structure from MCP scratchpad */
454911e25f0dSDavid C Somayajulu spad_trace_offsize = ecore_rd(p_hwfn, p_ptt, MCP_SPAD_TRACE_OFFSIZE_ADDR);
455011e25f0dSDavid C Somayajulu
455111e25f0dSDavid C Somayajulu /* Find running bundle ID */
455211e25f0dSDavid C Somayajulu running_mfw_addr = MCP_REG_SCRATCH + SECTION_OFFSET(spad_trace_offsize) + SECTION_SIZE(spad_trace_offsize) + trace_data_size_bytes;
455311e25f0dSDavid C Somayajulu *running_bundle_id = ecore_rd(p_hwfn, p_ptt, running_mfw_addr);
455411e25f0dSDavid C Somayajulu if (*running_bundle_id > 1)
455511e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_NVRAM_BUNDLE;
455611e25f0dSDavid C Somayajulu
455711e25f0dSDavid C Somayajulu /* Find image in NVRAM */
455811e25f0dSDavid C Somayajulu nvram_image_type = (*running_bundle_id == DIR_ID_1) ? NVM_TYPE_MFW_TRACE1 : NVM_TYPE_MFW_TRACE2;
455911e25f0dSDavid C Somayajulu return ecore_find_nvram_image(p_hwfn, p_ptt, nvram_image_type, trace_meta_offset, trace_meta_size);
456011e25f0dSDavid C Somayajulu }
456111e25f0dSDavid C Somayajulu
456211e25f0dSDavid C Somayajulu /* Reads the MCP Trace meta data from NVRAM into the specified buffer */
ecore_mcp_trace_read_meta(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 nvram_offset_in_bytes,u32 size_in_bytes,u32 * buf)456311e25f0dSDavid C Somayajulu static enum dbg_status ecore_mcp_trace_read_meta(struct ecore_hwfn *p_hwfn,
456411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
456511e25f0dSDavid C Somayajulu u32 nvram_offset_in_bytes,
456611e25f0dSDavid C Somayajulu u32 size_in_bytes,
456711e25f0dSDavid C Somayajulu u32 *buf)
456811e25f0dSDavid C Somayajulu {
456911e25f0dSDavid C Somayajulu u8 modules_num, module_len, i, *byte_buf = (u8 *)buf;
457011e25f0dSDavid C Somayajulu enum dbg_status status;
457111e25f0dSDavid C Somayajulu u32 signature;
457211e25f0dSDavid C Somayajulu
457311e25f0dSDavid C Somayajulu /* Read meta data from NVRAM */
457411e25f0dSDavid C Somayajulu status = ecore_nvram_read(p_hwfn, p_ptt, nvram_offset_in_bytes, size_in_bytes, buf);
457511e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
457611e25f0dSDavid C Somayajulu return status;
457711e25f0dSDavid C Somayajulu
457811e25f0dSDavid C Somayajulu /* Extract and check first signature */
457911e25f0dSDavid C Somayajulu signature = ecore_read_unaligned_dword(byte_buf);
458011e25f0dSDavid C Somayajulu byte_buf += sizeof(signature);
458111e25f0dSDavid C Somayajulu if (signature != NVM_MAGIC_VALUE)
458211e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_TRACE_SIGNATURE;
458311e25f0dSDavid C Somayajulu
458411e25f0dSDavid C Somayajulu /* Extract number of modules */
458511e25f0dSDavid C Somayajulu modules_num = *(byte_buf++);
458611e25f0dSDavid C Somayajulu
458711e25f0dSDavid C Somayajulu /* Skip all modules */
458811e25f0dSDavid C Somayajulu for (i = 0; i < modules_num; i++) {
458911e25f0dSDavid C Somayajulu module_len = *(byte_buf++);
459011e25f0dSDavid C Somayajulu byte_buf += module_len;
459111e25f0dSDavid C Somayajulu }
459211e25f0dSDavid C Somayajulu
459311e25f0dSDavid C Somayajulu /* Extract and check second signature */
459411e25f0dSDavid C Somayajulu signature = ecore_read_unaligned_dword(byte_buf);
459511e25f0dSDavid C Somayajulu byte_buf += sizeof(signature);
459611e25f0dSDavid C Somayajulu if (signature != NVM_MAGIC_VALUE)
459711e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_TRACE_SIGNATURE;
459811e25f0dSDavid C Somayajulu
459911e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
460011e25f0dSDavid C Somayajulu }
460111e25f0dSDavid C Somayajulu
460211e25f0dSDavid C Somayajulu /* Dump MCP Trace */
ecore_mcp_trace_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u32 * num_dumped_dwords)460311e25f0dSDavid C Somayajulu static enum dbg_status ecore_mcp_trace_dump(struct ecore_hwfn *p_hwfn,
460411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
460511e25f0dSDavid C Somayajulu u32 *dump_buf,
460611e25f0dSDavid C Somayajulu bool dump,
460711e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
460811e25f0dSDavid C Somayajulu {
460911e25f0dSDavid C Somayajulu u32 trace_meta_offset_bytes = 0, trace_meta_size_bytes = 0, trace_meta_size_dwords = 0;
461011e25f0dSDavid C Somayajulu u32 trace_data_grc_addr, trace_data_size_bytes, trace_data_size_dwords;
46119efd0ba7SDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
461211e25f0dSDavid C Somayajulu u32 running_bundle_id, offset = 0;
461311e25f0dSDavid C Somayajulu enum dbg_status status;
461411e25f0dSDavid C Somayajulu bool mcp_access;
461511e25f0dSDavid C Somayajulu int halted = 0;
461611e25f0dSDavid C Somayajulu
461711e25f0dSDavid C Somayajulu *num_dumped_dwords = 0;
461811e25f0dSDavid C Somayajulu
46199efd0ba7SDavid C Somayajulu mcp_access = dev_data->platform_id == PLATFORM_ASIC && !ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_MCP);
462011e25f0dSDavid C Somayajulu
462111e25f0dSDavid C Somayajulu /* Get trace data info */
462211e25f0dSDavid C Somayajulu status = ecore_mcp_trace_get_data_info(p_hwfn, p_ptt, &trace_data_grc_addr, &trace_data_size_bytes);
462311e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
462411e25f0dSDavid C Somayajulu return status;
462511e25f0dSDavid C Somayajulu
462611e25f0dSDavid C Somayajulu /* Dump global params */
462711e25f0dSDavid C Somayajulu offset += ecore_dump_common_global_params(p_hwfn, p_ptt, dump_buf + offset, dump, 1);
462811e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "dump-type", "mcp-trace");
462911e25f0dSDavid C Somayajulu
463011e25f0dSDavid C Somayajulu /* Halt MCP while reading from scratchpad so the read data will be
463111e25f0dSDavid C Somayajulu * consistent. if halt fails, MCP trace is taken anyway, with a small
463211e25f0dSDavid C Somayajulu * risk that it may be corrupt.
463311e25f0dSDavid C Somayajulu */
463411e25f0dSDavid C Somayajulu if (dump && mcp_access) {
463511e25f0dSDavid C Somayajulu halted = !ecore_mcp_halt(p_hwfn, p_ptt);
463611e25f0dSDavid C Somayajulu if (!halted)
463711e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, false, "MCP halt failed!\n");
463811e25f0dSDavid C Somayajulu }
463911e25f0dSDavid C Somayajulu
464011e25f0dSDavid C Somayajulu /* Find trace data size */
464111e25f0dSDavid C Somayajulu trace_data_size_dwords = DIV_ROUND_UP(trace_data_size_bytes + sizeof(struct mcp_trace), BYTES_IN_DWORD);
464211e25f0dSDavid C Somayajulu
464311e25f0dSDavid C Somayajulu /* Dump trace data section header and param */
464411e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "mcp_trace_data", 1);
464511e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "size", trace_data_size_dwords);
464611e25f0dSDavid C Somayajulu
464711e25f0dSDavid C Somayajulu /* Read trace data from scratchpad into dump buffer */
464811e25f0dSDavid C Somayajulu offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, dump_buf + offset, dump, BYTES_TO_DWORDS(trace_data_grc_addr), trace_data_size_dwords, false);
464911e25f0dSDavid C Somayajulu
465011e25f0dSDavid C Somayajulu /* Resume MCP (only if halt succeeded) */
465111e25f0dSDavid C Somayajulu if (halted && ecore_mcp_resume(p_hwfn, p_ptt))
465211e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, false, "Failed to resume MCP after halt!\n");
465311e25f0dSDavid C Somayajulu
465411e25f0dSDavid C Somayajulu /* Dump trace meta section header */
465511e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "mcp_trace_meta", 1);
465611e25f0dSDavid C Somayajulu
465711e25f0dSDavid C Somayajulu /* Read trace meta only if NVRAM access is enabled
465811e25f0dSDavid C Somayajulu * (trace_meta_size_bytes is dword-aligned).
465911e25f0dSDavid C Somayajulu */
466011e25f0dSDavid C Somayajulu if (OSAL_NVM_IS_ACCESS_ENABLED(p_hwfn) && mcp_access) {
466111e25f0dSDavid C Somayajulu status = ecore_mcp_trace_get_meta_info(p_hwfn, p_ptt, trace_data_size_bytes, &running_bundle_id, &trace_meta_offset_bytes, &trace_meta_size_bytes);
466211e25f0dSDavid C Somayajulu if (status == DBG_STATUS_OK)
466311e25f0dSDavid C Somayajulu trace_meta_size_dwords = BYTES_TO_DWORDS(trace_meta_size_bytes);
466411e25f0dSDavid C Somayajulu }
466511e25f0dSDavid C Somayajulu
466611e25f0dSDavid C Somayajulu /* Dump trace meta size param */
466711e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "size", trace_meta_size_dwords);
466811e25f0dSDavid C Somayajulu
466911e25f0dSDavid C Somayajulu /* Read trace meta image into dump buffer */
467011e25f0dSDavid C Somayajulu if (dump && trace_meta_size_dwords)
467111e25f0dSDavid C Somayajulu status = ecore_mcp_trace_read_meta(p_hwfn, p_ptt, trace_meta_offset_bytes, trace_meta_size_bytes, dump_buf + offset);
467211e25f0dSDavid C Somayajulu if (status == DBG_STATUS_OK)
467311e25f0dSDavid C Somayajulu offset += trace_meta_size_dwords;
467411e25f0dSDavid C Somayajulu
467511e25f0dSDavid C Somayajulu /* Dump last section */
46769efd0ba7SDavid C Somayajulu offset += ecore_dump_last_section(dump_buf, offset, dump);
467711e25f0dSDavid C Somayajulu
467811e25f0dSDavid C Somayajulu *num_dumped_dwords = offset;
467911e25f0dSDavid C Somayajulu
468011e25f0dSDavid C Somayajulu /* If no mcp access, indicate that the dump doesn't contain the meta
468111e25f0dSDavid C Somayajulu * data from NVRAM.
468211e25f0dSDavid C Somayajulu */
468311e25f0dSDavid C Somayajulu return mcp_access ? status : DBG_STATUS_NVRAM_GET_IMAGE_FAILED;
468411e25f0dSDavid C Somayajulu }
468511e25f0dSDavid C Somayajulu
468611e25f0dSDavid C Somayajulu /* Dump GRC FIFO */
ecore_reg_fifo_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u32 * num_dumped_dwords)468711e25f0dSDavid C Somayajulu static enum dbg_status ecore_reg_fifo_dump(struct ecore_hwfn *p_hwfn,
468811e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
468911e25f0dSDavid C Somayajulu u32 *dump_buf,
469011e25f0dSDavid C Somayajulu bool dump,
469111e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
469211e25f0dSDavid C Somayajulu {
469311e25f0dSDavid C Somayajulu u32 dwords_read, size_param_offset, offset = 0;
469411e25f0dSDavid C Somayajulu bool fifo_has_data;
469511e25f0dSDavid C Somayajulu
469611e25f0dSDavid C Somayajulu *num_dumped_dwords = 0;
469711e25f0dSDavid C Somayajulu
469811e25f0dSDavid C Somayajulu /* Dump global params */
469911e25f0dSDavid C Somayajulu offset += ecore_dump_common_global_params(p_hwfn, p_ptt, dump_buf + offset, dump, 1);
470011e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "dump-type", "reg-fifo");
470111e25f0dSDavid C Somayajulu
470211e25f0dSDavid C Somayajulu /* Dump fifo data section header and param. The size param is 0 for
470311e25f0dSDavid C Somayajulu * now, and is overwritten after reading the FIFO.
470411e25f0dSDavid C Somayajulu */
470511e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "reg_fifo_data", 1);
470611e25f0dSDavid C Somayajulu size_param_offset = offset;
470711e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "size", 0);
470811e25f0dSDavid C Somayajulu
470911e25f0dSDavid C Somayajulu if (dump) {
471011e25f0dSDavid C Somayajulu fifo_has_data = ecore_rd(p_hwfn, p_ptt, GRC_REG_TRACE_FIFO_VALID_DATA) > 0;
471111e25f0dSDavid C Somayajulu
471211e25f0dSDavid C Somayajulu /* Pull available data from fifo. Use DMAE since this is
471311e25f0dSDavid C Somayajulu * widebus memory and must be accessed atomically. Test for
471411e25f0dSDavid C Somayajulu * dwords_read not passing buffer size since more entries could
471511e25f0dSDavid C Somayajulu * be added to the buffer as we
471611e25f0dSDavid C Somayajulu * are emptying it.
471711e25f0dSDavid C Somayajulu */
4718217ec208SDavid C Somayajulu for (dwords_read = 0; fifo_has_data && dwords_read < REG_FIFO_DEPTH_DWORDS; dwords_read += REG_FIFO_ELEMENT_DWORDS) {
4719217ec208SDavid C Somayajulu offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, dump_buf + offset, true, BYTES_TO_DWORDS(GRC_REG_TRACE_FIFO), REG_FIFO_ELEMENT_DWORDS, true);
472011e25f0dSDavid C Somayajulu fifo_has_data = ecore_rd(p_hwfn, p_ptt, GRC_REG_TRACE_FIFO_VALID_DATA) > 0;
472111e25f0dSDavid C Somayajulu }
472211e25f0dSDavid C Somayajulu
472311e25f0dSDavid C Somayajulu ecore_dump_num_param(dump_buf + size_param_offset, dump, "size", dwords_read);
472411e25f0dSDavid C Somayajulu }
472511e25f0dSDavid C Somayajulu else {
472611e25f0dSDavid C Somayajulu /* FIFO max size is REG_FIFO_DEPTH_DWORDS. There is no way to
472711e25f0dSDavid C Somayajulu * test how much data is available, except for reading it.
472811e25f0dSDavid C Somayajulu */
472911e25f0dSDavid C Somayajulu offset += REG_FIFO_DEPTH_DWORDS;
473011e25f0dSDavid C Somayajulu }
473111e25f0dSDavid C Somayajulu
473211e25f0dSDavid C Somayajulu /* Dump last section */
47339efd0ba7SDavid C Somayajulu offset += ecore_dump_last_section(dump_buf, offset, dump);
473411e25f0dSDavid C Somayajulu
473511e25f0dSDavid C Somayajulu *num_dumped_dwords = offset;
473611e25f0dSDavid C Somayajulu
473711e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
473811e25f0dSDavid C Somayajulu }
473911e25f0dSDavid C Somayajulu
474011e25f0dSDavid C Somayajulu /* Dump IGU FIFO */
ecore_igu_fifo_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u32 * num_dumped_dwords)474111e25f0dSDavid C Somayajulu static enum dbg_status ecore_igu_fifo_dump(struct ecore_hwfn *p_hwfn,
474211e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
474311e25f0dSDavid C Somayajulu u32 *dump_buf,
474411e25f0dSDavid C Somayajulu bool dump,
474511e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
474611e25f0dSDavid C Somayajulu {
474711e25f0dSDavid C Somayajulu u32 dwords_read, size_param_offset, offset = 0;
474811e25f0dSDavid C Somayajulu bool fifo_has_data;
474911e25f0dSDavid C Somayajulu
475011e25f0dSDavid C Somayajulu *num_dumped_dwords = 0;
475111e25f0dSDavid C Somayajulu
475211e25f0dSDavid C Somayajulu /* Dump global params */
475311e25f0dSDavid C Somayajulu offset += ecore_dump_common_global_params(p_hwfn, p_ptt, dump_buf + offset, dump, 1);
475411e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "dump-type", "igu-fifo");
475511e25f0dSDavid C Somayajulu
475611e25f0dSDavid C Somayajulu /* Dump fifo data section header and param. The size param is 0 for
475711e25f0dSDavid C Somayajulu * now, and is overwritten after reading the FIFO.
475811e25f0dSDavid C Somayajulu */
475911e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "igu_fifo_data", 1);
476011e25f0dSDavid C Somayajulu size_param_offset = offset;
476111e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "size", 0);
476211e25f0dSDavid C Somayajulu
476311e25f0dSDavid C Somayajulu if (dump) {
476411e25f0dSDavid C Somayajulu fifo_has_data = ecore_rd(p_hwfn, p_ptt, IGU_REG_ERROR_HANDLING_DATA_VALID) > 0;
476511e25f0dSDavid C Somayajulu
476611e25f0dSDavid C Somayajulu /* Pull available data from fifo. Use DMAE since this is
476711e25f0dSDavid C Somayajulu * widebus memory and must be accessed atomically. Test for
476811e25f0dSDavid C Somayajulu * dwords_read not passing buffer size since more entries could
476911e25f0dSDavid C Somayajulu * be added to the buffer as we are emptying it.
477011e25f0dSDavid C Somayajulu */
4771217ec208SDavid C Somayajulu for (dwords_read = 0; fifo_has_data && dwords_read < IGU_FIFO_DEPTH_DWORDS; dwords_read += IGU_FIFO_ELEMENT_DWORDS) {
4772217ec208SDavid C Somayajulu offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, dump_buf + offset, true, BYTES_TO_DWORDS(IGU_REG_ERROR_HANDLING_MEMORY), IGU_FIFO_ELEMENT_DWORDS, true);
477311e25f0dSDavid C Somayajulu fifo_has_data = ecore_rd(p_hwfn, p_ptt, IGU_REG_ERROR_HANDLING_DATA_VALID) > 0;
477411e25f0dSDavid C Somayajulu }
477511e25f0dSDavid C Somayajulu
477611e25f0dSDavid C Somayajulu ecore_dump_num_param(dump_buf + size_param_offset, dump, "size", dwords_read);
477711e25f0dSDavid C Somayajulu }
477811e25f0dSDavid C Somayajulu else {
477911e25f0dSDavid C Somayajulu /* FIFO max size is IGU_FIFO_DEPTH_DWORDS. There is no way to
478011e25f0dSDavid C Somayajulu * test how much data is available, except for reading it.
478111e25f0dSDavid C Somayajulu */
478211e25f0dSDavid C Somayajulu offset += IGU_FIFO_DEPTH_DWORDS;
478311e25f0dSDavid C Somayajulu }
478411e25f0dSDavid C Somayajulu
478511e25f0dSDavid C Somayajulu /* Dump last section */
47869efd0ba7SDavid C Somayajulu offset += ecore_dump_last_section(dump_buf, offset, dump);
478711e25f0dSDavid C Somayajulu
478811e25f0dSDavid C Somayajulu *num_dumped_dwords = offset;
478911e25f0dSDavid C Somayajulu
479011e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
479111e25f0dSDavid C Somayajulu }
479211e25f0dSDavid C Somayajulu
479311e25f0dSDavid C Somayajulu /* Protection Override dump */
ecore_protection_override_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump,u32 * num_dumped_dwords)479411e25f0dSDavid C Somayajulu static enum dbg_status ecore_protection_override_dump(struct ecore_hwfn *p_hwfn,
479511e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
479611e25f0dSDavid C Somayajulu u32 *dump_buf,
479711e25f0dSDavid C Somayajulu bool dump,
479811e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
479911e25f0dSDavid C Somayajulu {
480011e25f0dSDavid C Somayajulu u32 size_param_offset, override_window_dwords, offset = 0;
480111e25f0dSDavid C Somayajulu
480211e25f0dSDavid C Somayajulu *num_dumped_dwords = 0;
480311e25f0dSDavid C Somayajulu
480411e25f0dSDavid C Somayajulu /* Dump global params */
480511e25f0dSDavid C Somayajulu offset += ecore_dump_common_global_params(p_hwfn, p_ptt, dump_buf + offset, dump, 1);
480611e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "dump-type", "protection-override");
480711e25f0dSDavid C Somayajulu
480811e25f0dSDavid C Somayajulu /* Dump data section header and param. The size param is 0 for now,
480911e25f0dSDavid C Somayajulu * and is overwritten after reading the data.
481011e25f0dSDavid C Somayajulu */
481111e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "protection_override_data", 1);
481211e25f0dSDavid C Somayajulu size_param_offset = offset;
481311e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "size", 0);
481411e25f0dSDavid C Somayajulu
481511e25f0dSDavid C Somayajulu if (dump) {
481611e25f0dSDavid C Somayajulu /* Add override window info to buffer */
481711e25f0dSDavid C Somayajulu override_window_dwords = ecore_rd(p_hwfn, p_ptt, GRC_REG_NUMBER_VALID_OVERRIDE_WINDOW) * PROTECTION_OVERRIDE_ELEMENT_DWORDS;
4818217ec208SDavid C Somayajulu offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, dump_buf + offset, true, BYTES_TO_DWORDS(GRC_REG_PROTECTION_OVERRIDE_WINDOW), override_window_dwords, true);
481911e25f0dSDavid C Somayajulu ecore_dump_num_param(dump_buf + size_param_offset, dump, "size", override_window_dwords);
482011e25f0dSDavid C Somayajulu }
482111e25f0dSDavid C Somayajulu else {
482211e25f0dSDavid C Somayajulu offset += PROTECTION_OVERRIDE_DEPTH_DWORDS;
482311e25f0dSDavid C Somayajulu }
482411e25f0dSDavid C Somayajulu
482511e25f0dSDavid C Somayajulu /* Dump last section */
48269efd0ba7SDavid C Somayajulu offset += ecore_dump_last_section(dump_buf, offset, dump);
482711e25f0dSDavid C Somayajulu
482811e25f0dSDavid C Somayajulu *num_dumped_dwords = offset;
482911e25f0dSDavid C Somayajulu
483011e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
483111e25f0dSDavid C Somayajulu }
483211e25f0dSDavid C Somayajulu
483311e25f0dSDavid C Somayajulu /* Performs FW Asserts Dump to the specified buffer.
483411e25f0dSDavid C Somayajulu * Returns the dumped size in dwords.
483511e25f0dSDavid C Somayajulu */
ecore_fw_asserts_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,bool dump)483611e25f0dSDavid C Somayajulu static u32 ecore_fw_asserts_dump(struct ecore_hwfn *p_hwfn,
483711e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
483811e25f0dSDavid C Somayajulu u32 *dump_buf,
483911e25f0dSDavid C Somayajulu bool dump)
484011e25f0dSDavid C Somayajulu {
484111e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
484211e25f0dSDavid C Somayajulu struct fw_asserts_ram_section *asserts;
484311e25f0dSDavid C Somayajulu char storm_letter_str[2] = "?";
484411e25f0dSDavid C Somayajulu struct fw_info fw_info;
484511e25f0dSDavid C Somayajulu u32 offset = 0;
484611e25f0dSDavid C Somayajulu u8 storm_id;
484711e25f0dSDavid C Somayajulu
484811e25f0dSDavid C Somayajulu /* Dump global params */
484911e25f0dSDavid C Somayajulu offset += ecore_dump_common_global_params(p_hwfn, p_ptt, dump_buf + offset, dump, 1);
485011e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "dump-type", "fw-asserts");
485111e25f0dSDavid C Somayajulu
485211e25f0dSDavid C Somayajulu /* Find Storm dump size */
485311e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
485411e25f0dSDavid C Somayajulu u32 fw_asserts_section_addr, next_list_idx_addr, next_list_idx, last_list_idx, addr;
485511e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
485611e25f0dSDavid C Somayajulu
485711e25f0dSDavid C Somayajulu if (dev_data->block_in_reset[storm->block_id])
485811e25f0dSDavid C Somayajulu continue;
485911e25f0dSDavid C Somayajulu
486011e25f0dSDavid C Somayajulu /* Read FW info for the current Storm */
486111e25f0dSDavid C Somayajulu ecore_read_fw_info(p_hwfn, p_ptt, storm_id, &fw_info);
486211e25f0dSDavid C Somayajulu
486311e25f0dSDavid C Somayajulu asserts = &fw_info.fw_asserts_section;
486411e25f0dSDavid C Somayajulu
486511e25f0dSDavid C Somayajulu /* Dump FW Asserts section header and params */
486611e25f0dSDavid C Somayajulu storm_letter_str[0] = storm->letter;
486711e25f0dSDavid C Somayajulu offset += ecore_dump_section_hdr(dump_buf + offset, dump, "fw_asserts", 2);
486811e25f0dSDavid C Somayajulu offset += ecore_dump_str_param(dump_buf + offset, dump, "storm", storm_letter_str);
486911e25f0dSDavid C Somayajulu offset += ecore_dump_num_param(dump_buf + offset, dump, "size", asserts->list_element_dword_size);
487011e25f0dSDavid C Somayajulu
487111e25f0dSDavid C Somayajulu /* Read and dump FW Asserts data */
487211e25f0dSDavid C Somayajulu if (!dump) {
487311e25f0dSDavid C Somayajulu offset += asserts->list_element_dword_size;
487411e25f0dSDavid C Somayajulu continue;
487511e25f0dSDavid C Somayajulu }
487611e25f0dSDavid C Somayajulu
487711e25f0dSDavid C Somayajulu fw_asserts_section_addr = storm->sem_fast_mem_addr + SEM_FAST_REG_INT_RAM +
487811e25f0dSDavid C Somayajulu RAM_LINES_TO_BYTES(asserts->section_ram_line_offset);
487911e25f0dSDavid C Somayajulu next_list_idx_addr = fw_asserts_section_addr + DWORDS_TO_BYTES(asserts->list_next_index_dword_offset);
488011e25f0dSDavid C Somayajulu next_list_idx = ecore_rd(p_hwfn, p_ptt, next_list_idx_addr);
488111e25f0dSDavid C Somayajulu last_list_idx = (next_list_idx > 0 ? next_list_idx : asserts->list_num_elements) - 1;
488211e25f0dSDavid C Somayajulu addr = BYTES_TO_DWORDS(fw_asserts_section_addr) + asserts->list_dword_offset +
488311e25f0dSDavid C Somayajulu last_list_idx * asserts->list_element_dword_size;
488411e25f0dSDavid C Somayajulu offset += ecore_grc_dump_addr_range(p_hwfn, p_ptt, dump_buf + offset, dump, addr, asserts->list_element_dword_size, false);
488511e25f0dSDavid C Somayajulu }
488611e25f0dSDavid C Somayajulu
488711e25f0dSDavid C Somayajulu /* Dump last section */
48889efd0ba7SDavid C Somayajulu offset += ecore_dump_last_section(dump_buf, offset, dump);
488911e25f0dSDavid C Somayajulu
489011e25f0dSDavid C Somayajulu return offset;
489111e25f0dSDavid C Somayajulu }
489211e25f0dSDavid C Somayajulu
489311e25f0dSDavid C Somayajulu /***************************** Public Functions *******************************/
489411e25f0dSDavid C Somayajulu
ecore_dbg_set_bin_ptr(const u8 * const bin_ptr)489511e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_set_bin_ptr(const u8 * const bin_ptr)
489611e25f0dSDavid C Somayajulu {
4897134b0936SMark O'Donovan const struct bin_buffer_hdr *buf_array = (const struct bin_buffer_hdr *)bin_ptr;
489811e25f0dSDavid C Somayajulu u8 buf_id;
489911e25f0dSDavid C Somayajulu
490011e25f0dSDavid C Somayajulu /* convert binary data to debug arrays */
490111e25f0dSDavid C Somayajulu for (buf_id = 0; buf_id < MAX_BIN_DBG_BUFFER_TYPE; buf_id++) {
4902134b0936SMark O'Donovan s_dbg_arrays[buf_id].ptr = (const u32 *)(bin_ptr + buf_array[buf_id].offset);
490311e25f0dSDavid C Somayajulu s_dbg_arrays[buf_id].size_in_dwords = BYTES_TO_DWORDS(buf_array[buf_id].length);
490411e25f0dSDavid C Somayajulu }
490511e25f0dSDavid C Somayajulu
490611e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
490711e25f0dSDavid C Somayajulu }
490811e25f0dSDavid C Somayajulu
ecore_dbg_set_app_ver(u32 ver)490911e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_set_app_ver(u32 ver)
491011e25f0dSDavid C Somayajulu {
491111e25f0dSDavid C Somayajulu if (ver < TOOLS_VERSION)
491211e25f0dSDavid C Somayajulu return DBG_STATUS_UNSUPPORTED_APP_VERSION;
491311e25f0dSDavid C Somayajulu
491411e25f0dSDavid C Somayajulu s_app_ver = ver;
491511e25f0dSDavid C Somayajulu
491611e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
491711e25f0dSDavid C Somayajulu }
491811e25f0dSDavid C Somayajulu
ecore_dbg_get_fw_func_ver(void)491911e25f0dSDavid C Somayajulu u32 ecore_dbg_get_fw_func_ver(void)
492011e25f0dSDavid C Somayajulu {
492111e25f0dSDavid C Somayajulu return TOOLS_VERSION;
492211e25f0dSDavid C Somayajulu }
492311e25f0dSDavid C Somayajulu
ecore_dbg_get_chip_id(struct ecore_hwfn * p_hwfn)492411e25f0dSDavid C Somayajulu enum chip_ids ecore_dbg_get_chip_id(struct ecore_hwfn *p_hwfn)
492511e25f0dSDavid C Somayajulu {
492611e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
492711e25f0dSDavid C Somayajulu
492811e25f0dSDavid C Somayajulu return (enum chip_ids)dev_data->chip_id;
492911e25f0dSDavid C Somayajulu }
493011e25f0dSDavid C Somayajulu
ecore_dbg_bus_reset(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,bool one_shot_en,u8 force_hw_dwords,bool unify_inputs,bool grc_input_en)493111e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_reset(struct ecore_hwfn *p_hwfn,
493211e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
493311e25f0dSDavid C Somayajulu bool one_shot_en,
493411e25f0dSDavid C Somayajulu u8 force_hw_dwords,
493511e25f0dSDavid C Somayajulu bool unify_inputs,
493611e25f0dSDavid C Somayajulu bool grc_input_en)
493711e25f0dSDavid C Somayajulu {
493811e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
493911e25f0dSDavid C Somayajulu enum dbg_status status;
494011e25f0dSDavid C Somayajulu
494111e25f0dSDavid C Somayajulu status = ecore_dbg_dev_init(p_hwfn, p_ptt);
494211e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
494311e25f0dSDavid C Somayajulu return status;
494411e25f0dSDavid C Somayajulu
494511e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_reset: one_shot_en = %d, force_hw_dwords = %d, unify_inputs = %d, grc_input_en = %d\n", one_shot_en, force_hw_dwords, unify_inputs, grc_input_en);
494611e25f0dSDavid C Somayajulu
494711e25f0dSDavid C Somayajulu if (force_hw_dwords &&
494811e25f0dSDavid C Somayajulu force_hw_dwords != 4 &&
494911e25f0dSDavid C Somayajulu force_hw_dwords != 8)
495011e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
495111e25f0dSDavid C Somayajulu
495211e25f0dSDavid C Somayajulu if (ecore_rd(p_hwfn, p_ptt, DBG_REG_DBG_BLOCK_ON))
495311e25f0dSDavid C Somayajulu return DBG_STATUS_DBG_BUS_IN_USE;
495411e25f0dSDavid C Somayajulu
495511e25f0dSDavid C Somayajulu /* Update reset state of all blocks */
495611e25f0dSDavid C Somayajulu ecore_update_blocks_reset_state(p_hwfn, p_ptt);
495711e25f0dSDavid C Somayajulu
495811e25f0dSDavid C Somayajulu /* Disable all debug inputs */
495911e25f0dSDavid C Somayajulu status = ecore_bus_disable_inputs(p_hwfn, p_ptt, false);
496011e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
496111e25f0dSDavid C Somayajulu return status;
496211e25f0dSDavid C Somayajulu
496311e25f0dSDavid C Somayajulu /* Reset DBG block */
496411e25f0dSDavid C Somayajulu ecore_bus_reset_dbg_block(p_hwfn, p_ptt);
496511e25f0dSDavid C Somayajulu
496611e25f0dSDavid C Somayajulu /* Set one-shot / wrap-around */
496711e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_FULL_MODE, one_shot_en ? 0 : 1);
496811e25f0dSDavid C Somayajulu
496911e25f0dSDavid C Somayajulu /* Init state params */
497011e25f0dSDavid C Somayajulu OSAL_MEMSET(&dev_data->bus, 0, sizeof(dev_data->bus));
497111e25f0dSDavid C Somayajulu dev_data->bus.target = DBG_BUS_TARGET_ID_INT_BUF;
497211e25f0dSDavid C Somayajulu dev_data->bus.state = DBG_BUS_STATE_READY;
497311e25f0dSDavid C Somayajulu dev_data->bus.one_shot_en = one_shot_en;
497411e25f0dSDavid C Somayajulu dev_data->bus.hw_dwords = force_hw_dwords;
497511e25f0dSDavid C Somayajulu dev_data->bus.grc_input_en = grc_input_en;
497611e25f0dSDavid C Somayajulu dev_data->bus.unify_inputs = unify_inputs;
497711e25f0dSDavid C Somayajulu dev_data->bus.num_enabled_blocks = grc_input_en ? 1 : 0;
497811e25f0dSDavid C Somayajulu
497911e25f0dSDavid C Somayajulu /* Init special DBG block */
498011e25f0dSDavid C Somayajulu if (grc_input_en)
498111e25f0dSDavid C Somayajulu SET_FIELD(dev_data->bus.blocks[BLOCK_DBG].data, DBG_BUS_BLOCK_DATA_ENABLE_MASK, 0x1);
498211e25f0dSDavid C Somayajulu
498311e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
498411e25f0dSDavid C Somayajulu }
498511e25f0dSDavid C Somayajulu
ecore_dbg_bus_set_pci_output(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u16 buf_size_kb)498611e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_set_pci_output(struct ecore_hwfn *p_hwfn,
498711e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
498811e25f0dSDavid C Somayajulu u16 buf_size_kb)
498911e25f0dSDavid C Somayajulu {
499011e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
499111e25f0dSDavid C Somayajulu dma_addr_t pci_buf_phys_addr;
499211e25f0dSDavid C Somayajulu void *pci_buf;
499311e25f0dSDavid C Somayajulu
499411e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_set_pci_output: buf_size_kb = %d\n", buf_size_kb);
499511e25f0dSDavid C Somayajulu
499611e25f0dSDavid C Somayajulu if (dev_data->bus.target != DBG_BUS_TARGET_ID_INT_BUF)
499711e25f0dSDavid C Somayajulu return DBG_STATUS_OUTPUT_ALREADY_SET;
499811e25f0dSDavid C Somayajulu if (dev_data->bus.state != DBG_BUS_STATE_READY || dev_data->bus.pci_buf.size > 0)
499911e25f0dSDavid C Somayajulu return DBG_STATUS_DBG_BLOCK_NOT_RESET;
500011e25f0dSDavid C Somayajulu
500111e25f0dSDavid C Somayajulu dev_data->bus.target = DBG_BUS_TARGET_ID_PCI;
500211e25f0dSDavid C Somayajulu dev_data->bus.pci_buf.size = buf_size_kb * 1024;
500311e25f0dSDavid C Somayajulu if (dev_data->bus.pci_buf.size % PCI_PKT_SIZE_IN_BYTES)
500411e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
500511e25f0dSDavid C Somayajulu
500611e25f0dSDavid C Somayajulu pci_buf = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev, &pci_buf_phys_addr, dev_data->bus.pci_buf.size);
500711e25f0dSDavid C Somayajulu if (!pci_buf)
500811e25f0dSDavid C Somayajulu return DBG_STATUS_PCI_BUF_ALLOC_FAILED;
500911e25f0dSDavid C Somayajulu
501011e25f0dSDavid C Somayajulu OSAL_MEMCPY(&dev_data->bus.pci_buf.phys_addr, &pci_buf_phys_addr, sizeof(pci_buf_phys_addr));
501111e25f0dSDavid C Somayajulu
501211e25f0dSDavid C Somayajulu dev_data->bus.pci_buf.virt_addr.lo = (u32)((u64)(osal_uintptr_t)pci_buf);
501311e25f0dSDavid C Somayajulu dev_data->bus.pci_buf.virt_addr.hi = (u32)((u64)(osal_uintptr_t)pci_buf >> 32);
501411e25f0dSDavid C Somayajulu
501511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_PCI_EXT_BUFFER_STRT_ADDR_LSB, dev_data->bus.pci_buf.phys_addr.lo);
501611e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_PCI_EXT_BUFFER_STRT_ADDR_MSB, dev_data->bus.pci_buf.phys_addr.hi);
501711e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TARGET_PACKET_SIZE, PCI_PKT_SIZE_IN_CHUNKS);
501811e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_PCI_EXT_BUFFER_SIZE, dev_data->bus.pci_buf.size / PCI_PKT_SIZE_IN_BYTES);
501911e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_PCI_FUNC_NUM, OPAQUE_FID(p_hwfn->rel_pf_id));
502011e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_PCI_LOGIC_ADDR, PCI_PHYS_ADDR_TYPE);
502111e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_PCI_REQ_CREDIT, PCI_REQ_CREDIT);
502211e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_DEBUG_TARGET, DBG_BUS_TARGET_ID_PCI);
502311e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_OUTPUT_ENABLE, TARGET_EN_MASK_PCI);
502411e25f0dSDavid C Somayajulu
502511e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
502611e25f0dSDavid C Somayajulu }
502711e25f0dSDavid C Somayajulu
ecore_dbg_bus_set_nw_output(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u8 port_id,u32 dest_addr_lo32,u16 dest_addr_hi16,u16 data_limit_size_kb,bool send_to_other_engine,bool rcv_from_other_engine)502811e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_set_nw_output(struct ecore_hwfn *p_hwfn,
502911e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
503011e25f0dSDavid C Somayajulu u8 port_id,
503111e25f0dSDavid C Somayajulu u32 dest_addr_lo32,
503211e25f0dSDavid C Somayajulu u16 dest_addr_hi16,
503311e25f0dSDavid C Somayajulu u16 data_limit_size_kb,
503411e25f0dSDavid C Somayajulu bool send_to_other_engine,
503511e25f0dSDavid C Somayajulu bool rcv_from_other_engine)
503611e25f0dSDavid C Somayajulu {
503711e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
503811e25f0dSDavid C Somayajulu
503911e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_set_nw_output: port_id = %d, dest_addr_lo32 = 0x%x, dest_addr_hi16 = 0x%x, data_limit_size_kb = %d, send_to_other_engine = %d, rcv_from_other_engine = %d\n", port_id, dest_addr_lo32, dest_addr_hi16, data_limit_size_kb, send_to_other_engine, rcv_from_other_engine);
504011e25f0dSDavid C Somayajulu
504111e25f0dSDavid C Somayajulu if (dev_data->bus.target != DBG_BUS_TARGET_ID_INT_BUF)
504211e25f0dSDavid C Somayajulu return DBG_STATUS_OUTPUT_ALREADY_SET;
504311e25f0dSDavid C Somayajulu if (dev_data->bus.state != DBG_BUS_STATE_READY)
504411e25f0dSDavid C Somayajulu return DBG_STATUS_DBG_BLOCK_NOT_RESET;
504511e25f0dSDavid C Somayajulu if (port_id >= s_chip_defs[dev_data->chip_id].per_platform[dev_data->platform_id].num_ports || (send_to_other_engine && rcv_from_other_engine))
504611e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
504711e25f0dSDavid C Somayajulu
504811e25f0dSDavid C Somayajulu dev_data->bus.target = DBG_BUS_TARGET_ID_NIG;
504911e25f0dSDavid C Somayajulu dev_data->bus.rcv_from_other_engine = rcv_from_other_engine;
505011e25f0dSDavid C Somayajulu
505111e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_OUTPUT_ENABLE, TARGET_EN_MASK_NIG);
505211e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_DEBUG_TARGET, DBG_BUS_TARGET_ID_NIG);
505311e25f0dSDavid C Somayajulu
505411e25f0dSDavid C Somayajulu if (send_to_other_engine)
505511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_OTHER_ENGINE_MODE_BB_K2, DBG_BUS_OTHER_ENGINE_MODE_CROSS_ENGINE_TX);
505611e25f0dSDavid C Somayajulu else
505711e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, NIG_REG_DEBUG_PORT, port_id);
505811e25f0dSDavid C Somayajulu
505911e25f0dSDavid C Somayajulu if (rcv_from_other_engine) {
506011e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_OTHER_ENGINE_MODE_BB_K2, DBG_BUS_OTHER_ENGINE_MODE_CROSS_ENGINE_RX);
506111e25f0dSDavid C Somayajulu }
506211e25f0dSDavid C Somayajulu else {
506311e25f0dSDavid C Somayajulu /* Configure ethernet header of 14 bytes */
506411e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_WIDTH, 0);
506511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_7, dest_addr_lo32);
506611e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_6, (u32)SRC_MAC_ADDR_LO16 | ((u32)dest_addr_hi16 << 16));
506711e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_5, SRC_MAC_ADDR_HI32);
506811e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_4, (u32)ETH_TYPE << 16);
506911e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TARGET_PACKET_SIZE, NIG_PKT_SIZE_IN_CHUNKS);
507011e25f0dSDavid C Somayajulu if (data_limit_size_kb)
507111e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_NIG_DATA_LIMIT_SIZE, (data_limit_size_kb * 1024) / CHUNK_SIZE_IN_BYTES);
507211e25f0dSDavid C Somayajulu }
507311e25f0dSDavid C Somayajulu
507411e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
507511e25f0dSDavid C Somayajulu }
507611e25f0dSDavid C Somayajulu
ecore_is_overlapping_enable_mask(struct ecore_hwfn * p_hwfn,u8 enable_mask,u8 right_shift)507711e25f0dSDavid C Somayajulu static bool ecore_is_overlapping_enable_mask(struct ecore_hwfn *p_hwfn,
507811e25f0dSDavid C Somayajulu u8 enable_mask,
507911e25f0dSDavid C Somayajulu u8 right_shift)
508011e25f0dSDavid C Somayajulu {
508111e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
508211e25f0dSDavid C Somayajulu u8 curr_shifted_enable_mask, shifted_enable_mask;
508311e25f0dSDavid C Somayajulu u32 block_id;
508411e25f0dSDavid C Somayajulu
508511e25f0dSDavid C Somayajulu shifted_enable_mask = SHR(enable_mask, VALUES_PER_CYCLE, right_shift);
508611e25f0dSDavid C Somayajulu
508711e25f0dSDavid C Somayajulu if (dev_data->bus.num_enabled_blocks) {
508811e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) {
508911e25f0dSDavid C Somayajulu struct dbg_bus_block_data *block_bus = &dev_data->bus.blocks[block_id];
509011e25f0dSDavid C Somayajulu
509111e25f0dSDavid C Somayajulu if (!GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK))
509211e25f0dSDavid C Somayajulu continue;
509311e25f0dSDavid C Somayajulu
509411e25f0dSDavid C Somayajulu curr_shifted_enable_mask =
509511e25f0dSDavid C Somayajulu SHR(GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK),
509611e25f0dSDavid C Somayajulu VALUES_PER_CYCLE,
509711e25f0dSDavid C Somayajulu GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_RIGHT_SHIFT));
509811e25f0dSDavid C Somayajulu if (shifted_enable_mask & curr_shifted_enable_mask)
509911e25f0dSDavid C Somayajulu return true;
510011e25f0dSDavid C Somayajulu }
510111e25f0dSDavid C Somayajulu }
510211e25f0dSDavid C Somayajulu
510311e25f0dSDavid C Somayajulu return false;
510411e25f0dSDavid C Somayajulu }
510511e25f0dSDavid C Somayajulu
ecore_dbg_bus_enable_block(struct ecore_hwfn * p_hwfn,enum block_id block_id,u8 line_num,u8 enable_mask,u8 right_shift,u8 force_valid_mask,u8 force_frame_mask)510611e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_enable_block(struct ecore_hwfn *p_hwfn,
510711e25f0dSDavid C Somayajulu enum block_id block_id,
510811e25f0dSDavid C Somayajulu u8 line_num,
510911e25f0dSDavid C Somayajulu u8 enable_mask,
511011e25f0dSDavid C Somayajulu u8 right_shift,
511111e25f0dSDavid C Somayajulu u8 force_valid_mask,
511211e25f0dSDavid C Somayajulu u8 force_frame_mask)
511311e25f0dSDavid C Somayajulu {
511411e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
511511e25f0dSDavid C Somayajulu struct block_defs *block = s_block_defs[block_id];
511611e25f0dSDavid C Somayajulu struct dbg_bus_block_data *block_bus;
5117134b0936SMark O'Donovan const struct dbg_bus_block *block_desc;
511811e25f0dSDavid C Somayajulu
511911e25f0dSDavid C Somayajulu block_bus = &dev_data->bus.blocks[block_id];
512011e25f0dSDavid C Somayajulu block_desc = get_dbg_bus_block_desc(p_hwfn, block_id);
512111e25f0dSDavid C Somayajulu
512211e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_enable_block: block = %d, line_num = %d, enable_mask = 0x%x, right_shift = %d, force_valid_mask = 0x%x, force_frame_mask = 0x%x\n", block_id, line_num, enable_mask, right_shift, force_valid_mask, force_frame_mask);
512311e25f0dSDavid C Somayajulu
512411e25f0dSDavid C Somayajulu if (dev_data->bus.state != DBG_BUS_STATE_READY)
512511e25f0dSDavid C Somayajulu return DBG_STATUS_DBG_BLOCK_NOT_RESET;
512611e25f0dSDavid C Somayajulu if (block_id >= MAX_BLOCK_ID)
512711e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
512811e25f0dSDavid C Somayajulu if (GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK))
512911e25f0dSDavid C Somayajulu return DBG_STATUS_BLOCK_ALREADY_ENABLED;
51309efd0ba7SDavid C Somayajulu if (block->dbg_client_id[dev_data->chip_id] == MAX_DBG_BUS_CLIENTS ||
513111e25f0dSDavid C Somayajulu line_num >= NUM_DBG_LINES(block_desc) ||
513211e25f0dSDavid C Somayajulu !enable_mask ||
513311e25f0dSDavid C Somayajulu enable_mask > MAX_CYCLE_VALUES_MASK ||
513411e25f0dSDavid C Somayajulu force_valid_mask > MAX_CYCLE_VALUES_MASK ||
513511e25f0dSDavid C Somayajulu force_frame_mask > MAX_CYCLE_VALUES_MASK ||
513611e25f0dSDavid C Somayajulu right_shift > VALUES_PER_CYCLE - 1)
513711e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
513811e25f0dSDavid C Somayajulu if (dev_data->block_in_reset[block_id])
513911e25f0dSDavid C Somayajulu return DBG_STATUS_BLOCK_IN_RESET;
514011e25f0dSDavid C Somayajulu if (!dev_data->bus.unify_inputs && ecore_is_overlapping_enable_mask(p_hwfn, enable_mask, right_shift))
514111e25f0dSDavid C Somayajulu return DBG_STATUS_INPUT_OVERLAP;
514211e25f0dSDavid C Somayajulu
514311e25f0dSDavid C Somayajulu dev_data->bus.blocks[block_id].line_num = line_num;
514411e25f0dSDavid C Somayajulu SET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK, enable_mask);
514511e25f0dSDavid C Somayajulu SET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_RIGHT_SHIFT, right_shift);
514611e25f0dSDavid C Somayajulu SET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_FORCE_VALID_MASK, force_valid_mask);
514711e25f0dSDavid C Somayajulu SET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_FORCE_FRAME_MASK, force_frame_mask);
514811e25f0dSDavid C Somayajulu
514911e25f0dSDavid C Somayajulu dev_data->bus.num_enabled_blocks++;
515011e25f0dSDavid C Somayajulu
515111e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
515211e25f0dSDavid C Somayajulu }
515311e25f0dSDavid C Somayajulu
ecore_dbg_bus_enable_storm(struct ecore_hwfn * p_hwfn,enum dbg_storms storm_id,enum dbg_bus_storm_modes storm_mode)515411e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_enable_storm(struct ecore_hwfn *p_hwfn,
5155217ec208SDavid C Somayajulu enum dbg_storms storm_id,
515611e25f0dSDavid C Somayajulu enum dbg_bus_storm_modes storm_mode)
515711e25f0dSDavid C Somayajulu {
515811e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
5159217ec208SDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
5160217ec208SDavid C Somayajulu struct dbg_bus_storm_data *storm_bus;
5161217ec208SDavid C Somayajulu struct storm_defs *storm;
516211e25f0dSDavid C Somayajulu
5163217ec208SDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_enable_storm: storm = %d, storm_mode = %d\n", storm_id, storm_mode);
516411e25f0dSDavid C Somayajulu
5165217ec208SDavid C Somayajulu if (bus->state != DBG_BUS_STATE_READY)
516611e25f0dSDavid C Somayajulu return DBG_STATUS_DBG_BLOCK_NOT_RESET;
5167217ec208SDavid C Somayajulu if (bus->hw_dwords >= 4)
516811e25f0dSDavid C Somayajulu return DBG_STATUS_HW_ONLY_RECORDING;
5169217ec208SDavid C Somayajulu if (storm_id >= MAX_DBG_STORMS)
517011e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
517111e25f0dSDavid C Somayajulu if (storm_mode >= MAX_DBG_BUS_STORM_MODES)
517211e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
5173217ec208SDavid C Somayajulu if (bus->unify_inputs)
517411e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
5175217ec208SDavid C Somayajulu if (bus->storms[storm_id].enabled)
517611e25f0dSDavid C Somayajulu return DBG_STATUS_STORM_ALREADY_ENABLED;
517711e25f0dSDavid C Somayajulu
5178217ec208SDavid C Somayajulu storm = &s_storm_defs[storm_id];
5179217ec208SDavid C Somayajulu storm_bus = &bus->storms[storm_id];
518011e25f0dSDavid C Somayajulu
5181217ec208SDavid C Somayajulu if (dev_data->block_in_reset[storm->block_id])
5182217ec208SDavid C Somayajulu return DBG_STATUS_BLOCK_IN_RESET;
5183217ec208SDavid C Somayajulu
5184217ec208SDavid C Somayajulu storm_bus->enabled = true;
5185217ec208SDavid C Somayajulu storm_bus->mode = (u8)storm_mode;
5186217ec208SDavid C Somayajulu storm_bus->hw_id = bus->num_enabled_storms;
5187217ec208SDavid C Somayajulu
5188217ec208SDavid C Somayajulu bus->num_enabled_storms++;
518911e25f0dSDavid C Somayajulu
519011e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
519111e25f0dSDavid C Somayajulu }
519211e25f0dSDavid C Somayajulu
ecore_dbg_bus_enable_timestamp(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u8 valid_mask,u8 frame_mask,u32 tick_len)519311e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_enable_timestamp(struct ecore_hwfn *p_hwfn,
519411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
519511e25f0dSDavid C Somayajulu u8 valid_mask,
519611e25f0dSDavid C Somayajulu u8 frame_mask,
519711e25f0dSDavid C Somayajulu u32 tick_len)
519811e25f0dSDavid C Somayajulu {
519911e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
520011e25f0dSDavid C Somayajulu
520111e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_enable_timestamp: valid_mask = 0x%x, frame_mask = 0x%x, tick_len = %d\n", valid_mask, frame_mask, tick_len);
520211e25f0dSDavid C Somayajulu
520311e25f0dSDavid C Somayajulu if (dev_data->bus.state != DBG_BUS_STATE_READY)
520411e25f0dSDavid C Somayajulu return DBG_STATUS_DBG_BLOCK_NOT_RESET;
520511e25f0dSDavid C Somayajulu if (valid_mask > 0x7 || frame_mask > 0x7)
520611e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
520711e25f0dSDavid C Somayajulu if (!dev_data->bus.unify_inputs && ecore_is_overlapping_enable_mask(p_hwfn, 0x1, 0))
520811e25f0dSDavid C Somayajulu return DBG_STATUS_INPUT_OVERLAP;
520911e25f0dSDavid C Somayajulu
521011e25f0dSDavid C Somayajulu dev_data->bus.timestamp_input_en = true;
521111e25f0dSDavid C Somayajulu dev_data->bus.num_enabled_blocks++;
521211e25f0dSDavid C Somayajulu
521311e25f0dSDavid C Somayajulu SET_FIELD(dev_data->bus.blocks[BLOCK_DBG].data, DBG_BUS_BLOCK_DATA_ENABLE_MASK, 0x1);
521411e25f0dSDavid C Somayajulu
521511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TIMESTAMP_VALID_EN, valid_mask);
521611e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TIMESTAMP_FRAME_EN, frame_mask);
521711e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TIMESTAMP_TICK, tick_len);
521811e25f0dSDavid C Somayajulu
521911e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
522011e25f0dSDavid C Somayajulu }
522111e25f0dSDavid C Somayajulu
ecore_dbg_bus_add_eid_range_sem_filter(struct ecore_hwfn * p_hwfn,enum dbg_storms storm_id,u8 min_eid,u8 max_eid)522211e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_add_eid_range_sem_filter(struct ecore_hwfn *p_hwfn,
522311e25f0dSDavid C Somayajulu enum dbg_storms storm_id,
522411e25f0dSDavid C Somayajulu u8 min_eid,
522511e25f0dSDavid C Somayajulu u8 max_eid)
522611e25f0dSDavid C Somayajulu {
522711e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
522811e25f0dSDavid C Somayajulu struct dbg_bus_storm_data *storm_bus;
522911e25f0dSDavid C Somayajulu
523011e25f0dSDavid C Somayajulu storm_bus = &dev_data->bus.storms[storm_id];
523111e25f0dSDavid C Somayajulu
523211e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_add_eid_range_sem_filter: storm = %d, min_eid = 0x%x, max_eid = 0x%x\n", storm_id, min_eid, max_eid);
523311e25f0dSDavid C Somayajulu
523411e25f0dSDavid C Somayajulu if (storm_id >= MAX_DBG_STORMS)
523511e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
523611e25f0dSDavid C Somayajulu if (min_eid > max_eid)
523711e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
523811e25f0dSDavid C Somayajulu if (!storm_bus->enabled)
523911e25f0dSDavid C Somayajulu return DBG_STATUS_STORM_NOT_ENABLED;
524011e25f0dSDavid C Somayajulu
524111e25f0dSDavid C Somayajulu storm_bus->eid_filter_en = 1;
524211e25f0dSDavid C Somayajulu storm_bus->eid_range_not_mask = 1;
524311e25f0dSDavid C Somayajulu storm_bus->eid_filter_params.range.min = min_eid;
524411e25f0dSDavid C Somayajulu storm_bus->eid_filter_params.range.max = max_eid;
524511e25f0dSDavid C Somayajulu
524611e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
524711e25f0dSDavid C Somayajulu }
524811e25f0dSDavid C Somayajulu
ecore_dbg_bus_add_eid_mask_sem_filter(struct ecore_hwfn * p_hwfn,enum dbg_storms storm_id,u8 eid_val,u8 eid_mask)524911e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_add_eid_mask_sem_filter(struct ecore_hwfn *p_hwfn,
525011e25f0dSDavid C Somayajulu enum dbg_storms storm_id,
525111e25f0dSDavid C Somayajulu u8 eid_val,
525211e25f0dSDavid C Somayajulu u8 eid_mask)
525311e25f0dSDavid C Somayajulu {
525411e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
525511e25f0dSDavid C Somayajulu struct dbg_bus_storm_data *storm_bus;
525611e25f0dSDavid C Somayajulu
525711e25f0dSDavid C Somayajulu storm_bus = &dev_data->bus.storms[storm_id];
525811e25f0dSDavid C Somayajulu
525911e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_add_eid_mask_sem_filter: storm = %d, eid_val = 0x%x, eid_mask = 0x%x\n", storm_id, eid_val, eid_mask);
526011e25f0dSDavid C Somayajulu
526111e25f0dSDavid C Somayajulu if (storm_id >= MAX_DBG_STORMS)
526211e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
526311e25f0dSDavid C Somayajulu if (!storm_bus->enabled)
526411e25f0dSDavid C Somayajulu return DBG_STATUS_STORM_NOT_ENABLED;
526511e25f0dSDavid C Somayajulu
526611e25f0dSDavid C Somayajulu storm_bus->eid_filter_en = 1;
526711e25f0dSDavid C Somayajulu storm_bus->eid_range_not_mask = 0;
526811e25f0dSDavid C Somayajulu storm_bus->eid_filter_params.mask.val = eid_val;
526911e25f0dSDavid C Somayajulu storm_bus->eid_filter_params.mask.mask = eid_mask;
527011e25f0dSDavid C Somayajulu
527111e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
527211e25f0dSDavid C Somayajulu }
527311e25f0dSDavid C Somayajulu
ecore_dbg_bus_add_cid_sem_filter(struct ecore_hwfn * p_hwfn,enum dbg_storms storm_id,u32 cid)527411e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_add_cid_sem_filter(struct ecore_hwfn *p_hwfn,
527511e25f0dSDavid C Somayajulu enum dbg_storms storm_id,
527611e25f0dSDavid C Somayajulu u32 cid)
527711e25f0dSDavid C Somayajulu {
527811e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
527911e25f0dSDavid C Somayajulu struct dbg_bus_storm_data *storm_bus;
528011e25f0dSDavid C Somayajulu
528111e25f0dSDavid C Somayajulu storm_bus = &dev_data->bus.storms[storm_id];
528211e25f0dSDavid C Somayajulu
528311e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_add_cid_sem_filter: storm = %d, cid = 0x%x\n", storm_id, cid);
528411e25f0dSDavid C Somayajulu
528511e25f0dSDavid C Somayajulu if (storm_id >= MAX_DBG_STORMS)
528611e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
528711e25f0dSDavid C Somayajulu if (!storm_bus->enabled)
528811e25f0dSDavid C Somayajulu return DBG_STATUS_STORM_NOT_ENABLED;
528911e25f0dSDavid C Somayajulu
529011e25f0dSDavid C Somayajulu storm_bus->cid_filter_en = 1;
529111e25f0dSDavid C Somayajulu storm_bus->cid = cid;
529211e25f0dSDavid C Somayajulu
529311e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
529411e25f0dSDavid C Somayajulu }
529511e25f0dSDavid C Somayajulu
ecore_dbg_bus_enable_filter(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum block_id block_id,u8 const_msg_len)529611e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_enable_filter(struct ecore_hwfn *p_hwfn,
529711e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
529811e25f0dSDavid C Somayajulu enum block_id block_id,
529911e25f0dSDavid C Somayajulu u8 const_msg_len)
530011e25f0dSDavid C Somayajulu {
530111e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
530211e25f0dSDavid C Somayajulu
530311e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_enable_filter: block = %d, const_msg_len = %d\n", block_id, const_msg_len);
530411e25f0dSDavid C Somayajulu
530511e25f0dSDavid C Somayajulu if (dev_data->bus.state != DBG_BUS_STATE_READY)
530611e25f0dSDavid C Somayajulu return DBG_STATUS_DBG_BLOCK_NOT_RESET;
530711e25f0dSDavid C Somayajulu if (dev_data->bus.filter_en)
530811e25f0dSDavid C Somayajulu return DBG_STATUS_FILTER_ALREADY_ENABLED;
530911e25f0dSDavid C Somayajulu if (block_id >= MAX_BLOCK_ID)
531011e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
531111e25f0dSDavid C Somayajulu if (!GET_FIELD(dev_data->bus.blocks[block_id].data, DBG_BUS_BLOCK_DATA_ENABLE_MASK))
531211e25f0dSDavid C Somayajulu return DBG_STATUS_BLOCK_NOT_ENABLED;
531311e25f0dSDavid C Somayajulu if (!dev_data->bus.unify_inputs)
531411e25f0dSDavid C Somayajulu return DBG_STATUS_FILTER_BUG;
531511e25f0dSDavid C Somayajulu
531611e25f0dSDavid C Somayajulu dev_data->bus.filter_en = true;
531711e25f0dSDavid C Somayajulu dev_data->bus.next_constraint_id = 0;
531811e25f0dSDavid C Somayajulu dev_data->bus.adding_filter = true;
531911e25f0dSDavid C Somayajulu
532011e25f0dSDavid C Somayajulu /* HW ID is set to 0 due to required unifyInputs */
532111e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_FILTER_ID_NUM, 0);
532211e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_FILTER_MSG_LENGTH_ENABLE, const_msg_len > 0 ? 1 : 0);
532311e25f0dSDavid C Somayajulu if (const_msg_len > 0)
532411e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_FILTER_MSG_LENGTH, const_msg_len - 1);
532511e25f0dSDavid C Somayajulu
532611e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
532711e25f0dSDavid C Somayajulu }
532811e25f0dSDavid C Somayajulu
ecore_dbg_bus_enable_trigger(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,bool rec_pre_trigger,u8 pre_chunks,bool rec_post_trigger,u32 post_cycles,bool filter_pre_trigger,bool filter_post_trigger)532911e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_enable_trigger(struct ecore_hwfn *p_hwfn,
533011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
533111e25f0dSDavid C Somayajulu bool rec_pre_trigger,
533211e25f0dSDavid C Somayajulu u8 pre_chunks,
533311e25f0dSDavid C Somayajulu bool rec_post_trigger,
533411e25f0dSDavid C Somayajulu u32 post_cycles,
533511e25f0dSDavid C Somayajulu bool filter_pre_trigger,
533611e25f0dSDavid C Somayajulu bool filter_post_trigger)
533711e25f0dSDavid C Somayajulu {
533811e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
533911e25f0dSDavid C Somayajulu enum dbg_bus_post_trigger_types post_trigger_type;
534011e25f0dSDavid C Somayajulu enum dbg_bus_pre_trigger_types pre_trigger_type;
534111e25f0dSDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
534211e25f0dSDavid C Somayajulu
534311e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_enable_trigger: rec_pre_trigger = %d, pre_chunks = %d, rec_post_trigger = %d, post_cycles = %d, filter_pre_trigger = %d, filter_post_trigger = %d\n", rec_pre_trigger, pre_chunks, rec_post_trigger, post_cycles, filter_pre_trigger, filter_post_trigger);
534411e25f0dSDavid C Somayajulu
534511e25f0dSDavid C Somayajulu if (bus->state != DBG_BUS_STATE_READY)
534611e25f0dSDavid C Somayajulu return DBG_STATUS_DBG_BLOCK_NOT_RESET;
534711e25f0dSDavid C Somayajulu if (bus->trigger_en)
534811e25f0dSDavid C Somayajulu return DBG_STATUS_TRIGGER_ALREADY_ENABLED;
534911e25f0dSDavid C Somayajulu if (rec_pre_trigger && pre_chunks >= INT_BUF_SIZE_IN_CHUNKS)
535011e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
535111e25f0dSDavid C Somayajulu
535211e25f0dSDavid C Somayajulu bus->trigger_en = true;
535311e25f0dSDavid C Somayajulu bus->filter_pre_trigger = filter_pre_trigger;
535411e25f0dSDavid C Somayajulu bus->filter_post_trigger = filter_post_trigger;
535511e25f0dSDavid C Somayajulu
535611e25f0dSDavid C Somayajulu if (rec_pre_trigger) {
535711e25f0dSDavid C Somayajulu pre_trigger_type = pre_chunks ? DBG_BUS_PRE_TRIGGER_NUM_CHUNKS : DBG_BUS_PRE_TRIGGER_START_FROM_ZERO;
535811e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_RCRD_ON_WINDOW_PRE_NUM_CHUNKS, pre_chunks);
535911e25f0dSDavid C Somayajulu }
536011e25f0dSDavid C Somayajulu else {
536111e25f0dSDavid C Somayajulu pre_trigger_type = DBG_BUS_PRE_TRIGGER_DROP;
536211e25f0dSDavid C Somayajulu }
536311e25f0dSDavid C Somayajulu
536411e25f0dSDavid C Somayajulu if (rec_post_trigger) {
536511e25f0dSDavid C Somayajulu post_trigger_type = DBG_BUS_POST_TRIGGER_RECORD;
536611e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_RCRD_ON_WINDOW_POST_NUM_CYCLES, post_cycles ? post_cycles : 0xffffffff);
536711e25f0dSDavid C Somayajulu }
536811e25f0dSDavid C Somayajulu else {
536911e25f0dSDavid C Somayajulu post_trigger_type = DBG_BUS_POST_TRIGGER_DROP;
537011e25f0dSDavid C Somayajulu }
537111e25f0dSDavid C Somayajulu
537211e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_RCRD_ON_WINDOW_PRE_TRGR_EVNT_MODE, pre_trigger_type);
537311e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_RCRD_ON_WINDOW_POST_TRGR_EVNT_MODE, post_trigger_type);
537411e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_ENABLE, 1);
537511e25f0dSDavid C Somayajulu
537611e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
537711e25f0dSDavid C Somayajulu }
537811e25f0dSDavid C Somayajulu
ecore_dbg_bus_add_trigger_state(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum block_id block_id,u8 const_msg_len,u16 count_to_next)537911e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_add_trigger_state(struct ecore_hwfn *p_hwfn,
538011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
538111e25f0dSDavid C Somayajulu enum block_id block_id,
538211e25f0dSDavid C Somayajulu u8 const_msg_len,
538311e25f0dSDavid C Somayajulu u16 count_to_next)
538411e25f0dSDavid C Somayajulu {
538511e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
538611e25f0dSDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
538711e25f0dSDavid C Somayajulu struct dbg_bus_block_data *block_bus;
538811e25f0dSDavid C Somayajulu u8 reg_offset;
538911e25f0dSDavid C Somayajulu
539011e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_add_trigger_state: block = %d, const_msg_len = %d, count_to_next = %d\n", block_id, const_msg_len, count_to_next);
539111e25f0dSDavid C Somayajulu
539211e25f0dSDavid C Somayajulu block_bus = &bus->blocks[block_id];
539311e25f0dSDavid C Somayajulu
539411e25f0dSDavid C Somayajulu if (!bus->trigger_en)
539511e25f0dSDavid C Somayajulu return DBG_STATUS_TRIGGER_NOT_ENABLED;
539611e25f0dSDavid C Somayajulu if (bus->next_trigger_state == MAX_TRIGGER_STATES)
539711e25f0dSDavid C Somayajulu return DBG_STATUS_TOO_MANY_TRIGGER_STATES;
539811e25f0dSDavid C Somayajulu if (block_id >= MAX_BLOCK_ID)
539911e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
540011e25f0dSDavid C Somayajulu if (!GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK))
540111e25f0dSDavid C Somayajulu return DBG_STATUS_BLOCK_NOT_ENABLED;
540211e25f0dSDavid C Somayajulu if (!count_to_next)
540311e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
540411e25f0dSDavid C Somayajulu
540511e25f0dSDavid C Somayajulu bus->next_constraint_id = 0;
540611e25f0dSDavid C Somayajulu bus->adding_filter = false;
540711e25f0dSDavid C Somayajulu
540811e25f0dSDavid C Somayajulu /* Store block's shifted enable mask */
540911e25f0dSDavid C Somayajulu SET_FIELD(bus->trigger_states[dev_data->bus.next_trigger_state].data, DBG_BUS_TRIGGER_STATE_DATA_BLOCK_SHIFTED_ENABLE_MASK, SHR(GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK),
541011e25f0dSDavid C Somayajulu VALUES_PER_CYCLE,
541111e25f0dSDavid C Somayajulu GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_RIGHT_SHIFT)));
541211e25f0dSDavid C Somayajulu
541311e25f0dSDavid C Somayajulu /* Set trigger state registers */
541411e25f0dSDavid C Somayajulu reg_offset = bus->next_trigger_state * BYTES_IN_DWORD;
541511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATE_MSG_LENGTH_ENABLE_0 + reg_offset, const_msg_len > 0 ? 1 : 0);
541611e25f0dSDavid C Somayajulu if (const_msg_len > 0)
541711e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATE_MSG_LENGTH_0 + reg_offset, const_msg_len - 1);
541811e25f0dSDavid C Somayajulu
541911e25f0dSDavid C Somayajulu /* Set trigger set registers */
542011e25f0dSDavid C Somayajulu reg_offset = bus->next_trigger_state * TRIGGER_SETS_PER_STATE * BYTES_IN_DWORD;
542111e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATE_SET_COUNT_0 + reg_offset, count_to_next);
542211e25f0dSDavid C Somayajulu
542311e25f0dSDavid C Somayajulu /* Set next state to final state, and overwrite previous next state
542411e25f0dSDavid C Somayajulu * (if any).
542511e25f0dSDavid C Somayajulu */
542611e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATE_SET_NXT_STATE_0 + reg_offset, MAX_TRIGGER_STATES);
542711e25f0dSDavid C Somayajulu if (bus->next_trigger_state > 0) {
542811e25f0dSDavid C Somayajulu reg_offset = (bus->next_trigger_state - 1) * TRIGGER_SETS_PER_STATE * BYTES_IN_DWORD;
542911e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATE_SET_NXT_STATE_0 + reg_offset, bus->next_trigger_state);
543011e25f0dSDavid C Somayajulu }
543111e25f0dSDavid C Somayajulu
543211e25f0dSDavid C Somayajulu bus->next_trigger_state++;
543311e25f0dSDavid C Somayajulu
543411e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
543511e25f0dSDavid C Somayajulu }
543611e25f0dSDavid C Somayajulu
ecore_dbg_bus_add_constraint(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum dbg_bus_constraint_ops constraint_op,u32 data_val,u32 data_mask,bool compare_frame,u8 frame_bit,u8 cycle_offset,u8 dword_offset_in_cycle,bool is_mandatory)543711e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_add_constraint(struct ecore_hwfn *p_hwfn,
543811e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
543911e25f0dSDavid C Somayajulu enum dbg_bus_constraint_ops constraint_op,
544011e25f0dSDavid C Somayajulu u32 data_val,
544111e25f0dSDavid C Somayajulu u32 data_mask,
544211e25f0dSDavid C Somayajulu bool compare_frame,
544311e25f0dSDavid C Somayajulu u8 frame_bit,
544411e25f0dSDavid C Somayajulu u8 cycle_offset,
544511e25f0dSDavid C Somayajulu u8 dword_offset_in_cycle,
544611e25f0dSDavid C Somayajulu bool is_mandatory)
544711e25f0dSDavid C Somayajulu {
544811e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
544911e25f0dSDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
545011e25f0dSDavid C Somayajulu u16 dword_offset, range = 0;
545111e25f0dSDavid C Somayajulu
545211e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_add_constraint: op = %d, data_val = 0x%x, data_mask = 0x%x, compare_frame = %d, frame_bit = %d, cycle_offset = %d, dword_offset_in_cycle = %d, is_mandatory = %d\n", constraint_op, data_val, data_mask, compare_frame, frame_bit, cycle_offset, dword_offset_in_cycle, is_mandatory);
545311e25f0dSDavid C Somayajulu
545411e25f0dSDavid C Somayajulu if (!bus->filter_en && !dev_data->bus.trigger_en)
545511e25f0dSDavid C Somayajulu return DBG_STATUS_CANT_ADD_CONSTRAINT;
545611e25f0dSDavid C Somayajulu if (bus->trigger_en && !bus->adding_filter && !bus->next_trigger_state)
545711e25f0dSDavid C Somayajulu return DBG_STATUS_CANT_ADD_CONSTRAINT;
545811e25f0dSDavid C Somayajulu if (bus->next_constraint_id >= MAX_CONSTRAINTS)
545911e25f0dSDavid C Somayajulu return DBG_STATUS_TOO_MANY_CONSTRAINTS;
546011e25f0dSDavid C Somayajulu if (constraint_op >= MAX_DBG_BUS_CONSTRAINT_OPS || frame_bit > 1 || dword_offset_in_cycle > 3 || (bus->adding_filter && cycle_offset > 3))
546111e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
546211e25f0dSDavid C Somayajulu if (compare_frame &&
546311e25f0dSDavid C Somayajulu constraint_op != DBG_BUS_CONSTRAINT_OP_EQ &&
546411e25f0dSDavid C Somayajulu constraint_op != DBG_BUS_CONSTRAINT_OP_NE)
546511e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
546611e25f0dSDavid C Somayajulu
546711e25f0dSDavid C Somayajulu dword_offset = cycle_offset * VALUES_PER_CYCLE + dword_offset_in_cycle;
546811e25f0dSDavid C Somayajulu
546911e25f0dSDavid C Somayajulu if (!bus->adding_filter) {
547011e25f0dSDavid C Somayajulu u8 curr_trigger_state_id = bus->next_trigger_state - 1;
547111e25f0dSDavid C Somayajulu struct dbg_bus_trigger_state_data *trigger_state;
547211e25f0dSDavid C Somayajulu
547311e25f0dSDavid C Somayajulu trigger_state = &bus->trigger_states[curr_trigger_state_id];
547411e25f0dSDavid C Somayajulu
547511e25f0dSDavid C Somayajulu /* Check if the selected dword is enabled in the block */
547611e25f0dSDavid C Somayajulu if (!(GET_FIELD(trigger_state->data, DBG_BUS_TRIGGER_STATE_DATA_BLOCK_SHIFTED_ENABLE_MASK) & (u8)(1 << dword_offset_in_cycle)))
547711e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_TRIGGER_DWORD_OFFSET;
547811e25f0dSDavid C Somayajulu
547911e25f0dSDavid C Somayajulu /* Add selected dword to trigger state's dword mask */
548011e25f0dSDavid C Somayajulu SET_FIELD(trigger_state->data, DBG_BUS_TRIGGER_STATE_DATA_CONSTRAINT_DWORD_MASK, GET_FIELD(trigger_state->data, DBG_BUS_TRIGGER_STATE_DATA_CONSTRAINT_DWORD_MASK) | (u8)(1 << dword_offset_in_cycle));
548111e25f0dSDavid C Somayajulu }
548211e25f0dSDavid C Somayajulu
548311e25f0dSDavid C Somayajulu /* Prepare data mask and range */
548411e25f0dSDavid C Somayajulu if (constraint_op == DBG_BUS_CONSTRAINT_OP_EQ ||
548511e25f0dSDavid C Somayajulu constraint_op == DBG_BUS_CONSTRAINT_OP_NE) {
548611e25f0dSDavid C Somayajulu data_mask = ~data_mask;
548711e25f0dSDavid C Somayajulu }
548811e25f0dSDavid C Somayajulu else {
548911e25f0dSDavid C Somayajulu u8 lsb, width;
549011e25f0dSDavid C Somayajulu
549111e25f0dSDavid C Somayajulu /* Extract lsb and width from mask */
549211e25f0dSDavid C Somayajulu if (!data_mask)
549311e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
549411e25f0dSDavid C Somayajulu
549511e25f0dSDavid C Somayajulu for (lsb = 0; lsb < 32 && !(data_mask & 1); lsb++, data_mask >>= 1);
5496217ec208SDavid C Somayajulu for (width = 0; width < 32 - lsb && (data_mask & 1); width++, data_mask >>= 1);
549711e25f0dSDavid C Somayajulu if (data_mask)
549811e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
549911e25f0dSDavid C Somayajulu range = (lsb << 5) | (width - 1);
550011e25f0dSDavid C Somayajulu }
550111e25f0dSDavid C Somayajulu
550211e25f0dSDavid C Somayajulu /* Add constraint */
550311e25f0dSDavid C Somayajulu ecore_bus_set_constraint(p_hwfn, p_ptt, dev_data->bus.adding_filter ? 1 : 0,
550411e25f0dSDavid C Somayajulu dev_data->bus.next_constraint_id,
550511e25f0dSDavid C Somayajulu s_constraint_op_defs[constraint_op].hw_op_val,
550611e25f0dSDavid C Somayajulu data_val, data_mask, frame_bit,
550711e25f0dSDavid C Somayajulu compare_frame ? 0 : 1, dword_offset, range,
550811e25f0dSDavid C Somayajulu s_constraint_op_defs[constraint_op].is_cyclic ? 1 : 0,
550911e25f0dSDavid C Somayajulu is_mandatory ? 1 : 0);
551011e25f0dSDavid C Somayajulu
551111e25f0dSDavid C Somayajulu /* If first constraint, fill other 3 constraints with dummy constraints
551211e25f0dSDavid C Somayajulu * that always match (using the same offset).
551311e25f0dSDavid C Somayajulu */
551411e25f0dSDavid C Somayajulu if (!dev_data->bus.next_constraint_id) {
551511e25f0dSDavid C Somayajulu u8 i;
551611e25f0dSDavid C Somayajulu
551711e25f0dSDavid C Somayajulu for (i = 1; i < MAX_CONSTRAINTS; i++)
551811e25f0dSDavid C Somayajulu ecore_bus_set_constraint(p_hwfn, p_ptt, bus->adding_filter ? 1 : 0,
551911e25f0dSDavid C Somayajulu i, DBG_BUS_CONSTRAINT_OP_EQ, 0, 0xffffffff,
552011e25f0dSDavid C Somayajulu 0, 1, dword_offset, 0, 0, 1);
552111e25f0dSDavid C Somayajulu }
552211e25f0dSDavid C Somayajulu
552311e25f0dSDavid C Somayajulu bus->next_constraint_id++;
552411e25f0dSDavid C Somayajulu
552511e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
552611e25f0dSDavid C Somayajulu }
552711e25f0dSDavid C Somayajulu
552811e25f0dSDavid C Somayajulu /* Configure the DBG block client mask */
ecore_config_dbg_block_client_mask(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)552911e25f0dSDavid C Somayajulu static void ecore_config_dbg_block_client_mask(struct ecore_hwfn *p_hwfn,
553011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt)
553111e25f0dSDavid C Somayajulu {
553211e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
553311e25f0dSDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
553411e25f0dSDavid C Somayajulu u32 block_id, client_mask = 0;
553511e25f0dSDavid C Somayajulu u8 storm_id;
553611e25f0dSDavid C Somayajulu
553711e25f0dSDavid C Somayajulu /* Update client mask for Storm inputs */
553811e25f0dSDavid C Somayajulu if (bus->num_enabled_storms)
553911e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
554011e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
554111e25f0dSDavid C Somayajulu
554211e25f0dSDavid C Somayajulu if (bus->storms[storm_id].enabled)
554311e25f0dSDavid C Somayajulu client_mask |= (1 << storm->dbg_client_id[dev_data->chip_id]);
554411e25f0dSDavid C Somayajulu }
554511e25f0dSDavid C Somayajulu
554611e25f0dSDavid C Somayajulu /* Update client mask for block inputs */
554711e25f0dSDavid C Somayajulu if (bus->num_enabled_blocks) {
554811e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) {
554911e25f0dSDavid C Somayajulu struct dbg_bus_block_data *block_bus = &bus->blocks[block_id];
555011e25f0dSDavid C Somayajulu struct block_defs *block = s_block_defs[block_id];
555111e25f0dSDavid C Somayajulu
555211e25f0dSDavid C Somayajulu if (GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK) && block_id != BLOCK_DBG)
555311e25f0dSDavid C Somayajulu client_mask |= (1 << block->dbg_client_id[dev_data->chip_id]);
555411e25f0dSDavid C Somayajulu }
555511e25f0dSDavid C Somayajulu }
555611e25f0dSDavid C Somayajulu
555711e25f0dSDavid C Somayajulu /* Update client mask for GRC input */
555811e25f0dSDavid C Somayajulu if (bus->grc_input_en)
555911e25f0dSDavid C Somayajulu client_mask |= (1 << DBG_BUS_CLIENT_CPU);
556011e25f0dSDavid C Somayajulu
556111e25f0dSDavid C Somayajulu /* Update client mask for timestamp input */
556211e25f0dSDavid C Somayajulu if (bus->timestamp_input_en)
556311e25f0dSDavid C Somayajulu client_mask |= (1 << DBG_BUS_CLIENT_TIMESTAMP);
556411e25f0dSDavid C Somayajulu
556511e25f0dSDavid C Somayajulu ecore_bus_enable_clients(p_hwfn, p_ptt, client_mask);
556611e25f0dSDavid C Somayajulu }
556711e25f0dSDavid C Somayajulu
556811e25f0dSDavid C Somayajulu /* Configure the DBG block framing mode */
ecore_config_dbg_block_framing_mode(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)556911e25f0dSDavid C Somayajulu static enum dbg_status ecore_config_dbg_block_framing_mode(struct ecore_hwfn *p_hwfn,
557011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt)
557111e25f0dSDavid C Somayajulu {
557211e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
557311e25f0dSDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
557411e25f0dSDavid C Somayajulu enum dbg_bus_frame_modes dbg_framing_mode;
557511e25f0dSDavid C Somayajulu u32 block_id;
557611e25f0dSDavid C Somayajulu
557711e25f0dSDavid C Somayajulu if (!bus->hw_dwords && bus->num_enabled_blocks) {
5578134b0936SMark O'Donovan const struct dbg_bus_line *line_desc;
557911e25f0dSDavid C Somayajulu u8 hw_dwords;
558011e25f0dSDavid C Somayajulu
558111e25f0dSDavid C Somayajulu /* Choose either 4 HW dwords (128-bit mode) or 8 HW dwords
558211e25f0dSDavid C Somayajulu * (256-bit mode).
558311e25f0dSDavid C Somayajulu */
558411e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) {
558511e25f0dSDavid C Somayajulu struct dbg_bus_block_data *block_bus = &bus->blocks[block_id];
558611e25f0dSDavid C Somayajulu
558711e25f0dSDavid C Somayajulu if (!GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK))
558811e25f0dSDavid C Somayajulu continue;
558911e25f0dSDavid C Somayajulu
559011e25f0dSDavid C Somayajulu line_desc = get_dbg_bus_line_desc(p_hwfn, (enum block_id)block_id);
559111e25f0dSDavid C Somayajulu hw_dwords = line_desc && GET_FIELD(line_desc->data, DBG_BUS_LINE_IS_256B) ? 8 : 4;
559211e25f0dSDavid C Somayajulu
559311e25f0dSDavid C Somayajulu if (bus->hw_dwords > 0 && bus->hw_dwords != hw_dwords)
559411e25f0dSDavid C Somayajulu return DBG_STATUS_NON_MATCHING_LINES;
559511e25f0dSDavid C Somayajulu
559611e25f0dSDavid C Somayajulu /* The DBG block doesn't support triggers and
559711e25f0dSDavid C Somayajulu * filters on 256b debug lines.
559811e25f0dSDavid C Somayajulu */
559911e25f0dSDavid C Somayajulu if (hw_dwords == 8 && (bus->trigger_en || bus->filter_en))
560011e25f0dSDavid C Somayajulu return DBG_STATUS_NO_FILTER_TRIGGER_64B;
560111e25f0dSDavid C Somayajulu
560211e25f0dSDavid C Somayajulu bus->hw_dwords = hw_dwords;
560311e25f0dSDavid C Somayajulu }
560411e25f0dSDavid C Somayajulu }
560511e25f0dSDavid C Somayajulu
560611e25f0dSDavid C Somayajulu switch (bus->hw_dwords) {
560711e25f0dSDavid C Somayajulu case 0: dbg_framing_mode = DBG_BUS_FRAME_MODE_0HW_4ST; break;
560811e25f0dSDavid C Somayajulu case 4: dbg_framing_mode = DBG_BUS_FRAME_MODE_4HW_0ST; break;
560911e25f0dSDavid C Somayajulu case 8: dbg_framing_mode = DBG_BUS_FRAME_MODE_8HW_0ST; break;
561011e25f0dSDavid C Somayajulu default: dbg_framing_mode = DBG_BUS_FRAME_MODE_0HW_4ST; break;
561111e25f0dSDavid C Somayajulu }
561211e25f0dSDavid C Somayajulu ecore_bus_set_framing_mode(p_hwfn, p_ptt, dbg_framing_mode);
561311e25f0dSDavid C Somayajulu
561411e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
561511e25f0dSDavid C Somayajulu }
561611e25f0dSDavid C Somayajulu
561711e25f0dSDavid C Somayajulu /* Configure the DBG block Storm data */
ecore_config_storm_inputs(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)561811e25f0dSDavid C Somayajulu static enum dbg_status ecore_config_storm_inputs(struct ecore_hwfn *p_hwfn,
561911e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt)
562011e25f0dSDavid C Somayajulu {
562111e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
562211e25f0dSDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
562311e25f0dSDavid C Somayajulu u8 storm_id, i, next_storm_id = 0;
562411e25f0dSDavid C Somayajulu u32 storm_id_mask = 0;
562511e25f0dSDavid C Somayajulu
562611e25f0dSDavid C Somayajulu /* Check if SEMI sync FIFO is empty */
562711e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
562811e25f0dSDavid C Somayajulu struct dbg_bus_storm_data *storm_bus = &bus->storms[storm_id];
562911e25f0dSDavid C Somayajulu struct storm_defs *storm = &s_storm_defs[storm_id];
563011e25f0dSDavid C Somayajulu
563111e25f0dSDavid C Somayajulu if (storm_bus->enabled && !ecore_rd(p_hwfn, p_ptt, storm->sem_sync_dbg_empty_addr))
563211e25f0dSDavid C Somayajulu return DBG_STATUS_SEMI_FIFO_NOT_EMPTY;
563311e25f0dSDavid C Somayajulu }
563411e25f0dSDavid C Somayajulu
563511e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
563611e25f0dSDavid C Somayajulu struct dbg_bus_storm_data *storm_bus = &bus->storms[storm_id];
563711e25f0dSDavid C Somayajulu
563811e25f0dSDavid C Somayajulu if (storm_bus->enabled)
563911e25f0dSDavid C Somayajulu storm_id_mask |= (storm_bus->hw_id << (storm_id * HW_ID_BITS));
564011e25f0dSDavid C Somayajulu }
564111e25f0dSDavid C Somayajulu
564211e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_STORM_ID_NUM, storm_id_mask);
564311e25f0dSDavid C Somayajulu
564411e25f0dSDavid C Somayajulu /* Disable storm stall if recording to internal buffer in one-shot */
564511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_NO_GRANT_ON_FULL, (dev_data->bus.target == DBG_BUS_TARGET_ID_INT_BUF && bus->one_shot_en) ? 0 : 1);
564611e25f0dSDavid C Somayajulu
564711e25f0dSDavid C Somayajulu /* Configure calendar */
564811e25f0dSDavid C Somayajulu for (i = 0; i < NUM_CALENDAR_SLOTS; i++, next_storm_id = (next_storm_id + 1) % MAX_DBG_STORMS) {
564911e25f0dSDavid C Somayajulu /* Find next enabled Storm */
565011e25f0dSDavid C Somayajulu for (; !dev_data->bus.storms[next_storm_id].enabled; next_storm_id = (next_storm_id + 1) % MAX_DBG_STORMS);
565111e25f0dSDavid C Somayajulu
565211e25f0dSDavid C Somayajulu /* Configure calendar slot */
565311e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_CALENDAR_SLOT0 + DWORDS_TO_BYTES(i), next_storm_id);
565411e25f0dSDavid C Somayajulu }
565511e25f0dSDavid C Somayajulu
565611e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
565711e25f0dSDavid C Somayajulu }
565811e25f0dSDavid C Somayajulu
565911e25f0dSDavid C Somayajulu /* Assign HW ID to each dword/qword:
566011e25f0dSDavid C Somayajulu * if the inputs are unified, HW ID 0 is assigned to all dwords/qwords.
566111e25f0dSDavid C Somayajulu * Otherwise, we would like to assign a different HW ID to each dword, to avoid
566211e25f0dSDavid C Somayajulu * data synchronization issues. however, we need to check if there is a trigger
566311e25f0dSDavid C Somayajulu * state for which more than one dword has a constraint. if there is, we cannot
566411e25f0dSDavid C Somayajulu * assign a different HW ID to each dword (since a trigger state has a single
566511e25f0dSDavid C Somayajulu * HW ID), so we assign a different HW ID to each block.
566611e25f0dSDavid C Somayajulu */
ecore_assign_hw_ids(struct ecore_hwfn * p_hwfn,u8 hw_ids[VALUES_PER_CYCLE])566711e25f0dSDavid C Somayajulu static void ecore_assign_hw_ids(struct ecore_hwfn *p_hwfn,
566811e25f0dSDavid C Somayajulu u8 hw_ids[VALUES_PER_CYCLE])
566911e25f0dSDavid C Somayajulu {
567011e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
567111e25f0dSDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
567211e25f0dSDavid C Somayajulu bool hw_id_per_dword = true;
567311e25f0dSDavid C Somayajulu u8 val_id, state_id;
567411e25f0dSDavid C Somayajulu u32 block_id;
567511e25f0dSDavid C Somayajulu
567611e25f0dSDavid C Somayajulu OSAL_MEMSET(hw_ids, 0, VALUES_PER_CYCLE);
567711e25f0dSDavid C Somayajulu
567811e25f0dSDavid C Somayajulu if (bus->unify_inputs)
567911e25f0dSDavid C Somayajulu return;
568011e25f0dSDavid C Somayajulu
568111e25f0dSDavid C Somayajulu if (bus->trigger_en) {
568211e25f0dSDavid C Somayajulu for (state_id = 0; state_id < bus->next_trigger_state && hw_id_per_dword; state_id++) {
568311e25f0dSDavid C Somayajulu u8 num_dwords = 0;
568411e25f0dSDavid C Somayajulu
568511e25f0dSDavid C Somayajulu for (val_id = 0; val_id < VALUES_PER_CYCLE; val_id++)
568611e25f0dSDavid C Somayajulu if (GET_FIELD(bus->trigger_states[state_id].data, DBG_BUS_TRIGGER_STATE_DATA_CONSTRAINT_DWORD_MASK) & (1 << val_id))
568711e25f0dSDavid C Somayajulu num_dwords++;
568811e25f0dSDavid C Somayajulu
568911e25f0dSDavid C Somayajulu if (num_dwords > 1)
569011e25f0dSDavid C Somayajulu hw_id_per_dword = false;
569111e25f0dSDavid C Somayajulu }
569211e25f0dSDavid C Somayajulu }
569311e25f0dSDavid C Somayajulu
569411e25f0dSDavid C Somayajulu if (hw_id_per_dword) {
569511e25f0dSDavid C Somayajulu /* Assign a different HW ID for each dword */
569611e25f0dSDavid C Somayajulu for (val_id = 0; val_id < VALUES_PER_CYCLE; val_id++)
569711e25f0dSDavid C Somayajulu hw_ids[val_id] = val_id;
569811e25f0dSDavid C Somayajulu }
569911e25f0dSDavid C Somayajulu else {
570011e25f0dSDavid C Somayajulu u8 shifted_enable_mask, next_hw_id = 0;
570111e25f0dSDavid C Somayajulu
570211e25f0dSDavid C Somayajulu /* Assign HW IDs according to blocks enable / */
570311e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) {
570411e25f0dSDavid C Somayajulu struct dbg_bus_block_data *block_bus = &bus->blocks[block_id];
570511e25f0dSDavid C Somayajulu
570611e25f0dSDavid C Somayajulu if (!GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK))
570711e25f0dSDavid C Somayajulu continue;
570811e25f0dSDavid C Somayajulu
570911e25f0dSDavid C Somayajulu block_bus->hw_id = next_hw_id++;
571011e25f0dSDavid C Somayajulu if (!block_bus->hw_id)
571111e25f0dSDavid C Somayajulu continue;
571211e25f0dSDavid C Somayajulu
571311e25f0dSDavid C Somayajulu shifted_enable_mask =
571411e25f0dSDavid C Somayajulu SHR(GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK),
571511e25f0dSDavid C Somayajulu VALUES_PER_CYCLE,
571611e25f0dSDavid C Somayajulu GET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_RIGHT_SHIFT));
571711e25f0dSDavid C Somayajulu
571811e25f0dSDavid C Somayajulu for (val_id = 0; val_id < VALUES_PER_CYCLE; val_id++)
571911e25f0dSDavid C Somayajulu if (shifted_enable_mask & (1 << val_id))
572011e25f0dSDavid C Somayajulu hw_ids[val_id] = block_bus->hw_id;
572111e25f0dSDavid C Somayajulu }
572211e25f0dSDavid C Somayajulu }
572311e25f0dSDavid C Somayajulu }
572411e25f0dSDavid C Somayajulu
572511e25f0dSDavid C Somayajulu /* Configure the DBG block HW blocks data */
ecore_config_block_inputs(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)572611e25f0dSDavid C Somayajulu static void ecore_config_block_inputs(struct ecore_hwfn *p_hwfn,
572711e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt)
572811e25f0dSDavid C Somayajulu {
572911e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
573011e25f0dSDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
573111e25f0dSDavid C Somayajulu u8 hw_ids[VALUES_PER_CYCLE];
573211e25f0dSDavid C Somayajulu u8 val_id, state_id;
573311e25f0dSDavid C Somayajulu
573411e25f0dSDavid C Somayajulu ecore_assign_hw_ids(p_hwfn, hw_ids);
573511e25f0dSDavid C Somayajulu
573611e25f0dSDavid C Somayajulu /* Assign a HW ID to each trigger state */
573711e25f0dSDavid C Somayajulu if (dev_data->bus.trigger_en) {
573811e25f0dSDavid C Somayajulu for (state_id = 0; state_id < bus->next_trigger_state; state_id++) {
573911e25f0dSDavid C Somayajulu for (val_id = 0; val_id < VALUES_PER_CYCLE; val_id++) {
574011e25f0dSDavid C Somayajulu u8 state_data = bus->trigger_states[state_id].data;
574111e25f0dSDavid C Somayajulu
574211e25f0dSDavid C Somayajulu if (GET_FIELD(state_data, DBG_BUS_TRIGGER_STATE_DATA_CONSTRAINT_DWORD_MASK) & (1 << val_id)) {
574311e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATE_ID_0 + state_id * BYTES_IN_DWORD, hw_ids[val_id]);
574411e25f0dSDavid C Somayajulu break;
574511e25f0dSDavid C Somayajulu }
574611e25f0dSDavid C Somayajulu }
574711e25f0dSDavid C Somayajulu }
574811e25f0dSDavid C Somayajulu }
574911e25f0dSDavid C Somayajulu
575011e25f0dSDavid C Somayajulu /* Configure HW ID mask */
575111e25f0dSDavid C Somayajulu dev_data->bus.hw_id_mask = 0;
575211e25f0dSDavid C Somayajulu for (val_id = 0; val_id < VALUES_PER_CYCLE; val_id++)
575311e25f0dSDavid C Somayajulu bus->hw_id_mask |= (hw_ids[val_id] << (val_id * HW_ID_BITS));
575411e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_HW_ID_NUM, bus->hw_id_mask);
575511e25f0dSDavid C Somayajulu
575611e25f0dSDavid C Somayajulu /* Configure additional K2 PCIE registers */
575711e25f0dSDavid C Somayajulu if (dev_data->chip_id == CHIP_K2 &&
575811e25f0dSDavid C Somayajulu (GET_FIELD(bus->blocks[BLOCK_PCIE].data, DBG_BUS_BLOCK_DATA_ENABLE_MASK) ||
575911e25f0dSDavid C Somayajulu GET_FIELD(bus->blocks[BLOCK_PHY_PCIE].data, DBG_BUS_BLOCK_DATA_ENABLE_MASK))) {
576011e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, PCIE_REG_DBG_REPEAT_THRESHOLD_COUNT_K2_E5, 1);
576111e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, PCIE_REG_DBG_FW_TRIGGER_ENABLE_K2_E5, 1);
576211e25f0dSDavid C Somayajulu }
576311e25f0dSDavid C Somayajulu }
576411e25f0dSDavid C Somayajulu
ecore_dbg_bus_start(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)576511e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_start(struct ecore_hwfn *p_hwfn,
576611e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt)
576711e25f0dSDavid C Somayajulu {
576811e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
576911e25f0dSDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
577011e25f0dSDavid C Somayajulu enum dbg_bus_filter_types filter_type;
577111e25f0dSDavid C Somayajulu enum dbg_status status;
577211e25f0dSDavid C Somayajulu u32 block_id;
577311e25f0dSDavid C Somayajulu u8 storm_id;
577411e25f0dSDavid C Somayajulu
577511e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_start\n");
577611e25f0dSDavid C Somayajulu
577711e25f0dSDavid C Somayajulu if (bus->state != DBG_BUS_STATE_READY)
577811e25f0dSDavid C Somayajulu return DBG_STATUS_DBG_BLOCK_NOT_RESET;
577911e25f0dSDavid C Somayajulu
578011e25f0dSDavid C Somayajulu /* Check if any input was enabled */
578111e25f0dSDavid C Somayajulu if (!bus->num_enabled_storms &&
578211e25f0dSDavid C Somayajulu !bus->num_enabled_blocks &&
578311e25f0dSDavid C Somayajulu !bus->rcv_from_other_engine)
578411e25f0dSDavid C Somayajulu return DBG_STATUS_NO_INPUT_ENABLED;
578511e25f0dSDavid C Somayajulu
578611e25f0dSDavid C Somayajulu /* Check if too many input types were enabled (storm+dbgmux) */
578711e25f0dSDavid C Somayajulu if (bus->num_enabled_storms && bus->num_enabled_blocks)
578811e25f0dSDavid C Somayajulu return DBG_STATUS_TOO_MANY_INPUTS;
578911e25f0dSDavid C Somayajulu
579011e25f0dSDavid C Somayajulu /* Configure framing mode */
579111e25f0dSDavid C Somayajulu if ((status = ecore_config_dbg_block_framing_mode(p_hwfn, p_ptt)) != DBG_STATUS_OK)
579211e25f0dSDavid C Somayajulu return status;
579311e25f0dSDavid C Somayajulu
579411e25f0dSDavid C Somayajulu /* Configure DBG block for Storm inputs */
579511e25f0dSDavid C Somayajulu if (bus->num_enabled_storms)
579611e25f0dSDavid C Somayajulu if ((status = ecore_config_storm_inputs(p_hwfn, p_ptt)) != DBG_STATUS_OK)
579711e25f0dSDavid C Somayajulu return status;
579811e25f0dSDavid C Somayajulu
579911e25f0dSDavid C Somayajulu /* Configure DBG block for block inputs */
580011e25f0dSDavid C Somayajulu if (bus->num_enabled_blocks)
580111e25f0dSDavid C Somayajulu ecore_config_block_inputs(p_hwfn, p_ptt);
580211e25f0dSDavid C Somayajulu
580311e25f0dSDavid C Somayajulu /* Configure filter type */
580411e25f0dSDavid C Somayajulu if (bus->filter_en) {
580511e25f0dSDavid C Somayajulu if (bus->trigger_en) {
580611e25f0dSDavid C Somayajulu if (bus->filter_pre_trigger)
580711e25f0dSDavid C Somayajulu filter_type = bus->filter_post_trigger ? DBG_BUS_FILTER_TYPE_ON : DBG_BUS_FILTER_TYPE_PRE;
580811e25f0dSDavid C Somayajulu else
580911e25f0dSDavid C Somayajulu filter_type = bus->filter_post_trigger ? DBG_BUS_FILTER_TYPE_POST : DBG_BUS_FILTER_TYPE_OFF;
581011e25f0dSDavid C Somayajulu }
581111e25f0dSDavid C Somayajulu else {
581211e25f0dSDavid C Somayajulu filter_type = DBG_BUS_FILTER_TYPE_ON;
581311e25f0dSDavid C Somayajulu }
581411e25f0dSDavid C Somayajulu }
581511e25f0dSDavid C Somayajulu else {
581611e25f0dSDavid C Somayajulu filter_type = DBG_BUS_FILTER_TYPE_OFF;
581711e25f0dSDavid C Somayajulu }
581811e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_FILTER_ENABLE, filter_type);
581911e25f0dSDavid C Somayajulu
582011e25f0dSDavid C Somayajulu /* Restart timestamp */
582111e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_TIMESTAMP, 0);
582211e25f0dSDavid C Somayajulu
582311e25f0dSDavid C Somayajulu /* Enable debug block */
582411e25f0dSDavid C Somayajulu ecore_bus_enable_dbg_block(p_hwfn, p_ptt, 1);
582511e25f0dSDavid C Somayajulu
582611e25f0dSDavid C Somayajulu /* Configure enabled blocks - must be done before the DBG block is
582711e25f0dSDavid C Somayajulu * enabled.
582811e25f0dSDavid C Somayajulu */
582911e25f0dSDavid C Somayajulu if (dev_data->bus.num_enabled_blocks) {
583011e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) {
583111e25f0dSDavid C Somayajulu if (!GET_FIELD(dev_data->bus.blocks[block_id].data, DBG_BUS_BLOCK_DATA_ENABLE_MASK) || block_id == BLOCK_DBG)
583211e25f0dSDavid C Somayajulu continue;
583311e25f0dSDavid C Somayajulu
583411e25f0dSDavid C Somayajulu ecore_config_dbg_line(p_hwfn, p_ptt, (enum block_id)block_id,
583511e25f0dSDavid C Somayajulu dev_data->bus.blocks[block_id].line_num,
583611e25f0dSDavid C Somayajulu GET_FIELD(dev_data->bus.blocks[block_id].data, DBG_BUS_BLOCK_DATA_ENABLE_MASK),
583711e25f0dSDavid C Somayajulu GET_FIELD(dev_data->bus.blocks[block_id].data, DBG_BUS_BLOCK_DATA_RIGHT_SHIFT),
583811e25f0dSDavid C Somayajulu GET_FIELD(dev_data->bus.blocks[block_id].data, DBG_BUS_BLOCK_DATA_FORCE_VALID_MASK),
583911e25f0dSDavid C Somayajulu GET_FIELD(dev_data->bus.blocks[block_id].data, DBG_BUS_BLOCK_DATA_FORCE_FRAME_MASK));
584011e25f0dSDavid C Somayajulu }
584111e25f0dSDavid C Somayajulu }
584211e25f0dSDavid C Somayajulu
584311e25f0dSDavid C Somayajulu /* Configure client mask */
584411e25f0dSDavid C Somayajulu ecore_config_dbg_block_client_mask(p_hwfn, p_ptt);
584511e25f0dSDavid C Somayajulu
584611e25f0dSDavid C Somayajulu /* Configure enabled Storms - must be done after the DBG block is
584711e25f0dSDavid C Somayajulu * enabled.
584811e25f0dSDavid C Somayajulu */
584911e25f0dSDavid C Somayajulu if (dev_data->bus.num_enabled_storms)
585011e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++)
585111e25f0dSDavid C Somayajulu if (dev_data->bus.storms[storm_id].enabled)
5852217ec208SDavid C Somayajulu ecore_bus_enable_storm(p_hwfn, p_ptt, (enum dbg_storms)storm_id);
585311e25f0dSDavid C Somayajulu
585411e25f0dSDavid C Somayajulu dev_data->bus.state = DBG_BUS_STATE_RECORDING;
585511e25f0dSDavid C Somayajulu
585611e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
585711e25f0dSDavid C Somayajulu }
585811e25f0dSDavid C Somayajulu
ecore_dbg_bus_stop(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)585911e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_stop(struct ecore_hwfn *p_hwfn,
586011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt)
586111e25f0dSDavid C Somayajulu {
586211e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
586311e25f0dSDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
586411e25f0dSDavid C Somayajulu enum dbg_status status = DBG_STATUS_OK;
586511e25f0dSDavid C Somayajulu
586611e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_stop\n");
586711e25f0dSDavid C Somayajulu
586811e25f0dSDavid C Somayajulu if (bus->state != DBG_BUS_STATE_RECORDING)
586911e25f0dSDavid C Somayajulu return DBG_STATUS_RECORDING_NOT_STARTED;
587011e25f0dSDavid C Somayajulu
587111e25f0dSDavid C Somayajulu status = ecore_bus_disable_inputs(p_hwfn, p_ptt, true);
587211e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
587311e25f0dSDavid C Somayajulu return status;
587411e25f0dSDavid C Somayajulu
587511e25f0dSDavid C Somayajulu ecore_wr(p_hwfn, p_ptt, DBG_REG_CPU_TIMEOUT, 1);
587611e25f0dSDavid C Somayajulu
587711e25f0dSDavid C Somayajulu OSAL_MSLEEP(FLUSH_DELAY_MS);
587811e25f0dSDavid C Somayajulu
587911e25f0dSDavid C Somayajulu ecore_bus_enable_dbg_block(p_hwfn, p_ptt, false);
588011e25f0dSDavid C Somayajulu
588111e25f0dSDavid C Somayajulu /* Check if trigger worked */
588211e25f0dSDavid C Somayajulu if (bus->trigger_en) {
588311e25f0dSDavid C Somayajulu u32 trigger_state = ecore_rd(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATUS_CUR_STATE);
588411e25f0dSDavid C Somayajulu
588511e25f0dSDavid C Somayajulu if (trigger_state != MAX_TRIGGER_STATES)
588611e25f0dSDavid C Somayajulu return DBG_STATUS_DATA_DIDNT_TRIGGER;
588711e25f0dSDavid C Somayajulu }
588811e25f0dSDavid C Somayajulu
588911e25f0dSDavid C Somayajulu bus->state = DBG_BUS_STATE_STOPPED;
589011e25f0dSDavid C Somayajulu
589111e25f0dSDavid C Somayajulu return status;
589211e25f0dSDavid C Somayajulu }
589311e25f0dSDavid C Somayajulu
ecore_dbg_bus_get_dump_buf_size(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * buf_size)589411e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_get_dump_buf_size(struct ecore_hwfn *p_hwfn,
589511e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
589611e25f0dSDavid C Somayajulu u32 *buf_size)
589711e25f0dSDavid C Somayajulu {
589811e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
589911e25f0dSDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
590011e25f0dSDavid C Somayajulu enum dbg_status status;
590111e25f0dSDavid C Somayajulu
590211e25f0dSDavid C Somayajulu status = ecore_dbg_dev_init(p_hwfn, p_ptt);
590311e25f0dSDavid C Somayajulu
590411e25f0dSDavid C Somayajulu *buf_size = 0;
590511e25f0dSDavid C Somayajulu
590611e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
590711e25f0dSDavid C Somayajulu return status;
590811e25f0dSDavid C Somayajulu
590911e25f0dSDavid C Somayajulu /* Add dump header */
591011e25f0dSDavid C Somayajulu *buf_size = (u32)ecore_bus_dump_hdr(p_hwfn, p_ptt, OSAL_NULL, false);
591111e25f0dSDavid C Somayajulu
591211e25f0dSDavid C Somayajulu switch (bus->target) {
591311e25f0dSDavid C Somayajulu case DBG_BUS_TARGET_ID_INT_BUF:
591411e25f0dSDavid C Somayajulu *buf_size += INT_BUF_SIZE_IN_DWORDS; break;
591511e25f0dSDavid C Somayajulu case DBG_BUS_TARGET_ID_PCI:
591611e25f0dSDavid C Somayajulu *buf_size += BYTES_TO_DWORDS(bus->pci_buf.size); break;
591711e25f0dSDavid C Somayajulu default:
591811e25f0dSDavid C Somayajulu break;
591911e25f0dSDavid C Somayajulu }
592011e25f0dSDavid C Somayajulu
592111e25f0dSDavid C Somayajulu /* Dump last section */
59229efd0ba7SDavid C Somayajulu *buf_size += ecore_dump_last_section(OSAL_NULL, 0, false);
592311e25f0dSDavid C Somayajulu
592411e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
592511e25f0dSDavid C Somayajulu }
592611e25f0dSDavid C Somayajulu
ecore_dbg_bus_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,u32 buf_size_in_dwords,u32 * num_dumped_dwords)592711e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_bus_dump(struct ecore_hwfn *p_hwfn,
592811e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
592911e25f0dSDavid C Somayajulu u32 *dump_buf,
593011e25f0dSDavid C Somayajulu u32 buf_size_in_dwords,
593111e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
593211e25f0dSDavid C Somayajulu {
593311e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
593411e25f0dSDavid C Somayajulu u32 min_buf_size_in_dwords, block_id, offset = 0;
593511e25f0dSDavid C Somayajulu struct dbg_bus_data *bus = &dev_data->bus;
593611e25f0dSDavid C Somayajulu enum dbg_status status;
593711e25f0dSDavid C Somayajulu u8 storm_id;
593811e25f0dSDavid C Somayajulu
593911e25f0dSDavid C Somayajulu *num_dumped_dwords = 0;
594011e25f0dSDavid C Somayajulu
594111e25f0dSDavid C Somayajulu status = ecore_dbg_bus_get_dump_buf_size(p_hwfn, p_ptt, &min_buf_size_in_dwords);
594211e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
594311e25f0dSDavid C Somayajulu return status;
594411e25f0dSDavid C Somayajulu
594511e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_bus_dump: dump_buf = 0x%p, buf_size_in_dwords = %d\n", dump_buf, buf_size_in_dwords);
594611e25f0dSDavid C Somayajulu
594711e25f0dSDavid C Somayajulu if (bus->state != DBG_BUS_STATE_RECORDING && bus->state != DBG_BUS_STATE_STOPPED)
594811e25f0dSDavid C Somayajulu return DBG_STATUS_RECORDING_NOT_STARTED;
594911e25f0dSDavid C Somayajulu
595011e25f0dSDavid C Somayajulu if (bus->state == DBG_BUS_STATE_RECORDING) {
595111e25f0dSDavid C Somayajulu enum dbg_status stop_state = ecore_dbg_bus_stop(p_hwfn, p_ptt);
595211e25f0dSDavid C Somayajulu if (stop_state != DBG_STATUS_OK)
595311e25f0dSDavid C Somayajulu return stop_state;
595411e25f0dSDavid C Somayajulu }
595511e25f0dSDavid C Somayajulu
595611e25f0dSDavid C Somayajulu if (buf_size_in_dwords < min_buf_size_in_dwords)
595711e25f0dSDavid C Somayajulu return DBG_STATUS_DUMP_BUF_TOO_SMALL;
595811e25f0dSDavid C Somayajulu
595911e25f0dSDavid C Somayajulu if (bus->target == DBG_BUS_TARGET_ID_PCI && !bus->pci_buf.size)
596011e25f0dSDavid C Somayajulu return DBG_STATUS_PCI_BUF_NOT_ALLOCATED;
596111e25f0dSDavid C Somayajulu
596211e25f0dSDavid C Somayajulu /* Dump header */
596311e25f0dSDavid C Somayajulu offset += ecore_bus_dump_hdr(p_hwfn, p_ptt, dump_buf + offset, true);
596411e25f0dSDavid C Somayajulu
596511e25f0dSDavid C Somayajulu /* Dump recorded data */
596611e25f0dSDavid C Somayajulu if (bus->target != DBG_BUS_TARGET_ID_NIG) {
596711e25f0dSDavid C Somayajulu u32 recorded_dwords = ecore_bus_dump_data(p_hwfn, p_ptt, dump_buf + offset, true);
596811e25f0dSDavid C Somayajulu
596911e25f0dSDavid C Somayajulu if (!recorded_dwords)
597011e25f0dSDavid C Somayajulu return DBG_STATUS_NO_DATA_RECORDED;
597111e25f0dSDavid C Somayajulu if (recorded_dwords % CHUNK_SIZE_IN_DWORDS)
597211e25f0dSDavid C Somayajulu return DBG_STATUS_DUMP_NOT_CHUNK_ALIGNED;
597311e25f0dSDavid C Somayajulu offset += recorded_dwords;
597411e25f0dSDavid C Somayajulu }
597511e25f0dSDavid C Somayajulu
597611e25f0dSDavid C Somayajulu /* Dump last section */
59779efd0ba7SDavid C Somayajulu offset += ecore_dump_last_section(dump_buf, offset, true);
597811e25f0dSDavid C Somayajulu
597911e25f0dSDavid C Somayajulu /* If recorded to PCI buffer - free the buffer */
598011e25f0dSDavid C Somayajulu ecore_bus_free_pci_buf(p_hwfn);
598111e25f0dSDavid C Somayajulu
598211e25f0dSDavid C Somayajulu /* Clear debug bus parameters */
598311e25f0dSDavid C Somayajulu bus->state = DBG_BUS_STATE_IDLE;
598411e25f0dSDavid C Somayajulu bus->num_enabled_blocks = 0;
598511e25f0dSDavid C Somayajulu bus->num_enabled_storms = 0;
598611e25f0dSDavid C Somayajulu bus->filter_en = bus->trigger_en = 0;
598711e25f0dSDavid C Somayajulu
598811e25f0dSDavid C Somayajulu for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++)
598911e25f0dSDavid C Somayajulu SET_FIELD(bus->blocks[BLOCK_PCIE].data, DBG_BUS_BLOCK_DATA_ENABLE_MASK, 0);
599011e25f0dSDavid C Somayajulu
599111e25f0dSDavid C Somayajulu for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) {
599211e25f0dSDavid C Somayajulu struct dbg_bus_storm_data *storm_bus = &bus->storms[storm_id];
599311e25f0dSDavid C Somayajulu
599411e25f0dSDavid C Somayajulu storm_bus->enabled = false;
599511e25f0dSDavid C Somayajulu storm_bus->eid_filter_en = storm_bus->cid_filter_en = 0;
599611e25f0dSDavid C Somayajulu }
599711e25f0dSDavid C Somayajulu
599811e25f0dSDavid C Somayajulu *num_dumped_dwords = offset;
599911e25f0dSDavid C Somayajulu
600011e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
600111e25f0dSDavid C Somayajulu }
600211e25f0dSDavid C Somayajulu
ecore_dbg_grc_config(struct ecore_hwfn * p_hwfn,enum dbg_grc_params grc_param,u32 val)600311e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_grc_config(struct ecore_hwfn *p_hwfn,
600411e25f0dSDavid C Somayajulu enum dbg_grc_params grc_param,
600511e25f0dSDavid C Somayajulu u32 val)
600611e25f0dSDavid C Somayajulu {
600711e25f0dSDavid C Somayajulu int i;
600811e25f0dSDavid C Somayajulu
600911e25f0dSDavid C Somayajulu DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_grc_config: paramId = %d, val = %d\n", grc_param, val);
601011e25f0dSDavid C Somayajulu
601111e25f0dSDavid C Somayajulu /* Initializes the GRC parameters (if not initialized). Needed in order
601211e25f0dSDavid C Somayajulu * to set the default parameter values for the first time.
601311e25f0dSDavid C Somayajulu */
601411e25f0dSDavid C Somayajulu ecore_dbg_grc_init_params(p_hwfn);
601511e25f0dSDavid C Somayajulu
601611e25f0dSDavid C Somayajulu if (grc_param >= MAX_DBG_GRC_PARAMS)
601711e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
601811e25f0dSDavid C Somayajulu if (val < s_grc_param_defs[grc_param].min ||
601911e25f0dSDavid C Somayajulu val > s_grc_param_defs[grc_param].max)
602011e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
602111e25f0dSDavid C Somayajulu
602211e25f0dSDavid C Somayajulu if (s_grc_param_defs[grc_param].is_preset) {
602311e25f0dSDavid C Somayajulu /* Preset param */
602411e25f0dSDavid C Somayajulu
602511e25f0dSDavid C Somayajulu /* Disabling a preset is not allowed. Call
602611e25f0dSDavid C Somayajulu * dbg_grc_set_params_default instead.
602711e25f0dSDavid C Somayajulu */
602811e25f0dSDavid C Somayajulu if (!val)
602911e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
603011e25f0dSDavid C Somayajulu
603111e25f0dSDavid C Somayajulu /* Update all params with the preset values */
603211e25f0dSDavid C Somayajulu for (i = 0; i < MAX_DBG_GRC_PARAMS; i++) {
603311e25f0dSDavid C Somayajulu u32 preset_val;
603411e25f0dSDavid C Somayajulu
603511e25f0dSDavid C Somayajulu if (grc_param == DBG_GRC_PARAM_EXCLUDE_ALL)
603611e25f0dSDavid C Somayajulu preset_val = s_grc_param_defs[i].exclude_all_preset_val;
603711e25f0dSDavid C Somayajulu else if (grc_param == DBG_GRC_PARAM_CRASH)
603811e25f0dSDavid C Somayajulu preset_val = s_grc_param_defs[i].crash_preset_val;
603911e25f0dSDavid C Somayajulu else
604011e25f0dSDavid C Somayajulu return DBG_STATUS_INVALID_ARGS;
604111e25f0dSDavid C Somayajulu
604211e25f0dSDavid C Somayajulu ecore_grc_set_param(p_hwfn, (enum dbg_grc_params)i, preset_val);
604311e25f0dSDavid C Somayajulu }
604411e25f0dSDavid C Somayajulu }
604511e25f0dSDavid C Somayajulu else {
604611e25f0dSDavid C Somayajulu /* Regular param - set its value */
604711e25f0dSDavid C Somayajulu ecore_grc_set_param(p_hwfn, grc_param, val);
604811e25f0dSDavid C Somayajulu }
604911e25f0dSDavid C Somayajulu
605011e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
605111e25f0dSDavid C Somayajulu }
605211e25f0dSDavid C Somayajulu
605311e25f0dSDavid C Somayajulu /* Assign default GRC param values */
ecore_dbg_grc_set_params_default(struct ecore_hwfn * p_hwfn)605411e25f0dSDavid C Somayajulu void ecore_dbg_grc_set_params_default(struct ecore_hwfn *p_hwfn)
605511e25f0dSDavid C Somayajulu {
605611e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
605711e25f0dSDavid C Somayajulu u32 i;
605811e25f0dSDavid C Somayajulu
605911e25f0dSDavid C Somayajulu for (i = 0; i < MAX_DBG_GRC_PARAMS; i++)
606011e25f0dSDavid C Somayajulu dev_data->grc.param_val[i] = s_grc_param_defs[i].default_val[dev_data->chip_id];
606111e25f0dSDavid C Somayajulu }
606211e25f0dSDavid C Somayajulu
ecore_dbg_grc_get_dump_buf_size(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * buf_size)606311e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_grc_get_dump_buf_size(struct ecore_hwfn *p_hwfn,
606411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
606511e25f0dSDavid C Somayajulu u32 *buf_size)
606611e25f0dSDavid C Somayajulu {
606711e25f0dSDavid C Somayajulu enum dbg_status status = ecore_dbg_dev_init(p_hwfn, p_ptt);
606811e25f0dSDavid C Somayajulu
606911e25f0dSDavid C Somayajulu *buf_size = 0;
607011e25f0dSDavid C Somayajulu
607111e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
607211e25f0dSDavid C Somayajulu return status;
607311e25f0dSDavid C Somayajulu
607411e25f0dSDavid C Somayajulu if (!s_dbg_arrays[BIN_BUF_DBG_MODE_TREE].ptr || !s_dbg_arrays[BIN_BUF_DBG_DUMP_REG].ptr || !s_dbg_arrays[BIN_BUF_DBG_DUMP_MEM].ptr ||
607511e25f0dSDavid C Somayajulu !s_dbg_arrays[BIN_BUF_DBG_ATTN_BLOCKS].ptr || !s_dbg_arrays[BIN_BUF_DBG_ATTN_REGS].ptr)
607611e25f0dSDavid C Somayajulu return DBG_STATUS_DBG_ARRAY_NOT_SET;
607711e25f0dSDavid C Somayajulu
607811e25f0dSDavid C Somayajulu return ecore_grc_dump(p_hwfn, p_ptt, OSAL_NULL, false, buf_size);
607911e25f0dSDavid C Somayajulu }
608011e25f0dSDavid C Somayajulu
ecore_dbg_grc_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,u32 buf_size_in_dwords,u32 * num_dumped_dwords)608111e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_grc_dump(struct ecore_hwfn *p_hwfn,
608211e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
608311e25f0dSDavid C Somayajulu u32 *dump_buf,
608411e25f0dSDavid C Somayajulu u32 buf_size_in_dwords,
608511e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
608611e25f0dSDavid C Somayajulu {
608711e25f0dSDavid C Somayajulu u32 needed_buf_size_in_dwords;
608811e25f0dSDavid C Somayajulu enum dbg_status status;
608911e25f0dSDavid C Somayajulu
609011e25f0dSDavid C Somayajulu *num_dumped_dwords = 0;
609111e25f0dSDavid C Somayajulu
609211e25f0dSDavid C Somayajulu status = ecore_dbg_grc_get_dump_buf_size(p_hwfn, p_ptt, &needed_buf_size_in_dwords);
609311e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
609411e25f0dSDavid C Somayajulu return status;
609511e25f0dSDavid C Somayajulu
609611e25f0dSDavid C Somayajulu if (buf_size_in_dwords < needed_buf_size_in_dwords)
609711e25f0dSDavid C Somayajulu return DBG_STATUS_DUMP_BUF_TOO_SMALL;
609811e25f0dSDavid C Somayajulu
609911e25f0dSDavid C Somayajulu /* Doesn't do anything, needed for compile time asserts */
610011e25f0dSDavid C Somayajulu ecore_static_asserts();
610111e25f0dSDavid C Somayajulu
610211e25f0dSDavid C Somayajulu /* GRC Dump */
610311e25f0dSDavid C Somayajulu status = ecore_grc_dump(p_hwfn, p_ptt, dump_buf, true, num_dumped_dwords);
610411e25f0dSDavid C Somayajulu
610511e25f0dSDavid C Somayajulu /* Reveret GRC params to their default */
610611e25f0dSDavid C Somayajulu ecore_dbg_grc_set_params_default(p_hwfn);
610711e25f0dSDavid C Somayajulu
610811e25f0dSDavid C Somayajulu return status;
610911e25f0dSDavid C Somayajulu }
611011e25f0dSDavid C Somayajulu
ecore_dbg_idle_chk_get_dump_buf_size(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * buf_size)611111e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_idle_chk_get_dump_buf_size(struct ecore_hwfn *p_hwfn,
611211e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
611311e25f0dSDavid C Somayajulu u32 *buf_size)
611411e25f0dSDavid C Somayajulu {
611511e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
611611e25f0dSDavid C Somayajulu struct idle_chk_data *idle_chk = &dev_data->idle_chk;
611711e25f0dSDavid C Somayajulu enum dbg_status status;
611811e25f0dSDavid C Somayajulu
611911e25f0dSDavid C Somayajulu *buf_size = 0;
612011e25f0dSDavid C Somayajulu
612111e25f0dSDavid C Somayajulu status = ecore_dbg_dev_init(p_hwfn, p_ptt);
612211e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
612311e25f0dSDavid C Somayajulu return status;
612411e25f0dSDavid C Somayajulu
612511e25f0dSDavid C Somayajulu if (!s_dbg_arrays[BIN_BUF_DBG_MODE_TREE].ptr || !s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_REGS].ptr ||
612611e25f0dSDavid C Somayajulu !s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_IMMS].ptr || !s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_RULES].ptr)
612711e25f0dSDavid C Somayajulu return DBG_STATUS_DBG_ARRAY_NOT_SET;
612811e25f0dSDavid C Somayajulu
612911e25f0dSDavid C Somayajulu if (!idle_chk->buf_size_set) {
613011e25f0dSDavid C Somayajulu idle_chk->buf_size = ecore_idle_chk_dump(p_hwfn, p_ptt, OSAL_NULL, false);
613111e25f0dSDavid C Somayajulu idle_chk->buf_size_set = true;
613211e25f0dSDavid C Somayajulu }
613311e25f0dSDavid C Somayajulu
613411e25f0dSDavid C Somayajulu *buf_size = idle_chk->buf_size;
613511e25f0dSDavid C Somayajulu
613611e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
613711e25f0dSDavid C Somayajulu }
613811e25f0dSDavid C Somayajulu
ecore_dbg_idle_chk_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,u32 buf_size_in_dwords,u32 * num_dumped_dwords)613911e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_idle_chk_dump(struct ecore_hwfn *p_hwfn,
614011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
614111e25f0dSDavid C Somayajulu u32 *dump_buf,
614211e25f0dSDavid C Somayajulu u32 buf_size_in_dwords,
614311e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
614411e25f0dSDavid C Somayajulu {
614511e25f0dSDavid C Somayajulu u32 needed_buf_size_in_dwords;
614611e25f0dSDavid C Somayajulu enum dbg_status status;
614711e25f0dSDavid C Somayajulu
614811e25f0dSDavid C Somayajulu *num_dumped_dwords = 0;
614911e25f0dSDavid C Somayajulu
615011e25f0dSDavid C Somayajulu status = ecore_dbg_idle_chk_get_dump_buf_size(p_hwfn, p_ptt, &needed_buf_size_in_dwords);
615111e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
615211e25f0dSDavid C Somayajulu return status;
615311e25f0dSDavid C Somayajulu
615411e25f0dSDavid C Somayajulu if (buf_size_in_dwords < needed_buf_size_in_dwords)
615511e25f0dSDavid C Somayajulu return DBG_STATUS_DUMP_BUF_TOO_SMALL;
615611e25f0dSDavid C Somayajulu
615711e25f0dSDavid C Somayajulu /* Update reset state */
615811e25f0dSDavid C Somayajulu ecore_update_blocks_reset_state(p_hwfn, p_ptt);
615911e25f0dSDavid C Somayajulu
616011e25f0dSDavid C Somayajulu /* Idle Check Dump */
616111e25f0dSDavid C Somayajulu *num_dumped_dwords = ecore_idle_chk_dump(p_hwfn, p_ptt, dump_buf, true);
616211e25f0dSDavid C Somayajulu
616311e25f0dSDavid C Somayajulu /* Reveret GRC params to their default */
616411e25f0dSDavid C Somayajulu ecore_dbg_grc_set_params_default(p_hwfn);
616511e25f0dSDavid C Somayajulu
616611e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
616711e25f0dSDavid C Somayajulu }
616811e25f0dSDavid C Somayajulu
ecore_dbg_mcp_trace_get_dump_buf_size(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * buf_size)616911e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_mcp_trace_get_dump_buf_size(struct ecore_hwfn *p_hwfn,
617011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
617111e25f0dSDavid C Somayajulu u32 *buf_size)
617211e25f0dSDavid C Somayajulu {
617311e25f0dSDavid C Somayajulu enum dbg_status status = ecore_dbg_dev_init(p_hwfn, p_ptt);
617411e25f0dSDavid C Somayajulu
617511e25f0dSDavid C Somayajulu *buf_size = 0;
617611e25f0dSDavid C Somayajulu
617711e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
617811e25f0dSDavid C Somayajulu return status;
617911e25f0dSDavid C Somayajulu
618011e25f0dSDavid C Somayajulu return ecore_mcp_trace_dump(p_hwfn, p_ptt, OSAL_NULL, false, buf_size);
618111e25f0dSDavid C Somayajulu }
618211e25f0dSDavid C Somayajulu
ecore_dbg_mcp_trace_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,u32 buf_size_in_dwords,u32 * num_dumped_dwords)618311e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_mcp_trace_dump(struct ecore_hwfn *p_hwfn,
618411e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
618511e25f0dSDavid C Somayajulu u32 *dump_buf,
618611e25f0dSDavid C Somayajulu u32 buf_size_in_dwords,
618711e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
618811e25f0dSDavid C Somayajulu {
618911e25f0dSDavid C Somayajulu u32 needed_buf_size_in_dwords;
619011e25f0dSDavid C Somayajulu enum dbg_status status;
619111e25f0dSDavid C Somayajulu
619211e25f0dSDavid C Somayajulu status = ecore_dbg_mcp_trace_get_dump_buf_size(p_hwfn, p_ptt, &needed_buf_size_in_dwords);
619311e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK && status != DBG_STATUS_NVRAM_GET_IMAGE_FAILED)
619411e25f0dSDavid C Somayajulu return status;
619511e25f0dSDavid C Somayajulu
619611e25f0dSDavid C Somayajulu if (buf_size_in_dwords < needed_buf_size_in_dwords)
619711e25f0dSDavid C Somayajulu return DBG_STATUS_DUMP_BUF_TOO_SMALL;
619811e25f0dSDavid C Somayajulu
619911e25f0dSDavid C Somayajulu /* Update reset state */
620011e25f0dSDavid C Somayajulu ecore_update_blocks_reset_state(p_hwfn, p_ptt);
620111e25f0dSDavid C Somayajulu
620211e25f0dSDavid C Somayajulu /* Perform dump */
620311e25f0dSDavid C Somayajulu status = ecore_mcp_trace_dump(p_hwfn, p_ptt, dump_buf, true, num_dumped_dwords);
620411e25f0dSDavid C Somayajulu
620511e25f0dSDavid C Somayajulu /* Reveret GRC params to their default */
620611e25f0dSDavid C Somayajulu ecore_dbg_grc_set_params_default(p_hwfn);
620711e25f0dSDavid C Somayajulu
620811e25f0dSDavid C Somayajulu return status;
620911e25f0dSDavid C Somayajulu }
621011e25f0dSDavid C Somayajulu
ecore_dbg_reg_fifo_get_dump_buf_size(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * buf_size)621111e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_reg_fifo_get_dump_buf_size(struct ecore_hwfn *p_hwfn,
621211e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
621311e25f0dSDavid C Somayajulu u32 *buf_size)
621411e25f0dSDavid C Somayajulu {
621511e25f0dSDavid C Somayajulu enum dbg_status status = ecore_dbg_dev_init(p_hwfn, p_ptt);
621611e25f0dSDavid C Somayajulu
621711e25f0dSDavid C Somayajulu *buf_size = 0;
621811e25f0dSDavid C Somayajulu
621911e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
622011e25f0dSDavid C Somayajulu return status;
622111e25f0dSDavid C Somayajulu
622211e25f0dSDavid C Somayajulu return ecore_reg_fifo_dump(p_hwfn, p_ptt, OSAL_NULL, false, buf_size);
622311e25f0dSDavid C Somayajulu }
622411e25f0dSDavid C Somayajulu
ecore_dbg_reg_fifo_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,u32 buf_size_in_dwords,u32 * num_dumped_dwords)622511e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_reg_fifo_dump(struct ecore_hwfn *p_hwfn,
622611e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
622711e25f0dSDavid C Somayajulu u32 *dump_buf,
622811e25f0dSDavid C Somayajulu u32 buf_size_in_dwords,
622911e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
623011e25f0dSDavid C Somayajulu {
623111e25f0dSDavid C Somayajulu u32 needed_buf_size_in_dwords;
623211e25f0dSDavid C Somayajulu enum dbg_status status;
623311e25f0dSDavid C Somayajulu
623411e25f0dSDavid C Somayajulu *num_dumped_dwords = 0;
623511e25f0dSDavid C Somayajulu
623611e25f0dSDavid C Somayajulu status = ecore_dbg_reg_fifo_get_dump_buf_size(p_hwfn, p_ptt, &needed_buf_size_in_dwords);
623711e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
623811e25f0dSDavid C Somayajulu return status;
623911e25f0dSDavid C Somayajulu
624011e25f0dSDavid C Somayajulu if (buf_size_in_dwords < needed_buf_size_in_dwords)
624111e25f0dSDavid C Somayajulu return DBG_STATUS_DUMP_BUF_TOO_SMALL;
624211e25f0dSDavid C Somayajulu
624311e25f0dSDavid C Somayajulu /* Update reset state */
624411e25f0dSDavid C Somayajulu ecore_update_blocks_reset_state(p_hwfn, p_ptt);
624511e25f0dSDavid C Somayajulu
624611e25f0dSDavid C Somayajulu status = ecore_reg_fifo_dump(p_hwfn, p_ptt, dump_buf, true, num_dumped_dwords);
624711e25f0dSDavid C Somayajulu
624811e25f0dSDavid C Somayajulu /* Reveret GRC params to their default */
624911e25f0dSDavid C Somayajulu ecore_dbg_grc_set_params_default(p_hwfn);
625011e25f0dSDavid C Somayajulu
625111e25f0dSDavid C Somayajulu return status;
625211e25f0dSDavid C Somayajulu }
625311e25f0dSDavid C Somayajulu
ecore_dbg_igu_fifo_get_dump_buf_size(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * buf_size)625411e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_igu_fifo_get_dump_buf_size(struct ecore_hwfn *p_hwfn,
625511e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
625611e25f0dSDavid C Somayajulu u32 *buf_size)
625711e25f0dSDavid C Somayajulu {
625811e25f0dSDavid C Somayajulu enum dbg_status status = ecore_dbg_dev_init(p_hwfn, p_ptt);
625911e25f0dSDavid C Somayajulu
626011e25f0dSDavid C Somayajulu *buf_size = 0;
626111e25f0dSDavid C Somayajulu
626211e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
626311e25f0dSDavid C Somayajulu return status;
626411e25f0dSDavid C Somayajulu
626511e25f0dSDavid C Somayajulu return ecore_igu_fifo_dump(p_hwfn, p_ptt, OSAL_NULL, false, buf_size);
626611e25f0dSDavid C Somayajulu }
626711e25f0dSDavid C Somayajulu
ecore_dbg_igu_fifo_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,u32 buf_size_in_dwords,u32 * num_dumped_dwords)626811e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_igu_fifo_dump(struct ecore_hwfn *p_hwfn,
626911e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
627011e25f0dSDavid C Somayajulu u32 *dump_buf,
627111e25f0dSDavid C Somayajulu u32 buf_size_in_dwords,
627211e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
627311e25f0dSDavid C Somayajulu {
627411e25f0dSDavid C Somayajulu u32 needed_buf_size_in_dwords;
627511e25f0dSDavid C Somayajulu enum dbg_status status;
627611e25f0dSDavid C Somayajulu
627711e25f0dSDavid C Somayajulu *num_dumped_dwords = 0;
627811e25f0dSDavid C Somayajulu
627911e25f0dSDavid C Somayajulu status = ecore_dbg_igu_fifo_get_dump_buf_size(p_hwfn, p_ptt, &needed_buf_size_in_dwords);
628011e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
628111e25f0dSDavid C Somayajulu return status;
628211e25f0dSDavid C Somayajulu
628311e25f0dSDavid C Somayajulu if (buf_size_in_dwords < needed_buf_size_in_dwords)
628411e25f0dSDavid C Somayajulu return DBG_STATUS_DUMP_BUF_TOO_SMALL;
628511e25f0dSDavid C Somayajulu
628611e25f0dSDavid C Somayajulu /* Update reset state */
628711e25f0dSDavid C Somayajulu ecore_update_blocks_reset_state(p_hwfn, p_ptt);
628811e25f0dSDavid C Somayajulu
628911e25f0dSDavid C Somayajulu status = ecore_igu_fifo_dump(p_hwfn, p_ptt, dump_buf, true, num_dumped_dwords);
629011e25f0dSDavid C Somayajulu
629111e25f0dSDavid C Somayajulu /* Reveret GRC params to their default */
629211e25f0dSDavid C Somayajulu ecore_dbg_grc_set_params_default(p_hwfn);
629311e25f0dSDavid C Somayajulu
629411e25f0dSDavid C Somayajulu return status;
629511e25f0dSDavid C Somayajulu }
629611e25f0dSDavid C Somayajulu
ecore_dbg_protection_override_get_dump_buf_size(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * buf_size)629711e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_protection_override_get_dump_buf_size(struct ecore_hwfn *p_hwfn,
629811e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
629911e25f0dSDavid C Somayajulu u32 *buf_size)
630011e25f0dSDavid C Somayajulu {
630111e25f0dSDavid C Somayajulu enum dbg_status status = ecore_dbg_dev_init(p_hwfn, p_ptt);
630211e25f0dSDavid C Somayajulu
630311e25f0dSDavid C Somayajulu *buf_size = 0;
630411e25f0dSDavid C Somayajulu
630511e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
630611e25f0dSDavid C Somayajulu return status;
630711e25f0dSDavid C Somayajulu
630811e25f0dSDavid C Somayajulu return ecore_protection_override_dump(p_hwfn, p_ptt, OSAL_NULL, false, buf_size);
630911e25f0dSDavid C Somayajulu }
631011e25f0dSDavid C Somayajulu
ecore_dbg_protection_override_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,u32 buf_size_in_dwords,u32 * num_dumped_dwords)631111e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_protection_override_dump(struct ecore_hwfn *p_hwfn,
631211e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
631311e25f0dSDavid C Somayajulu u32 *dump_buf,
631411e25f0dSDavid C Somayajulu u32 buf_size_in_dwords,
631511e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
631611e25f0dSDavid C Somayajulu {
631711e25f0dSDavid C Somayajulu u32 needed_buf_size_in_dwords;
631811e25f0dSDavid C Somayajulu enum dbg_status status;
631911e25f0dSDavid C Somayajulu
632011e25f0dSDavid C Somayajulu *num_dumped_dwords = 0;
632111e25f0dSDavid C Somayajulu
632211e25f0dSDavid C Somayajulu status = ecore_dbg_protection_override_get_dump_buf_size(p_hwfn, p_ptt, &needed_buf_size_in_dwords);
632311e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
632411e25f0dSDavid C Somayajulu return status;
632511e25f0dSDavid C Somayajulu
632611e25f0dSDavid C Somayajulu if (buf_size_in_dwords < needed_buf_size_in_dwords)
632711e25f0dSDavid C Somayajulu return DBG_STATUS_DUMP_BUF_TOO_SMALL;
632811e25f0dSDavid C Somayajulu
632911e25f0dSDavid C Somayajulu /* Update reset state */
633011e25f0dSDavid C Somayajulu ecore_update_blocks_reset_state(p_hwfn, p_ptt);
633111e25f0dSDavid C Somayajulu
633211e25f0dSDavid C Somayajulu status = ecore_protection_override_dump(p_hwfn, p_ptt, dump_buf, true, num_dumped_dwords);
633311e25f0dSDavid C Somayajulu
633411e25f0dSDavid C Somayajulu /* Reveret GRC params to their default */
633511e25f0dSDavid C Somayajulu ecore_dbg_grc_set_params_default(p_hwfn);
633611e25f0dSDavid C Somayajulu
633711e25f0dSDavid C Somayajulu return status;
633811e25f0dSDavid C Somayajulu }
633911e25f0dSDavid C Somayajulu
ecore_dbg_fw_asserts_get_dump_buf_size(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * buf_size)634011e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_fw_asserts_get_dump_buf_size(struct ecore_hwfn *p_hwfn,
634111e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
634211e25f0dSDavid C Somayajulu u32 *buf_size)
634311e25f0dSDavid C Somayajulu {
634411e25f0dSDavid C Somayajulu enum dbg_status status = ecore_dbg_dev_init(p_hwfn, p_ptt);
634511e25f0dSDavid C Somayajulu
634611e25f0dSDavid C Somayajulu *buf_size = 0;
634711e25f0dSDavid C Somayajulu
634811e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
634911e25f0dSDavid C Somayajulu return status;
635011e25f0dSDavid C Somayajulu
635111e25f0dSDavid C Somayajulu /* Update reset state */
635211e25f0dSDavid C Somayajulu ecore_update_blocks_reset_state(p_hwfn, p_ptt);
635311e25f0dSDavid C Somayajulu
635411e25f0dSDavid C Somayajulu *buf_size = ecore_fw_asserts_dump(p_hwfn, p_ptt, OSAL_NULL, false);
635511e25f0dSDavid C Somayajulu
635611e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
635711e25f0dSDavid C Somayajulu }
635811e25f0dSDavid C Somayajulu
ecore_dbg_fw_asserts_dump(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u32 * dump_buf,u32 buf_size_in_dwords,u32 * num_dumped_dwords)635911e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_fw_asserts_dump(struct ecore_hwfn *p_hwfn,
636011e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
636111e25f0dSDavid C Somayajulu u32 *dump_buf,
636211e25f0dSDavid C Somayajulu u32 buf_size_in_dwords,
636311e25f0dSDavid C Somayajulu u32 *num_dumped_dwords)
636411e25f0dSDavid C Somayajulu {
636511e25f0dSDavid C Somayajulu u32 needed_buf_size_in_dwords;
636611e25f0dSDavid C Somayajulu enum dbg_status status;
636711e25f0dSDavid C Somayajulu
636811e25f0dSDavid C Somayajulu *num_dumped_dwords = 0;
636911e25f0dSDavid C Somayajulu
637011e25f0dSDavid C Somayajulu status = ecore_dbg_fw_asserts_get_dump_buf_size(p_hwfn, p_ptt, &needed_buf_size_in_dwords);
637111e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
637211e25f0dSDavid C Somayajulu return status;
637311e25f0dSDavid C Somayajulu
637411e25f0dSDavid C Somayajulu if (buf_size_in_dwords < needed_buf_size_in_dwords)
637511e25f0dSDavid C Somayajulu return DBG_STATUS_DUMP_BUF_TOO_SMALL;
637611e25f0dSDavid C Somayajulu
637711e25f0dSDavid C Somayajulu *num_dumped_dwords = ecore_fw_asserts_dump(p_hwfn, p_ptt, dump_buf, true);
637811e25f0dSDavid C Somayajulu
637911e25f0dSDavid C Somayajulu /* Reveret GRC params to their default */
638011e25f0dSDavid C Somayajulu ecore_dbg_grc_set_params_default(p_hwfn);
638111e25f0dSDavid C Somayajulu
638211e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
638311e25f0dSDavid C Somayajulu }
638411e25f0dSDavid C Somayajulu
ecore_dbg_read_attn(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum block_id block_id,enum dbg_attn_type attn_type,bool clear_status,struct dbg_attn_block_result * results)638511e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_read_attn(struct ecore_hwfn *p_hwfn,
638611e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
638711e25f0dSDavid C Somayajulu enum block_id block_id,
638811e25f0dSDavid C Somayajulu enum dbg_attn_type attn_type,
638911e25f0dSDavid C Somayajulu bool clear_status,
639011e25f0dSDavid C Somayajulu struct dbg_attn_block_result *results)
639111e25f0dSDavid C Somayajulu {
639211e25f0dSDavid C Somayajulu enum dbg_status status = ecore_dbg_dev_init(p_hwfn, p_ptt);
639311e25f0dSDavid C Somayajulu u8 reg_idx, num_attn_regs, num_result_regs = 0;
639411e25f0dSDavid C Somayajulu const struct dbg_attn_reg *attn_reg_arr;
639511e25f0dSDavid C Somayajulu
639611e25f0dSDavid C Somayajulu if (status != DBG_STATUS_OK)
639711e25f0dSDavid C Somayajulu return status;
639811e25f0dSDavid C Somayajulu
639911e25f0dSDavid C Somayajulu if (!s_dbg_arrays[BIN_BUF_DBG_MODE_TREE].ptr || !s_dbg_arrays[BIN_BUF_DBG_ATTN_BLOCKS].ptr || !s_dbg_arrays[BIN_BUF_DBG_ATTN_REGS].ptr)
640011e25f0dSDavid C Somayajulu return DBG_STATUS_DBG_ARRAY_NOT_SET;
640111e25f0dSDavid C Somayajulu
640211e25f0dSDavid C Somayajulu attn_reg_arr = ecore_get_block_attn_regs(block_id, attn_type, &num_attn_regs);
640311e25f0dSDavid C Somayajulu
640411e25f0dSDavid C Somayajulu for (reg_idx = 0; reg_idx < num_attn_regs; reg_idx++) {
640511e25f0dSDavid C Somayajulu const struct dbg_attn_reg *reg_data = &attn_reg_arr[reg_idx];
640611e25f0dSDavid C Somayajulu struct dbg_attn_reg_result *reg_result;
640711e25f0dSDavid C Somayajulu u32 sts_addr, sts_val;
640811e25f0dSDavid C Somayajulu u16 modes_buf_offset;
640911e25f0dSDavid C Somayajulu bool eval_mode;
641011e25f0dSDavid C Somayajulu
641111e25f0dSDavid C Somayajulu /* Check mode */
641211e25f0dSDavid C Somayajulu eval_mode = GET_FIELD(reg_data->mode.data, DBG_MODE_HDR_EVAL_MODE) > 0;
641311e25f0dSDavid C Somayajulu modes_buf_offset = GET_FIELD(reg_data->mode.data, DBG_MODE_HDR_MODES_BUF_OFFSET);
641411e25f0dSDavid C Somayajulu if (eval_mode && !ecore_is_mode_match(p_hwfn, &modes_buf_offset))
641511e25f0dSDavid C Somayajulu continue;
641611e25f0dSDavid C Somayajulu
641711e25f0dSDavid C Somayajulu /* Mode match - read attention status register */
641811e25f0dSDavid C Somayajulu sts_addr = DWORDS_TO_BYTES(clear_status ? reg_data->sts_clr_address : GET_FIELD(reg_data->data, DBG_ATTN_REG_STS_ADDRESS));
641911e25f0dSDavid C Somayajulu sts_val = ecore_rd(p_hwfn, p_ptt, sts_addr);
642011e25f0dSDavid C Somayajulu if (!sts_val)
642111e25f0dSDavid C Somayajulu continue;
642211e25f0dSDavid C Somayajulu
642311e25f0dSDavid C Somayajulu /* Non-zero attention status - add to results */
642411e25f0dSDavid C Somayajulu reg_result = &results->reg_results[num_result_regs];
642511e25f0dSDavid C Somayajulu SET_FIELD(reg_result->data, DBG_ATTN_REG_RESULT_STS_ADDRESS, sts_addr);
642611e25f0dSDavid C Somayajulu SET_FIELD(reg_result->data, DBG_ATTN_REG_RESULT_NUM_REG_ATTN, GET_FIELD(reg_data->data, DBG_ATTN_REG_NUM_REG_ATTN));
642711e25f0dSDavid C Somayajulu reg_result->block_attn_offset = reg_data->block_attn_offset;
642811e25f0dSDavid C Somayajulu reg_result->sts_val = sts_val;
642911e25f0dSDavid C Somayajulu reg_result->mask_val = ecore_rd(p_hwfn, p_ptt, DWORDS_TO_BYTES(reg_data->mask_address));
643011e25f0dSDavid C Somayajulu num_result_regs++;
643111e25f0dSDavid C Somayajulu }
643211e25f0dSDavid C Somayajulu
643311e25f0dSDavid C Somayajulu results->block_id = (u8)block_id;
643411e25f0dSDavid C Somayajulu results->names_offset = ecore_get_block_attn_data(block_id, attn_type)->names_offset;
643511e25f0dSDavid C Somayajulu SET_FIELD(results->data, DBG_ATTN_BLOCK_RESULT_ATTN_TYPE, attn_type);
643611e25f0dSDavid C Somayajulu SET_FIELD(results->data, DBG_ATTN_BLOCK_RESULT_NUM_REGS, num_result_regs);
643711e25f0dSDavid C Somayajulu
643811e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
643911e25f0dSDavid C Somayajulu }
644011e25f0dSDavid C Somayajulu
ecore_dbg_print_attn(struct ecore_hwfn * p_hwfn,struct dbg_attn_block_result * results)644111e25f0dSDavid C Somayajulu enum dbg_status ecore_dbg_print_attn(struct ecore_hwfn *p_hwfn,
644211e25f0dSDavid C Somayajulu struct dbg_attn_block_result *results)
644311e25f0dSDavid C Somayajulu {
644411e25f0dSDavid C Somayajulu enum dbg_attn_type attn_type;
644511e25f0dSDavid C Somayajulu u8 num_regs, i;
644611e25f0dSDavid C Somayajulu
644711e25f0dSDavid C Somayajulu num_regs = GET_FIELD(results->data, DBG_ATTN_BLOCK_RESULT_NUM_REGS);
644811e25f0dSDavid C Somayajulu attn_type = (enum dbg_attn_type)GET_FIELD(results->data, DBG_ATTN_BLOCK_RESULT_ATTN_TYPE);
644911e25f0dSDavid C Somayajulu
645011e25f0dSDavid C Somayajulu for (i = 0; i < num_regs; i++) {
645111e25f0dSDavid C Somayajulu struct dbg_attn_reg_result *reg_result;
645211e25f0dSDavid C Somayajulu const char *attn_type_str;
645311e25f0dSDavid C Somayajulu u32 sts_addr;
645411e25f0dSDavid C Somayajulu
645511e25f0dSDavid C Somayajulu reg_result = &results->reg_results[i];
645611e25f0dSDavid C Somayajulu attn_type_str = (attn_type == ATTN_TYPE_INTERRUPT ? "interrupt" : "parity");
645711e25f0dSDavid C Somayajulu sts_addr = GET_FIELD(reg_result->data, DBG_ATTN_REG_RESULT_STS_ADDRESS);
645811e25f0dSDavid C Somayajulu DP_NOTICE(p_hwfn, false, "%s: address 0x%08x, status 0x%08x, mask 0x%08x\n", attn_type_str, sts_addr, reg_result->sts_val, reg_result->mask_val);
645911e25f0dSDavid C Somayajulu }
646011e25f0dSDavid C Somayajulu
646111e25f0dSDavid C Somayajulu return DBG_STATUS_OK;
646211e25f0dSDavid C Somayajulu }
646311e25f0dSDavid C Somayajulu
ecore_is_block_in_reset(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum block_id block_id)646411e25f0dSDavid C Somayajulu bool ecore_is_block_in_reset(struct ecore_hwfn *p_hwfn,
646511e25f0dSDavid C Somayajulu struct ecore_ptt *p_ptt,
646611e25f0dSDavid C Somayajulu enum block_id block_id)
646711e25f0dSDavid C Somayajulu {
646811e25f0dSDavid C Somayajulu struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
646911e25f0dSDavid C Somayajulu struct block_defs *block = s_block_defs[block_id];
647011e25f0dSDavid C Somayajulu u32 reset_reg;
647111e25f0dSDavid C Somayajulu
647211e25f0dSDavid C Somayajulu if (!block->has_reset_bit)
647311e25f0dSDavid C Somayajulu return false;
647411e25f0dSDavid C Somayajulu
647511e25f0dSDavid C Somayajulu reset_reg = block->reset_reg;
647611e25f0dSDavid C Somayajulu
647711e25f0dSDavid C Somayajulu return s_reset_regs_defs[reset_reg].exists[dev_data->chip_id] ?
647811e25f0dSDavid C Somayajulu !(ecore_rd(p_hwfn, p_ptt, s_reset_regs_defs[reset_reg].addr) & (1 << block->reset_bit_offset)) : true;
647911e25f0dSDavid C Somayajulu }
6480