xref: /freebsd/sys/dev/qlnx/qlnxe/ecore_dcbx.c (revision 0957b409)
1 /*
2  * Copyright (c) 2017-2018 Cavium, Inc.
3  * All rights reserved.
4  *
5  *  Redistribution and use in source and binary forms, with or without
6  *  modification, are permitted provided that the following conditions
7  *  are met:
8  *
9  *  1. Redistributions of source code must retain the above copyright
10  *     notice, this list of conditions and the following disclaimer.
11  *  2. Redistributions in binary form must reproduce the above copyright
12  *     notice, this list of conditions and the following disclaimer in the
13  *     documentation and/or other materials provided with the distribution.
14  *
15  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  *  POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 /*
29  * File : ecore_dcbx.c
30  */
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include "bcm_osal.h"
35 #include "ecore.h"
36 #include "ecore_sp_commands.h"
37 #include "ecore_dcbx.h"
38 #include "ecore_cxt.h"
39 #include "ecore_gtt_reg_addr.h"
40 #include "ecore_iro.h"
41 #ifdef CONFIG_ECORE_ROCE
42 #include "ecore_rdma.h"
43 #endif
44 #include "ecore_iov_api.h"
45 
46 #define ECORE_DCBX_MAX_MIB_READ_TRY	(100)
47 #define ECORE_ETH_TYPE_DEFAULT		(0)
48 #define ECORE_ETH_TYPE_ROCE		(0x8915)
49 #define ECORE_UDP_PORT_TYPE_ROCE_V2	(0x12B7)
50 #define ECORE_ETH_TYPE_FCOE		(0x8906)
51 #define ECORE_TCP_PORT_ISCSI		(0xCBC)
52 
53 #define ECORE_DCBX_INVALID_PRIORITY	0xFF
54 
55 /* Get Traffic Class from priority traffic class table, 4 bits represent
56  * the traffic class corresponding to the priority.
57  */
58 #define ECORE_DCBX_PRIO2TC(prio_tc_tbl, prio) \
59 		((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
60 
61 static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap)
62 {
63 	return !!(GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF) ==
64 		  DCBX_APP_SF_ETHTYPE);
65 }
66 
67 static bool ecore_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
68 {
69 	u8 mfw_val = GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
70 
71 	/* Old MFW */
72 	if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
73 		return ecore_dcbx_app_ethtype(app_info_bitmap);
74 
75 	return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE);
76 }
77 
78 static bool ecore_dcbx_app_port(u32 app_info_bitmap)
79 {
80 	return !!(GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF) ==
81 		  DCBX_APP_SF_PORT);
82 }
83 
84 static bool ecore_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
85 {
86 	u8 mfw_val = GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
87 
88 	/* Old MFW */
89 	if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
90 		return ecore_dcbx_app_port(app_info_bitmap);
91 
92 	return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT);
93 }
94 
95 static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
96 {
97 	bool ethtype;
98 
99 	if (ieee)
100 		ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
101 	else
102 		ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
103 
104 	return !!(ethtype && (proto_id == ECORE_ETH_TYPE_DEFAULT));
105 }
106 
107 static bool ecore_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
108 {
109 	bool port;
110 
111 	if (ieee)
112 		port = ecore_dcbx_ieee_app_port(app_info_bitmap,
113 						DCBX_APP_SF_IEEE_TCP_PORT);
114 	else
115 		port = ecore_dcbx_app_port(app_info_bitmap);
116 
117 	return !!(port && (proto_id == ECORE_TCP_PORT_ISCSI));
118 }
119 
120 static bool ecore_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
121 {
122 	bool ethtype;
123 
124 	if (ieee)
125 		ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
126 	else
127 		ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
128 
129 	return !!(ethtype && (proto_id == ECORE_ETH_TYPE_FCOE));
130 }
131 
132 static bool ecore_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
133 {
134 	bool ethtype;
135 
136 	if (ieee)
137 		ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
138 	else
139 		ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
140 
141 	return !!(ethtype && (proto_id == ECORE_ETH_TYPE_ROCE));
142 }
143 
144 static bool ecore_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
145 {
146 	bool port;
147 
148 	if (ieee)
149 		port = ecore_dcbx_ieee_app_port(app_info_bitmap,
150 						DCBX_APP_SF_IEEE_UDP_PORT);
151 	else
152 		port = ecore_dcbx_app_port(app_info_bitmap);
153 
154 	return !!(port && (proto_id == ECORE_UDP_PORT_TYPE_ROCE_V2));
155 }
156 
157 static bool ecore_dcbx_iwarp_tlv(struct ecore_hwfn *p_hwfn, u32 app_info_bitmap,
158 				 u16 proto_id, bool ieee)
159 {
160 	bool port;
161 
162 	if (!p_hwfn->p_dcbx_info->iwarp_port)
163 		return false;
164 
165 	if (ieee)
166 		port = ecore_dcbx_ieee_app_port(app_info_bitmap,
167 						DCBX_APP_SF_IEEE_TCP_PORT);
168 	else
169 		port = ecore_dcbx_app_port(app_info_bitmap);
170 
171 	return !!(port && (proto_id == p_hwfn->p_dcbx_info->iwarp_port));
172 }
173 
174 static void
175 ecore_dcbx_dp_protocol(struct ecore_hwfn *p_hwfn,
176 		       struct ecore_dcbx_results *p_data)
177 {
178 	enum dcbx_protocol_type id;
179 	int i;
180 
181 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "DCBX negotiated: %d\n",
182 		   p_data->dcbx_enabled);
183 
184 	for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
185 		id = ecore_dcbx_app_update[i].id;
186 
187 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
188 			   "%s info: update %d, enable %d, prio %d, tc %d, num_active_tc %d dscp_enable = %d dscp_val = %d\n",
189 			   ecore_dcbx_app_update[i].name, p_data->arr[id].update,
190 			   p_data->arr[id].enable, p_data->arr[id].priority,
191 			   p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc,
192 			   p_data->arr[id].dscp_enable,
193 			   p_data->arr[id].dscp_val);
194 	}
195 }
196 
197 u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 pri)
198 {
199 	struct ecore_dcbx_dscp_params *dscp = &p_hwfn->p_dcbx_info->get.dscp;
200 	u8 i;
201 
202 	if (!dscp->enabled)
203 		return ECORE_DCBX_DSCP_DISABLED;
204 
205 	for (i = 0; i < ECORE_DCBX_DSCP_SIZE; i++)
206 		if (pri == dscp->dscp_pri_map[i])
207 			return i;
208 
209 	return ECORE_DCBX_DSCP_DISABLED;
210 }
211 
212 static void
213 ecore_dcbx_set_params(struct ecore_dcbx_results *p_data,
214 		      struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
215 		      bool enable, u8 prio, u8 tc,
216 		      enum dcbx_protocol_type type,
217 		      enum ecore_pci_personality personality)
218 {
219 	/* PF update ramrod data */
220 	p_data->arr[type].enable = enable;
221 	p_data->arr[type].priority = prio;
222 	p_data->arr[type].tc = tc;
223 	p_data->arr[type].dscp_val = ecore_dcbx_get_dscp_value(p_hwfn, prio);
224 	if (p_data->arr[type].dscp_val == ECORE_DCBX_DSCP_DISABLED) {
225 		p_data->arr[type].dscp_enable = false;
226 		p_data->arr[type].dscp_val = 0;
227 	} else
228 		p_data->arr[type].dscp_enable = enable;
229 
230 	p_data->arr[type].update = UPDATE_DCB_DSCP;
231 
232 	/* Do not add valn tag 0 when DCB is enabled and port is in UFP mode */
233 	if (OSAL_TEST_BIT(ECORE_MF_UFP_SPECIFIC, &p_hwfn->p_dev->mf_bits))
234 		p_data->arr[type].dont_add_vlan0 = true;
235 
236 	/* QM reconf data */
237 	if (p_hwfn->hw_info.personality == personality)
238 		p_hwfn->hw_info.offload_tc = tc;
239 
240 	/* Configure dcbx vlan priority in doorbell block for roce EDPM */
241 	if (OSAL_TEST_BIT(ECORE_MF_UFP_SPECIFIC, &p_hwfn->p_dev->mf_bits) &&
242 	    (type == DCBX_PROTOCOL_ROCE)) {
243 		ecore_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1);
244 		ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP_BB_K2, prio << 1);
245 	}
246 }
247 
248 /* Update app protocol data and hw_info fields with the TLV info */
249 static void
250 ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data,
251 			   struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
252 			   bool enable, u8 prio, u8 tc,
253 			   enum dcbx_protocol_type type)
254 {
255 	enum ecore_pci_personality personality;
256 	enum dcbx_protocol_type id;
257 	int i;
258 
259 	for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
260 		id = ecore_dcbx_app_update[i].id;
261 
262 		if (type != id)
263 			continue;
264 
265 		personality = ecore_dcbx_app_update[i].personality;
266 
267 		ecore_dcbx_set_params(p_data, p_hwfn, p_ptt, enable,
268 				      prio, tc, type, personality);
269 	}
270 }
271 
272 static enum _ecore_status_t
273 ecore_dcbx_get_app_priority(u8 pri_bitmap, u8 *priority)
274 {
275 	u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES;
276 	u32 index = ECORE_MAX_PFC_PRIORITIES - 1;
277 	enum _ecore_status_t rc = ECORE_SUCCESS;
278 
279 	/* Bitmap 1 corresponds to priority 0, return priority 0 */
280 	if (pri_bitmap == 1) {
281 		*priority = 0;
282 		return rc;
283 	}
284 
285 	/* Choose the highest priority */
286 	while ((ECORE_MAX_PFC_PRIORITIES == pri) && index) {
287 		pri_mask = 1 << index;
288 		if (pri_bitmap & pri_mask)
289 			pri = index;
290 		index--;
291 	}
292 
293 	if (pri < ECORE_MAX_PFC_PRIORITIES)
294 		*priority = (u8)pri;
295 	else
296 		rc = ECORE_INVAL;
297 
298 	return rc;
299 }
300 
301 static bool
302 ecore_dcbx_get_app_protocol_type(struct ecore_hwfn *p_hwfn,
303 				 u32 app_prio_bitmap, u16 id,
304 				 enum dcbx_protocol_type *type, bool ieee)
305 {
306 	if (ecore_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) {
307 		*type = DCBX_PROTOCOL_FCOE;
308 	} else if (ecore_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) {
309 		*type = DCBX_PROTOCOL_ROCE;
310 	} else if (ecore_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) {
311 		*type = DCBX_PROTOCOL_ISCSI;
312 	} else if (ecore_dcbx_default_tlv(app_prio_bitmap, id, ieee)) {
313 		*type = DCBX_PROTOCOL_ETH;
314 	} else if (ecore_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) {
315 		*type = DCBX_PROTOCOL_ROCE_V2;
316 	} else if (ecore_dcbx_iwarp_tlv(p_hwfn, app_prio_bitmap, id, ieee)) {
317 		*type = DCBX_PROTOCOL_IWARP;
318 	} else {
319 		*type = DCBX_MAX_PROTOCOL_TYPE;
320 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
321 			   "No action required, App TLV entry = 0x%x\n",
322 			   app_prio_bitmap);
323 		return false;
324 	}
325 
326 	return true;
327 }
328 
329 /* Parse app TLV's to update TC information in hw_info structure for
330  * reconfiguring QM. Get protocol specific data for PF update ramrod command.
331  */
332 static enum _ecore_status_t
333 ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
334 		       struct ecore_dcbx_results *p_data,
335 		       struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,
336 		       int count, u8 dcbx_version)
337 {
338 	enum dcbx_protocol_type type;
339 	bool enable, ieee, eth_tlv;
340 	u8 tc, priority_map;
341 	u16 protocol_id;
342 	u8 priority;
343 	enum _ecore_status_t rc = ECORE_SUCCESS;
344 	int i;
345 
346 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
347 		   "Num APP entries = %d pri_tc_tbl = 0x%x dcbx_version = %u\n",
348 		   count, pri_tc_tbl, dcbx_version);
349 
350 	ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
351 	eth_tlv = false;
352 	/* Parse APP TLV */
353 	for (i = 0; i < count; i++) {
354 		protocol_id = GET_MFW_FIELD(p_tbl[i].entry,
355 					    DCBX_APP_PROTOCOL_ID);
356 		priority_map = GET_MFW_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
357 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Id = 0x%x pri_map = %u\n",
358 			   protocol_id, priority_map);
359 		rc = ecore_dcbx_get_app_priority(priority_map, &priority);
360 		if (rc == ECORE_INVAL) {
361 			DP_ERR(p_hwfn, "Invalid priority\n");
362 			return ECORE_INVAL;
363 		}
364 
365 		tc = ECORE_DCBX_PRIO2TC(pri_tc_tbl, priority);
366 		if (ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
367 						     protocol_id, &type,
368 						     ieee)) {
369 			/* ETH always have the enable bit reset, as it gets
370 			 * vlan information per packet. For other protocols,
371 			 * should be set according to the dcbx_enabled
372 			 * indication, but we only got here if there was an
373 			 * app tlv for the protocol, so dcbx must be enabled.
374 			 */
375 			if (type == DCBX_PROTOCOL_ETH) {
376 				enable = false;
377 				eth_tlv = true;
378 			} else
379 				enable = true;
380 
381 			ecore_dcbx_update_app_info(p_data, p_hwfn, p_ptt,
382 						   enable, priority, tc, type);
383 		}
384 	}
385 
386 	/* If Eth TLV is not detected, use UFP TC as default TC */
387 	if (OSAL_TEST_BIT(ECORE_MF_UFP_SPECIFIC,
388 			  &p_hwfn->p_dev->mf_bits) && !eth_tlv)
389 		p_data->arr[DCBX_PROTOCOL_ETH].tc = p_hwfn->ufp_info.tc;
390 
391 	/* Update ramrod protocol data and hw_info fields
392 	 * with default info when corresponding APP TLV's are not detected.
393 	 * The enabled field has a different logic for ethernet as only for
394 	 * ethernet dcb should disabled by default, as the information arrives
395 	 * from the OS (unless an explicit app tlv was present).
396 	 */
397 	tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
398 	priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
399 	for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
400 		if (p_data->arr[type].update)
401 			continue;
402 
403 		/* if no app tlv was present, don't override in FW */
404 		ecore_dcbx_update_app_info(p_data, p_hwfn, p_ptt, false,
405 					   priority, tc, type);
406 	}
407 
408 	return ECORE_SUCCESS;
409 }
410 
411 /* Parse app TLV's to update TC information in hw_info structure for
412  * reconfiguring QM. Get protocol specific data for PF update ramrod command.
413  */
414 static enum _ecore_status_t
415 ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
416 {
417 	struct dcbx_app_priority_feature *p_app;
418 	struct dcbx_app_priority_entry *p_tbl;
419 	struct ecore_dcbx_results data = { 0 };
420 	struct dcbx_ets_feature *p_ets;
421 	struct ecore_hw_info *p_info;
422 	u32 pri_tc_tbl, flags;
423 	u8 dcbx_version;
424 	int num_entries;
425 	enum _ecore_status_t rc = ECORE_SUCCESS;
426 
427 	flags = p_hwfn->p_dcbx_info->operational.flags;
428 	dcbx_version = GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION);
429 
430 	p_app = &p_hwfn->p_dcbx_info->operational.features.app;
431 	p_tbl = p_app->app_pri_tbl;
432 
433 	p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
434 	pri_tc_tbl = p_ets->pri_tc_tbl[0];
435 
436 	p_info = &p_hwfn->hw_info;
437 	num_entries = GET_MFW_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
438 
439 	rc = ecore_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl,
440 				    num_entries, dcbx_version);
441 	if (rc != ECORE_SUCCESS)
442 		return rc;
443 
444 	p_info->num_active_tc = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
445 	p_hwfn->qm_info.ooo_tc = GET_MFW_FIELD(p_ets->flags, DCBX_OOO_TC);
446 	data.pf_id = p_hwfn->rel_pf_id;
447 	data.dcbx_enabled = !!dcbx_version;
448 
449 	ecore_dcbx_dp_protocol(p_hwfn, &data);
450 
451 	OSAL_MEMCPY(&p_hwfn->p_dcbx_info->results, &data,
452 		    sizeof(struct ecore_dcbx_results));
453 
454 	return ECORE_SUCCESS;
455 }
456 
457 static enum _ecore_status_t
458 ecore_dcbx_copy_mib(struct ecore_hwfn *p_hwfn,
459 		    struct ecore_ptt *p_ptt,
460 		    struct ecore_dcbx_mib_meta_data *p_data,
461 		    enum ecore_mib_read_type type)
462 {
463 	u32 prefix_seq_num, suffix_seq_num;
464 	int read_count = 0;
465 	enum _ecore_status_t rc = ECORE_SUCCESS;
466 
467 	/* The data is considered to be valid only if both sequence numbers are
468 	 * the same.
469 	 */
470 	do {
471 		if (type == ECORE_DCBX_REMOTE_LLDP_MIB) {
472 			ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
473 					  p_data->addr, p_data->size);
474 			prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
475 			suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
476 		} else if (type == ECORE_DCBX_LLDP_TLVS) {
477 			ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_tlvs,
478 					  p_data->addr, p_data->size);
479 			prefix_seq_num = p_data->lldp_tlvs->prefix_seq_num;
480 			suffix_seq_num = p_data->lldp_tlvs->suffix_seq_num;
481 
482 		} else {
483 			ecore_memcpy_from(p_hwfn, p_ptt, p_data->mib,
484 					  p_data->addr, p_data->size);
485 			prefix_seq_num = p_data->mib->prefix_seq_num;
486 			suffix_seq_num = p_data->mib->suffix_seq_num;
487 		}
488 		read_count++;
489 
490 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
491 			   "mib type = %d, try count = %d prefix seq num  = %d suffix seq num = %d\n",
492 			   type, read_count, prefix_seq_num, suffix_seq_num);
493 	} while ((prefix_seq_num != suffix_seq_num) &&
494 		 (read_count < ECORE_DCBX_MAX_MIB_READ_TRY));
495 
496 	if (read_count >= ECORE_DCBX_MAX_MIB_READ_TRY) {
497 		DP_ERR(p_hwfn,
498 		       "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
499 		       type, read_count, prefix_seq_num, suffix_seq_num);
500 		rc = ECORE_IO;
501 	}
502 
503 	return rc;
504 }
505 
506 static void
507 ecore_dcbx_get_priority_info(struct ecore_hwfn *p_hwfn,
508 			     struct ecore_dcbx_app_prio *p_prio,
509 			     struct ecore_dcbx_results *p_results)
510 {
511 	u8 val;
512 
513 	p_prio->roce = ECORE_DCBX_INVALID_PRIORITY;
514 	p_prio->roce_v2 = ECORE_DCBX_INVALID_PRIORITY;
515 	p_prio->iscsi = ECORE_DCBX_INVALID_PRIORITY;
516 	p_prio->fcoe = ECORE_DCBX_INVALID_PRIORITY;
517 
518 	if (p_results->arr[DCBX_PROTOCOL_ROCE].update &&
519 	    p_results->arr[DCBX_PROTOCOL_ROCE].enable)
520 		p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority;
521 
522 	if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update &&
523 	    p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) {
524 		val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority;
525 		p_prio->roce_v2 = val;
526 	}
527 
528 	if (p_results->arr[DCBX_PROTOCOL_ISCSI].update &&
529 	    p_results->arr[DCBX_PROTOCOL_ISCSI].enable)
530 		p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority;
531 
532 	if (p_results->arr[DCBX_PROTOCOL_FCOE].update &&
533 	    p_results->arr[DCBX_PROTOCOL_FCOE].enable)
534 		p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority;
535 
536 	if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
537 	    p_results->arr[DCBX_PROTOCOL_ETH].enable)
538 		p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
539 
540 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
541 		   "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n",
542 		   p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe,
543 		   p_prio->eth);
544 }
545 
546 static void
547 ecore_dcbx_get_app_data(struct ecore_hwfn *p_hwfn,
548 			struct dcbx_app_priority_feature *p_app,
549 			struct dcbx_app_priority_entry *p_tbl,
550 			struct ecore_dcbx_params *p_params, bool ieee)
551 {
552 	struct ecore_app_entry *entry;
553 	u8 pri_map;
554 	int i;
555 
556 	p_params->app_willing = GET_MFW_FIELD(p_app->flags, DCBX_APP_WILLING);
557 	p_params->app_valid = GET_MFW_FIELD(p_app->flags, DCBX_APP_ENABLED);
558 	p_params->app_error = GET_MFW_FIELD(p_app->flags, DCBX_APP_ERROR);
559 	p_params->num_app_entries = GET_MFW_FIELD(p_app->flags,
560 						  DCBX_APP_NUM_ENTRIES);
561 	for (i = 0; i < p_params->num_app_entries; i++) {
562 		entry = &p_params->app_entry[i];
563 		if (ieee) {
564 			u8 sf_ieee;
565 			u32 val;
566 
567 			sf_ieee = GET_MFW_FIELD(p_tbl[i].entry,
568 						DCBX_APP_SF_IEEE);
569 			switch (sf_ieee) {
570 			case DCBX_APP_SF_IEEE_RESERVED:
571 				/* Old MFW */
572 				val = GET_MFW_FIELD(p_tbl[i].entry,
573 						    DCBX_APP_SF);
574 				entry->sf_ieee = val ?
575 					ECORE_DCBX_SF_IEEE_TCP_UDP_PORT :
576 					ECORE_DCBX_SF_IEEE_ETHTYPE;
577 				break;
578 			case DCBX_APP_SF_IEEE_ETHTYPE:
579 				entry->sf_ieee = ECORE_DCBX_SF_IEEE_ETHTYPE;
580 				break;
581 			case DCBX_APP_SF_IEEE_TCP_PORT:
582 				entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_PORT;
583 				break;
584 			case DCBX_APP_SF_IEEE_UDP_PORT:
585 				entry->sf_ieee = ECORE_DCBX_SF_IEEE_UDP_PORT;
586 				break;
587 			case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
588 				entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_UDP_PORT;
589 				break;
590 			}
591 		} else {
592 			entry->ethtype = !(GET_MFW_FIELD(p_tbl[i].entry,
593 							 DCBX_APP_SF));
594 		}
595 
596 		pri_map = GET_MFW_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
597 		ecore_dcbx_get_app_priority(pri_map, &entry->prio);
598 		entry->proto_id = GET_MFW_FIELD(p_tbl[i].entry,
599 						DCBX_APP_PROTOCOL_ID);
600 		ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
601 						 entry->proto_id,
602 						 &entry->proto_type, ieee);
603 	}
604 
605 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
606 		   "APP params: willing %d, valid %d error = %d\n",
607 		   p_params->app_willing, p_params->app_valid,
608 		   p_params->app_error);
609 }
610 
611 static void
612 ecore_dcbx_get_pfc_data(struct ecore_hwfn *p_hwfn,
613 			u32 pfc, struct ecore_dcbx_params *p_params)
614 {
615 	u8 pfc_map;
616 
617 	p_params->pfc.willing = GET_MFW_FIELD(pfc, DCBX_PFC_WILLING);
618 	p_params->pfc.max_tc = GET_MFW_FIELD(pfc, DCBX_PFC_CAPS);
619 	p_params->pfc.enabled = GET_MFW_FIELD(pfc, DCBX_PFC_ENABLED);
620 	pfc_map = GET_MFW_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
621 	p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
622 	p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
623 	p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
624 	p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
625 	p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
626 	p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
627 	p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
628 	p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
629 
630 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
631 		   "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n",
632 		   p_params->pfc.willing, pfc_map, p_params->pfc.max_tc,
633 		   p_params->pfc.enabled);
634 }
635 
636 static void
637 ecore_dcbx_get_ets_data(struct ecore_hwfn *p_hwfn,
638 			struct dcbx_ets_feature *p_ets,
639 			struct ecore_dcbx_params *p_params)
640 {
641 	u32 bw_map[2], tsa_map[2], pri_map;
642 	int i;
643 
644 	p_params->ets_willing = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_WILLING);
645 	p_params->ets_enabled = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_ENABLED);
646 	p_params->ets_cbs = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_CBS);
647 	p_params->max_ets_tc = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
648 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
649 		   "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n",
650 		   p_params->ets_willing, p_params->ets_enabled,
651 		   p_params->ets_cbs, p_ets->pri_tc_tbl[0],
652 		   p_params->max_ets_tc);
653 	if (p_params->ets_enabled && !p_params->max_ets_tc)
654 	{
655 		p_params->max_ets_tc = ECORE_MAX_PFC_PRIORITIES;
656 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
657 			   "ETS params: max_ets_tc is forced to %d\n",
658 		   p_params->max_ets_tc);
659 	}
660 	/* 8 bit tsa and bw data corresponding to each of the 8 TC's are
661 	 * encoded in a type u32 array of size 2.
662 	 */
663 	bw_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[0]);
664 	bw_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[1]);
665 	tsa_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[0]);
666 	tsa_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[1]);
667 	pri_map = p_ets->pri_tc_tbl[0];
668 	for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
669 		p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
670 		p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
671 		p_params->ets_pri_tc_tbl[i] = ECORE_DCBX_PRIO2TC(pri_map, i);
672 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
673 			   "elem %d  bw_tbl %x tsa_tbl %x\n",
674 			   i, p_params->ets_tc_bw_tbl[i],
675 			   p_params->ets_tc_tsa_tbl[i]);
676 	}
677 }
678 
679 static void
680 ecore_dcbx_get_common_params(struct ecore_hwfn *p_hwfn,
681 			     struct dcbx_app_priority_feature *p_app,
682 			     struct dcbx_app_priority_entry *p_tbl,
683 			     struct dcbx_ets_feature *p_ets,
684 			     u32 pfc, struct ecore_dcbx_params *p_params,
685 			     bool ieee)
686 {
687 	ecore_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
688 	ecore_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
689 	ecore_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
690 }
691 
692 static void
693 ecore_dcbx_get_local_params(struct ecore_hwfn *p_hwfn,
694 			    struct ecore_dcbx_get *params)
695 {
696 	struct dcbx_features *p_feat;
697 
698 	p_feat = &p_hwfn->p_dcbx_info->local_admin.features;
699 	ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
700 				     p_feat->app.app_pri_tbl, &p_feat->ets,
701 				     p_feat->pfc, &params->local.params, false);
702 	params->local.valid = true;
703 }
704 
705 static void
706 ecore_dcbx_get_remote_params(struct ecore_hwfn *p_hwfn,
707 			     struct ecore_dcbx_get *params)
708 {
709 	struct dcbx_features *p_feat;
710 
711 	p_feat = &p_hwfn->p_dcbx_info->remote.features;
712 	ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
713 				     p_feat->app.app_pri_tbl, &p_feat->ets,
714 				     p_feat->pfc, &params->remote.params,
715 				     false);
716 	params->remote.valid = true;
717 }
718 
719 static void  ecore_dcbx_get_dscp_params(struct ecore_hwfn *p_hwfn,
720 					struct ecore_dcbx_get *params)
721 {
722 	struct ecore_dcbx_dscp_params *p_dscp;
723 	struct dcb_dscp_map *p_dscp_map;
724 	int i, j, entry;
725 	u32 pri_map;
726 
727 	p_dscp = &params->dscp;
728 	p_dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
729 	p_dscp->enabled = GET_MFW_FIELD(p_dscp_map->flags, DCB_DSCP_ENABLE);
730 
731 	/* MFW encodes 64 dscp entries into 8 element array of u32 entries,
732 	 * where each entry holds the 4bit priority map for 8 dscp entries.
733 	 */
734 	for (i = 0, entry = 0; i < ECORE_DCBX_DSCP_SIZE / 8; i++) {
735 		pri_map = p_dscp_map->dscp_pri_map[i];
736 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "elem %d pri_map 0x%x\n",
737 			   entry, pri_map);
738 		for (j = 0; j < ECORE_DCBX_DSCP_SIZE / 8; j++, entry++)
739 			p_dscp->dscp_pri_map[entry] = (u32)(pri_map >>
740 							   (j * 4)) & 0xf;
741 	}
742 }
743 
744 static void
745 ecore_dcbx_get_operational_params(struct ecore_hwfn *p_hwfn,
746 				  struct ecore_dcbx_get *params)
747 {
748 	struct ecore_dcbx_operational_params *p_operational;
749 	struct ecore_dcbx_results *p_results;
750 	struct dcbx_features *p_feat;
751 	bool enabled, err;
752 	u32 flags;
753 	bool val;
754 
755 	flags = p_hwfn->p_dcbx_info->operational.flags;
756 
757 	/* If DCBx version is non zero, then negotiation
758 	 * was successfuly performed
759 	 */
760 	p_operational = &params->operational;
761 	enabled = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) !=
762 		     DCBX_CONFIG_VERSION_DISABLED);
763 	if (!enabled) {
764 		p_operational->enabled = enabled;
765 		p_operational->valid = false;
766 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx is disabled\n");
767 		return;
768 	}
769 
770 	p_feat = &p_hwfn->p_dcbx_info->operational.features;
771 	p_results = &p_hwfn->p_dcbx_info->results;
772 
773 	val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
774 		 DCBX_CONFIG_VERSION_IEEE);
775 	p_operational->ieee = val;
776 
777 	val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
778 		 DCBX_CONFIG_VERSION_CEE);
779 	p_operational->cee = val;
780 
781 	val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
782 		 DCBX_CONFIG_VERSION_STATIC);
783 	p_operational->local = val;
784 
785 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
786 		   "Version support: ieee %d, cee %d, static %d\n",
787 		   p_operational->ieee, p_operational->cee,
788 		   p_operational->local);
789 
790 	ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
791 				     p_feat->app.app_pri_tbl, &p_feat->ets,
792 				     p_feat->pfc, &params->operational.params,
793 				     p_operational->ieee);
794 	ecore_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio,
795 				     p_results);
796 	err = GET_MFW_FIELD(p_feat->app.flags, DCBX_APP_ERROR);
797 	p_operational->err = err;
798 	p_operational->enabled = enabled;
799 	p_operational->valid = true;
800 }
801 
802 static void ecore_dcbx_get_local_lldp_params(struct ecore_hwfn *p_hwfn,
803 					     struct ecore_dcbx_get *params)
804 {
805 	struct lldp_config_params_s *p_local;
806 
807 	p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE];
808 
809 	OSAL_MEMCPY(params->lldp_local.local_chassis_id,
810 		    p_local->local_chassis_id,
811 		    sizeof(params->lldp_local.local_chassis_id));
812 	OSAL_MEMCPY(params->lldp_local.local_port_id, p_local->local_port_id,
813 		    sizeof(params->lldp_local.local_port_id));
814 }
815 
816 static void ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn,
817 					      struct ecore_dcbx_get *params)
818 {
819 	struct lldp_status_params_s *p_remote;
820 
821 	p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE];
822 
823 	OSAL_MEMCPY(params->lldp_remote.peer_chassis_id,
824 		    p_remote->peer_chassis_id,
825 		    sizeof(params->lldp_remote.peer_chassis_id));
826 	OSAL_MEMCPY(params->lldp_remote.peer_port_id, p_remote->peer_port_id,
827 		    sizeof(params->lldp_remote.peer_port_id));
828 }
829 
830 static enum _ecore_status_t
831 ecore_dcbx_get_params(struct ecore_hwfn *p_hwfn,
832 		      struct ecore_dcbx_get *p_params,
833 		      enum ecore_mib_read_type type)
834 {
835 	switch (type) {
836 	case ECORE_DCBX_REMOTE_MIB:
837 		ecore_dcbx_get_remote_params(p_hwfn, p_params);
838 		break;
839 	case ECORE_DCBX_LOCAL_MIB:
840 		ecore_dcbx_get_local_params(p_hwfn, p_params);
841 		break;
842 	case ECORE_DCBX_OPERATIONAL_MIB:
843 		ecore_dcbx_get_operational_params(p_hwfn, p_params);
844 		break;
845 	case ECORE_DCBX_REMOTE_LLDP_MIB:
846 		ecore_dcbx_get_remote_lldp_params(p_hwfn, p_params);
847 		break;
848 	case ECORE_DCBX_LOCAL_LLDP_MIB:
849 		ecore_dcbx_get_local_lldp_params(p_hwfn, p_params);
850 		break;
851 	default:
852 		DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
853 		return ECORE_INVAL;
854 	}
855 
856 	return ECORE_SUCCESS;
857 }
858 
859 static enum _ecore_status_t
860 ecore_dcbx_read_local_lldp_mib(struct ecore_hwfn *p_hwfn,
861 			       struct ecore_ptt *p_ptt)
862 {
863 	struct ecore_dcbx_mib_meta_data data;
864 	enum _ecore_status_t rc = ECORE_SUCCESS;
865 
866 	OSAL_MEM_ZERO(&data, sizeof(data));
867 	data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
868 							   lldp_config_params);
869 	data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
870 	data.size = sizeof(struct lldp_config_params_s);
871 	ecore_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
872 
873 	return rc;
874 }
875 
876 static enum _ecore_status_t
877 ecore_dcbx_read_remote_lldp_mib(struct ecore_hwfn *p_hwfn,
878 				struct ecore_ptt *p_ptt,
879 				enum ecore_mib_read_type type)
880 {
881 	struct ecore_dcbx_mib_meta_data data;
882 	enum _ecore_status_t rc = ECORE_SUCCESS;
883 
884 	OSAL_MEM_ZERO(&data, sizeof(data));
885 	data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
886 							   lldp_status_params);
887 	data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
888 	data.size = sizeof(struct lldp_status_params_s);
889 	rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
890 
891 	return rc;
892 }
893 
894 static enum _ecore_status_t
895 ecore_dcbx_read_operational_mib(struct ecore_hwfn *p_hwfn,
896 				struct ecore_ptt *p_ptt,
897 				enum ecore_mib_read_type type)
898 {
899 	struct ecore_dcbx_mib_meta_data data;
900 	enum _ecore_status_t rc = ECORE_SUCCESS;
901 
902 	OSAL_MEM_ZERO(&data, sizeof(data));
903 	data.addr = p_hwfn->mcp_info->port_addr +
904 		    offsetof(struct public_port, operational_dcbx_mib);
905 	data.mib = &p_hwfn->p_dcbx_info->operational;
906 	data.size = sizeof(struct dcbx_mib);
907 	rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
908 
909 	return rc;
910 }
911 
912 static enum _ecore_status_t
913 ecore_dcbx_read_remote_mib(struct ecore_hwfn *p_hwfn,
914 			   struct ecore_ptt *p_ptt,
915 			   enum ecore_mib_read_type type)
916 {
917 	struct ecore_dcbx_mib_meta_data data;
918 	enum _ecore_status_t rc = ECORE_SUCCESS;
919 
920 	OSAL_MEM_ZERO(&data, sizeof(data));
921 	data.addr = p_hwfn->mcp_info->port_addr +
922 		    offsetof(struct public_port, remote_dcbx_mib);
923 	data.mib = &p_hwfn->p_dcbx_info->remote;
924 	data.size = sizeof(struct dcbx_mib);
925 	rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
926 
927 	return rc;
928 }
929 
930 static enum _ecore_status_t
931 ecore_dcbx_read_local_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
932 {
933 	struct ecore_dcbx_mib_meta_data data;
934 	enum _ecore_status_t rc = ECORE_SUCCESS;
935 
936 	OSAL_MEM_ZERO(&data, sizeof(data));
937 	data.addr = p_hwfn->mcp_info->port_addr +
938 			offsetof(struct public_port, local_admin_dcbx_mib);
939 	data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
940 	data.size = sizeof(struct dcbx_local_params);
941 	ecore_memcpy_from(p_hwfn, p_ptt, data.local_admin,
942 			  data.addr, data.size);
943 
944 	return rc;
945 }
946 
947 static void
948 ecore_dcbx_read_dscp_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
949 {
950 	struct ecore_dcbx_mib_meta_data data;
951 
952 	data.addr = p_hwfn->mcp_info->port_addr +
953 			offsetof(struct public_port, dcb_dscp_map);
954 	data.dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
955 	data.size = sizeof(struct dcb_dscp_map);
956 	ecore_memcpy_from(p_hwfn, p_ptt, data.dscp_map, data.addr, data.size);
957 }
958 
959 static enum _ecore_status_t ecore_dcbx_read_mib(struct ecore_hwfn *p_hwfn,
960 						struct ecore_ptt *p_ptt,
961 						enum ecore_mib_read_type type)
962 {
963 	enum _ecore_status_t rc = ECORE_INVAL;
964 
965 	switch (type) {
966 	case ECORE_DCBX_OPERATIONAL_MIB:
967 		ecore_dcbx_read_dscp_mib(p_hwfn, p_ptt);
968 		rc = ecore_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
969 		break;
970 	case ECORE_DCBX_REMOTE_MIB:
971 		rc = ecore_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
972 		break;
973 	case ECORE_DCBX_LOCAL_MIB:
974 		rc = ecore_dcbx_read_local_mib(p_hwfn, p_ptt);
975 		break;
976 	case ECORE_DCBX_REMOTE_LLDP_MIB:
977 		rc = ecore_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
978 		break;
979 	case ECORE_DCBX_LOCAL_LLDP_MIB:
980 		rc = ecore_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
981 		break;
982 	default:
983 		DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
984 	}
985 
986 	return rc;
987 }
988 
989 /*
990  * Read updated MIB.
991  * Reconfigure QM and invoke PF update ramrod command if operational MIB
992  * change is detected.
993  */
994 enum _ecore_status_t
995 ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
996 			    enum ecore_mib_read_type type)
997 {
998 	enum _ecore_status_t rc = ECORE_SUCCESS;
999 
1000 	rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
1001 	if (rc)
1002 		return rc;
1003 
1004 	if (type == ECORE_DCBX_OPERATIONAL_MIB) {
1005 		ecore_dcbx_get_dscp_params(p_hwfn, &p_hwfn->p_dcbx_info->get);
1006 
1007 		rc = ecore_dcbx_process_mib_info(p_hwfn, p_ptt);
1008 		if (!rc) {
1009 			/* reconfigure tcs of QM queues according
1010 			 * to negotiation results
1011 			 */
1012 			ecore_qm_reconf(p_hwfn, p_ptt);
1013 
1014 			/* update storm FW with negotiation results */
1015 			ecore_sp_pf_update_dcbx(p_hwfn);
1016 
1017 #ifdef CONFIG_ECORE_ROCE
1018 			/* for roce PFs, we may want to enable/disable DPM
1019 			 * when DCBx change occurs
1020 			 */
1021 			if (ECORE_IS_ROCE_PERSONALITY(p_hwfn))
1022 				ecore_roce_dpm_dcbx(p_hwfn, p_ptt);
1023 #endif
1024 		}
1025 	}
1026 
1027 	ecore_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type);
1028 
1029 	if (type == ECORE_DCBX_OPERATIONAL_MIB) {
1030 		struct ecore_dcbx_results *p_data;
1031 		u16 val;
1032 
1033 		/* Update the DSCP to TC mapping enable bit if required */
1034 		if (p_hwfn->p_dcbx_info->dscp_nig_update) {
1035 			u8 val = !!p_hwfn->p_dcbx_info->get.dscp.enabled;
1036 			u32 addr = NIG_REG_DSCP_TO_TC_MAP_ENABLE;
1037 
1038 			rc = ecore_all_ppfids_wr(p_hwfn, p_ptt, addr, val);
1039 			if (rc != ECORE_SUCCESS) {
1040 				DP_NOTICE(p_hwfn, false,
1041 					  "Failed to update the DSCP to TC mapping enable bit\n");
1042 				return rc;
1043 			}
1044 
1045 			p_hwfn->p_dcbx_info->dscp_nig_update = false;
1046 		}
1047 
1048 		/* Configure in NIG which protocols support EDPM and should
1049 		 * honor PFC.
1050 		 */
1051 		p_data = &p_hwfn->p_dcbx_info->results;
1052 		val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) |
1053 			(0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc);
1054 		val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT;
1055 		val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN;
1056 		ecore_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val);
1057 	}
1058 
1059 	OSAL_DCBX_AEN(p_hwfn, type);
1060 
1061 	return rc;
1062 }
1063 
1064 enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn)
1065 {
1066 #ifndef __EXTRACT__LINUX__
1067 	OSAL_BUILD_BUG_ON(ECORE_LLDP_CHASSIS_ID_STAT_LEN !=
1068 			  LLDP_CHASSIS_ID_STAT_LEN);
1069 	OSAL_BUILD_BUG_ON(ECORE_LLDP_PORT_ID_STAT_LEN !=
1070 			  LLDP_PORT_ID_STAT_LEN);
1071 	OSAL_BUILD_BUG_ON(ECORE_DCBX_MAX_APP_PROTOCOL !=
1072 			  DCBX_MAX_APP_PROTOCOL);
1073 #endif
1074 
1075 	p_hwfn->p_dcbx_info = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
1076 					  sizeof(*p_hwfn->p_dcbx_info));
1077 	if (!p_hwfn->p_dcbx_info) {
1078 		DP_NOTICE(p_hwfn, false,
1079 			  "Failed to allocate `struct ecore_dcbx_info'");
1080 		return ECORE_NOMEM;
1081 	}
1082 
1083 	p_hwfn->p_dcbx_info->iwarp_port =
1084 		p_hwfn->pf_params.rdma_pf_params.iwarp_port;
1085 
1086 	return ECORE_SUCCESS;
1087 }
1088 
1089 void ecore_dcbx_info_free(struct ecore_hwfn *p_hwfn)
1090 {
1091 	OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_dcbx_info);
1092 	p_hwfn->p_dcbx_info = OSAL_NULL;
1093 }
1094 
1095 static void ecore_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
1096 					    struct ecore_dcbx_results *p_src,
1097 					    enum dcbx_protocol_type type)
1098 {
1099 	p_data->dcb_enable_flag = p_src->arr[type].enable;
1100 	p_data->dcb_priority = p_src->arr[type].priority;
1101 	p_data->dcb_tc = p_src->arr[type].tc;
1102 	p_data->dscp_enable_flag = p_src->arr[type].dscp_enable;
1103 	p_data->dscp_val = p_src->arr[type].dscp_val;
1104 	p_data->dcb_dont_add_vlan0 = p_src->arr[type].dont_add_vlan0;
1105 }
1106 
1107 /* Set pf update ramrod command params */
1108 void ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results *p_src,
1109 				     struct pf_update_ramrod_data *p_dest)
1110 {
1111 	struct protocol_dcb_data *p_dcb_data;
1112 	u8 update_flag;
1113 
1114 	update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update;
1115 	p_dest->update_fcoe_dcb_data_mode = update_flag;
1116 
1117 	update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update;
1118 	p_dest->update_roce_dcb_data_mode = update_flag;
1119 
1120 	update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update;
1121 	p_dest->update_rroce_dcb_data_mode = update_flag;
1122 
1123 	update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update;
1124 	p_dest->update_iscsi_dcb_data_mode = update_flag;
1125 	update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
1126 	p_dest->update_eth_dcb_data_mode = update_flag;
1127 	update_flag = p_src->arr[DCBX_PROTOCOL_IWARP].update;
1128 	p_dest->update_iwarp_dcb_data_mode = update_flag;
1129 
1130 	p_dcb_data = &p_dest->fcoe_dcb_data;
1131 	ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE);
1132 	p_dcb_data = &p_dest->roce_dcb_data;
1133 	ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE);
1134 	p_dcb_data = &p_dest->rroce_dcb_data;
1135 	ecore_dcbx_update_protocol_data(p_dcb_data, p_src,
1136 					DCBX_PROTOCOL_ROCE_V2);
1137 	p_dcb_data = &p_dest->iscsi_dcb_data;
1138 	ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI);
1139 	p_dcb_data = &p_dest->eth_dcb_data;
1140 	ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
1141 	p_dcb_data = &p_dest->iwarp_dcb_data;
1142 	ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_IWARP);
1143 }
1144 
1145 enum _ecore_status_t ecore_dcbx_query_params(struct ecore_hwfn *p_hwfn,
1146 					     struct ecore_dcbx_get *p_get,
1147 					     enum ecore_mib_read_type type)
1148 {
1149 	struct ecore_ptt *p_ptt;
1150 	enum _ecore_status_t rc;
1151 
1152 	if (IS_VF(p_hwfn->p_dev))
1153 		return ECORE_INVAL;
1154 
1155 	p_ptt = ecore_ptt_acquire(p_hwfn);
1156 	if (!p_ptt)
1157 		return ECORE_TIMEOUT;
1158 
1159 	rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
1160 	if (rc != ECORE_SUCCESS)
1161 		goto out;
1162 
1163 	ecore_dcbx_get_dscp_params(p_hwfn, p_get);
1164 
1165 	rc = ecore_dcbx_get_params(p_hwfn, p_get, type);
1166 
1167 out:
1168 	ecore_ptt_release(p_hwfn, p_ptt);
1169 	return rc;
1170 }
1171 
1172 static void
1173 ecore_dcbx_set_pfc_data(struct ecore_hwfn *p_hwfn,
1174 			u32 *pfc, struct ecore_dcbx_params *p_params)
1175 {
1176 	u8 pfc_map = 0;
1177 	int i;
1178 
1179 	*pfc &= ~DCBX_PFC_ERROR_MASK;
1180 
1181 	if (p_params->pfc.willing)
1182 		*pfc |= DCBX_PFC_WILLING_MASK;
1183 	else
1184 		*pfc &= ~DCBX_PFC_WILLING_MASK;
1185 
1186 	if (p_params->pfc.enabled)
1187 		*pfc |= DCBX_PFC_ENABLED_MASK;
1188 	else
1189 		*pfc &= ~DCBX_PFC_ENABLED_MASK;
1190 
1191 	*pfc &= ~DCBX_PFC_CAPS_MASK;
1192 	*pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_OFFSET;
1193 
1194 	for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++)
1195 		if (p_params->pfc.prio[i])
1196 			pfc_map |= (1 << i);
1197 	*pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK;
1198 	*pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_OFFSET);
1199 
1200 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "pfc = 0x%x\n", *pfc);
1201 }
1202 
1203 static void
1204 ecore_dcbx_set_ets_data(struct ecore_hwfn *p_hwfn,
1205 			struct dcbx_ets_feature *p_ets,
1206 			struct ecore_dcbx_params *p_params)
1207 {
1208 	u8 *bw_map, *tsa_map;
1209 	u32 val;
1210 	int i;
1211 
1212 	if (p_params->ets_willing)
1213 		p_ets->flags |= DCBX_ETS_WILLING_MASK;
1214 	else
1215 		p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
1216 
1217 	if (p_params->ets_cbs)
1218 		p_ets->flags |= DCBX_ETS_CBS_MASK;
1219 	else
1220 		p_ets->flags &= ~DCBX_ETS_CBS_MASK;
1221 
1222 	if (p_params->ets_enabled)
1223 		p_ets->flags |= DCBX_ETS_ENABLED_MASK;
1224 	else
1225 		p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
1226 
1227 	p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
1228 	p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_OFFSET;
1229 
1230 	bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
1231 	tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
1232 	p_ets->pri_tc_tbl[0] = 0;
1233 	for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
1234 		bw_map[i] = p_params->ets_tc_bw_tbl[i];
1235 		tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
1236 		/* Copy the priority value to the corresponding 4 bits in the
1237 		 * traffic class table.
1238 		 */
1239 		val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
1240 		p_ets->pri_tc_tbl[0] |= val;
1241 	}
1242 	for (i = 0; i < 2; i++) {
1243 		p_ets->tc_bw_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_bw_tbl[i]);
1244 		p_ets->tc_tsa_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_tsa_tbl[i]);
1245 	}
1246 
1247 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
1248 		   "flags = 0x%x pri_tc = 0x%x tc_bwl[] = {0x%x, 0x%x} tc_tsa = {0x%x, 0x%x}\n",
1249 		   p_ets->flags, p_ets->pri_tc_tbl[0], p_ets->tc_bw_tbl[0],
1250 		   p_ets->tc_bw_tbl[1], p_ets->tc_tsa_tbl[0],
1251 		   p_ets->tc_tsa_tbl[1]);
1252 }
1253 
1254 static void
1255 ecore_dcbx_set_app_data(struct ecore_hwfn *p_hwfn,
1256 			struct dcbx_app_priority_feature *p_app,
1257 			struct ecore_dcbx_params *p_params, bool ieee)
1258 {
1259 	u32 *entry;
1260 	int i;
1261 
1262 	if (p_params->app_willing)
1263 		p_app->flags |= DCBX_APP_WILLING_MASK;
1264 	else
1265 		p_app->flags &= ~DCBX_APP_WILLING_MASK;
1266 
1267 	if (p_params->app_valid)
1268 		p_app->flags |= DCBX_APP_ENABLED_MASK;
1269 	else
1270 		p_app->flags &= ~DCBX_APP_ENABLED_MASK;
1271 
1272 	p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
1273 	p_app->flags |= (u32)p_params->num_app_entries <<
1274 			DCBX_APP_NUM_ENTRIES_OFFSET;
1275 
1276 	for (i = 0; i < p_params->num_app_entries; i++) {
1277 		entry = &p_app->app_pri_tbl[i].entry;
1278 		*entry = 0;
1279 		if (ieee) {
1280 			*entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK);
1281 			switch (p_params->app_entry[i].sf_ieee) {
1282 			case ECORE_DCBX_SF_IEEE_ETHTYPE:
1283 				*entry  |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
1284 					    DCBX_APP_SF_IEEE_OFFSET);
1285 				*entry  |= ((u32)DCBX_APP_SF_ETHTYPE <<
1286 					    DCBX_APP_SF_OFFSET);
1287 				break;
1288 			case ECORE_DCBX_SF_IEEE_TCP_PORT:
1289 				*entry  |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
1290 					    DCBX_APP_SF_IEEE_OFFSET);
1291 				*entry  |= ((u32)DCBX_APP_SF_PORT <<
1292 					    DCBX_APP_SF_OFFSET);
1293 				break;
1294 			case ECORE_DCBX_SF_IEEE_UDP_PORT:
1295 				*entry  |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
1296 					    DCBX_APP_SF_IEEE_OFFSET);
1297 				*entry  |= ((u32)DCBX_APP_SF_PORT <<
1298 					    DCBX_APP_SF_OFFSET);
1299 				break;
1300 			case ECORE_DCBX_SF_IEEE_TCP_UDP_PORT:
1301 				*entry  |= (u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
1302 					    DCBX_APP_SF_IEEE_OFFSET;
1303 				*entry  |= ((u32)DCBX_APP_SF_PORT <<
1304 					    DCBX_APP_SF_OFFSET);
1305 				break;
1306 			}
1307 		} else {
1308 			*entry &= ~DCBX_APP_SF_MASK;
1309 			if (p_params->app_entry[i].ethtype)
1310 				*entry  |= ((u32)DCBX_APP_SF_ETHTYPE <<
1311 					    DCBX_APP_SF_OFFSET);
1312 			else
1313 				*entry  |= ((u32)DCBX_APP_SF_PORT <<
1314 					    DCBX_APP_SF_OFFSET);
1315 		}
1316 		*entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
1317 		*entry |= ((u32)p_params->app_entry[i].proto_id <<
1318 			   DCBX_APP_PROTOCOL_ID_OFFSET);
1319 		*entry &= ~DCBX_APP_PRI_MAP_MASK;
1320 		*entry |= ((u32)(1 << p_params->app_entry[i].prio) <<
1321 			   DCBX_APP_PRI_MAP_OFFSET);
1322 	}
1323 
1324 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_app->flags);
1325 }
1326 
1327 static void
1328 ecore_dcbx_set_local_params(struct ecore_hwfn *p_hwfn,
1329 			    struct dcbx_local_params *local_admin,
1330 			    struct ecore_dcbx_set *params)
1331 {
1332 	bool ieee = false;
1333 
1334 	local_admin->flags = 0;
1335 	OSAL_MEMCPY(&local_admin->features,
1336 		    &p_hwfn->p_dcbx_info->operational.features,
1337 		    sizeof(local_admin->features));
1338 
1339 	if (params->enabled) {
1340 		local_admin->config = params->ver_num;
1341 		ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
1342 	} else
1343 		local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
1344 
1345 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx version = %d\n",
1346 		   local_admin->config);
1347 
1348 	if (params->override_flags & ECORE_DCBX_OVERRIDE_PFC_CFG)
1349 		ecore_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
1350 					&params->config.params);
1351 
1352 	if (params->override_flags & ECORE_DCBX_OVERRIDE_ETS_CFG)
1353 		ecore_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
1354 					&params->config.params);
1355 
1356 	if (params->override_flags & ECORE_DCBX_OVERRIDE_APP_CFG)
1357 		ecore_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
1358 					&params->config.params, ieee);
1359 }
1360 
1361 static enum _ecore_status_t
1362 ecore_dcbx_set_dscp_params(struct ecore_hwfn *p_hwfn,
1363 			   struct dcb_dscp_map *p_dscp_map,
1364 			   struct ecore_dcbx_set *p_params)
1365 {
1366 	int entry, i, j;
1367 	u32 val;
1368 
1369 	OSAL_MEMCPY(p_dscp_map, &p_hwfn->p_dcbx_info->dscp_map,
1370 		    sizeof(*p_dscp_map));
1371 
1372 	p_dscp_map->flags &= ~DCB_DSCP_ENABLE_MASK;
1373 	if (p_params->dscp.enabled)
1374 		p_dscp_map->flags |= DCB_DSCP_ENABLE_MASK;
1375 
1376 	for (i = 0, entry = 0; i < 8; i++) {
1377 		val = 0;
1378 		for (j = 0; j < 8; j++, entry++)
1379 			val |= (((u32)p_params->dscp.dscp_pri_map[entry]) <<
1380 				(j * 4));
1381 
1382 		p_dscp_map->dscp_pri_map[i] = val;
1383 	}
1384 
1385 	p_hwfn->p_dcbx_info->dscp_nig_update = true;
1386 
1387 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_dscp_map->flags);
1388 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
1389 		   "pri_map[] = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
1390 		   p_dscp_map->dscp_pri_map[0], p_dscp_map->dscp_pri_map[1],
1391 		   p_dscp_map->dscp_pri_map[2], p_dscp_map->dscp_pri_map[3],
1392 		   p_dscp_map->dscp_pri_map[4], p_dscp_map->dscp_pri_map[5],
1393 		   p_dscp_map->dscp_pri_map[6], p_dscp_map->dscp_pri_map[7]);
1394 
1395 	return ECORE_SUCCESS;
1396 }
1397 
1398 enum _ecore_status_t ecore_dcbx_config_params(struct ecore_hwfn *p_hwfn,
1399 					      struct ecore_ptt *p_ptt,
1400 					      struct ecore_dcbx_set *params,
1401 					      bool hw_commit)
1402 {
1403 	struct dcbx_local_params local_admin;
1404 	struct ecore_dcbx_mib_meta_data data;
1405 	struct dcb_dscp_map dscp_map;
1406 	u32 resp = 0, param = 0;
1407 	enum _ecore_status_t rc = ECORE_SUCCESS;
1408 
1409 	OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set, params,
1410 		    sizeof(p_hwfn->p_dcbx_info->set));
1411 	if (!hw_commit)
1412 		return ECORE_SUCCESS;
1413 
1414 	OSAL_MEMSET(&local_admin, 0, sizeof(local_admin));
1415 	ecore_dcbx_set_local_params(p_hwfn, &local_admin, params);
1416 
1417 	data.addr = p_hwfn->mcp_info->port_addr +
1418 			offsetof(struct public_port, local_admin_dcbx_mib);
1419 	data.local_admin = &local_admin;
1420 	data.size = sizeof(struct dcbx_local_params);
1421 	ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
1422 
1423 	if (params->override_flags & ECORE_DCBX_OVERRIDE_DSCP_CFG) {
1424 		OSAL_MEMSET(&dscp_map, 0, sizeof(dscp_map));
1425 		ecore_dcbx_set_dscp_params(p_hwfn, &dscp_map, params);
1426 
1427 		data.addr = p_hwfn->mcp_info->port_addr +
1428 				offsetof(struct public_port, dcb_dscp_map);
1429 		data.dscp_map = &dscp_map;
1430 		data.size = sizeof(struct dcb_dscp_map);
1431 		ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.dscp_map,
1432 				data.size);
1433 	}
1434 
1435 	rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
1436 			   1 << DRV_MB_PARAM_LLDP_SEND_OFFSET, &resp, &param);
1437 	if (rc != ECORE_SUCCESS)
1438 		DP_NOTICE(p_hwfn, false,
1439 			  "Failed to send DCBX update request\n");
1440 
1441 	return rc;
1442 }
1443 
1444 enum _ecore_status_t ecore_dcbx_get_config_params(struct ecore_hwfn *p_hwfn,
1445 						  struct ecore_dcbx_set *params)
1446 {
1447 	struct ecore_dcbx_get *dcbx_info;
1448 	enum _ecore_status_t rc;
1449 
1450 	if (p_hwfn->p_dcbx_info->set.config.valid) {
1451 		OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1452 			    sizeof(struct ecore_dcbx_set));
1453 		return ECORE_SUCCESS;
1454 	}
1455 
1456 	dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL,
1457 			       sizeof(*dcbx_info));
1458 	if (!dcbx_info)
1459 		return ECORE_NOMEM;
1460 
1461 	OSAL_MEMSET(dcbx_info, 0, sizeof(*dcbx_info));
1462 	rc = ecore_dcbx_query_params(p_hwfn, dcbx_info,
1463 				     ECORE_DCBX_OPERATIONAL_MIB);
1464 	if (rc) {
1465 		OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1466 		return rc;
1467 	}
1468 	p_hwfn->p_dcbx_info->set.override_flags = 0;
1469 
1470 	p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
1471 	if (dcbx_info->operational.cee)
1472 		p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
1473 	if (dcbx_info->operational.ieee)
1474 		p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
1475 	if (dcbx_info->operational.local)
1476 		p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
1477 
1478 	p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
1479 	OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.dscp,
1480 		    &p_hwfn->p_dcbx_info->get.dscp,
1481 		    sizeof(struct ecore_dcbx_dscp_params));
1482 	OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.config.params,
1483 		    &dcbx_info->operational.params,
1484 		    sizeof(p_hwfn->p_dcbx_info->set.config.params));
1485 	p_hwfn->p_dcbx_info->set.config.valid = true;
1486 
1487 	OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1488 		    sizeof(struct ecore_dcbx_set));
1489 
1490 	OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1491 
1492 	return ECORE_SUCCESS;
1493 }
1494 
1495 enum _ecore_status_t ecore_lldp_register_tlv(struct ecore_hwfn *p_hwfn,
1496 					     struct ecore_ptt *p_ptt,
1497 					     enum ecore_lldp_agent agent,
1498 					     u8 tlv_type)
1499 {
1500 	u32 mb_param = 0, mcp_resp = 0, mcp_param = 0, val = 0;
1501 	enum _ecore_status_t rc = ECORE_SUCCESS;
1502 
1503 	switch (agent) {
1504 	case ECORE_LLDP_NEAREST_BRIDGE:
1505 		val = LLDP_NEAREST_BRIDGE;
1506 		break;
1507 	case ECORE_LLDP_NEAREST_NON_TPMR_BRIDGE:
1508 		val = LLDP_NEAREST_NON_TPMR_BRIDGE;
1509 		break;
1510 	case ECORE_LLDP_NEAREST_CUSTOMER_BRIDGE:
1511 		val = LLDP_NEAREST_CUSTOMER_BRIDGE;
1512 		break;
1513 	default:
1514 		DP_ERR(p_hwfn, "Invalid agent type %d\n", agent);
1515 		return ECORE_INVAL;
1516 	}
1517 
1518 	SET_MFW_FIELD(mb_param, DRV_MB_PARAM_LLDP_AGENT, val);
1519 	SET_MFW_FIELD(mb_param, DRV_MB_PARAM_LLDP_TLV_RX_TYPE, tlv_type);
1520 
1521 	rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_REGISTER_LLDP_TLVS_RX,
1522 			   mb_param, &mcp_resp, &mcp_param);
1523 	if (rc != ECORE_SUCCESS)
1524 		DP_NOTICE(p_hwfn, false, "Failed to register TLV\n");
1525 
1526 	return rc;
1527 }
1528 
1529 enum _ecore_status_t
1530 ecore_lldp_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
1531 {
1532 	struct ecore_dcbx_mib_meta_data data;
1533 	enum _ecore_status_t rc = ECORE_SUCCESS;
1534 	struct lldp_received_tlvs_s tlvs;
1535 	int i;
1536 
1537 	for (i = 0; i < LLDP_MAX_LLDP_AGENTS; i++) {
1538 		OSAL_MEM_ZERO(&data, sizeof(data));
1539 		data.addr = p_hwfn->mcp_info->port_addr +
1540 			    offsetof(struct public_port, lldp_received_tlvs[i]);
1541 		data.lldp_tlvs = &tlvs;
1542 		data.size = sizeof(tlvs);
1543 		rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data,
1544 					 ECORE_DCBX_LLDP_TLVS);
1545 		if (rc != ECORE_SUCCESS) {
1546 			DP_NOTICE(p_hwfn, false, "Failed to read lldp TLVs\n");
1547 			return rc;
1548 		}
1549 
1550 		if (!tlvs.length)
1551 			continue;
1552 
1553 		for (i = 0; i < MAX_TLV_BUFFER; i++)
1554 			tlvs.tlvs_buffer[i] =
1555 				OSAL_CPU_TO_BE32(tlvs.tlvs_buffer[i]);
1556 
1557 		OSAL_LLDP_RX_TLVS(p_hwfn, tlvs.tlvs_buffer, tlvs.length);
1558 	}
1559 
1560 	return rc;
1561 }
1562 
1563 enum _ecore_status_t
1564 ecore_lldp_get_params(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
1565 		      struct ecore_lldp_config_params *p_params)
1566 {
1567 	struct lldp_config_params_s lldp_params;
1568 	u32 addr, val;
1569 	int i;
1570 
1571 	switch (p_params->agent) {
1572 	case ECORE_LLDP_NEAREST_BRIDGE:
1573 		val = LLDP_NEAREST_BRIDGE;
1574 		break;
1575 	case ECORE_LLDP_NEAREST_NON_TPMR_BRIDGE:
1576 		val = LLDP_NEAREST_NON_TPMR_BRIDGE;
1577 		break;
1578 	case ECORE_LLDP_NEAREST_CUSTOMER_BRIDGE:
1579 		val = LLDP_NEAREST_CUSTOMER_BRIDGE;
1580 		break;
1581 	default:
1582 		DP_ERR(p_hwfn, "Invalid agent type %d\n", p_params->agent);
1583 		return ECORE_INVAL;
1584 	}
1585 
1586 	addr = p_hwfn->mcp_info->port_addr +
1587 			offsetof(struct public_port, lldp_config_params[val]);
1588 
1589 	ecore_memcpy_from(p_hwfn, p_ptt, &lldp_params, addr,
1590 			  sizeof(lldp_params));
1591 
1592 	p_params->tx_interval = GET_MFW_FIELD(lldp_params.config,
1593 					      LLDP_CONFIG_TX_INTERVAL);
1594 	p_params->tx_hold = GET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_HOLD);
1595 	p_params->tx_credit = GET_MFW_FIELD(lldp_params.config,
1596 					    LLDP_CONFIG_MAX_CREDIT);
1597 	p_params->rx_enable = GET_MFW_FIELD(lldp_params.config,
1598 					    LLDP_CONFIG_ENABLE_RX);
1599 	p_params->tx_enable = GET_MFW_FIELD(lldp_params.config,
1600 					    LLDP_CONFIG_ENABLE_TX);
1601 
1602 	OSAL_MEMCPY(p_params->chassis_id_tlv, lldp_params.local_chassis_id,
1603 		    sizeof(p_params->chassis_id_tlv));
1604 	for (i = 0; i < ECORE_LLDP_CHASSIS_ID_STAT_LEN; i++)
1605 		p_params->chassis_id_tlv[i] =
1606 				OSAL_BE32_TO_CPU(p_params->chassis_id_tlv[i]);
1607 
1608 	OSAL_MEMCPY(p_params->port_id_tlv, lldp_params.local_port_id,
1609 		    sizeof(p_params->port_id_tlv));
1610 	for (i = 0; i < ECORE_LLDP_PORT_ID_STAT_LEN; i++)
1611 		p_params->port_id_tlv[i] =
1612 				OSAL_BE32_TO_CPU(p_params->port_id_tlv[i]);
1613 
1614 	return ECORE_SUCCESS;
1615 }
1616 
1617 enum _ecore_status_t
1618 ecore_lldp_set_params(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
1619 		      struct ecore_lldp_config_params *p_params)
1620 {
1621 	u32 mb_param = 0, mcp_resp = 0, mcp_param = 0;
1622 	struct lldp_config_params_s lldp_params;
1623 	enum _ecore_status_t rc = ECORE_SUCCESS;
1624 	u32 addr, val;
1625 	int i;
1626 
1627 	switch (p_params->agent) {
1628 	case ECORE_LLDP_NEAREST_BRIDGE:
1629 		val = LLDP_NEAREST_BRIDGE;
1630 		break;
1631 	case ECORE_LLDP_NEAREST_NON_TPMR_BRIDGE:
1632 		val = LLDP_NEAREST_NON_TPMR_BRIDGE;
1633 		break;
1634 	case ECORE_LLDP_NEAREST_CUSTOMER_BRIDGE:
1635 		val = LLDP_NEAREST_CUSTOMER_BRIDGE;
1636 		break;
1637 	default:
1638 		DP_ERR(p_hwfn, "Invalid agent type %d\n", p_params->agent);
1639 		return ECORE_INVAL;
1640 	}
1641 
1642 	SET_MFW_FIELD(mb_param, DRV_MB_PARAM_LLDP_AGENT, val);
1643 	addr = p_hwfn->mcp_info->port_addr +
1644 			offsetof(struct public_port, lldp_config_params[val]);
1645 
1646 	OSAL_MEMSET(&lldp_params, 0, sizeof(lldp_params));
1647 	SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_TX_INTERVAL,
1648 		      p_params->tx_interval);
1649 	SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_HOLD, p_params->tx_hold);
1650 	SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_MAX_CREDIT,
1651 		      p_params->tx_credit);
1652 	SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_ENABLE_RX,
1653 		      !!p_params->rx_enable);
1654 	SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_ENABLE_TX,
1655 		      !!p_params->tx_enable);
1656 
1657 	for (i = 0; i < ECORE_LLDP_CHASSIS_ID_STAT_LEN; i++)
1658 		p_params->chassis_id_tlv[i] =
1659 				OSAL_CPU_TO_BE32(p_params->chassis_id_tlv[i]);
1660 	OSAL_MEMCPY(lldp_params.local_chassis_id, p_params->chassis_id_tlv,
1661 		    sizeof(lldp_params.local_chassis_id));
1662 
1663 	for (i = 0; i < ECORE_LLDP_PORT_ID_STAT_LEN; i++)
1664 		p_params->port_id_tlv[i] =
1665 				OSAL_CPU_TO_BE32(p_params->port_id_tlv[i]);
1666 	OSAL_MEMCPY(lldp_params.local_port_id, p_params->port_id_tlv,
1667 		    sizeof(lldp_params.local_port_id));
1668 
1669 	ecore_memcpy_to(p_hwfn, p_ptt, addr, &lldp_params, sizeof(lldp_params));
1670 
1671 	rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_LLDP,
1672 			   mb_param, &mcp_resp, &mcp_param);
1673 	if (rc != ECORE_SUCCESS)
1674 		DP_NOTICE(p_hwfn, false, "SET_LLDP failed, error = %d\n", rc);
1675 
1676 	return rc;
1677 }
1678 
1679 enum _ecore_status_t
1680 ecore_lldp_set_system_tlvs(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
1681 			   struct ecore_lldp_sys_tlvs *p_params)
1682 {
1683 	u32 mb_param = 0, mcp_resp = 0, mcp_param = 0;
1684 	enum _ecore_status_t rc = ECORE_SUCCESS;
1685 	struct lldp_system_tlvs_buffer_s lld_tlv_buf;
1686 	u32 addr, *p_val;
1687 	u8 len;
1688 	int i;
1689 
1690 	p_val = (u32 *)p_params->buf;
1691 	for (i = 0; i < ECORE_LLDP_SYS_TLV_SIZE / 4; i++)
1692 		p_val[i] = OSAL_CPU_TO_BE32(p_val[i]);
1693 
1694 	OSAL_MEMSET(&lld_tlv_buf, 0, sizeof(lld_tlv_buf));
1695 	SET_MFW_FIELD(lld_tlv_buf.flags, LLDP_SYSTEM_TLV_VALID, 1);
1696 	SET_MFW_FIELD(lld_tlv_buf.flags, LLDP_SYSTEM_TLV_MANDATORY,
1697 		      !!p_params->discard_mandatory_tlv);
1698 	SET_MFW_FIELD(lld_tlv_buf.flags, LLDP_SYSTEM_TLV_LENGTH,
1699 		      p_params->buf_size);
1700 	len = ECORE_LLDP_SYS_TLV_SIZE / 2;
1701 	OSAL_MEMCPY(lld_tlv_buf.data, p_params->buf, len);
1702 
1703 	addr = p_hwfn->mcp_info->port_addr +
1704 		offsetof(struct public_port, system_lldp_tlvs_buf);
1705 	ecore_memcpy_to(p_hwfn, p_ptt, addr, &lld_tlv_buf, sizeof(lld_tlv_buf));
1706 
1707 	if  (p_params->buf_size > len) {
1708 		addr = p_hwfn->mcp_info->port_addr +
1709 			offsetof(struct public_port, system_lldp_tlvs_buf2);
1710 		ecore_memcpy_to(p_hwfn, p_ptt, addr, &p_params->buf[len],
1711 				ECORE_LLDP_SYS_TLV_SIZE / 2);
1712 	}
1713 
1714 	rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_LLDP,
1715 			   mb_param, &mcp_resp, &mcp_param);
1716 	if (rc != ECORE_SUCCESS)
1717 		DP_NOTICE(p_hwfn, false, "SET_LLDP failed, error = %d\n", rc);
1718 
1719 	return rc;
1720 }
1721 
1722 enum _ecore_status_t
1723 ecore_dcbx_get_dscp_priority(struct ecore_hwfn *p_hwfn,
1724 			     u8 dscp_index, u8 *p_dscp_pri)
1725 {
1726 	struct ecore_dcbx_get *p_dcbx_info;
1727 	enum _ecore_status_t rc;
1728 
1729 	if (dscp_index >= ECORE_DCBX_DSCP_SIZE) {
1730 		DP_ERR(p_hwfn, "Invalid dscp index %d\n", dscp_index);
1731 		return ECORE_INVAL;
1732 	}
1733 
1734 	p_dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL,
1735 				 sizeof(*p_dcbx_info));
1736 	if (!p_dcbx_info)
1737 		return ECORE_NOMEM;
1738 
1739 	OSAL_MEMSET(p_dcbx_info, 0, sizeof(*p_dcbx_info));
1740 	rc = ecore_dcbx_query_params(p_hwfn, p_dcbx_info,
1741 				     ECORE_DCBX_OPERATIONAL_MIB);
1742 	if (rc) {
1743 		OSAL_FREE(p_hwfn->p_dev, p_dcbx_info);
1744 		return rc;
1745 	}
1746 
1747 	*p_dscp_pri = p_dcbx_info->dscp.dscp_pri_map[dscp_index];
1748 	OSAL_FREE(p_hwfn->p_dev, p_dcbx_info);
1749 
1750 	return ECORE_SUCCESS;
1751 }
1752 
1753 enum _ecore_status_t
1754 ecore_dcbx_set_dscp_priority(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
1755 			     u8 dscp_index, u8 pri_val)
1756 {
1757 	struct ecore_dcbx_set dcbx_set;
1758 	enum _ecore_status_t rc;
1759 
1760 	if (dscp_index >= ECORE_DCBX_DSCP_SIZE ||
1761 	    pri_val >= ECORE_MAX_PFC_PRIORITIES) {
1762 		DP_ERR(p_hwfn, "Invalid dscp params: index = %d pri = %d\n",
1763 		       dscp_index, pri_val);
1764 		return ECORE_INVAL;
1765 	}
1766 
1767 	OSAL_MEMSET(&dcbx_set, 0, sizeof(dcbx_set));
1768 	rc = ecore_dcbx_get_config_params(p_hwfn, &dcbx_set);
1769 	if (rc)
1770 		return rc;
1771 
1772 	dcbx_set.override_flags = ECORE_DCBX_OVERRIDE_DSCP_CFG;
1773 	dcbx_set.dscp.dscp_pri_map[dscp_index] = pri_val;
1774 
1775 	return ecore_dcbx_config_params(p_hwfn, p_ptt, &dcbx_set, 1);
1776 }
1777 
1778 enum _ecore_status_t
1779 ecore_lldp_get_stats(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
1780 		     struct ecore_lldp_stats *p_params)
1781 {
1782 	u32 mcp_resp = 0, mcp_param = 0, addr, val;
1783 	struct lldp_stats_stc lldp_stats;
1784 	enum _ecore_status_t rc;
1785 
1786 	switch (p_params->agent) {
1787 	case ECORE_LLDP_NEAREST_BRIDGE:
1788 		val = LLDP_NEAREST_BRIDGE;
1789 		break;
1790 	case ECORE_LLDP_NEAREST_NON_TPMR_BRIDGE:
1791 		val = LLDP_NEAREST_NON_TPMR_BRIDGE;
1792 		break;
1793 	case ECORE_LLDP_NEAREST_CUSTOMER_BRIDGE:
1794 		val = LLDP_NEAREST_CUSTOMER_BRIDGE;
1795 		break;
1796 	default:
1797 		DP_ERR(p_hwfn, "Invalid agent type %d\n", p_params->agent);
1798 		return ECORE_INVAL;
1799 	}
1800 
1801 	rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_GET_LLDP_STATS,
1802 			   val << DRV_MB_PARAM_LLDP_STATS_AGENT_OFFSET,
1803 			   &mcp_resp, &mcp_param);
1804 	if (rc != ECORE_SUCCESS) {
1805 		DP_ERR(p_hwfn, "GET_LLDP_STATS failed, error = %d\n", rc);
1806 		return rc;
1807 	}
1808 
1809 	addr = p_hwfn->mcp_info->drv_mb_addr +
1810 		OFFSETOF(struct public_drv_mb, union_data);
1811 
1812 	ecore_memcpy_from(p_hwfn, p_ptt, &lldp_stats, addr, sizeof(lldp_stats));
1813 
1814 	p_params->tx_frames = lldp_stats.tx_frames_total;
1815 	p_params->rx_frames = lldp_stats.rx_frames_total;
1816 	p_params->rx_discards = lldp_stats.rx_frames_discarded;
1817 	p_params->rx_age_outs = lldp_stats.rx_age_outs;
1818 
1819 	return ECORE_SUCCESS;
1820 }
1821