1 /* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 * 29 */ 30 31 #ifndef _INIT_FW_FUNCS_H 32 #define _INIT_FW_FUNCS_H 33 /* Forward declarations */ 34 35 struct init_qm_pq_params; 36 37 /** 38 * @brief ecore_qm_pf_mem_size - Prepare QM ILT sizes 39 * 40 * Returns the required host memory size in 4KB units. 41 * Must be called before all QM init HSI functions. 42 * 43 * @param num_pf_cids - number of connections used by this PF 44 * @param num_vf_cids - number of connections used by VFs of this PF 45 * @param num_tids - number of tasks used by this PF 46 * @param num_pf_pqs - number of PQs used by this PF 47 * @param num_vf_pqs - number of PQs used by VFs of this PF 48 * 49 * @return The required host memory size in 4KB units. 50 */ 51 u32 ecore_qm_pf_mem_size(u32 num_pf_cids, 52 u32 num_vf_cids, 53 u32 num_tids, 54 u16 num_pf_pqs, 55 u16 num_vf_pqs); 56 57 /** 58 * @brief ecore_qm_common_rt_init - Prepare QM runtime init values for the 59 * engine phase. 60 * 61 * @param p_hwfn - HW device data 62 * @param max_ports_per_engine - max number of ports per engine in HW 63 * @param max_phys_tcs_per_port - max number of physical TCs per port in HW 64 * @param pf_rl_en - enable per-PF rate limiters 65 * @param pf_wfq_en - enable per-PF WFQ 66 * @param vport_rl_en - enable per-VPORT rate limiters 67 * @param vport_wfq_en - enable per-VPORT WFQ 68 * @param port_params - array of size MAX_NUM_PORTS with parameters 69 * for each port 70 * 71 * @return 0 on success, -1 on error. 72 */ 73 int ecore_qm_common_rt_init(struct ecore_hwfn *p_hwfn, 74 u8 max_ports_per_engine, 75 u8 max_phys_tcs_per_port, 76 bool pf_rl_en, 77 bool pf_wfq_en, 78 bool vport_rl_en, 79 bool vport_wfq_en, 80 struct init_qm_port_params port_params[MAX_NUM_PORTS]); 81 82 /** 83 * @brief ecore_qm_pf_rt_init - Prepare QM runtime init values for the PF phase 84 * 85 * @param p_hwfn - HW device data 86 * @param p_ptt - ptt window used for writing the registers 87 * @param port_id - port ID 88 * @param pf_id - PF ID 89 * @param max_phys_tcs_per_port - max number of physical TCs per port in HW 90 * @param is_pf_loading - indicates if the PF is currently loading, 91 * i.e. it has no allocated QM resources. 92 * @param num_pf_cids - number of connections used by this PF 93 * @param num_vf_cids - number of connections used by VFs of this PF 94 * @param num_tids - number of tasks used by this PF 95 * @param start_pq - first Tx PQ ID associated with this PF 96 * @param num_pf_pqs - number of Tx PQs associated with this PF 97 * (non-VF) 98 * @param num_vf_pqs - number of Tx PQs associated with a VF 99 * @param start_vport - first VPORT ID associated with this PF 100 * @param num_vports - number of VPORTs associated with this PF 101 * @param pf_wfq - WFQ weight. if PF WFQ is globally disabled, 102 * the weight must be 0. otherwise, the weight 103 * must be non-zero. 104 * @param pf_rl - rate limit in Mb/sec units. a value of 0 105 * means don't configure. ignored if PF RL is 106 * globally disabled. 107 * @param link_speed - link speed in Mbps. 108 * @param pq_params - array of size (num_pf_pqs + num_vf_pqs) with 109 * parameters for each Tx PQ associated with the 110 * specified PF. 111 * @param vport_params - array of size num_vports with parameters for 112 * each associated VPORT. 113 * 114 * @return 0 on success, -1 on error. 115 */ 116 int ecore_qm_pf_rt_init(struct ecore_hwfn *p_hwfn, 117 struct ecore_ptt *p_ptt, 118 u8 port_id, 119 u8 pf_id, 120 u8 max_phys_tcs_per_port, 121 bool is_pf_loading, 122 u32 num_pf_cids, 123 u32 num_vf_cids, 124 u32 num_tids, 125 u16 start_pq, 126 u16 num_pf_pqs, 127 u16 num_vf_pqs, 128 u8 start_vport, 129 u8 num_vports, 130 u16 pf_wfq, 131 u32 pf_rl, 132 u32 link_speed, 133 struct init_qm_pq_params *pq_params, 134 struct init_qm_vport_params *vport_params); 135 136 /** 137 * @brief ecore_init_pf_wfq - Initializes the WFQ weight of the specified PF 138 * 139 * @param p_hwfn - HW device data 140 * @param p_ptt - ptt window used for writing the registers 141 * @param pf_id - PF ID 142 * @param pf_wfq - WFQ weight. Must be non-zero. 143 * 144 * @return 0 on success, -1 on error. 145 */ 146 int ecore_init_pf_wfq(struct ecore_hwfn *p_hwfn, 147 struct ecore_ptt *p_ptt, 148 u8 pf_id, 149 u16 pf_wfq); 150 151 /** 152 * @brief ecore_init_pf_rl - Initializes the rate limit of the specified PF 153 * 154 * @param p_hwfn 155 * @param p_ptt - ptt window used for writing the registers 156 * @param pf_id - PF ID 157 * @param pf_rl - rate limit in Mb/sec units 158 * 159 * @return 0 on success, -1 on error. 160 */ 161 int ecore_init_pf_rl(struct ecore_hwfn *p_hwfn, 162 struct ecore_ptt *p_ptt, 163 u8 pf_id, 164 u32 pf_rl); 165 166 /** 167 * @brief ecore_init_vport_wfq - Initializes the WFQ weight of the specified VPORT 168 * 169 * @param p_hwfn - HW device data 170 * @param p_ptt - ptt window used for writing the registers 171 * @param first_tx_pq_id - An array containing the first Tx PQ ID associated 172 * with the VPORT for each TC. This array is filled by 173 * ecore_qm_pf_rt_init 174 * @param vport_wfq - WFQ weight. Must be non-zero. 175 * 176 * @return 0 on success, -1 on error. 177 */ 178 int ecore_init_vport_wfq(struct ecore_hwfn *p_hwfn, 179 struct ecore_ptt *p_ptt, 180 u16 first_tx_pq_id[NUM_OF_TCS], 181 u16 vport_wfq); 182 183 /** 184 * @brief ecore_init_vport_rl - Initializes the rate limit of the specified 185 * VPORT. 186 * 187 * @param p_hwfn - HW device data 188 * @param p_ptt - ptt window used for writing the registers 189 * @param vport_id - VPORT ID 190 * @param vport_rl - rate limit in Mb/sec units 191 * @param link_speed - link speed in Mbps. 192 * 193 * @return 0 on success, -1 on error. 194 */ 195 int ecore_init_vport_rl(struct ecore_hwfn *p_hwfn, 196 struct ecore_ptt *p_ptt, 197 u8 vport_id, 198 u32 vport_rl, 199 u32 link_speed); 200 201 /** 202 * @brief ecore_send_qm_stop_cmd - Sends a stop command to the QM 203 * 204 * @param p_hwfn - HW device data 205 * @param p_ptt - ptt window used for writing the registers 206 * @param is_release_cmd - true for release, false for stop. 207 * @param is_tx_pq - true for Tx PQs, false for Other PQs. 208 * @param start_pq - first PQ ID to stop 209 * @param num_pqs - Number of PQs to stop, starting from start_pq. 210 * 211 * @return bool, true if successful, false if timeout occured while waiting for 212 * QM command done. 213 */ 214 bool ecore_send_qm_stop_cmd(struct ecore_hwfn *p_hwfn, 215 struct ecore_ptt *p_ptt, 216 bool is_release_cmd, 217 bool is_tx_pq, 218 u16 start_pq, 219 u16 num_pqs); 220 221 #ifndef UNUSED_HSI_FUNC 222 223 /** 224 * @brief ecore_init_nig_ets - Initializes the NIG ETS arbiter 225 * 226 * Based on weight/priority requirements per-TC. 227 * 228 * @param p_hwfn - HW device data 229 * @param p_ptt - ptt window used for writing the registers. 230 * @param req - the NIG ETS initialization requirements. 231 * @param is_lb - if set, the loopback port arbiter is initialized, otherwise 232 * the physical port arbiter is initialized. The pure-LB TC 233 * requirements are ignored when is_lb is cleared. 234 */ 235 void ecore_init_nig_ets(struct ecore_hwfn *p_hwfn, 236 struct ecore_ptt *p_ptt, 237 struct init_ets_req* req, 238 bool is_lb); 239 240 /** 241 * @brief ecore_init_nig_lb_rl - Initializes the NIG LB RLs 242 * 243 * Based on global and per-TC rate requirements 244 * 245 * @param p_hwfn - HW device data 246 * @param p_ptt - ptt window used for writing the registers. 247 * @param req - the NIG LB RLs initialization requirements. 248 */ 249 void ecore_init_nig_lb_rl(struct ecore_hwfn *p_hwfn, 250 struct ecore_ptt *p_ptt, 251 struct init_nig_lb_rl_req* req); 252 253 #endif /* UNUSED_HSI_FUNC */ 254 255 /** 256 * @brief ecore_init_nig_pri_tc_map - Initializes the NIG priority to TC map. 257 * 258 * Assumes valid arguments. 259 * 260 * @param p_hwfn - HW device data 261 * @param p_ptt - ptt window used for writing the registers. 262 * @param req - required mapping from prioirties to TCs. 263 */ 264 void ecore_init_nig_pri_tc_map(struct ecore_hwfn *p_hwfn, 265 struct ecore_ptt *p_ptt, 266 struct init_nig_pri_tc_map_req* req); 267 268 #ifndef UNUSED_HSI_FUNC 269 270 /** 271 * @brief ecore_init_prs_ets - Initializes the PRS Rx ETS arbiter 272 * 273 * Based on weight/priority requirements per-TC. 274 * 275 * @param p_hwfn - HW device data 276 * @param p_ptt - ptt window used for writing the registers. 277 * @param req - the PRS ETS initialization requirements. 278 */ 279 void ecore_init_prs_ets(struct ecore_hwfn *p_hwfn, 280 struct ecore_ptt *p_ptt, 281 struct init_ets_req* req); 282 283 #endif /* UNUSED_HSI_FUNC */ 284 #ifndef UNUSED_HSI_FUNC 285 286 /** 287 * @brief ecore_init_brb_ram - Initializes BRB RAM sizes per TC. 288 * 289 * Based on weight/priority requirements per-TC. 290 * 291 * @param p_hwfn - HW device data 292 * @param p_ptt - ptt window used for writing the registers. 293 * @param req - the BRB RAM initialization requirements. 294 */ 295 void ecore_init_brb_ram(struct ecore_hwfn *p_hwfn, 296 struct ecore_ptt *p_ptt, 297 struct init_brb_ram_req* req); 298 299 #endif /* UNUSED_HSI_FUNC */ 300 #ifndef UNUSED_HSI_FUNC 301 302 /** 303 * @brief ecore_set_port_mf_ovlan_eth_type - initializes DORQ ethType Regs to 304 * input ethType. should Be called once per port. 305 * 306 * @param p_hwfn - HW device data 307 * @param ethType - etherType to configure 308 */ 309 void ecore_set_port_mf_ovlan_eth_type(struct ecore_hwfn *p_hwfn, 310 u32 ethType); 311 312 #endif /* UNUSED_HSI_FUNC */ 313 314 /** 315 * @brief ecore_set_vxlan_dest_port - Initializes vxlan tunnel destination udp 316 * port. 317 * 318 * @param p_hwfn - HW device data 319 * @param p_ptt - ptt window used for writing the registers. 320 * @param dest_port - vxlan destination udp port. 321 */ 322 void ecore_set_vxlan_dest_port(struct ecore_hwfn *p_hwfn, 323 struct ecore_ptt *p_ptt, 324 u16 dest_port); 325 326 /** 327 * @brief ecore_set_vxlan_enable - Enable or disable VXLAN tunnel in HW 328 * 329 * @param p_hwfn - HW device data 330 * @param p_ptt - ptt window used for writing the registers. 331 * @param vxlan_enable - vxlan enable flag. 332 */ 333 void ecore_set_vxlan_enable(struct ecore_hwfn *p_hwfn, 334 struct ecore_ptt *p_ptt, 335 bool vxlan_enable); 336 337 /** 338 * @brief ecore_set_gre_enable - Enable or disable GRE tunnel in HW 339 * 340 * @param p_hwfn - HW device data 341 * @param p_ptt - ptt window used for writing the registers. 342 * @param eth_gre_enable - eth GRE enable enable flag. 343 * @param ip_gre_enable - IP GRE enable enable flag. 344 */ 345 void ecore_set_gre_enable(struct ecore_hwfn *p_hwfn, 346 struct ecore_ptt *p_ptt, 347 bool eth_gre_enable, 348 bool ip_gre_enable); 349 350 /** 351 * @brief ecore_set_geneve_dest_port - Initializes geneve tunnel destination 352 * udp port. 353 * 354 * @param p_hwfn - HW device data 355 * @param p_ptt - ptt window used for writing the registers. 356 * @param dest_port - geneve destination udp port. 357 */ 358 void ecore_set_geneve_dest_port(struct ecore_hwfn *p_hwfn, 359 struct ecore_ptt *p_ptt, 360 u16 dest_port); 361 362 /** 363 * @brief ecore_set_geneve_enable - Enable or disable GRE tunnel in HW 364 * 365 * @param p_hwfn - HW device data 366 * @param p_ptt - ptt window used for writing the registers. 367 * @param eth_geneve_enable - eth GENEVE enable enable flag. 368 * @param ip_geneve_enable - IP GENEVE enable enable flag. 369 */ 370 void ecore_set_geneve_enable(struct ecore_hwfn *p_hwfn, 371 struct ecore_ptt *p_ptt, 372 bool eth_geneve_enable, 373 bool ip_geneve_enable); 374 375 /** 376 * @brief ecore_set_vxlan_no_l2_enable - enable or disable VXLAN no L2 parsing 377 * 378 * @param p_ptt - ptt window used for writing the registers. 379 * @param enable - VXLAN no L2 enable flag. 380 */ 381 void ecore_set_vxlan_no_l2_enable(struct ecore_hwfn *p_hwfn, 382 struct ecore_ptt *p_ptt, 383 bool enable); 384 385 #ifndef UNUSED_HSI_FUNC 386 387 /** 388 * @brief ecore_set_gft_event_id_cm_hdr - Configure GFT event id and cm header 389 * 390 * @param p_hwfn - HW device data 391 * @param p_ptt - ptt window used for writing the registers. 392 */ 393 void ecore_set_gft_event_id_cm_hdr(struct ecore_hwfn *p_hwfn, 394 struct ecore_ptt *p_ptt); 395 396 /** 397 * @brief ecore_gft_disable - Disable and GFT 398 * 399 * @param p_hwfn - HW device data 400 * @param p_ptt - ptt window used for writing the registers. 401 * @param pf_id - pf on which to disable GFT. 402 */ 403 void ecore_gft_disable(struct ecore_hwfn *p_hwfn, 404 struct ecore_ptt *p_ptt, 405 u16 pf_id); 406 407 /** 408 * @brief ecore_gft_config - Enable and configure HW for GFT 409 * 410 * @param p_hwfn - HW device data 411 * @param p_ptt - ptt window used for writing the registers. 412 * @param pf_id - pf on which to enable GFT. 413 * @param tcp - set profile tcp packets. 414 * @param udp - set profile udp packet. 415 * @param ipv4 - set profile ipv4 packet. 416 * @param ipv6 - set profile ipv6 packet. 417 * @param profile_type - define packet same fields. Use enum gft_profile_type. 418 */ 419 void ecore_gft_config(struct ecore_hwfn *p_hwfn, 420 struct ecore_ptt *p_ptt, 421 u16 pf_id, 422 bool tcp, 423 bool udp, 424 bool ipv4, 425 bool ipv6, 426 enum gft_profile_type profile_type); 427 428 #endif /* UNUSED_HSI_FUNC */ 429 430 /** 431 * @brief ecore_config_vf_zone_size_mode - Configure VF zone size mode. Must be 432 * used before first ETH queue started. 433 * 434 * @param p_hwfn - HW device data 435 * @param p_ptt - ptt window used for writing the registers. Don't care 436 * if runtime_init used. 437 * @param mode - VF zone size mode. Use enum vf_zone_size_mode. 438 * @param runtime_init - Set 1 to init runtime registers in engine phase. 439 * Set 0 if VF zone size mode configured after engine 440 * phase. 441 */ 442 void ecore_config_vf_zone_size_mode(struct ecore_hwfn *p_hwfn, 443 struct ecore_ptt *p_ptt, 444 u16 mode, 445 bool runtime_init); 446 447 /** 448 * @brief ecore_get_mstorm_queue_stat_offset - Get mstorm statistics offset by 449 * VF zone size mode. 450 * 451 * @param p_hwfn - HW device data 452 * @param stat_cnt_id - statistic counter id 453 * @param vf_zone_size_mode - VF zone size mode. Use enum vf_zone_size_mode. 454 */ 455 u32 ecore_get_mstorm_queue_stat_offset(struct ecore_hwfn *p_hwfn, 456 u16 stat_cnt_id, 457 u16 vf_zone_size_mode); 458 459 /** 460 * @brief ecore_get_mstorm_eth_vf_prods_offset - VF producer offset by VF zone 461 * size mode. 462 * 463 * @param p_hwfn - HW device data 464 * @param vf_id - vf id. 465 * @param vf_queue_id - per VF rx queue id. 466 * @param vf_zone_size_mode - vf zone size mode. Use enum vf_zone_size_mode. 467 */ 468 u32 ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn *p_hwfn, 469 u8 vf_id, 470 u8 vf_queue_id, 471 u16 vf_zone_size_mode); 472 473 /** 474 * @brief ecore_enable_context_validation - Enable and configure context 475 * validation. 476 * 477 * @param p_hwfn - HW device data 478 * @param p_ptt - ptt window used for writing the registers. 479 */ 480 void ecore_enable_context_validation(struct ecore_hwfn *p_hwfn, 481 struct ecore_ptt *p_ptt); 482 483 /** 484 * @brief ecore_calc_session_ctx_validation - Calcualte validation byte for 485 * session context. 486 * 487 * @param p_ctx_mem - pointer to context memory. 488 * @param ctx_size - context size. 489 * @param ctx_type - context type. 490 * @param cid - context cid. 491 */ 492 void ecore_calc_session_ctx_validation(void *p_ctx_mem, 493 u16 ctx_size, 494 u8 ctx_type, 495 u32 cid); 496 497 /** 498 * @brief ecore_calc_task_ctx_validation - Calcualte validation byte for task 499 * context. 500 * 501 * @param p_ctx_mem - pointer to context memory. 502 * @param ctx_size - context size. 503 * @param ctx_type - context type. 504 * @param tid - context tid. 505 */ 506 void ecore_calc_task_ctx_validation(void *p_ctx_mem, 507 u16 ctx_size, 508 u8 ctx_type, 509 u32 tid); 510 511 /** 512 * @brief ecore_memset_session_ctx - Memset session context to 0 while 513 * preserving validation bytes. 514 * 515 * @param p_hwfn - HW device data 516 * @param p_ctx_mem - pointer to context memory. 517 * @param ctx_size - size to initialzie. 518 * @param ctx_type - context type. 519 */ 520 void ecore_memset_session_ctx(void *p_ctx_mem, 521 u32 ctx_size, 522 u8 ctx_type); 523 524 /** 525 * @brief ecore_memset_task_ctx - Memset task context to 0 while preserving 526 * validation bytes. 527 * 528 * @param p_ctx_mem - pointer to context memory. 529 * @param ctx_size - size to initialzie. 530 * @param ctx_type - context type. 531 */ 532 void ecore_memset_task_ctx(void *p_ctx_mem, 533 u32 ctx_size, 534 u8 ctx_type); 535 536 /** 537 * @brief ecore_update_eth_rss_ind_table_entry - Update RSS indirection table entry. 538 * The function must run in exclusive mode to prevent wrong RSS configuration. 539 * 540 * @param p_hwfn - HW device data 541 * @param p_ptt - ptt window used for writing the registers. 542 * @param rss_id - RSS engine ID. 543 * @param ind_table_index - RSS indirect table index. 544 * @param ind_table_value - RSS indirect table new value. 545 */ 546 void ecore_update_eth_rss_ind_table_entry(struct ecore_hwfn * p_hwfn, 547 struct ecore_ptt *p_ptt, 548 u8 rss_id, 549 u8 ind_table_index, 550 u16 ind_table_value); 551 552 #endif 553