1 /* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 */ 28 29 #ifndef _INIT_FW_FUNCS_H 30 #define _INIT_FW_FUNCS_H 31 /* Forward declarations */ 32 33 struct init_qm_pq_params; 34 35 /** 36 * @brief ecore_qm_pf_mem_size - Prepare QM ILT sizes 37 * 38 * Returns the required host memory size in 4KB units. 39 * Must be called before all QM init HSI functions. 40 * 41 * @param num_pf_cids - number of connections used by this PF 42 * @param num_vf_cids - number of connections used by VFs of this PF 43 * @param num_tids - number of tasks used by this PF 44 * @param num_pf_pqs - number of PQs used by this PF 45 * @param num_vf_pqs - number of PQs used by VFs of this PF 46 * 47 * @return The required host memory size in 4KB units. 48 */ 49 u32 ecore_qm_pf_mem_size(u32 num_pf_cids, 50 u32 num_vf_cids, 51 u32 num_tids, 52 u16 num_pf_pqs, 53 u16 num_vf_pqs); 54 55 /** 56 * @brief ecore_qm_common_rt_init - Prepare QM runtime init values for the 57 * engine phase. 58 * 59 * @param p_hwfn - HW device data 60 * @param max_ports_per_engine - max number of ports per engine in HW 61 * @param max_phys_tcs_per_port - max number of physical TCs per port in HW 62 * @param pf_rl_en - enable per-PF rate limiters 63 * @param pf_wfq_en - enable per-PF WFQ 64 * @param vport_rl_en - enable per-VPORT rate limiters 65 * @param vport_wfq_en - enable per-VPORT WFQ 66 * @param port_params - array of size MAX_NUM_PORTS with parameters 67 * for each port 68 * 69 * @return 0 on success, -1 on error. 70 */ 71 int ecore_qm_common_rt_init(struct ecore_hwfn *p_hwfn, 72 u8 max_ports_per_engine, 73 u8 max_phys_tcs_per_port, 74 bool pf_rl_en, 75 bool pf_wfq_en, 76 bool vport_rl_en, 77 bool vport_wfq_en, 78 struct init_qm_port_params port_params[MAX_NUM_PORTS]); 79 80 /** 81 * @brief ecore_qm_pf_rt_init - Prepare QM runtime init values for the PF phase 82 * 83 * @param p_hwfn - HW device data 84 * @param p_ptt - ptt window used for writing the registers 85 * @param port_id - port ID 86 * @param pf_id - PF ID 87 * @param max_phys_tcs_per_port - max number of physical TCs per port in HW 88 * @param is_pf_loading - indicates if the PF is currently loading, 89 * i.e. it has no allocated QM resources. 90 * @param num_pf_cids - number of connections used by this PF 91 * @param num_vf_cids - number of connections used by VFs of this PF 92 * @param num_tids - number of tasks used by this PF 93 * @param start_pq - first Tx PQ ID associated with this PF 94 * @param num_pf_pqs - number of Tx PQs associated with this PF 95 * (non-VF) 96 * @param num_vf_pqs - number of Tx PQs associated with a VF 97 * @param start_vport - first VPORT ID associated with this PF 98 * @param num_vports - number of VPORTs associated with this PF 99 * @param pf_wfq - WFQ weight. if PF WFQ is globally disabled, 100 * the weight must be 0. otherwise, the weight 101 * must be non-zero. 102 * @param pf_rl - rate limit in Mb/sec units. a value of 0 103 * means don't configure. ignored if PF RL is 104 * globally disabled. 105 * @param link_speed - link speed in Mbps. 106 * @param pq_params - array of size (num_pf_pqs + num_vf_pqs) with 107 * parameters for each Tx PQ associated with the 108 * specified PF. 109 * @param vport_params - array of size num_vports with parameters for 110 * each associated VPORT. 111 * 112 * @return 0 on success, -1 on error. 113 */ 114 int ecore_qm_pf_rt_init(struct ecore_hwfn *p_hwfn, 115 struct ecore_ptt *p_ptt, 116 u8 port_id, 117 u8 pf_id, 118 u8 max_phys_tcs_per_port, 119 bool is_pf_loading, 120 u32 num_pf_cids, 121 u32 num_vf_cids, 122 u32 num_tids, 123 u16 start_pq, 124 u16 num_pf_pqs, 125 u16 num_vf_pqs, 126 u8 start_vport, 127 u8 num_vports, 128 u16 pf_wfq, 129 u32 pf_rl, 130 u32 link_speed, 131 struct init_qm_pq_params *pq_params, 132 struct init_qm_vport_params *vport_params); 133 134 /** 135 * @brief ecore_init_pf_wfq - Initializes the WFQ weight of the specified PF 136 * 137 * @param p_hwfn - HW device data 138 * @param p_ptt - ptt window used for writing the registers 139 * @param pf_id - PF ID 140 * @param pf_wfq - WFQ weight. Must be non-zero. 141 * 142 * @return 0 on success, -1 on error. 143 */ 144 int ecore_init_pf_wfq(struct ecore_hwfn *p_hwfn, 145 struct ecore_ptt *p_ptt, 146 u8 pf_id, 147 u16 pf_wfq); 148 149 /** 150 * @brief ecore_init_pf_rl - Initializes the rate limit of the specified PF 151 * 152 * @param p_hwfn 153 * @param p_ptt - ptt window used for writing the registers 154 * @param pf_id - PF ID 155 * @param pf_rl - rate limit in Mb/sec units 156 * 157 * @return 0 on success, -1 on error. 158 */ 159 int ecore_init_pf_rl(struct ecore_hwfn *p_hwfn, 160 struct ecore_ptt *p_ptt, 161 u8 pf_id, 162 u32 pf_rl); 163 164 /** 165 * @brief ecore_init_vport_wfq - Initializes the WFQ weight of the specified VPORT 166 * 167 * @param p_hwfn - HW device data 168 * @param p_ptt - ptt window used for writing the registers 169 * @param first_tx_pq_id - An array containing the first Tx PQ ID associated 170 * with the VPORT for each TC. This array is filled by 171 * ecore_qm_pf_rt_init 172 * @param vport_wfq - WFQ weight. Must be non-zero. 173 * 174 * @return 0 on success, -1 on error. 175 */ 176 int ecore_init_vport_wfq(struct ecore_hwfn *p_hwfn, 177 struct ecore_ptt *p_ptt, 178 u16 first_tx_pq_id[NUM_OF_TCS], 179 u16 vport_wfq); 180 181 /** 182 * @brief ecore_init_vport_rl - Initializes the rate limit of the specified 183 * VPORT. 184 * 185 * @param p_hwfn - HW device data 186 * @param p_ptt - ptt window used for writing the registers 187 * @param vport_id - VPORT ID 188 * @param vport_rl - rate limit in Mb/sec units 189 * @param link_speed - link speed in Mbps. 190 * 191 * @return 0 on success, -1 on error. 192 */ 193 int ecore_init_vport_rl(struct ecore_hwfn *p_hwfn, 194 struct ecore_ptt *p_ptt, 195 u8 vport_id, 196 u32 vport_rl, 197 u32 link_speed); 198 199 /** 200 * @brief ecore_send_qm_stop_cmd - Sends a stop command to the QM 201 * 202 * @param p_hwfn - HW device data 203 * @param p_ptt - ptt window used for writing the registers 204 * @param is_release_cmd - true for release, false for stop. 205 * @param is_tx_pq - true for Tx PQs, false for Other PQs. 206 * @param start_pq - first PQ ID to stop 207 * @param num_pqs - Number of PQs to stop, starting from start_pq. 208 * 209 * @return bool, true if successful, false if timeout occured while waiting for 210 * QM command done. 211 */ 212 bool ecore_send_qm_stop_cmd(struct ecore_hwfn *p_hwfn, 213 struct ecore_ptt *p_ptt, 214 bool is_release_cmd, 215 bool is_tx_pq, 216 u16 start_pq, 217 u16 num_pqs); 218 219 #ifndef UNUSED_HSI_FUNC 220 221 /** 222 * @brief ecore_init_nig_ets - Initializes the NIG ETS arbiter 223 * 224 * Based on weight/priority requirements per-TC. 225 * 226 * @param p_hwfn - HW device data 227 * @param p_ptt - ptt window used for writing the registers. 228 * @param req - the NIG ETS initialization requirements. 229 * @param is_lb - if set, the loopback port arbiter is initialized, otherwise 230 * the physical port arbiter is initialized. The pure-LB TC 231 * requirements are ignored when is_lb is cleared. 232 */ 233 void ecore_init_nig_ets(struct ecore_hwfn *p_hwfn, 234 struct ecore_ptt *p_ptt, 235 struct init_ets_req* req, 236 bool is_lb); 237 238 /** 239 * @brief ecore_init_nig_lb_rl - Initializes the NIG LB RLs 240 * 241 * Based on global and per-TC rate requirements 242 * 243 * @param p_hwfn - HW device data 244 * @param p_ptt - ptt window used for writing the registers. 245 * @param req - the NIG LB RLs initialization requirements. 246 */ 247 void ecore_init_nig_lb_rl(struct ecore_hwfn *p_hwfn, 248 struct ecore_ptt *p_ptt, 249 struct init_nig_lb_rl_req* req); 250 251 #endif /* UNUSED_HSI_FUNC */ 252 253 /** 254 * @brief ecore_init_nig_pri_tc_map - Initializes the NIG priority to TC map. 255 * 256 * Assumes valid arguments. 257 * 258 * @param p_hwfn - HW device data 259 * @param p_ptt - ptt window used for writing the registers. 260 * @param req - required mapping from prioirties to TCs. 261 */ 262 void ecore_init_nig_pri_tc_map(struct ecore_hwfn *p_hwfn, 263 struct ecore_ptt *p_ptt, 264 struct init_nig_pri_tc_map_req* req); 265 266 #ifndef UNUSED_HSI_FUNC 267 268 /** 269 * @brief ecore_init_prs_ets - Initializes the PRS Rx ETS arbiter 270 * 271 * Based on weight/priority requirements per-TC. 272 * 273 * @param p_hwfn - HW device data 274 * @param p_ptt - ptt window used for writing the registers. 275 * @param req - the PRS ETS initialization requirements. 276 */ 277 void ecore_init_prs_ets(struct ecore_hwfn *p_hwfn, 278 struct ecore_ptt *p_ptt, 279 struct init_ets_req* req); 280 281 #endif /* UNUSED_HSI_FUNC */ 282 #ifndef UNUSED_HSI_FUNC 283 284 /** 285 * @brief ecore_init_brb_ram - Initializes BRB RAM sizes per TC. 286 * 287 * Based on weight/priority requirements per-TC. 288 * 289 * @param p_hwfn - HW device data 290 * @param p_ptt - ptt window used for writing the registers. 291 * @param req - the BRB RAM initialization requirements. 292 */ 293 void ecore_init_brb_ram(struct ecore_hwfn *p_hwfn, 294 struct ecore_ptt *p_ptt, 295 struct init_brb_ram_req* req); 296 297 #endif /* UNUSED_HSI_FUNC */ 298 #ifndef UNUSED_HSI_FUNC 299 300 /** 301 * @brief ecore_set_port_mf_ovlan_eth_type - initializes DORQ ethType Regs to 302 * input ethType. should Be called once per port. 303 * 304 * @param p_hwfn - HW device data 305 * @param ethType - etherType to configure 306 */ 307 void ecore_set_port_mf_ovlan_eth_type(struct ecore_hwfn *p_hwfn, 308 u32 ethType); 309 310 #endif /* UNUSED_HSI_FUNC */ 311 312 /** 313 * @brief ecore_set_vxlan_dest_port - Initializes vxlan tunnel destination udp 314 * port. 315 * 316 * @param p_hwfn - HW device data 317 * @param p_ptt - ptt window used for writing the registers. 318 * @param dest_port - vxlan destination udp port. 319 */ 320 void ecore_set_vxlan_dest_port(struct ecore_hwfn *p_hwfn, 321 struct ecore_ptt *p_ptt, 322 u16 dest_port); 323 324 /** 325 * @brief ecore_set_vxlan_enable - Enable or disable VXLAN tunnel in HW 326 * 327 * @param p_hwfn - HW device data 328 * @param p_ptt - ptt window used for writing the registers. 329 * @param vxlan_enable - vxlan enable flag. 330 */ 331 void ecore_set_vxlan_enable(struct ecore_hwfn *p_hwfn, 332 struct ecore_ptt *p_ptt, 333 bool vxlan_enable); 334 335 /** 336 * @brief ecore_set_gre_enable - Enable or disable GRE tunnel in HW 337 * 338 * @param p_hwfn - HW device data 339 * @param p_ptt - ptt window used for writing the registers. 340 * @param eth_gre_enable - eth GRE enable enable flag. 341 * @param ip_gre_enable - IP GRE enable enable flag. 342 */ 343 void ecore_set_gre_enable(struct ecore_hwfn *p_hwfn, 344 struct ecore_ptt *p_ptt, 345 bool eth_gre_enable, 346 bool ip_gre_enable); 347 348 /** 349 * @brief ecore_set_geneve_dest_port - Initializes geneve tunnel destination 350 * udp port. 351 * 352 * @param p_hwfn - HW device data 353 * @param p_ptt - ptt window used for writing the registers. 354 * @param dest_port - geneve destination udp port. 355 */ 356 void ecore_set_geneve_dest_port(struct ecore_hwfn *p_hwfn, 357 struct ecore_ptt *p_ptt, 358 u16 dest_port); 359 360 /** 361 * @brief ecore_set_geneve_enable - Enable or disable GRE tunnel in HW 362 * 363 * @param p_hwfn - HW device data 364 * @param p_ptt - ptt window used for writing the registers. 365 * @param eth_geneve_enable - eth GENEVE enable enable flag. 366 * @param ip_geneve_enable - IP GENEVE enable enable flag. 367 */ 368 void ecore_set_geneve_enable(struct ecore_hwfn *p_hwfn, 369 struct ecore_ptt *p_ptt, 370 bool eth_geneve_enable, 371 bool ip_geneve_enable); 372 373 /** 374 * @brief ecore_set_vxlan_no_l2_enable - enable or disable VXLAN no L2 parsing 375 * 376 * @param p_ptt - ptt window used for writing the registers. 377 * @param enable - VXLAN no L2 enable flag. 378 */ 379 void ecore_set_vxlan_no_l2_enable(struct ecore_hwfn *p_hwfn, 380 struct ecore_ptt *p_ptt, 381 bool enable); 382 383 #ifndef UNUSED_HSI_FUNC 384 385 /** 386 * @brief ecore_set_gft_event_id_cm_hdr - Configure GFT event id and cm header 387 * 388 * @param p_hwfn - HW device data 389 * @param p_ptt - ptt window used for writing the registers. 390 */ 391 void ecore_set_gft_event_id_cm_hdr(struct ecore_hwfn *p_hwfn, 392 struct ecore_ptt *p_ptt); 393 394 /** 395 * @brief ecore_gft_disable - Disable and GFT 396 * 397 * @param p_hwfn - HW device data 398 * @param p_ptt - ptt window used for writing the registers. 399 * @param pf_id - pf on which to disable GFT. 400 */ 401 void ecore_gft_disable(struct ecore_hwfn *p_hwfn, 402 struct ecore_ptt *p_ptt, 403 u16 pf_id); 404 405 /** 406 * @brief ecore_gft_config - Enable and configure HW for GFT 407 * 408 * @param p_hwfn - HW device data 409 * @param p_ptt - ptt window used for writing the registers. 410 * @param pf_id - pf on which to enable GFT. 411 * @param tcp - set profile tcp packets. 412 * @param udp - set profile udp packet. 413 * @param ipv4 - set profile ipv4 packet. 414 * @param ipv6 - set profile ipv6 packet. 415 * @param profile_type - define packet same fields. Use enum gft_profile_type. 416 */ 417 void ecore_gft_config(struct ecore_hwfn *p_hwfn, 418 struct ecore_ptt *p_ptt, 419 u16 pf_id, 420 bool tcp, 421 bool udp, 422 bool ipv4, 423 bool ipv6, 424 enum gft_profile_type profile_type); 425 426 #endif /* UNUSED_HSI_FUNC */ 427 428 /** 429 * @brief ecore_config_vf_zone_size_mode - Configure VF zone size mode. Must be 430 * used before first ETH queue started. 431 * 432 * @param p_hwfn - HW device data 433 * @param p_ptt - ptt window used for writing the registers. Don't care 434 * if runtime_init used. 435 * @param mode - VF zone size mode. Use enum vf_zone_size_mode. 436 * @param runtime_init - Set 1 to init runtime registers in engine phase. 437 * Set 0 if VF zone size mode configured after engine 438 * phase. 439 */ 440 void ecore_config_vf_zone_size_mode(struct ecore_hwfn *p_hwfn, 441 struct ecore_ptt *p_ptt, 442 u16 mode, 443 bool runtime_init); 444 445 /** 446 * @brief ecore_get_mstorm_queue_stat_offset - Get mstorm statistics offset by 447 * VF zone size mode. 448 * 449 * @param p_hwfn - HW device data 450 * @param stat_cnt_id - statistic counter id 451 * @param vf_zone_size_mode - VF zone size mode. Use enum vf_zone_size_mode. 452 */ 453 u32 ecore_get_mstorm_queue_stat_offset(struct ecore_hwfn *p_hwfn, 454 u16 stat_cnt_id, 455 u16 vf_zone_size_mode); 456 457 /** 458 * @brief ecore_get_mstorm_eth_vf_prods_offset - VF producer offset by VF zone 459 * size mode. 460 * 461 * @param p_hwfn - HW device data 462 * @param vf_id - vf id. 463 * @param vf_queue_id - per VF rx queue id. 464 * @param vf_zone_size_mode - vf zone size mode. Use enum vf_zone_size_mode. 465 */ 466 u32 ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn *p_hwfn, 467 u8 vf_id, 468 u8 vf_queue_id, 469 u16 vf_zone_size_mode); 470 471 /** 472 * @brief ecore_enable_context_validation - Enable and configure context 473 * validation. 474 * 475 * @param p_hwfn - HW device data 476 * @param p_ptt - ptt window used for writing the registers. 477 */ 478 void ecore_enable_context_validation(struct ecore_hwfn *p_hwfn, 479 struct ecore_ptt *p_ptt); 480 481 /** 482 * @brief ecore_calc_session_ctx_validation - Calcualte validation byte for 483 * session context. 484 * 485 * @param p_ctx_mem - pointer to context memory. 486 * @param ctx_size - context size. 487 * @param ctx_type - context type. 488 * @param cid - context cid. 489 */ 490 void ecore_calc_session_ctx_validation(void *p_ctx_mem, 491 u16 ctx_size, 492 u8 ctx_type, 493 u32 cid); 494 495 /** 496 * @brief ecore_calc_task_ctx_validation - Calcualte validation byte for task 497 * context. 498 * 499 * @param p_ctx_mem - pointer to context memory. 500 * @param ctx_size - context size. 501 * @param ctx_type - context type. 502 * @param tid - context tid. 503 */ 504 void ecore_calc_task_ctx_validation(void *p_ctx_mem, 505 u16 ctx_size, 506 u8 ctx_type, 507 u32 tid); 508 509 /** 510 * @brief ecore_memset_session_ctx - Memset session context to 0 while 511 * preserving validation bytes. 512 * 513 * @param p_hwfn - HW device data 514 * @param p_ctx_mem - pointer to context memory. 515 * @param ctx_size - size to initialzie. 516 * @param ctx_type - context type. 517 */ 518 void ecore_memset_session_ctx(void *p_ctx_mem, 519 u32 ctx_size, 520 u8 ctx_type); 521 522 /** 523 * @brief ecore_memset_task_ctx - Memset task context to 0 while preserving 524 * validation bytes. 525 * 526 * @param p_ctx_mem - pointer to context memory. 527 * @param ctx_size - size to initialzie. 528 * @param ctx_type - context type. 529 */ 530 void ecore_memset_task_ctx(void *p_ctx_mem, 531 u32 ctx_size, 532 u8 ctx_type); 533 534 /** 535 * @brief ecore_update_eth_rss_ind_table_entry - Update RSS indirection table entry. 536 * The function must run in exclusive mode to prevent wrong RSS configuration. 537 * 538 * @param p_hwfn - HW device data 539 * @param p_ptt - ptt window used for writing the registers. 540 * @param rss_id - RSS engine ID. 541 * @param ind_table_index - RSS indirect table index. 542 * @param ind_table_value - RSS indirect table new value. 543 */ 544 void ecore_update_eth_rss_ind_table_entry(struct ecore_hwfn * p_hwfn, 545 struct ecore_ptt *p_ptt, 546 u8 rss_id, 547 u8 ind_table_index, 548 u16 ind_table_value); 549 550 #endif 551