1 /* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 * 29 */ 30 31 #ifndef __ECORE_MCP_API_H__ 32 #define __ECORE_MCP_API_H__ 33 34 #include "ecore_status.h" 35 36 struct ecore_mcp_link_speed_params { 37 bool autoneg; 38 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */ 39 u32 forced_speed; /* In Mb/s */ 40 }; 41 42 struct ecore_mcp_link_pause_params { 43 bool autoneg; 44 bool forced_rx; 45 bool forced_tx; 46 }; 47 48 enum ecore_mcp_eee_mode { 49 ECORE_MCP_EEE_DISABLED, 50 ECORE_MCP_EEE_ENABLED, 51 ECORE_MCP_EEE_UNSUPPORTED 52 }; 53 54 #ifndef __EXTRACT__LINUX__ 55 struct ecore_link_eee_params { 56 u32 tx_lpi_timer; 57 #define ECORE_EEE_1G_ADV (1 << 0) 58 #define ECORE_EEE_10G_ADV (1 << 1) 59 /* Capabilities are represented using ECORE_EEE_*_ADV values */ 60 u8 adv_caps; 61 u8 lp_adv_caps; 62 bool enable; 63 bool tx_lpi_enable; 64 }; 65 #endif 66 67 struct ecore_mcp_link_params { 68 struct ecore_mcp_link_speed_params speed; 69 struct ecore_mcp_link_pause_params pause; 70 u32 loopback_mode; /* in PMM_LOOPBACK values */ 71 struct ecore_link_eee_params eee; 72 }; 73 74 struct ecore_mcp_link_capabilities { 75 u32 speed_capabilities; 76 bool default_speed_autoneg; /* In Mb/s */ 77 u32 default_speed; /* In Mb/s */ /* __LINUX__THROW__ */ 78 enum ecore_mcp_eee_mode default_eee; 79 u32 eee_lpi_timer; 80 u8 eee_speed_caps; 81 }; 82 83 struct ecore_mcp_link_state { 84 bool link_up; 85 86 u32 min_pf_rate; /* In Mb/s */ 87 88 /* Actual link speed in Mb/s */ 89 u32 line_speed; 90 91 /* PF max speed in MB/s, deduced from line_speed 92 * according to PF max bandwidth configuration. 93 */ 94 u32 speed; 95 bool full_duplex; 96 97 bool an; 98 bool an_complete; 99 bool parallel_detection; 100 bool pfc_enabled; 101 102 #define ECORE_LINK_PARTNER_SPEED_1G_HD (1 << 0) 103 #define ECORE_LINK_PARTNER_SPEED_1G_FD (1 << 1) 104 #define ECORE_LINK_PARTNER_SPEED_10G (1 << 2) 105 #define ECORE_LINK_PARTNER_SPEED_20G (1 << 3) 106 #define ECORE_LINK_PARTNER_SPEED_25G (1 << 4) 107 #define ECORE_LINK_PARTNER_SPEED_40G (1 << 5) 108 #define ECORE_LINK_PARTNER_SPEED_50G (1 << 6) 109 #define ECORE_LINK_PARTNER_SPEED_100G (1 << 7) 110 u32 partner_adv_speed; 111 112 bool partner_tx_flow_ctrl_en; 113 bool partner_rx_flow_ctrl_en; 114 115 #define ECORE_LINK_PARTNER_SYMMETRIC_PAUSE (1) 116 #define ECORE_LINK_PARTNER_ASYMMETRIC_PAUSE (2) 117 #define ECORE_LINK_PARTNER_BOTH_PAUSE (3) 118 u8 partner_adv_pause; 119 120 bool sfp_tx_fault; 121 122 bool eee_active; 123 u8 eee_adv_caps; 124 u8 eee_lp_adv_caps; 125 }; 126 127 struct ecore_mcp_function_info { 128 u8 pause_on_host; 129 130 enum ecore_pci_personality protocol; 131 132 u8 bandwidth_min; 133 u8 bandwidth_max; 134 135 u8 mac[ETH_ALEN]; 136 137 u64 wwn_port; 138 u64 wwn_node; 139 140 #define ECORE_MCP_VLAN_UNSET (0xffff) 141 u16 ovlan; 142 143 u16 mtu; 144 }; 145 146 #ifndef __EXTRACT__LINUX__ 147 enum ecore_nvm_images { 148 ECORE_NVM_IMAGE_ISCSI_CFG, 149 ECORE_NVM_IMAGE_FCOE_CFG, 150 ECORE_NVM_IMAGE_MDUMP, 151 }; 152 #endif 153 154 struct ecore_mcp_drv_version { 155 u32 version; 156 u8 name[MCP_DRV_VER_STR_SIZE - 4]; 157 }; 158 159 struct ecore_mcp_lan_stats { 160 u64 ucast_rx_pkts; 161 u64 ucast_tx_pkts; 162 u32 fcs_err; 163 }; 164 165 #ifndef ECORE_PROTO_STATS 166 #define ECORE_PROTO_STATS 167 struct ecore_mcp_fcoe_stats { 168 u64 rx_pkts; 169 u64 tx_pkts; 170 u32 fcs_err; 171 u32 login_failure; 172 }; 173 174 struct ecore_mcp_iscsi_stats { 175 u64 rx_pdus; 176 u64 tx_pdus; 177 u64 rx_bytes; 178 u64 tx_bytes; 179 }; 180 181 struct ecore_mcp_rdma_stats { 182 u64 rx_pkts; 183 u64 tx_pkts; 184 u64 rx_bytes; 185 u64 tx_byts; 186 }; 187 188 enum ecore_mcp_protocol_type { 189 ECORE_MCP_LAN_STATS, 190 ECORE_MCP_FCOE_STATS, 191 ECORE_MCP_ISCSI_STATS, 192 ECORE_MCP_RDMA_STATS 193 }; 194 195 union ecore_mcp_protocol_stats { 196 struct ecore_mcp_lan_stats lan_stats; 197 struct ecore_mcp_fcoe_stats fcoe_stats; 198 struct ecore_mcp_iscsi_stats iscsi_stats; 199 struct ecore_mcp_rdma_stats rdma_stats; 200 }; 201 #endif 202 203 enum ecore_ov_client { 204 ECORE_OV_CLIENT_DRV, 205 ECORE_OV_CLIENT_USER, 206 ECORE_OV_CLIENT_VENDOR_SPEC 207 }; 208 209 enum ecore_ov_driver_state { 210 ECORE_OV_DRIVER_STATE_NOT_LOADED, 211 ECORE_OV_DRIVER_STATE_DISABLED, 212 ECORE_OV_DRIVER_STATE_ACTIVE 213 }; 214 215 enum ecore_ov_wol { 216 ECORE_OV_WOL_DEFAULT, 217 ECORE_OV_WOL_DISABLED, 218 ECORE_OV_WOL_ENABLED 219 }; 220 221 #ifndef __EXTRACT__LINUX__ 222 #define ECORE_MAX_NPIV_ENTRIES 128 223 #define ECORE_WWN_SIZE 8 224 struct ecore_fc_npiv_tbl { 225 u16 num_wwpn; 226 u16 num_wwnn; 227 u8 wwpn[ECORE_MAX_NPIV_ENTRIES][ECORE_WWN_SIZE]; 228 u8 wwnn[ECORE_MAX_NPIV_ENTRIES][ECORE_WWN_SIZE]; 229 }; 230 231 enum ecore_led_mode { 232 ECORE_LED_MODE_OFF, 233 ECORE_LED_MODE_ON, 234 ECORE_LED_MODE_RESTORE 235 }; 236 #endif 237 238 struct ecore_temperature_sensor { 239 u8 sensor_location; 240 u8 threshold_high; 241 u8 critical; 242 u8 current_temp; 243 }; 244 245 #define ECORE_MAX_NUM_OF_SENSORS 7 246 struct ecore_temperature_info { 247 u32 num_sensors; 248 struct ecore_temperature_sensor sensors[ECORE_MAX_NUM_OF_SENSORS]; 249 }; 250 251 enum ecore_mba_img_idx { 252 ECORE_MBA_LEGACY_IDX, 253 ECORE_MBA_PCI3CLP_IDX, 254 ECORE_MBA_PCI3_IDX, 255 ECORE_MBA_FCODE_IDX, 256 ECORE_EFI_X86_IDX, 257 ECORE_EFI_IPF_IDX, 258 ECORE_EFI_EBC_IDX, 259 ECORE_EFI_X64_IDX, 260 ECORE_MAX_NUM_OF_ROMIMG 261 }; 262 263 struct ecore_mba_vers { 264 u32 mba_vers[ECORE_MAX_NUM_OF_ROMIMG]; 265 }; 266 267 enum ecore_mfw_tlv_type { 268 ECORE_MFW_TLV_GENERIC = 0x1, /* Core driver TLVs */ 269 ECORE_MFW_TLV_ETH = 0x2, /* L2 driver TLVs */ 270 ECORE_MFW_TLV_FCOE = 0x4, /* FCoE protocol TLVs */ 271 ECORE_MFW_TLV_ISCSI = 0x8, /* SCSI protocol TLVs */ 272 ECORE_MFW_TLV_MAX = 0x16, 273 }; 274 275 struct ecore_mfw_tlv_generic { 276 struct { 277 u8 ipv4_csum_offload; 278 u8 lso_supported; 279 bool b_set; 280 } flags; 281 282 #define ECORE_MFW_TLV_MAC_COUNT 3 283 /* First entry for primary MAC, 2 secondary MACs possible */ 284 u8 mac[ECORE_MFW_TLV_MAC_COUNT][6]; 285 bool mac_set[ECORE_MFW_TLV_MAC_COUNT]; 286 287 u64 rx_frames; 288 bool rx_frames_set; 289 u64 rx_bytes; 290 bool rx_bytes_set; 291 u64 tx_frames; 292 bool tx_frames_set; 293 u64 tx_bytes; 294 bool tx_bytes_set; 295 }; 296 297 #ifndef __EXTRACT__LINUX__ 298 struct ecore_mfw_tlv_eth { 299 u16 lso_maxoff_size; 300 bool lso_maxoff_size_set; 301 u16 lso_minseg_size; 302 bool lso_minseg_size_set; 303 u8 prom_mode; 304 bool prom_mode_set; 305 u16 tx_descr_size; 306 bool tx_descr_size_set; 307 u16 rx_descr_size; 308 bool rx_descr_size_set; 309 u16 netq_count; 310 bool netq_count_set; 311 u32 tcp4_offloads; 312 bool tcp4_offloads_set; 313 u32 tcp6_offloads; 314 bool tcp6_offloads_set; 315 u16 tx_descr_qdepth; 316 bool tx_descr_qdepth_set; 317 u16 rx_descr_qdepth; 318 bool rx_descr_qdepth_set; 319 u8 iov_offload; 320 #define ECORE_MFW_TLV_IOV_OFFLOAD_NONE (0) 321 #define ECORE_MFW_TLV_IOV_OFFLOAD_MULTIQUEUE (1) 322 #define ECORE_MFW_TLV_IOV_OFFLOAD_VEB (2) 323 #define ECORE_MFW_TLV_IOV_OFFLOAD_VEPA (3) 324 bool iov_offload_set; 325 u8 txqs_empty; 326 bool txqs_empty_set; 327 u8 rxqs_empty; 328 bool rxqs_empty_set; 329 u8 num_txqs_full; 330 bool num_txqs_full_set; 331 u8 num_rxqs_full; 332 bool num_rxqs_full_set; 333 }; 334 335 struct ecore_mfw_tlv_time { 336 bool b_set; 337 u8 month; 338 u8 day; 339 u8 hour; 340 u8 min; 341 u16 msec; 342 u16 usec; 343 }; 344 345 struct ecore_mfw_tlv_fcoe { 346 u8 scsi_timeout; 347 bool scsi_timeout_set; 348 u32 rt_tov; 349 bool rt_tov_set; 350 u32 ra_tov; 351 bool ra_tov_set; 352 u32 ed_tov; 353 bool ed_tov_set; 354 u32 cr_tov; 355 bool cr_tov_set; 356 u8 boot_type; 357 bool boot_type_set; 358 u8 npiv_state; 359 bool npiv_state_set; 360 u32 num_npiv_ids; 361 bool num_npiv_ids_set; 362 u8 switch_name[8]; 363 bool switch_name_set; 364 u16 switch_portnum; 365 bool switch_portnum_set; 366 u8 switch_portid[3]; 367 bool switch_portid_set; 368 u8 vendor_name[8]; 369 bool vendor_name_set; 370 u8 switch_model[8]; 371 bool switch_model_set; 372 u8 switch_fw_version[8]; 373 bool switch_fw_version_set; 374 u8 qos_pri; 375 bool qos_pri_set; 376 u8 port_alias[3]; 377 bool port_alias_set; 378 u8 port_state; 379 #define ECORE_MFW_TLV_PORT_STATE_OFFLINE (0) 380 #define ECORE_MFW_TLV_PORT_STATE_LOOP (1) 381 #define ECORE_MFW_TLV_PORT_STATE_P2P (2) 382 #define ECORE_MFW_TLV_PORT_STATE_FABRIC (3) 383 bool port_state_set; 384 u16 fip_tx_descr_size; 385 bool fip_tx_descr_size_set; 386 u16 fip_rx_descr_size; 387 bool fip_rx_descr_size_set; 388 u16 link_failures; 389 bool link_failures_set; 390 u8 fcoe_boot_progress; 391 bool fcoe_boot_progress_set; 392 u64 rx_bcast; 393 bool rx_bcast_set; 394 u64 tx_bcast; 395 bool tx_bcast_set; 396 u16 fcoe_txq_depth; 397 bool fcoe_txq_depth_set; 398 u16 fcoe_rxq_depth; 399 bool fcoe_rxq_depth_set; 400 u64 fcoe_rx_frames; 401 bool fcoe_rx_frames_set; 402 u64 fcoe_rx_bytes; 403 bool fcoe_rx_bytes_set; 404 u64 fcoe_tx_frames; 405 bool fcoe_tx_frames_set; 406 u64 fcoe_tx_bytes; 407 bool fcoe_tx_bytes_set; 408 u16 crc_count; 409 bool crc_count_set; 410 u32 crc_err_src_fcid[5]; 411 bool crc_err_src_fcid_set[5]; 412 struct ecore_mfw_tlv_time crc_err[5]; 413 u16 losync_err; 414 bool losync_err_set; 415 u16 losig_err; 416 bool losig_err_set; 417 u16 primtive_err; 418 bool primtive_err_set; 419 u16 disparity_err; 420 bool disparity_err_set; 421 u16 code_violation_err; 422 bool code_violation_err_set; 423 u32 flogi_param[4]; 424 bool flogi_param_set[4]; 425 struct ecore_mfw_tlv_time flogi_tstamp; 426 u32 flogi_acc_param[4]; 427 bool flogi_acc_param_set[4]; 428 struct ecore_mfw_tlv_time flogi_acc_tstamp; 429 u32 flogi_rjt; 430 bool flogi_rjt_set; 431 struct ecore_mfw_tlv_time flogi_rjt_tstamp; 432 u32 fdiscs; 433 bool fdiscs_set; 434 u8 fdisc_acc; 435 bool fdisc_acc_set; 436 u8 fdisc_rjt; 437 bool fdisc_rjt_set; 438 u8 plogi; 439 bool plogi_set; 440 u8 plogi_acc; 441 bool plogi_acc_set; 442 u8 plogi_rjt; 443 bool plogi_rjt_set; 444 u32 plogi_dst_fcid[5]; 445 bool plogi_dst_fcid_set[5]; 446 struct ecore_mfw_tlv_time plogi_tstamp[5]; 447 u32 plogi_acc_src_fcid[5]; 448 bool plogi_acc_src_fcid_set[5]; 449 struct ecore_mfw_tlv_time plogi_acc_tstamp[5]; 450 u8 tx_plogos; 451 bool tx_plogos_set; 452 u8 plogo_acc; 453 bool plogo_acc_set; 454 u8 plogo_rjt; 455 bool plogo_rjt_set; 456 u32 plogo_src_fcid[5]; 457 bool plogo_src_fcid_set[5]; 458 struct ecore_mfw_tlv_time plogo_tstamp[5]; 459 u8 rx_logos; 460 bool rx_logos_set; 461 u8 tx_accs; 462 bool tx_accs_set; 463 u8 tx_prlis; 464 bool tx_prlis_set; 465 u8 rx_accs; 466 bool rx_accs_set; 467 u8 tx_abts; 468 bool tx_abts_set; 469 u8 rx_abts_acc; 470 bool rx_abts_acc_set; 471 u8 rx_abts_rjt; 472 bool rx_abts_rjt_set; 473 u32 abts_dst_fcid[5]; 474 bool abts_dst_fcid_set[5]; 475 struct ecore_mfw_tlv_time abts_tstamp[5]; 476 u8 rx_rscn; 477 bool rx_rscn_set; 478 u32 rx_rscn_nport[4]; 479 bool rx_rscn_nport_set[4]; 480 u8 tx_lun_rst; 481 bool tx_lun_rst_set; 482 u8 abort_task_sets; 483 bool abort_task_sets_set; 484 u8 tx_tprlos; 485 bool tx_tprlos_set; 486 u8 tx_nos; 487 bool tx_nos_set; 488 u8 rx_nos; 489 bool rx_nos_set; 490 u8 ols; 491 bool ols_set; 492 u8 lr; 493 bool lr_set; 494 u8 lrr; 495 bool lrr_set; 496 u8 tx_lip; 497 bool tx_lip_set; 498 u8 rx_lip; 499 bool rx_lip_set; 500 u8 eofa; 501 bool eofa_set; 502 u8 eofni; 503 bool eofni_set; 504 u8 scsi_chks; 505 bool scsi_chks_set; 506 u8 scsi_cond_met; 507 bool scsi_cond_met_set; 508 u8 scsi_busy; 509 bool scsi_busy_set; 510 u8 scsi_inter; 511 bool scsi_inter_set; 512 u8 scsi_inter_cond_met; 513 bool scsi_inter_cond_met_set; 514 u8 scsi_rsv_conflicts; 515 bool scsi_rsv_conflicts_set; 516 u8 scsi_tsk_full; 517 bool scsi_tsk_full_set; 518 u8 scsi_aca_active; 519 bool scsi_aca_active_set; 520 u8 scsi_tsk_abort; 521 bool scsi_tsk_abort_set; 522 u32 scsi_rx_chk[5]; 523 bool scsi_rx_chk_set[5]; 524 struct ecore_mfw_tlv_time scsi_chk_tstamp[5]; 525 }; 526 527 struct ecore_mfw_tlv_iscsi { 528 u8 target_llmnr; 529 bool target_llmnr_set; 530 u8 header_digest; 531 bool header_digest_set; 532 u8 data_digest; 533 bool data_digest_set; 534 u8 auth_method; 535 #define ECORE_MFW_TLV_AUTH_METHOD_NONE (1) 536 #define ECORE_MFW_TLV_AUTH_METHOD_CHAP (2) 537 #define ECORE_MFW_TLV_AUTH_METHOD_MUTUAL_CHAP (3) 538 bool auth_method_set; 539 u16 boot_taget_portal; 540 bool boot_taget_portal_set; 541 u16 frame_size; 542 bool frame_size_set; 543 u16 tx_desc_size; 544 bool tx_desc_size_set; 545 u16 rx_desc_size; 546 bool rx_desc_size_set; 547 u8 boot_progress; 548 bool boot_progress_set; 549 u16 tx_desc_qdepth; 550 bool tx_desc_qdepth_set; 551 u16 rx_desc_qdepth; 552 bool rx_desc_qdepth_set; 553 u64 rx_frames; 554 bool rx_frames_set; 555 u64 rx_bytes; 556 bool rx_bytes_set; 557 u64 tx_frames; 558 bool tx_frames_set; 559 u64 tx_bytes; 560 bool tx_bytes_set; 561 }; 562 #endif 563 564 union ecore_mfw_tlv_data { 565 struct ecore_mfw_tlv_generic generic; 566 struct ecore_mfw_tlv_eth eth; 567 struct ecore_mfw_tlv_fcoe fcoe; 568 struct ecore_mfw_tlv_iscsi iscsi; 569 }; 570 571 #ifndef __EXTRACT__LINUX__ 572 enum ecore_hw_info_change { 573 ECORE_HW_INFO_CHANGE_OVLAN, 574 }; 575 #endif 576 577 /** 578 * @brief - returns the link params of the hw function 579 * 580 * @param p_hwfn 581 * 582 * @returns pointer to link params 583 */ 584 struct ecore_mcp_link_params *ecore_mcp_get_link_params(struct ecore_hwfn 585 *p_hwfn); 586 587 /** 588 * @brief - return the link state of the hw function 589 * 590 * @param p_hwfn 591 * 592 * @returns pointer to link state 593 */ 594 struct ecore_mcp_link_state *ecore_mcp_get_link_state(struct ecore_hwfn 595 *p_hwfn); 596 597 /** 598 * @brief - return the link capabilities of the hw function 599 * 600 * @param p_hwfn 601 * 602 * @returns pointer to link capabilities 603 */ 604 struct ecore_mcp_link_capabilities 605 *ecore_mcp_get_link_capabilities(struct ecore_hwfn *p_hwfn); 606 607 /** 608 * @brief Request the MFW to set the the link according to 'link_input'. 609 * 610 * @param p_hwfn 611 * @param p_ptt 612 * @param b_up - raise link if `true'. Reset link if `false'. 613 * 614 * @return enum _ecore_status_t 615 */ 616 enum _ecore_status_t ecore_mcp_set_link(struct ecore_hwfn *p_hwfn, 617 struct ecore_ptt *p_ptt, 618 bool b_up); 619 620 /** 621 * @brief Get the management firmware version value 622 * 623 * @param p_hwfn 624 * @param p_ptt 625 * @param p_mfw_ver - mfw version value 626 * @param p_running_bundle_id - image id in nvram; Optional. 627 * 628 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 629 */ 630 enum _ecore_status_t ecore_mcp_get_mfw_ver(struct ecore_hwfn *p_hwfn, 631 struct ecore_ptt *p_ptt, 632 u32 *p_mfw_ver, 633 u32 *p_running_bundle_id); 634 635 /** 636 * @brief Get the MBI version value 637 * 638 * @param p_hwfn 639 * @param p_ptt 640 * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version. 641 * 642 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 643 */ 644 enum _ecore_status_t ecore_mcp_get_mbi_ver(struct ecore_hwfn *p_hwfn, 645 struct ecore_ptt *p_ptt, 646 u32 *p_mbi_ver); 647 648 /** 649 * @brief Get media type value of the port. 650 * 651 * @param p_dev - ecore dev pointer 652 * @param p_ptt 653 * @param mfw_ver - media type value 654 * 655 * @return enum _ecore_status_t - 656 * ECORE_SUCCESS - Operation was successful. 657 * ECORE_BUSY - Operation failed 658 */ 659 enum _ecore_status_t ecore_mcp_get_media_type(struct ecore_hwfn *p_hwfn, 660 struct ecore_ptt *p_ptt, 661 u32 *media_type); 662 663 /** 664 * @brief Get transciever data of the port. 665 * 666 * @param p_dev - ecore dev pointer 667 * @param p_ptt 668 * @param p_transciever_type - media type value 669 * 670 * @return enum _ecore_status_t - 671 * ECORE_SUCCESS - Operation was successful. 672 * ECORE_BUSY - Operation failed 673 */ 674 enum _ecore_status_t ecore_mcp_get_transceiver_data(struct ecore_hwfn *p_hwfn, 675 struct ecore_ptt *p_ptt, 676 u32 *p_tranceiver_type); 677 678 /** 679 * @brief Get transciever supported speed mask. 680 * 681 * @param p_dev - ecore dev pointer 682 * @param p_ptt 683 * @param p_speed_mask - Bit mask of all supported speeds. 684 * 685 * @return enum _ecore_status_t - 686 * ECORE_SUCCESS - Operation was successful. 687 * ECORE_BUSY - Operation failed 688 */ 689 690 enum _ecore_status_t ecore_mcp_trans_speed_mask(struct ecore_hwfn *p_hwfn, 691 struct ecore_ptt *p_ptt, 692 u32 *p_speed_mask); 693 694 /** 695 * @brief Get board configuration. 696 * 697 * @param p_dev - ecore dev pointer 698 * @param p_ptt 699 * @param p_board_config - Board config. 700 * 701 * @return enum _ecore_status_t - 702 * ECORE_SUCCESS - Operation was successful. 703 * ECORE_BUSY - Operation failed 704 */ 705 enum _ecore_status_t ecore_mcp_get_board_config(struct ecore_hwfn *p_hwfn, 706 struct ecore_ptt *p_ptt, 707 u32 *p_board_config); 708 709 /** 710 * @brief - Sends a command to the MCP mailbox. 711 * 712 * @param p_hwfn - hw function 713 * @param p_ptt - PTT required for register access 714 * @param cmd - command to be sent to the MCP 715 * @param param - Optional param 716 * @param o_mcp_resp - The MCP response code (exclude sequence) 717 * @param o_mcp_param - Optional parameter provided by the MCP response 718 * 719 * @return enum _ecore_status_t - 720 * ECORE_SUCCESS - operation was successful 721 * ECORE_BUSY - operation failed 722 */ 723 enum _ecore_status_t ecore_mcp_cmd(struct ecore_hwfn *p_hwfn, 724 struct ecore_ptt *p_ptt, u32 cmd, u32 param, 725 u32 *o_mcp_resp, u32 *o_mcp_param); 726 727 /** 728 * @brief - drains the nig, allowing completion to pass in case of pauses. 729 * (Should be called only from sleepable context) 730 * 731 * @param p_hwfn 732 * @param p_ptt 733 */ 734 enum _ecore_status_t ecore_mcp_drain(struct ecore_hwfn *p_hwfn, 735 struct ecore_ptt *p_ptt); 736 737 #ifndef LINUX_REMOVE 738 /** 739 * @brief - return the mcp function info of the hw function 740 * 741 * @param p_hwfn 742 * 743 * @returns pointer to mcp function info 744 */ 745 const struct ecore_mcp_function_info 746 *ecore_mcp_get_function_info(struct ecore_hwfn *p_hwfn); 747 #endif 748 749 #ifndef LINUX_REMOVE 750 /** 751 * @brief - count number of function with a matching personality on engine. 752 * 753 * @param p_hwfn 754 * @param p_ptt 755 * @param personalities - a bitmask of ecore_pci_personality values 756 * 757 * @returns the count of all devices on engine whose personality match one of 758 * the bitsmasks. 759 */ 760 int ecore_mcp_get_personality_cnt(struct ecore_hwfn *p_hwfn, 761 struct ecore_ptt *p_ptt, 762 u32 personalities); 763 #endif 764 765 /** 766 * @brief Get the flash size value 767 * 768 * @param p_hwfn 769 * @param p_ptt 770 * @param p_flash_size - flash size in bytes to be filled. 771 * 772 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 773 */ 774 enum _ecore_status_t ecore_mcp_get_flash_size(struct ecore_hwfn *p_hwfn, 775 struct ecore_ptt *p_ptt, 776 u32 *p_flash_size); 777 778 /** 779 * @brief Send driver version to MFW 780 * 781 * @param p_hwfn 782 * @param p_ptt 783 * @param version - Version value 784 * @param name - Protocol driver name 785 * 786 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 787 */ 788 enum _ecore_status_t 789 ecore_mcp_send_drv_version(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 790 struct ecore_mcp_drv_version *p_ver); 791 792 /** 793 * @brief Read the MFW process kill counter 794 * 795 * @param p_hwfn 796 * @param p_ptt 797 * 798 * @return u32 799 */ 800 u32 ecore_get_process_kill_counter(struct ecore_hwfn *p_hwfn, 801 struct ecore_ptt *p_ptt); 802 803 /** 804 * @brief Trigger a recovery process 805 * 806 * @param p_hwfn 807 * @param p_ptt 808 * 809 * @return enum _ecore_status_t 810 */ 811 enum _ecore_status_t ecore_start_recovery_process(struct ecore_hwfn *p_hwfn, 812 struct ecore_ptt *p_ptt); 813 814 /** 815 * @brief A recovery handler must call this function as its first step. 816 * It is assumed that the handler is not run from an interrupt context. 817 * 818 * @param p_dev 819 * @param p_ptt 820 * 821 * @return enum _ecore_status_t 822 */ 823 enum _ecore_status_t ecore_recovery_prolog(struct ecore_dev *p_dev); 824 825 /** 826 * @brief Notify MFW about the change in base device properties 827 * 828 * @param p_hwfn 829 * @param p_ptt 830 * @param client - ecore client type 831 * 832 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 833 */ 834 enum _ecore_status_t 835 ecore_mcp_ov_update_current_config(struct ecore_hwfn *p_hwfn, 836 struct ecore_ptt *p_ptt, 837 enum ecore_ov_client client); 838 839 /** 840 * @brief Notify MFW about the driver state 841 * 842 * @param p_hwfn 843 * @param p_ptt 844 * @param drv_state - Driver state 845 * 846 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 847 */ 848 enum _ecore_status_t 849 ecore_mcp_ov_update_driver_state(struct ecore_hwfn *p_hwfn, 850 struct ecore_ptt *p_ptt, 851 enum ecore_ov_driver_state drv_state); 852 853 /** 854 * @brief Read NPIV settings form the MFW 855 * 856 * @param p_hwfn 857 * @param p_ptt 858 * @param p_table - Array to hold the FC NPIV data. Client need allocate the 859 * required buffer. The field 'count' specifies number of NPIV 860 * entries. A value of 0 means the table was not populated. 861 * 862 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 863 */ 864 enum _ecore_status_t 865 ecore_mcp_ov_get_fc_npiv(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 866 struct ecore_fc_npiv_tbl *p_table); 867 868 /** 869 * @brief Send MTU size to MFW 870 * 871 * @param p_hwfn 872 * @param p_ptt 873 * @param mtu - MTU size 874 * 875 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 876 */ 877 enum _ecore_status_t ecore_mcp_ov_update_mtu(struct ecore_hwfn *p_hwfn, 878 struct ecore_ptt *p_ptt, u16 mtu); 879 880 /** 881 * @brief Send MAC address to MFW 882 * 883 * @param p_hwfn 884 * @param p_ptt 885 * @param mac - MAC address 886 * 887 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 888 */ 889 enum _ecore_status_t 890 ecore_mcp_ov_update_mac(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 891 u8 *mac); 892 893 /** 894 * @brief Send WOL mode to MFW 895 * 896 * @param p_hwfn 897 * @param p_ptt 898 * @param wol - WOL mode 899 * 900 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 901 */ 902 enum _ecore_status_t 903 ecore_mcp_ov_update_wol(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 904 enum ecore_ov_wol wol); 905 906 /** 907 * @brief Set LED status 908 * 909 * @param p_hwfn 910 * @param p_ptt 911 * @param mode - LED mode 912 * 913 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 914 */ 915 enum _ecore_status_t ecore_mcp_set_led(struct ecore_hwfn *p_hwfn, 916 struct ecore_ptt *p_ptt, 917 enum ecore_led_mode mode); 918 919 /** 920 * @brief Set secure mode 921 * 922 * @param p_dev 923 * @param addr - nvm offset 924 * 925 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 926 */ 927 enum _ecore_status_t ecore_mcp_nvm_set_secure_mode(struct ecore_dev *p_dev, 928 u32 addr); 929 930 /** 931 * @brief Write to phy 932 * 933 * @param p_dev 934 * @param addr - nvm offset 935 * @param cmd - nvm command 936 * @param p_buf - nvm write buffer 937 * @param len - buffer len 938 * 939 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 940 */ 941 enum _ecore_status_t ecore_mcp_phy_write(struct ecore_dev *p_dev, u32 cmd, 942 u32 addr, u8 *p_buf, u32 len); 943 944 /** 945 * @brief Write to nvm 946 * 947 * @param p_dev 948 * @param addr - nvm offset 949 * @param cmd - nvm command 950 * @param p_buf - nvm write buffer 951 * @param len - buffer len 952 * 953 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 954 */ 955 enum _ecore_status_t ecore_mcp_nvm_write(struct ecore_dev *p_dev, u32 cmd, 956 u32 addr, u8 *p_buf, u32 len); 957 958 /** 959 * @brief Put file begin 960 * 961 * @param p_dev 962 * @param addr - nvm offset 963 * 964 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 965 */ 966 enum _ecore_status_t ecore_mcp_nvm_put_file_begin(struct ecore_dev *p_dev, 967 u32 addr); 968 969 /** 970 * @brief Delete file 971 * 972 * @param p_dev 973 * @param addr - nvm offset 974 * 975 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 976 */ 977 enum _ecore_status_t ecore_mcp_nvm_del_file(struct ecore_dev *p_dev, 978 u32 addr); 979 980 /** 981 * @brief Check latest response 982 * 983 * @param p_dev 984 * @param p_buf - nvm write buffer 985 * 986 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 987 */ 988 enum _ecore_status_t ecore_mcp_nvm_resp(struct ecore_dev *p_dev, u8 *p_buf); 989 990 /** 991 * @brief Read from phy 992 * 993 * @param p_dev 994 * @param addr - nvm offset 995 * @param cmd - nvm command 996 * @param p_buf - nvm read buffer 997 * @param len - buffer len 998 * 999 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1000 */ 1001 enum _ecore_status_t ecore_mcp_phy_read(struct ecore_dev *p_dev, u32 cmd, 1002 u32 addr, u8 *p_buf, u32 len); 1003 1004 /** 1005 * @brief Read from nvm 1006 * 1007 * @param p_dev 1008 * @param addr - nvm offset 1009 * @param p_buf - nvm read buffer 1010 * @param len - buffer len 1011 * 1012 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1013 */ 1014 enum _ecore_status_t ecore_mcp_nvm_read(struct ecore_dev *p_dev, u32 addr, 1015 u8 *p_buf, u32 len); 1016 1017 struct ecore_nvm_image_att { 1018 u32 start_addr; 1019 u32 length; 1020 }; 1021 1022 /** 1023 * @brief Allows reading a whole nvram image 1024 * 1025 * @param p_hwfn 1026 * @param p_ptt 1027 * @param image_id - image to get attributes for 1028 * @param p_image_att - image attributes structure into which to fill data 1029 * 1030 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1031 */ 1032 enum _ecore_status_t 1033 ecore_mcp_get_nvm_image_att(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 1034 enum ecore_nvm_images image_id, 1035 struct ecore_nvm_image_att *p_image_att); 1036 1037 /** 1038 * @brief Allows reading a whole nvram image 1039 * 1040 * @param p_hwfn 1041 * @param p_ptt 1042 * @param image_id - image requested for reading 1043 * @param p_buffer - allocated buffer into which to fill data 1044 * @param buffer_len - length of the allocated buffer. 1045 * 1046 * @return ECORE_SUCCESS iff p_buffer now contains the nvram image. 1047 */ 1048 enum _ecore_status_t ecore_mcp_get_nvm_image(struct ecore_hwfn *p_hwfn, 1049 struct ecore_ptt *p_ptt, 1050 enum ecore_nvm_images image_id, 1051 u8 *p_buffer, u32 buffer_len); 1052 1053 /** 1054 * @brief - Sends an NVM write command request to the MFW with 1055 * payload. 1056 * 1057 * @param p_hwfn 1058 * @param p_ptt 1059 * @param cmd - Command: Either DRV_MSG_CODE_NVM_WRITE_NVRAM or 1060 * DRV_MSG_CODE_NVM_PUT_FILE_DATA 1061 * @param param - [0:23] - Offset [24:31] - Size 1062 * @param o_mcp_resp - MCP response 1063 * @param o_mcp_param - MCP response param 1064 * @param i_txn_size - Buffer size 1065 * @param i_buf - Pointer to the buffer 1066 * 1067 * @param return ECORE_SUCCESS upon success. 1068 */ 1069 enum _ecore_status_t ecore_mcp_nvm_wr_cmd(struct ecore_hwfn *p_hwfn, 1070 struct ecore_ptt *p_ptt, 1071 u32 cmd, 1072 u32 param, 1073 u32 *o_mcp_resp, 1074 u32 *o_mcp_param, 1075 u32 i_txn_size, 1076 u32 *i_buf); 1077 1078 /** 1079 * @brief - Sends an NVM read command request to the MFW to get 1080 * a buffer. 1081 * 1082 * @param p_hwfn 1083 * @param p_ptt 1084 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or 1085 * DRV_MSG_CODE_NVM_READ_NVRAM commands 1086 * @param param - [0:23] - Offset [24:31] - Size 1087 * @param o_mcp_resp - MCP response 1088 * @param o_mcp_param - MCP response param 1089 * @param o_txn_size - Buffer size output 1090 * @param o_buf - Pointer to the buffer returned by the MFW. 1091 * 1092 * @param return ECORE_SUCCESS upon success. 1093 */ 1094 enum _ecore_status_t ecore_mcp_nvm_rd_cmd(struct ecore_hwfn *p_hwfn, 1095 struct ecore_ptt *p_ptt, 1096 u32 cmd, 1097 u32 param, 1098 u32 *o_mcp_resp, 1099 u32 *o_mcp_param, 1100 u32 *o_txn_size, 1101 u32 *o_buf); 1102 1103 /** 1104 * @brief Read from sfp 1105 * 1106 * @param p_hwfn - hw function 1107 * @param p_ptt - PTT required for register access 1108 * @param port - transceiver port 1109 * @param addr - I2C address 1110 * @param offset - offset in sfp 1111 * @param len - buffer length 1112 * @param p_buf - buffer to read into 1113 * 1114 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1115 */ 1116 enum _ecore_status_t ecore_mcp_phy_sfp_read(struct ecore_hwfn *p_hwfn, 1117 struct ecore_ptt *p_ptt, 1118 u32 port, u32 addr, u32 offset, 1119 u32 len, u8 *p_buf); 1120 1121 /** 1122 * @brief Write to sfp 1123 * 1124 * @param p_hwfn - hw function 1125 * @param p_ptt - PTT required for register access 1126 * @param port - transceiver port 1127 * @param addr - I2C address 1128 * @param offset - offset in sfp 1129 * @param len - buffer length 1130 * @param p_buf - buffer to write from 1131 * 1132 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1133 */ 1134 enum _ecore_status_t ecore_mcp_phy_sfp_write(struct ecore_hwfn *p_hwfn, 1135 struct ecore_ptt *p_ptt, 1136 u32 port, u32 addr, u32 offset, 1137 u32 len, u8 *p_buf); 1138 1139 /** 1140 * @brief Gpio read 1141 * 1142 * @param p_hwfn - hw function 1143 * @param p_ptt - PTT required for register access 1144 * @param gpio - gpio number 1145 * @param gpio_val - value read from gpio 1146 * 1147 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1148 */ 1149 enum _ecore_status_t ecore_mcp_gpio_read(struct ecore_hwfn *p_hwfn, 1150 struct ecore_ptt *p_ptt, 1151 u16 gpio, u32 *gpio_val); 1152 1153 /** 1154 * @brief Gpio write 1155 * 1156 * @param p_hwfn - hw function 1157 * @param p_ptt - PTT required for register access 1158 * @param gpio - gpio number 1159 * @param gpio_val - value to write to gpio 1160 * 1161 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1162 */ 1163 enum _ecore_status_t ecore_mcp_gpio_write(struct ecore_hwfn *p_hwfn, 1164 struct ecore_ptt *p_ptt, 1165 u16 gpio, u16 gpio_val); 1166 1167 /** 1168 * @brief Gpio get information 1169 * 1170 * @param p_hwfn - hw function 1171 * @param p_ptt - PTT required for register access 1172 * @param gpio - gpio number 1173 * @param gpio_direction - gpio is output (0) or input (1) 1174 * @param gpio_ctrl - gpio control is uninitialized (0), 1175 * path 0 (1), path 1 (2) or shared(3) 1176 * 1177 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1178 */ 1179 enum _ecore_status_t ecore_mcp_gpio_info(struct ecore_hwfn *p_hwfn, 1180 struct ecore_ptt *p_ptt, 1181 u16 gpio, u32 *gpio_direction, 1182 u32 *gpio_ctrl); 1183 1184 /** 1185 * @brief Bist register test 1186 * 1187 * @param p_hwfn - hw function 1188 * @param p_ptt - PTT required for register access 1189 * 1190 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1191 */ 1192 enum _ecore_status_t ecore_mcp_bist_register_test(struct ecore_hwfn *p_hwfn, 1193 struct ecore_ptt *p_ptt); 1194 1195 /** 1196 * @brief Bist clock test 1197 * 1198 * @param p_hwfn - hw function 1199 * @param p_ptt - PTT required for register access 1200 * 1201 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1202 */ 1203 enum _ecore_status_t ecore_mcp_bist_clock_test(struct ecore_hwfn *p_hwfn, 1204 struct ecore_ptt *p_ptt); 1205 1206 /** 1207 * @brief Bist nvm test - get number of images 1208 * 1209 * @param p_hwfn - hw function 1210 * @param p_ptt - PTT required for register access 1211 * @param num_images - number of images if operation was 1212 * successful. 0 if not. 1213 * 1214 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1215 */ 1216 enum _ecore_status_t ecore_mcp_bist_nvm_test_get_num_images(struct ecore_hwfn *p_hwfn, 1217 struct ecore_ptt *p_ptt, 1218 u32 *num_images); 1219 1220 /** 1221 * @brief Bist nvm test - get image attributes by index 1222 * 1223 * @param p_hwfn - hw function 1224 * @param p_ptt - PTT required for register access 1225 * @param p_image_att - Attributes of image 1226 * @param image_index - Index of image to get information for 1227 * 1228 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1229 */ 1230 enum _ecore_status_t ecore_mcp_bist_nvm_test_get_image_att(struct ecore_hwfn *p_hwfn, 1231 struct ecore_ptt *p_ptt, 1232 struct bist_nvm_image_att *p_image_att, 1233 u32 image_index); 1234 1235 /** 1236 * @brief ecore_mcp_get_temperature_info - get the status of the temperature 1237 * sensors 1238 * 1239 * @param p_hwfn - hw function 1240 * @param p_ptt - PTT required for register access 1241 * @param p_temp_status - A pointer to an ecore_temperature_info structure to 1242 * be filled with the temperature data 1243 * 1244 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1245 */ 1246 enum _ecore_status_t 1247 ecore_mcp_get_temperature_info(struct ecore_hwfn *p_hwfn, 1248 struct ecore_ptt *p_ptt, 1249 struct ecore_temperature_info *p_temp_info); 1250 1251 /** 1252 * @brief Get MBA versions - get MBA sub images versions 1253 * 1254 * @param p_hwfn - hw function 1255 * @param p_ptt - PTT required for register access 1256 * @param p_mba_vers - MBA versions array to fill 1257 * 1258 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1259 */ 1260 enum _ecore_status_t ecore_mcp_get_mba_versions( 1261 struct ecore_hwfn *p_hwfn, 1262 struct ecore_ptt *p_ptt, 1263 struct ecore_mba_vers *p_mba_vers); 1264 1265 /** 1266 * @brief Count memory ecc events 1267 * 1268 * @param p_hwfn - hw function 1269 * @param p_ptt - PTT required for register access 1270 * @param num_events - number of memory ecc events 1271 * 1272 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1273 */ 1274 enum _ecore_status_t ecore_mcp_mem_ecc_events(struct ecore_hwfn *p_hwfn, 1275 struct ecore_ptt *p_ptt, 1276 u64 *num_events); 1277 1278 struct ecore_mdump_info { 1279 u32 reason; 1280 u32 version; 1281 u32 config; 1282 u32 epoch; 1283 u32 num_of_logs; 1284 u32 valid_logs; 1285 }; 1286 1287 /** 1288 * @brief - Gets the MFW crash dump configuration and logs info. 1289 * 1290 * @param p_hwfn 1291 * @param p_ptt 1292 * @param p_mdump_info 1293 * 1294 * @param return ECORE_SUCCESS upon success. 1295 */ 1296 enum _ecore_status_t 1297 ecore_mcp_mdump_get_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 1298 struct ecore_mdump_info *p_mdump_info); 1299 1300 /** 1301 * @brief - Clears the MFW crash dump logs. 1302 * 1303 * @param p_hwfn 1304 * @param p_ptt 1305 * 1306 * @param return ECORE_SUCCESS upon success. 1307 */ 1308 enum _ecore_status_t ecore_mcp_mdump_clear_logs(struct ecore_hwfn *p_hwfn, 1309 struct ecore_ptt *p_ptt); 1310 1311 /** 1312 * @brief - Clear the mdump retained data. 1313 * 1314 * @param p_hwfn 1315 * @param p_ptt 1316 * 1317 * @param return ECORE_SUCCESS upon success. 1318 */ 1319 enum _ecore_status_t ecore_mcp_mdump_clr_retain(struct ecore_hwfn *p_hwfn, 1320 struct ecore_ptt *p_ptt); 1321 1322 /** 1323 * @brief - Gets the LLDP MAC address. 1324 * 1325 * @param p_hwfn 1326 * @param p_ptt 1327 * @param lldp_mac_addr - a buffer to be filled with the read LLDP MAC address. 1328 * 1329 * @param return ECORE_SUCCESS upon success. 1330 */ 1331 enum _ecore_status_t ecore_mcp_get_lldp_mac(struct ecore_hwfn *p_hwfn, 1332 struct ecore_ptt *p_ptt, 1333 u8 lldp_mac_addr[ETH_ALEN]); 1334 1335 /** 1336 * @brief - Sets the LLDP MAC address. 1337 * 1338 * @param p_hwfn 1339 * @param p_ptt 1340 * @param lldp_mac_addr - a buffer with the LLDP MAC address to be written. 1341 * 1342 * @param return ECORE_SUCCESS upon success. 1343 */ 1344 enum _ecore_status_t ecore_mcp_set_lldp_mac(struct ecore_hwfn *p_hwfn, 1345 struct ecore_ptt *p_ptt, 1346 u8 lldp_mac_addr[ETH_ALEN]); 1347 1348 /** 1349 * @brief - Processes the TLV request from MFW i.e., get the required TLV info 1350 * from the ecore client and send it to the MFW. 1351 * 1352 * @param p_hwfn 1353 * @param p_ptt 1354 * 1355 * @param return ECORE_SUCCESS upon success. 1356 */ 1357 enum _ecore_status_t ecore_mfw_process_tlv_req(struct ecore_hwfn *p_hwfn, 1358 struct ecore_ptt *p_ptt); 1359 1360 /** 1361 * @brief - Update fcoe vlan id value to the MFW. 1362 * 1363 * @param p_hwfn 1364 * @param p_ptt 1365 * @param vlan - fcoe vlan 1366 * 1367 * @param return ECORE_SUCCESS upon success. 1368 */ 1369 enum _ecore_status_t 1370 ecore_mcp_update_fcoe_cvid(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 1371 u16 vlan); 1372 1373 /** 1374 * @brief - Update fabric name (wwn) value to the MFW. 1375 * 1376 * @param p_hwfn 1377 * @param p_ptt 1378 * @param wwn - world wide name 1379 * 1380 * @param return ECORE_SUCCESS upon success. 1381 */ 1382 enum _ecore_status_t 1383 ecore_mcp_update_fcoe_fabric_name(struct ecore_hwfn *p_hwfn, 1384 struct ecore_ptt *p_ptt, u8 *wwn); 1385 1386 /** 1387 * @brief - Return whether management firmware support smart AN 1388 * 1389 * @param p_hwfn 1390 * 1391 * @return bool - true if feature is supported. 1392 */ 1393 bool ecore_mcp_is_smart_an_supported(struct ecore_hwfn *p_hwfn); 1394 1395 /** 1396 * @brief - Return whether management firmware support setting of 1397 * PCI relaxed ordering. 1398 * 1399 * @param p_hwfn 1400 * 1401 * @return bool - true if feature is supported. 1402 */ 1403 bool ecore_mcp_rlx_odr_supported(struct ecore_hwfn *p_hwfn); 1404 #endif 1405