1 /* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 * 29 */ 30 31 #ifndef __ETH_COMMON__ 32 #define __ETH_COMMON__ 33 /********************/ 34 /* ETH FW CONSTANTS */ 35 /********************/ 36 37 /* FP HSI version. FP HSI is compatible if (fwVer.major == drvVer.major && fwVer.minor >= drvVer.minor) */ 38 #define ETH_HSI_VER_MAJOR 3 /* ETH FP HSI Major version */ 39 #define ETH_HSI_VER_MINOR 10 /* ETH FP HSI Minor version */ 40 41 #define ETH_HSI_VER_NO_PKT_LEN_TUNN 5 /* Alias for 8.7.x.x/8.8.x.x ETH FP HSI MINOR version. In this version driver is not required to set pkt_len field in eth_tx_1st_bd struct, and tunneling offload is not supported. */ 42 43 #define ETH_CACHE_LINE_SIZE 64 44 #define ETH_RX_CQE_GAP 32 45 #define ETH_MAX_RAMROD_PER_CON 8 46 #define ETH_TX_BD_PAGE_SIZE_BYTES 4096 47 #define ETH_RX_BD_PAGE_SIZE_BYTES 4096 48 #define ETH_RX_CQE_PAGE_SIZE_BYTES 4096 49 #define ETH_RX_NUM_NEXT_PAGE_BDS 2 50 51 /* Limitation for Tunneled LSO Packets on the offset (in bytes) of the inner IP header (relevant to LSO for tunneled packet): */ 52 #define ETH_MAX_TUNN_LSO_INNER_IPV4_OFFSET 253 /* Offset is limited to 253 bytes (inclusive). */ 53 #define ETH_MAX_TUNN_LSO_INNER_IPV6_OFFSET 251 /* Offset is limited to 251 bytes (inclusive). */ 54 55 #define ETH_TX_MIN_BDS_PER_NON_LSO_PKT 1 56 #define ETH_TX_MAX_BDS_PER_NON_LSO_PACKET 18 57 #define ETH_TX_MAX_BDS_PER_LSO_PACKET 255 58 #define ETH_TX_MAX_LSO_HDR_NBD 4 59 #define ETH_TX_MIN_BDS_PER_LSO_PKT 3 60 #define ETH_TX_MIN_BDS_PER_TUNN_IPV6_WITH_EXT_PKT 3 61 #define ETH_TX_MIN_BDS_PER_IPV6_WITH_EXT_PKT 2 62 #define ETH_TX_MIN_BDS_PER_PKT_W_LOOPBACK_MODE 2 63 #define ETH_TX_MAX_NON_LSO_PKT_LEN (9700 - (4 + 4 + 12 + 8)) /* (QM_REG_TASKBYTECRDCOST_0, QM_VOQ_BYTE_CRD_TASK_COST) - (VLAN-TAG + CRC + IPG + PREAMBLE) */ 64 #define ETH_TX_MAX_LSO_HDR_BYTES 510 65 #define ETH_TX_LSO_WINDOW_BDS_NUM (18 - 1) /* Number of BDs to consider for LSO sliding window restriction is (ETH_TX_LSO_WINDOW_BDS_NUM - hdr_nbd) */ 66 #define ETH_TX_LSO_WINDOW_MIN_LEN 9700 /* Minimum data length (in bytes) in LSO sliding window */ 67 #define ETH_TX_MAX_LSO_PAYLOAD_LEN 0xFE000 /* Maximum LSO packet TCP payload length (in bytes) */ 68 #define ETH_TX_NUM_SAME_AS_LAST_ENTRIES 320 /* Number of same-as-last resources in tx switching */ 69 #define ETH_TX_INACTIVE_SAME_AS_LAST 0xFFFF /* Value for a connection for which same as last feature is disabled */ 70 71 #define ETH_NUM_STATISTIC_COUNTERS MAX_NUM_VPORTS /* Maximum number of statistics counters */ 72 #define ETH_NUM_STATISTIC_COUNTERS_DOUBLE_VF_ZONE (ETH_NUM_STATISTIC_COUNTERS - MAX_NUM_VFS/2) /* Maximum number of statistics counters when doubled VF zone used */ 73 #define ETH_NUM_STATISTIC_COUNTERS_QUAD_VF_ZONE (ETH_NUM_STATISTIC_COUNTERS - 3*MAX_NUM_VFS/4) /* Maximum number of statistics counters when quad VF zone used */ 74 75 #define ETH_RX_MAX_BUFF_PER_PKT 5 /* Maximum number of buffers, used for RX packet placement */ 76 #define ETH_RX_BD_THRESHOLD 12 /* Minimum number of free BDs in RX ring, that guarantee receiving of at least one RX packet. */ 77 78 /* num of MAC/VLAN filters */ 79 #define ETH_NUM_MAC_FILTERS 512 80 #define ETH_NUM_VLAN_FILTERS 512 81 82 /* approx. multicast constants */ 83 #define ETH_MULTICAST_BIN_FROM_MAC_SEED 0 /* CRC seed for multicast bin calculation */ 84 #define ETH_MULTICAST_MAC_BINS 256 85 #define ETH_MULTICAST_MAC_BINS_IN_REGS (ETH_MULTICAST_MAC_BINS / 32) 86 87 /* ethernet vport update constants */ 88 #define ETH_FILTER_RULES_COUNT 10 89 #define ETH_RSS_IND_TABLE_ENTRIES_NUM 128 /* number of RSS indirection table entries, per Vport) */ 90 #define ETH_RSS_KEY_SIZE_REGS 10 /* Length of RSS key (in regs) */ 91 #define ETH_RSS_ENGINE_NUM_K2 207 /* number of available RSS engines in K2 */ 92 #define ETH_RSS_ENGINE_NUM_BB 127 /* number of available RSS engines in BB */ 93 94 /* TPA constants */ 95 #define ETH_TPA_MAX_AGGS_NUM 64 /* Maximum number of open TPA aggregations */ 96 #define ETH_TPA_CQE_START_LEN_LIST_SIZE ETH_RX_MAX_BUFF_PER_PKT /* Maximum number of additional buffers, reported by TPA-start CQE */ 97 #define ETH_TPA_CQE_CONT_LEN_LIST_SIZE 6 /* Maximum number of buffers, reported by TPA-continue CQE */ 98 #define ETH_TPA_CQE_END_LEN_LIST_SIZE 4 /* Maximum number of buffers, reported by TPA-end CQE */ 99 100 /* Control frame check constants */ 101 #define ETH_CTL_FRAME_ETH_TYPE_NUM 4 /* Number of etherType values configured by the driver for control frame check */ 102 103 104 105 /* 106 * Destination port mode 107 */ 108 enum dest_port_mode 109 { 110 DEST_PORT_PHY /* Send to physical port. */, 111 DEST_PORT_LOOPBACK /* Send to loopback port. */, 112 DEST_PORT_PHY_LOOPBACK /* Send to physical and loopback port. */, 113 DEST_PORT_DROP /* Drop the packet in PBF. */, 114 MAX_DEST_PORT_MODE 115 }; 116 117 118 /* 119 * Ethernet address type 120 */ 121 enum eth_addr_type 122 { 123 BROADCAST_ADDRESS, 124 MULTICAST_ADDRESS, 125 UNICAST_ADDRESS, 126 UNKNOWN_ADDRESS, 127 MAX_ETH_ADDR_TYPE 128 }; 129 130 131 struct eth_tx_1st_bd_flags 132 { 133 u8 bitfields; 134 #define ETH_TX_1ST_BD_FLAGS_START_BD_MASK 0x1 /* Set to 1 in the first BD. (for debug) */ 135 #define ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT 0 136 #define ETH_TX_1ST_BD_FLAGS_FORCE_VLAN_MODE_MASK 0x1 /* Do not allow additional VLAN manipulations on this packet. */ 137 #define ETH_TX_1ST_BD_FLAGS_FORCE_VLAN_MODE_SHIFT 1 138 #define ETH_TX_1ST_BD_FLAGS_IP_CSUM_MASK 0x1 /* Recalculate IP checksum. For tunneled packet - relevant to inner header. */ 139 #define ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT 2 140 #define ETH_TX_1ST_BD_FLAGS_L4_CSUM_MASK 0x1 /* Recalculate TCP/UDP checksum. For tunneled packet - relevant to inner header. */ 141 #define ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT 3 142 #define ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_MASK 0x1 /* If set, insert VLAN tag from vlan field to the packet. For tunneled packet - relevant to outer header. */ 143 #define ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT 4 144 #define ETH_TX_1ST_BD_FLAGS_LSO_MASK 0x1 /* If set, this is an LSO packet. Note: For Tunneled LSO packets, the offset of the inner IPV4 (and IPV6) header is limited to 253 (and 251 respectively) bytes, inclusive. */ 145 #define ETH_TX_1ST_BD_FLAGS_LSO_SHIFT 5 146 #define ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_MASK 0x1 /* Recalculate Tunnel IP Checksum (if Tunnel IP Header is IPv4) */ 147 #define ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT 6 148 #define ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_MASK 0x1 /* Recalculate Tunnel UDP/GRE Checksum (Depending on Tunnel Type) */ 149 #define ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT 7 150 }; 151 152 /* 153 * The parsing information data for the first tx bd of a given packet. 154 */ 155 struct eth_tx_data_1st_bd 156 { 157 __le16 vlan /* VLAN tag to insert to packet (if enabled by vlan_insertion flag). */; 158 u8 nbds /* Number of BDs in packet. Should be at least 1 in non-LSO packet and at least 3 in LSO (or Tunnel with IPv6+ext) packet. */; 159 struct eth_tx_1st_bd_flags bd_flags; 160 __le16 bitfields; 161 #define ETH_TX_DATA_1ST_BD_TUNN_FLAG_MASK 0x1 /* Indicates a tunneled packet. Must be set for encapsulated packet. */ 162 #define ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT 0 163 #define ETH_TX_DATA_1ST_BD_RESERVED0_MASK 0x1 164 #define ETH_TX_DATA_1ST_BD_RESERVED0_SHIFT 1 165 #define ETH_TX_DATA_1ST_BD_PKT_LEN_MASK 0x3FFF /* Total packet length - must be filled for non-LSO packets. */ 166 #define ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT 2 167 }; 168 169 /* 170 * The parsing information data for the second tx bd of a given packet. 171 */ 172 struct eth_tx_data_2nd_bd 173 { 174 __le16 tunn_ip_size /* For tunnel with IPv6+ext - Tunnel header IP datagram length (in BYTEs) */; 175 __le16 bitfields1; 176 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_MASK 0xF /* For Tunnel header with IPv6 ext. - Inner L2 Header Size (in 2-byte WORDs) */ 177 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_SHIFT 0 178 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_MASK 0x3 /* For Tunnel header with IPv6 ext. - Inner L2 Header MAC DA Type (use enum eth_addr_type) */ 179 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_SHIFT 4 180 #define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_MASK 0x3 /* Destination port mode. (use enum dest_port_mode) */ 181 #define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_SHIFT 6 182 #define ETH_TX_DATA_2ND_BD_START_BD_MASK 0x1 /* Should be 0 in all the BDs, except the first one. (for debug) */ 183 #define ETH_TX_DATA_2ND_BD_START_BD_SHIFT 8 184 #define ETH_TX_DATA_2ND_BD_TUNN_TYPE_MASK 0x3 /* For Tunnel header with IPv6 ext. - Tunnel Type (use enum eth_tx_tunn_type) */ 185 #define ETH_TX_DATA_2ND_BD_TUNN_TYPE_SHIFT 9 186 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_IPV6_MASK 0x1 /* For LSO / Tunnel header with IPv6+ext - Set if inner header is IPv6 */ 187 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_IPV6_SHIFT 11 188 #define ETH_TX_DATA_2ND_BD_IPV6_EXT_MASK 0x1 /* In tunneling mode - Set to 1 when the Inner header is IPv6 with extension. Otherwise set to 1 if the header is IPv6 with extension. */ 189 #define ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT 12 190 #define ETH_TX_DATA_2ND_BD_TUNN_IPV6_EXT_MASK 0x1 /* Set to 1 if Tunnel (outer = encapsulating) header has IPv6 ext. (Note: 3rd BD is required, hence EDPM does not support Tunnel [outer] header with Ipv6Ext) */ 191 #define ETH_TX_DATA_2ND_BD_TUNN_IPV6_EXT_SHIFT 13 192 #define ETH_TX_DATA_2ND_BD_L4_UDP_MASK 0x1 /* Set if (inner) L4 protocol is UDP. (Required when IPv6+ext (or tunnel with inner or outer Ipv6+ext) and l4_csum is set) */ 193 #define ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT 14 194 #define ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_MASK 0x1 /* The pseudo header checksum type in the L4 checksum field. Required when IPv6+ext and l4_csum is set. (use enum eth_l4_pseudo_checksum_mode) */ 195 #define ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT 15 196 __le16 bitfields2; 197 #define ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK 0x1FFF /* For inner/outer header IPv6+ext - (inner) L4 header offset (in 2-byte WORDs). For regular packet - offset from the beginning of the packet. For tunneled packet - offset from the beginning of the inner header */ 198 #define ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT 0 199 #define ETH_TX_DATA_2ND_BD_RESERVED0_MASK 0x7 200 #define ETH_TX_DATA_2ND_BD_RESERVED0_SHIFT 13 201 }; 202 203 /* 204 * Firmware data for L2-EDPM packet. 205 */ 206 struct eth_edpm_fw_data 207 { 208 struct eth_tx_data_1st_bd data_1st_bd /* Parsing information data from the 1st BD. */; 209 struct eth_tx_data_2nd_bd data_2nd_bd /* Parsing information data from the 2nd BD. */; 210 __le32 reserved; 211 }; 212 213 214 /* 215 * FW debug. 216 */ 217 struct eth_fast_path_cqe_fw_debug 218 { 219 __le16 reserved2 /* FW reserved. */; 220 }; 221 222 223 /* 224 * tunneling parsing flags 225 */ 226 struct eth_tunnel_parsing_flags 227 { 228 u8 flags; 229 #define ETH_TUNNEL_PARSING_FLAGS_TYPE_MASK 0x3 /* 0 - no tunneling, 1 - GENEVE, 2 - GRE, 3 - VXLAN (use enum eth_rx_tunn_type) */ 230 #define ETH_TUNNEL_PARSING_FLAGS_TYPE_SHIFT 0 231 #define ETH_TUNNEL_PARSING_FLAGS_TENNANT_ID_EXIST_MASK 0x1 /* If it s not an encapsulated packet then put 0x0. If it s an encapsulated packet but the tenant-id doesn t exist then put 0x0. Else put 0x1 */ 232 #define ETH_TUNNEL_PARSING_FLAGS_TENNANT_ID_EXIST_SHIFT 2 233 #define ETH_TUNNEL_PARSING_FLAGS_NEXT_PROTOCOL_MASK 0x3 /* Type of the next header above the tunneling: 0 - unknown, 1 - L2, 2 - Ipv4, 3 - IPv6 (use enum tunnel_next_protocol) */ 234 #define ETH_TUNNEL_PARSING_FLAGS_NEXT_PROTOCOL_SHIFT 3 235 #define ETH_TUNNEL_PARSING_FLAGS_FIRSTHDRIPMATCH_MASK 0x1 /* The result of comparing the DA-ip of the tunnel header. */ 236 #define ETH_TUNNEL_PARSING_FLAGS_FIRSTHDRIPMATCH_SHIFT 5 237 #define ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK 0x1 238 #define ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT 6 239 #define ETH_TUNNEL_PARSING_FLAGS_IPV4_OPTIONS_MASK 0x1 240 #define ETH_TUNNEL_PARSING_FLAGS_IPV4_OPTIONS_SHIFT 7 241 }; 242 243 /* 244 * PMD flow control bits 245 */ 246 struct eth_pmd_flow_flags 247 { 248 u8 flags; 249 #define ETH_PMD_FLOW_FLAGS_VALID_MASK 0x1 /* CQE valid bit */ 250 #define ETH_PMD_FLOW_FLAGS_VALID_SHIFT 0 251 #define ETH_PMD_FLOW_FLAGS_TOGGLE_MASK 0x1 /* CQE ring toggle bit */ 252 #define ETH_PMD_FLOW_FLAGS_TOGGLE_SHIFT 1 253 #define ETH_PMD_FLOW_FLAGS_RESERVED_MASK 0x3F 254 #define ETH_PMD_FLOW_FLAGS_RESERVED_SHIFT 2 255 }; 256 257 /* 258 * Regular ETH Rx FP CQE. 259 */ 260 struct eth_fast_path_rx_reg_cqe 261 { 262 u8 type /* CQE type */; 263 u8 bitfields; 264 #define ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE_MASK 0x7 /* Type of calculated RSS hash (use enum rss_hash_type) */ 265 #define ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE_SHIFT 0 266 #define ETH_FAST_PATH_RX_REG_CQE_TC_MASK 0xF /* Traffic Class */ 267 #define ETH_FAST_PATH_RX_REG_CQE_TC_SHIFT 3 268 #define ETH_FAST_PATH_RX_REG_CQE_RESERVED0_MASK 0x1 269 #define ETH_FAST_PATH_RX_REG_CQE_RESERVED0_SHIFT 7 270 __le16 pkt_len /* Total packet length (from the parser) */; 271 struct parsing_and_err_flags pars_flags /* Parsing and error flags from the parser */; 272 __le16 vlan_tag /* 802.1q VLAN tag */; 273 __le32 rss_hash /* RSS hash result */; 274 __le16 len_on_first_bd /* Number of bytes placed on first BD */; 275 u8 placement_offset /* Offset of placement from BD start */; 276 struct eth_tunnel_parsing_flags tunnel_pars_flags /* Tunnel Parsing Flags */; 277 u8 bd_num /* Number of BDs, used for packet */; 278 u8 reserved[9]; 279 struct eth_fast_path_cqe_fw_debug fw_debug /* FW reserved. */; 280 u8 reserved1[3]; 281 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */; 282 }; 283 284 285 /* 286 * TPA-continue ETH Rx FP CQE. 287 */ 288 struct eth_fast_path_rx_tpa_cont_cqe 289 { 290 u8 type /* CQE type */; 291 u8 tpa_agg_index /* TPA aggregation index */; 292 __le16 len_list[ETH_TPA_CQE_CONT_LEN_LIST_SIZE] /* List of the segment sizes */; 293 u8 reserved; 294 u8 reserved1 /* FW reserved. */; 295 __le16 reserved2[ETH_TPA_CQE_CONT_LEN_LIST_SIZE] /* FW reserved. */; 296 u8 reserved3[3]; 297 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */; 298 }; 299 300 301 /* 302 * TPA-end ETH Rx FP CQE . 303 */ 304 struct eth_fast_path_rx_tpa_end_cqe 305 { 306 u8 type /* CQE type */; 307 u8 tpa_agg_index /* TPA aggregation index */; 308 __le16 total_packet_len /* Total aggregated packet length */; 309 u8 num_of_bds /* Total number of BDs comprising the packet */; 310 u8 end_reason /* Aggregation end reason. Use enum eth_tpa_end_reason */; 311 __le16 num_of_coalesced_segs /* Number of coalesced TCP segments */; 312 __le32 ts_delta /* TCP timestamp delta */; 313 __le16 len_list[ETH_TPA_CQE_END_LEN_LIST_SIZE] /* List of the segment sizes */; 314 __le16 reserved3[ETH_TPA_CQE_END_LEN_LIST_SIZE] /* FW reserved. */; 315 __le16 reserved1; 316 u8 reserved2 /* FW reserved. */; 317 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */; 318 }; 319 320 321 /* 322 * TPA-start ETH Rx FP CQE. 323 */ 324 struct eth_fast_path_rx_tpa_start_cqe 325 { 326 u8 type /* CQE type */; 327 u8 bitfields; 328 #define ETH_FAST_PATH_RX_TPA_START_CQE_RSS_HASH_TYPE_MASK 0x7 /* Type of calculated RSS hash (use enum rss_hash_type) */ 329 #define ETH_FAST_PATH_RX_TPA_START_CQE_RSS_HASH_TYPE_SHIFT 0 330 #define ETH_FAST_PATH_RX_TPA_START_CQE_TC_MASK 0xF /* Traffic Class */ 331 #define ETH_FAST_PATH_RX_TPA_START_CQE_TC_SHIFT 3 332 #define ETH_FAST_PATH_RX_TPA_START_CQE_RESERVED0_MASK 0x1 333 #define ETH_FAST_PATH_RX_TPA_START_CQE_RESERVED0_SHIFT 7 334 __le16 seg_len /* Segment length (packetLen from the parser) */; 335 struct parsing_and_err_flags pars_flags /* Parsing and error flags from the parser */; 336 __le16 vlan_tag /* 802.1q VLAN tag */; 337 __le32 rss_hash /* RSS hash result */; 338 __le16 len_on_first_bd /* Number of bytes placed on first BD */; 339 u8 placement_offset /* Offset of placement from BD start */; 340 struct eth_tunnel_parsing_flags tunnel_pars_flags /* Tunnel Parsing Flags */; 341 u8 tpa_agg_index /* TPA aggregation index */; 342 u8 header_len /* Packet L2+L3+L4 header length */; 343 __le16 ext_bd_len_list[ETH_TPA_CQE_START_LEN_LIST_SIZE] /* Additional BDs length list. */; 344 struct eth_fast_path_cqe_fw_debug fw_debug /* FW reserved. */; 345 u8 reserved; 346 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */; 347 }; 348 349 350 /* 351 * The L4 pseudo checksum mode for Ethernet 352 */ 353 enum eth_l4_pseudo_checksum_mode 354 { 355 ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH /* Pseudo Header checksum on packet is calculated with the correct packet length field. */, 356 ETH_L4_PSEUDO_CSUM_ZERO_LENGTH /* Pseudo Header checksum on packet is calculated with zero length field. */, 357 MAX_ETH_L4_PSEUDO_CHECKSUM_MODE 358 }; 359 360 361 362 struct eth_rx_bd 363 { 364 struct regpair addr /* single continues buffer */; 365 }; 366 367 368 /* 369 * regular ETH Rx SP CQE 370 */ 371 struct eth_slow_path_rx_cqe 372 { 373 u8 type /* CQE type */; 374 u8 ramrod_cmd_id; 375 u8 error_flag; 376 u8 reserved[25]; 377 __le16 echo; 378 u8 reserved1; 379 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */; 380 }; 381 382 /* 383 * union for all ETH Rx CQE types 384 */ 385 union eth_rx_cqe 386 { 387 struct eth_fast_path_rx_reg_cqe fast_path_regular /* Regular FP CQE */; 388 struct eth_fast_path_rx_tpa_start_cqe fast_path_tpa_start /* TPA-start CQE */; 389 struct eth_fast_path_rx_tpa_cont_cqe fast_path_tpa_cont /* TPA-continue CQE */; 390 struct eth_fast_path_rx_tpa_end_cqe fast_path_tpa_end /* TPA-end CQE */; 391 struct eth_slow_path_rx_cqe slow_path /* SP CQE */; 392 }; 393 394 395 /* 396 * ETH Rx CQE type 397 */ 398 enum eth_rx_cqe_type 399 { 400 ETH_RX_CQE_TYPE_UNUSED, 401 ETH_RX_CQE_TYPE_REGULAR /* Regular FP ETH Rx CQE */, 402 ETH_RX_CQE_TYPE_SLOW_PATH /* Slow path ETH Rx CQE */, 403 ETH_RX_CQE_TYPE_TPA_START /* TPA start ETH Rx CQE */, 404 ETH_RX_CQE_TYPE_TPA_CONT /* TPA Continue ETH Rx CQE */, 405 ETH_RX_CQE_TYPE_TPA_END /* TPA end ETH Rx CQE */, 406 MAX_ETH_RX_CQE_TYPE 407 }; 408 409 410 /* 411 * Wrapper for PD RX CQE - used in order to cover full cache line when writing CQE 412 */ 413 struct eth_rx_pmd_cqe 414 { 415 union eth_rx_cqe cqe /* CQE data itself */; 416 u8 reserved[ETH_RX_CQE_GAP]; 417 }; 418 419 420 /* 421 * Eth RX Tunnel Type 422 */ 423 enum eth_rx_tunn_type 424 { 425 ETH_RX_NO_TUNN /* No Tunnel. */, 426 ETH_RX_TUNN_GENEVE /* GENEVE Tunnel. */, 427 ETH_RX_TUNN_GRE /* GRE Tunnel. */, 428 ETH_RX_TUNN_VXLAN /* VXLAN Tunnel. */, 429 MAX_ETH_RX_TUNN_TYPE 430 }; 431 432 433 434 /* 435 * Aggregation end reason. 436 */ 437 enum eth_tpa_end_reason 438 { 439 ETH_AGG_END_UNUSED, 440 ETH_AGG_END_SP_UPDATE /* SP configuration update */, 441 ETH_AGG_END_MAX_LEN /* Maximum aggregation length or maximum buffer number used. */, 442 ETH_AGG_END_LAST_SEG /* TCP PSH flag or TCP payload length below continue threshold. */, 443 ETH_AGG_END_TIMEOUT /* Timeout expiration. */, 444 ETH_AGG_END_NOT_CONSISTENT /* Packet header not consistency: different IPv4 TOS, TTL or flags, IPv6 TC, Hop limit or Flow label, TCP header length or TS options. In GRO different TS value, SMAC, DMAC, ackNum, windowSize or VLAN */, 445 ETH_AGG_END_OUT_OF_ORDER /* Out of order or retransmission packet: sequence, ack or timestamp not consistent with previous segment. */, 446 ETH_AGG_END_NON_TPA_SEG /* Next segment cant be aggregated due to LLC/SNAP, IP error, IP fragment, IPv4 options, IPv6 extension, IP ECN = CE, TCP errors, TCP options, zero TCP payload length , TCP flags or not supported tunnel header options. */, 447 MAX_ETH_TPA_END_REASON 448 }; 449 450 451 452 /* 453 * The first tx bd of a given packet 454 */ 455 struct eth_tx_1st_bd 456 { 457 struct regpair addr /* Single continuous buffer */; 458 __le16 nbytes /* Number of bytes in this BD. */; 459 struct eth_tx_data_1st_bd data /* Parsing information data. */; 460 }; 461 462 463 464 /* 465 * The second tx bd of a given packet 466 */ 467 struct eth_tx_2nd_bd 468 { 469 struct regpair addr /* Single continuous buffer */; 470 __le16 nbytes /* Number of bytes in this BD. */; 471 struct eth_tx_data_2nd_bd data /* Parsing information data. */; 472 }; 473 474 475 /* 476 * The parsing information data for the third tx bd of a given packet. 477 */ 478 struct eth_tx_data_3rd_bd 479 { 480 __le16 lso_mss /* For LSO packet - the MSS in bytes. */; 481 __le16 bitfields; 482 #define ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK 0xF /* For LSO with inner/outer IPv6+ext - TCP header length (in 4-byte WORDs) */ 483 #define ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT 0 484 #define ETH_TX_DATA_3RD_BD_HDR_NBD_MASK 0xF /* LSO - number of BDs which contain headers. value should be in range (1..ETH_TX_MAX_LSO_HDR_NBD). */ 485 #define ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT 4 486 #define ETH_TX_DATA_3RD_BD_START_BD_MASK 0x1 /* Should be 0 in all the BDs, except the first one. (for debug) */ 487 #define ETH_TX_DATA_3RD_BD_START_BD_SHIFT 8 488 #define ETH_TX_DATA_3RD_BD_RESERVED0_MASK 0x7F 489 #define ETH_TX_DATA_3RD_BD_RESERVED0_SHIFT 9 490 u8 tunn_l4_hdr_start_offset_w /* For tunnel with IPv6+ext - Pointer to the tunnel L4 Header (in 2-byte WORDs) */; 491 u8 tunn_hdr_size_w /* For tunnel with IPv6+ext - Total size of the Tunnel Header (in 2-byte WORDs) */; 492 }; 493 494 /* 495 * The third tx bd of a given packet 496 */ 497 struct eth_tx_3rd_bd 498 { 499 struct regpair addr /* Single continuous buffer */; 500 __le16 nbytes /* Number of bytes in this BD. */; 501 struct eth_tx_data_3rd_bd data /* Parsing information data. */; 502 }; 503 504 505 /* 506 * Complementary information for the regular tx bd of a given packet. 507 */ 508 struct eth_tx_data_bd 509 { 510 __le16 reserved0; 511 __le16 bitfields; 512 #define ETH_TX_DATA_BD_RESERVED1_MASK 0xFF 513 #define ETH_TX_DATA_BD_RESERVED1_SHIFT 0 514 #define ETH_TX_DATA_BD_START_BD_MASK 0x1 /* Should be 0 in all the BDs, except the first one. (for debug) */ 515 #define ETH_TX_DATA_BD_START_BD_SHIFT 8 516 #define ETH_TX_DATA_BD_RESERVED2_MASK 0x7F 517 #define ETH_TX_DATA_BD_RESERVED2_SHIFT 9 518 __le16 reserved3; 519 }; 520 521 /* 522 * The common regular TX BD ring element 523 */ 524 struct eth_tx_bd 525 { 526 struct regpair addr /* Single continuous buffer */; 527 __le16 nbytes /* Number of bytes in this BD. */; 528 struct eth_tx_data_bd data /* Complementary information. */; 529 }; 530 531 532 union eth_tx_bd_types 533 { 534 struct eth_tx_1st_bd first_bd /* The first tx bd of a given packet */; 535 struct eth_tx_2nd_bd second_bd /* The second tx bd of a given packet */; 536 struct eth_tx_3rd_bd third_bd /* The third tx bd of a given packet */; 537 struct eth_tx_bd reg_bd /* The common non-special bd */; 538 }; 539 540 541 542 543 544 545 /* 546 * Eth Tx Tunnel Type 547 */ 548 enum eth_tx_tunn_type 549 { 550 ETH_TX_TUNN_GENEVE /* GENEVE Tunnel. */, 551 ETH_TX_TUNN_TTAG /* T-Tag Tunnel. */, 552 ETH_TX_TUNN_GRE /* GRE Tunnel. */, 553 ETH_TX_TUNN_VXLAN /* VXLAN Tunnel. */, 554 MAX_ETH_TX_TUNN_TYPE 555 }; 556 557 558 /* 559 * Ystorm Queue Zone 560 */ 561 struct xstorm_eth_queue_zone 562 { 563 struct coalescing_timeset int_coalescing_timeset /* Tx interrupt coalescing TimeSet */; 564 u8 reserved[7]; 565 }; 566 567 568 /* 569 * ETH doorbell data 570 */ 571 struct eth_db_data 572 { 573 u8 params; 574 #define ETH_DB_DATA_DEST_MASK 0x3 /* destination of doorbell (use enum db_dest) */ 575 #define ETH_DB_DATA_DEST_SHIFT 0 576 #define ETH_DB_DATA_AGG_CMD_MASK 0x3 /* aggregative command to CM (use enum db_agg_cmd_sel) */ 577 #define ETH_DB_DATA_AGG_CMD_SHIFT 2 578 #define ETH_DB_DATA_BYPASS_EN_MASK 0x1 /* enable QM bypass */ 579 #define ETH_DB_DATA_BYPASS_EN_SHIFT 4 580 #define ETH_DB_DATA_RESERVED_MASK 0x1 581 #define ETH_DB_DATA_RESERVED_SHIFT 5 582 #define ETH_DB_DATA_AGG_VAL_SEL_MASK 0x3 /* aggregative value selection */ 583 #define ETH_DB_DATA_AGG_VAL_SEL_SHIFT 6 584 u8 agg_flags /* bit for every DQ counter flags in CM context that DQ can increment */; 585 __le16 bd_prod; 586 }; 587 588 #endif /* __ETH_COMMON__ */ 589