1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011-2013 Qlogic Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * File: qla_os.c 32 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 #include "qla_os.h" 39 #include "qla_reg.h" 40 #include "qla_hw.h" 41 #include "qla_def.h" 42 #include "qla_inline.h" 43 #include "qla_ver.h" 44 #include "qla_glbl.h" 45 #include "qla_dbg.h" 46 47 /* 48 * Some PCI Configuration Space Related Defines 49 */ 50 51 #ifndef PCI_VENDOR_QLOGIC 52 #define PCI_VENDOR_QLOGIC 0x1077 53 #endif 54 55 #ifndef PCI_PRODUCT_QLOGIC_ISP8020 56 #define PCI_PRODUCT_QLOGIC_ISP8020 0x8020 57 #endif 58 59 #define PCI_QLOGIC_ISP8020 \ 60 ((PCI_PRODUCT_QLOGIC_ISP8020 << 16) | PCI_VENDOR_QLOGIC) 61 62 /* 63 * static functions 64 */ 65 static int qla_alloc_parent_dma_tag(qla_host_t *ha); 66 static void qla_free_parent_dma_tag(qla_host_t *ha); 67 static int qla_alloc_xmt_bufs(qla_host_t *ha); 68 static void qla_free_xmt_bufs(qla_host_t *ha); 69 static int qla_alloc_rcv_bufs(qla_host_t *ha); 70 static void qla_free_rcv_bufs(qla_host_t *ha); 71 72 static void qla_init_ifnet(device_t dev, qla_host_t *ha); 73 static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS); 74 static void qla_release(qla_host_t *ha); 75 static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 76 int error); 77 static void qla_stop(qla_host_t *ha); 78 static int qla_send(qla_host_t *ha, struct mbuf **m_headp); 79 static void qla_tx_done(void *context, int pending); 80 81 /* 82 * Hooks to the Operating Systems 83 */ 84 static int qla_pci_probe (device_t); 85 static int qla_pci_attach (device_t); 86 static int qla_pci_detach (device_t); 87 88 static void qla_init(void *arg); 89 static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 90 static int qla_media_change(struct ifnet *ifp); 91 static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 92 93 static device_method_t qla_pci_methods[] = { 94 /* Device interface */ 95 DEVMETHOD(device_probe, qla_pci_probe), 96 DEVMETHOD(device_attach, qla_pci_attach), 97 DEVMETHOD(device_detach, qla_pci_detach), 98 { 0, 0 } 99 }; 100 101 static driver_t qla_pci_driver = { 102 "ql", qla_pci_methods, sizeof (qla_host_t), 103 }; 104 105 DRIVER_MODULE(qla80xx, pci, qla_pci_driver, 0, 0); 106 107 MODULE_DEPEND(qla80xx, pci, 1, 1, 1); 108 MODULE_DEPEND(qla80xx, ether, 1, 1, 1); 109 110 MALLOC_DEFINE(M_QLA8XXXBUF, "qla80xxbuf", "Buffers for qla80xx driver"); 111 112 uint32_t std_replenish = 8; 113 uint32_t jumbo_replenish = 2; 114 uint32_t rcv_pkt_thres = 128; 115 uint32_t rcv_pkt_thres_d = 32; 116 uint32_t snd_pkt_thres = 16; 117 uint32_t free_pkt_thres = (NUM_TX_DESCRIPTORS / 2); 118 119 static char dev_str[64]; 120 121 /* 122 * Name: qla_pci_probe 123 * Function: Validate the PCI device to be a QLA80XX device 124 */ 125 static int 126 qla_pci_probe(device_t dev) 127 { 128 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 129 case PCI_QLOGIC_ISP8020: 130 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 131 "Qlogic ISP 80xx PCI CNA Adapter-Ethernet Function", 132 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 133 QLA_VERSION_BUILD); 134 device_set_desc(dev, dev_str); 135 break; 136 default: 137 return (ENXIO); 138 } 139 140 if (bootverbose) 141 printf("%s: %s\n ", __func__, dev_str); 142 143 return (BUS_PROBE_DEFAULT); 144 } 145 146 static void 147 qla_add_sysctls(qla_host_t *ha) 148 { 149 device_t dev = ha->pci_dev; 150 151 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 152 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 153 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, 154 (void *)ha, 0, qla_sysctl_get_stats, "I", "Statistics"); 155 156 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 157 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 158 OID_AUTO, "fw_version", CTLFLAG_RD, 159 ha->fw_ver_str, 0, "firmware version"); 160 161 dbg_level = 0; 162 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 163 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 164 OID_AUTO, "debug", CTLFLAG_RW, 165 &dbg_level, dbg_level, "Debug Level"); 166 167 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 168 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 169 OID_AUTO, "std_replenish", CTLFLAG_RW, 170 &std_replenish, std_replenish, 171 "Threshold for Replenishing Standard Frames"); 172 173 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 174 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 175 OID_AUTO, "jumbo_replenish", CTLFLAG_RW, 176 &jumbo_replenish, jumbo_replenish, 177 "Threshold for Replenishing Jumbo Frames"); 178 179 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 180 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 181 OID_AUTO, "rcv_pkt_thres", CTLFLAG_RW, 182 &rcv_pkt_thres, rcv_pkt_thres, 183 "Threshold for # of rcv pkts to trigger indication isr"); 184 185 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 186 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 187 OID_AUTO, "rcv_pkt_thres_d", CTLFLAG_RW, 188 &rcv_pkt_thres_d, rcv_pkt_thres_d, 189 "Threshold for # of rcv pkts to trigger indication defered"); 190 191 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 192 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 193 OID_AUTO, "snd_pkt_thres", CTLFLAG_RW, 194 &snd_pkt_thres, snd_pkt_thres, 195 "Threshold for # of snd packets"); 196 197 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 198 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 199 OID_AUTO, "free_pkt_thres", CTLFLAG_RW, 200 &free_pkt_thres, free_pkt_thres, 201 "Threshold for # of packets to free at a time"); 202 203 return; 204 } 205 206 static void 207 qla_watchdog(void *arg) 208 { 209 qla_host_t *ha = arg; 210 qla_hw_t *hw; 211 struct ifnet *ifp; 212 213 hw = &ha->hw; 214 ifp = ha->ifp; 215 216 if (ha->flags.qla_watchdog_exit) 217 return; 218 219 if (!ha->flags.qla_watchdog_pause) { 220 if (qla_le32_to_host(*(hw->tx_cons)) != hw->txr_comp) { 221 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 222 } else if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) { 223 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 224 } 225 } 226 ha->watchdog_ticks = (ha->watchdog_ticks + 1) % 1000; 227 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 228 qla_watchdog, ha); 229 } 230 231 /* 232 * Name: qla_pci_attach 233 * Function: attaches the device to the operating system 234 */ 235 static int 236 qla_pci_attach(device_t dev) 237 { 238 qla_host_t *ha = NULL; 239 uint32_t rsrc_len, i; 240 241 QL_DPRINT2((dev, "%s: enter\n", __func__)); 242 243 if ((ha = device_get_softc(dev)) == NULL) { 244 device_printf(dev, "cannot get softc\n"); 245 return (ENOMEM); 246 } 247 248 memset(ha, 0, sizeof (qla_host_t)); 249 250 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8020) { 251 device_printf(dev, "device is not ISP8020\n"); 252 return (ENXIO); 253 } 254 255 ha->pci_func = pci_get_function(dev); 256 257 ha->pci_dev = dev; 258 259 pci_enable_busmaster(dev); 260 261 ha->reg_rid = PCIR_BAR(0); 262 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 263 RF_ACTIVE); 264 265 if (ha->pci_reg == NULL) { 266 device_printf(dev, "unable to map any ports\n"); 267 goto qla_pci_attach_err; 268 } 269 270 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY, 271 ha->reg_rid); 272 273 mtx_init(&ha->hw_lock, "qla80xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 274 mtx_init(&ha->tx_lock, "qla80xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 275 mtx_init(&ha->rx_lock, "qla80xx_rx_lock", MTX_NETWORK_LOCK, MTX_DEF); 276 mtx_init(&ha->rxj_lock, "qla80xx_rxj_lock", MTX_NETWORK_LOCK, MTX_DEF); 277 ha->flags.lock_init = 1; 278 279 ha->msix_count = pci_msix_count(dev); 280 281 if (ha->msix_count < qla_get_msix_count(ha)) { 282 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 283 ha->msix_count); 284 goto qla_pci_attach_err; 285 } 286 287 QL_DPRINT2((dev, "%s: ha %p irq %p pci_func 0x%x rsrc_count 0x%08x" 288 " msix_count 0x%x pci_reg %p\n", __func__, ha, 289 ha->irq, ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg)); 290 291 ha->msix_count = qla_get_msix_count(ha); 292 293 if (pci_alloc_msix(dev, &ha->msix_count)) { 294 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 295 ha->msix_count); 296 ha->msix_count = 0; 297 goto qla_pci_attach_err; 298 } 299 300 TASK_INIT(&ha->tx_task, 0, qla_tx_done, ha); 301 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT, 302 taskqueue_thread_enqueue, &ha->tx_tq); 303 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 304 device_get_nameunit(ha->pci_dev)); 305 306 for (i = 0; i < ha->msix_count; i++) { 307 ha->irq_vec[i].irq_rid = i+1; 308 ha->irq_vec[i].ha = ha; 309 310 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 311 &ha->irq_vec[i].irq_rid, 312 (RF_ACTIVE | RF_SHAREABLE)); 313 314 if (ha->irq_vec[i].irq == NULL) { 315 device_printf(dev, "could not allocate interrupt\n"); 316 goto qla_pci_attach_err; 317 } 318 319 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 320 (INTR_TYPE_NET | INTR_MPSAFE), 321 NULL, qla_isr, &ha->irq_vec[i], 322 &ha->irq_vec[i].handle)) { 323 device_printf(dev, "could not setup interrupt\n"); 324 goto qla_pci_attach_err; 325 } 326 327 TASK_INIT(&ha->irq_vec[i].rcv_task, 0, qla_rcv,\ 328 &ha->irq_vec[i]); 329 330 ha->irq_vec[i].rcv_tq = taskqueue_create_fast("qla_rcvq", 331 M_NOWAIT, taskqueue_thread_enqueue, 332 &ha->irq_vec[i].rcv_tq); 333 334 taskqueue_start_threads(&ha->irq_vec[i].rcv_tq, 1, PI_NET, 335 "%s rcvq", 336 device_get_nameunit(ha->pci_dev)); 337 } 338 339 qla_add_sysctls(ha); 340 341 /* add hardware specific sysctls */ 342 qla_hw_add_sysctls(ha); 343 344 /* initialize hardware */ 345 if (qla_init_hw(ha)) { 346 device_printf(dev, "%s: qla_init_hw failed\n", __func__); 347 goto qla_pci_attach_err; 348 } 349 350 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__, 351 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 352 ha->fw_ver_build); 353 354 snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d", 355 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 356 ha->fw_ver_build); 357 358 //qla_get_hw_caps(ha); 359 qla_read_mac_addr(ha); 360 361 /* allocate parent dma tag */ 362 if (qla_alloc_parent_dma_tag(ha)) { 363 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n", 364 __func__); 365 goto qla_pci_attach_err; 366 } 367 368 /* alloc all dma buffers */ 369 if (qla_alloc_dma(ha)) { 370 device_printf(dev, "%s: qla_alloc_dma failed\n", __func__); 371 goto qla_pci_attach_err; 372 } 373 374 /* create the o.s ethernet interface */ 375 qla_init_ifnet(dev, ha); 376 377 ha->flags.qla_watchdog_active = 1; 378 ha->flags.qla_watchdog_pause = 1; 379 380 callout_init(&ha->tx_callout, 1); 381 382 /* create ioctl device interface */ 383 if (qla_make_cdev(ha)) { 384 device_printf(dev, "%s: qla_make_cdev failed\n", __func__); 385 goto qla_pci_attach_err; 386 } 387 388 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 389 qla_watchdog, ha); 390 391 QL_DPRINT2((dev, "%s: exit 0\n", __func__)); 392 return (0); 393 394 qla_pci_attach_err: 395 396 qla_release(ha); 397 398 QL_DPRINT2((dev, "%s: exit ENXIO\n", __func__)); 399 return (ENXIO); 400 } 401 402 /* 403 * Name: qla_pci_detach 404 * Function: Unhooks the device from the operating system 405 */ 406 static int 407 qla_pci_detach(device_t dev) 408 { 409 qla_host_t *ha = NULL; 410 int i; 411 412 QL_DPRINT2((dev, "%s: enter\n", __func__)); 413 414 if ((ha = device_get_softc(dev)) == NULL) { 415 device_printf(dev, "cannot get softc\n"); 416 return (ENOMEM); 417 } 418 419 QLA_LOCK(ha, __func__); 420 qla_stop(ha); 421 QLA_UNLOCK(ha, __func__); 422 423 if (ha->tx_tq) { 424 taskqueue_drain(ha->tx_tq, &ha->tx_task); 425 taskqueue_free(ha->tx_tq); 426 } 427 428 for (i = 0; i < ha->msix_count; i++) { 429 taskqueue_drain(ha->irq_vec[i].rcv_tq, 430 &ha->irq_vec[i].rcv_task); 431 taskqueue_free(ha->irq_vec[i].rcv_tq); 432 } 433 434 qla_release(ha); 435 436 QL_DPRINT2((dev, "%s: exit\n", __func__)); 437 438 return (0); 439 } 440 441 /* 442 * SYSCTL Related Callbacks 443 */ 444 static int 445 qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS) 446 { 447 int err, ret = 0; 448 qla_host_t *ha; 449 450 err = sysctl_handle_int(oidp, &ret, 0, req); 451 452 if (err) 453 return (err); 454 455 ha = (qla_host_t *)arg1; 456 //qla_get_stats(ha); 457 QL_DPRINT2((ha->pci_dev, "%s: called ret %d\n", __func__, ret)); 458 return (err); 459 } 460 461 /* 462 * Name: qla_release 463 * Function: Releases the resources allocated for the device 464 */ 465 static void 466 qla_release(qla_host_t *ha) 467 { 468 device_t dev; 469 int i; 470 471 dev = ha->pci_dev; 472 473 qla_del_cdev(ha); 474 475 if (ha->flags.qla_watchdog_active) 476 ha->flags.qla_watchdog_exit = 1; 477 478 callout_stop(&ha->tx_callout); 479 qla_mdelay(__func__, 100); 480 481 if (ha->ifp != NULL) 482 ether_ifdetach(ha->ifp); 483 484 qla_free_dma(ha); 485 qla_free_parent_dma_tag(ha); 486 487 for (i = 0; i < ha->msix_count; i++) { 488 if (ha->irq_vec[i].handle) 489 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 490 ha->irq_vec[i].handle); 491 if (ha->irq_vec[i].irq) 492 (void) bus_release_resource(dev, SYS_RES_IRQ, 493 ha->irq_vec[i].irq_rid, 494 ha->irq_vec[i].irq); 495 } 496 if (ha->msix_count) 497 pci_release_msi(dev); 498 499 if (ha->flags.lock_init) { 500 mtx_destroy(&ha->tx_lock); 501 mtx_destroy(&ha->rx_lock); 502 mtx_destroy(&ha->rxj_lock); 503 mtx_destroy(&ha->hw_lock); 504 } 505 506 if (ha->pci_reg) 507 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 508 ha->pci_reg); 509 } 510 511 /* 512 * DMA Related Functions 513 */ 514 515 static void 516 qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 517 { 518 *((bus_addr_t *)arg) = 0; 519 520 if (error) { 521 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 522 return; 523 } 524 525 QL_ASSERT((nsegs == 1), ("%s: %d segments returned!", __func__, nsegs)); 526 527 *((bus_addr_t *)arg) = segs[0].ds_addr; 528 529 return; 530 } 531 532 int 533 qla_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 534 { 535 int ret = 0; 536 device_t dev; 537 bus_addr_t b_addr; 538 539 dev = ha->pci_dev; 540 541 QL_DPRINT2((dev, "%s: enter\n", __func__)); 542 543 ret = bus_dma_tag_create( 544 ha->parent_tag,/* parent */ 545 dma_buf->alignment, 546 ((bus_size_t)(1ULL << 32)),/* boundary */ 547 BUS_SPACE_MAXADDR, /* lowaddr */ 548 BUS_SPACE_MAXADDR, /* highaddr */ 549 NULL, NULL, /* filter, filterarg */ 550 dma_buf->size, /* maxsize */ 551 1, /* nsegments */ 552 dma_buf->size, /* maxsegsize */ 553 0, /* flags */ 554 NULL, NULL, /* lockfunc, lockarg */ 555 &dma_buf->dma_tag); 556 557 if (ret) { 558 device_printf(dev, "%s: could not create dma tag\n", __func__); 559 goto qla_alloc_dmabuf_exit; 560 } 561 ret = bus_dmamem_alloc(dma_buf->dma_tag, 562 (void **)&dma_buf->dma_b, 563 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 564 &dma_buf->dma_map); 565 if (ret) { 566 bus_dma_tag_destroy(dma_buf->dma_tag); 567 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 568 goto qla_alloc_dmabuf_exit; 569 } 570 571 ret = bus_dmamap_load(dma_buf->dma_tag, 572 dma_buf->dma_map, 573 dma_buf->dma_b, 574 dma_buf->size, 575 qla_dmamap_callback, 576 &b_addr, BUS_DMA_NOWAIT); 577 578 if (ret || !b_addr) { 579 bus_dma_tag_destroy(dma_buf->dma_tag); 580 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 581 dma_buf->dma_map); 582 ret = -1; 583 goto qla_alloc_dmabuf_exit; 584 } 585 586 dma_buf->dma_addr = b_addr; 587 588 qla_alloc_dmabuf_exit: 589 QL_DPRINT2((dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 590 __func__, ret, (void *)dma_buf->dma_tag, 591 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 592 dma_buf->size)); 593 594 return ret; 595 } 596 597 void 598 qla_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 599 { 600 bus_dmamap_unload(dma_buf->dma_tag, dma_buf->dma_map); 601 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 602 bus_dma_tag_destroy(dma_buf->dma_tag); 603 } 604 605 static int 606 qla_alloc_parent_dma_tag(qla_host_t *ha) 607 { 608 int ret; 609 device_t dev; 610 611 dev = ha->pci_dev; 612 613 /* 614 * Allocate parent DMA Tag 615 */ 616 ret = bus_dma_tag_create( 617 bus_get_dma_tag(dev), /* parent */ 618 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 619 BUS_SPACE_MAXADDR, /* lowaddr */ 620 BUS_SPACE_MAXADDR, /* highaddr */ 621 NULL, NULL, /* filter, filterarg */ 622 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 623 0, /* nsegments */ 624 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 625 0, /* flags */ 626 NULL, NULL, /* lockfunc, lockarg */ 627 &ha->parent_tag); 628 629 if (ret) { 630 device_printf(dev, "%s: could not create parent dma tag\n", 631 __func__); 632 return (-1); 633 } 634 635 ha->flags.parent_tag = 1; 636 637 return (0); 638 } 639 640 static void 641 qla_free_parent_dma_tag(qla_host_t *ha) 642 { 643 if (ha->flags.parent_tag) { 644 bus_dma_tag_destroy(ha->parent_tag); 645 ha->flags.parent_tag = 0; 646 } 647 } 648 649 /* 650 * Name: qla_init_ifnet 651 * Function: Creates the Network Device Interface and Registers it with the O.S 652 */ 653 654 static void 655 qla_init_ifnet(device_t dev, qla_host_t *ha) 656 { 657 struct ifnet *ifp; 658 659 QL_DPRINT2((dev, "%s: enter\n", __func__)); 660 661 ifp = ha->ifp = if_alloc(IFT_ETHER); 662 663 if (ifp == NULL) 664 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 665 666 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 667 668 ifp->if_mtu = ETHERMTU; 669 ifp->if_baudrate = IF_Gbps(10); 670 ifp->if_init = qla_init; 671 ifp->if_softc = ha; 672 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 673 ifp->if_ioctl = qla_ioctl; 674 ifp->if_start = qla_start; 675 676 IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha)); 677 ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha); 678 IFQ_SET_READY(&ifp->if_snd); 679 680 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 681 682 ether_ifattach(ifp, qla_get_mac_addr(ha)); 683 684 ifp->if_capabilities = IFCAP_HWCSUM | 685 IFCAP_TSO4 | 686 IFCAP_JUMBO_MTU; 687 688 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 689 ifp->if_capabilities |= IFCAP_LINKSTATE; 690 691 ifp->if_capenable = ifp->if_capabilities; 692 693 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 694 695 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status); 696 697 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0, 698 NULL); 699 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 700 701 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 702 703 QL_DPRINT2((dev, "%s: exit\n", __func__)); 704 705 return; 706 } 707 708 static void 709 qla_init_locked(qla_host_t *ha) 710 { 711 struct ifnet *ifp = ha->ifp; 712 713 qla_stop(ha); 714 715 if (qla_alloc_xmt_bufs(ha) != 0) 716 return; 717 718 if (qla_alloc_rcv_bufs(ha) != 0) 719 return; 720 721 if (qla_config_lro(ha)) 722 return; 723 724 bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN); 725 726 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO; 727 728 ha->flags.stop_rcv = 0; 729 if (qla_init_hw_if(ha) == 0) { 730 ifp = ha->ifp; 731 ifp->if_drv_flags |= IFF_DRV_RUNNING; 732 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 733 ha->flags.qla_watchdog_pause = 0; 734 } 735 736 return; 737 } 738 739 static void 740 qla_init(void *arg) 741 { 742 qla_host_t *ha; 743 744 ha = (qla_host_t *)arg; 745 746 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 747 748 QLA_LOCK(ha, __func__); 749 qla_init_locked(ha); 750 QLA_UNLOCK(ha, __func__); 751 752 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 753 } 754 755 static u_int 756 qla_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int mcnt) 757 { 758 uint8_t *mta = arg; 759 760 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 761 return (0); 762 bcopy(LLADDR(sdl), &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 763 764 return (1); 765 } 766 767 static void 768 qla_set_multi(qla_host_t *ha, uint32_t add_multi) 769 { 770 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 771 struct ifnet *ifp = ha->ifp; 772 int mcnt; 773 774 mcnt = if_foreach_llmaddr(ifp, qla_copy_maddr, mta); 775 qla_hw_set_multi(ha, mta, mcnt, add_multi); 776 777 return; 778 } 779 780 static int 781 qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 782 { 783 int ret = 0; 784 struct ifreq *ifr = (struct ifreq *)data; 785 #ifdef INET 786 struct ifaddr *ifa = (struct ifaddr *)data; 787 #endif 788 qla_host_t *ha; 789 790 ha = (qla_host_t *)ifp->if_softc; 791 792 switch (cmd) { 793 case SIOCSIFADDR: 794 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 795 __func__, cmd)); 796 797 #ifdef INET 798 if (ifa->ifa_addr->sa_family == AF_INET) { 799 ifp->if_flags |= IFF_UP; 800 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 801 QLA_LOCK(ha, __func__); 802 qla_init_locked(ha); 803 QLA_UNLOCK(ha, __func__); 804 } 805 QL_DPRINT4((ha->pci_dev, 806 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 807 __func__, cmd, ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 808 809 arp_ifinit(ifp, ifa); 810 if (ntohl(IA_SIN(ifa)->sin_addr.s_addr) != INADDR_ANY) { 811 qla_config_ipv4_addr(ha, 812 (IA_SIN(ifa)->sin_addr.s_addr)); 813 } 814 break; 815 } 816 #endif 817 ether_ioctl(ifp, cmd, data); 818 break; 819 820 case SIOCSIFMTU: 821 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 822 __func__, cmd)); 823 824 if (ifr->ifr_mtu > QLA_MAX_FRAME_SIZE - ETHER_HDR_LEN) { 825 ret = EINVAL; 826 } else { 827 QLA_LOCK(ha, __func__); 828 ifp->if_mtu = ifr->ifr_mtu; 829 ha->max_frame_size = 830 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 831 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 832 ret = qla_set_max_mtu(ha, ha->max_frame_size, 833 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 834 } 835 QLA_UNLOCK(ha, __func__); 836 837 if (ret) 838 ret = EINVAL; 839 } 840 841 break; 842 843 case SIOCSIFFLAGS: 844 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 845 __func__, cmd)); 846 847 if (ifp->if_flags & IFF_UP) { 848 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 849 if ((ifp->if_flags ^ ha->if_flags) & 850 IFF_PROMISC) { 851 qla_set_promisc(ha); 852 } else if ((ifp->if_flags ^ ha->if_flags) & 853 IFF_ALLMULTI) { 854 qla_set_allmulti(ha); 855 } 856 } else { 857 QLA_LOCK(ha, __func__); 858 qla_init_locked(ha); 859 ha->max_frame_size = ifp->if_mtu + 860 ETHER_HDR_LEN + ETHER_CRC_LEN; 861 ret = qla_set_max_mtu(ha, ha->max_frame_size, 862 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 863 QLA_UNLOCK(ha, __func__); 864 } 865 } else { 866 QLA_LOCK(ha, __func__); 867 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 868 qla_stop(ha); 869 ha->if_flags = ifp->if_flags; 870 QLA_UNLOCK(ha, __func__); 871 } 872 break; 873 874 case SIOCADDMULTI: 875 QL_DPRINT4((ha->pci_dev, 876 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 877 878 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 879 qla_set_multi(ha, 1); 880 } 881 break; 882 883 case SIOCDELMULTI: 884 QL_DPRINT4((ha->pci_dev, 885 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 886 887 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 888 qla_set_multi(ha, 0); 889 } 890 break; 891 892 case SIOCSIFMEDIA: 893 case SIOCGIFMEDIA: 894 QL_DPRINT4((ha->pci_dev, 895 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 896 __func__, cmd)); 897 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 898 break; 899 900 case SIOCSIFCAP: 901 { 902 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 903 904 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 905 __func__, cmd)); 906 907 if (mask & IFCAP_HWCSUM) 908 ifp->if_capenable ^= IFCAP_HWCSUM; 909 if (mask & IFCAP_TSO4) 910 ifp->if_capenable ^= IFCAP_TSO4; 911 if (mask & IFCAP_TSO6) 912 ifp->if_capenable ^= IFCAP_TSO6; 913 if (mask & IFCAP_VLAN_HWTAGGING) 914 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 915 916 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 917 qla_init(ha); 918 919 VLAN_CAPABILITIES(ifp); 920 break; 921 } 922 923 default: 924 QL_DPRINT4((ha->pci_dev, "%s: default (0x%lx)\n", 925 __func__, cmd)); 926 ret = ether_ioctl(ifp, cmd, data); 927 break; 928 } 929 930 return (ret); 931 } 932 933 static int 934 qla_media_change(struct ifnet *ifp) 935 { 936 qla_host_t *ha; 937 struct ifmedia *ifm; 938 int ret = 0; 939 940 ha = (qla_host_t *)ifp->if_softc; 941 942 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 943 944 ifm = &ha->media; 945 946 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 947 ret = EINVAL; 948 949 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 950 951 return (ret); 952 } 953 954 static void 955 qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 956 { 957 qla_host_t *ha; 958 959 ha = (qla_host_t *)ifp->if_softc; 960 961 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 962 963 ifmr->ifm_status = IFM_AVALID; 964 ifmr->ifm_active = IFM_ETHER; 965 966 qla_update_link_state(ha); 967 if (ha->hw.flags.link_up) { 968 ifmr->ifm_status |= IFM_ACTIVE; 969 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha)); 970 } 971 972 QL_DPRINT2((ha->pci_dev, "%s: exit (%s)\n", __func__,\ 973 (ha->hw.flags.link_up ? "link_up" : "link_down"))); 974 975 return; 976 } 977 978 void 979 qla_start(struct ifnet *ifp) 980 { 981 struct mbuf *m_head; 982 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 983 984 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 985 986 if (!mtx_trylock(&ha->tx_lock)) { 987 QL_DPRINT8((ha->pci_dev, 988 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 989 return; 990 } 991 992 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 993 IFF_DRV_RUNNING) { 994 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 995 QLA_TX_UNLOCK(ha); 996 return; 997 } 998 999 if (!ha->watchdog_ticks) 1000 qla_update_link_state(ha); 1001 1002 if (!ha->hw.flags.link_up) { 1003 QL_DPRINT8((ha->pci_dev, "%s: link down\n", __func__)); 1004 QLA_TX_UNLOCK(ha); 1005 return; 1006 } 1007 1008 while (ifp->if_snd.ifq_head != NULL) { 1009 IF_DEQUEUE(&ifp->if_snd, m_head); 1010 1011 if (m_head == NULL) { 1012 QL_DPRINT8((ha->pci_dev, "%s: m_head == NULL\n", 1013 __func__)); 1014 break; 1015 } 1016 1017 if (qla_send(ha, &m_head)) { 1018 if (m_head == NULL) 1019 break; 1020 QL_DPRINT8((ha->pci_dev, "%s: PREPEND\n", __func__)); 1021 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1022 IF_PREPEND(&ifp->if_snd, m_head); 1023 break; 1024 } 1025 /* Send a copy of the frame to the BPF listener */ 1026 ETHER_BPF_MTAP(ifp, m_head); 1027 } 1028 QLA_TX_UNLOCK(ha); 1029 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1030 return; 1031 } 1032 1033 static int 1034 qla_send(qla_host_t *ha, struct mbuf **m_headp) 1035 { 1036 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1037 bus_dmamap_t map; 1038 int nsegs; 1039 int ret = -1; 1040 uint32_t tx_idx; 1041 struct mbuf *m_head = *m_headp; 1042 1043 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1044 1045 if ((ret = bus_dmamap_create(ha->tx_tag, BUS_DMA_NOWAIT, &map))) { 1046 ha->err_tx_dmamap_create++; 1047 device_printf(ha->pci_dev, 1048 "%s: bus_dmamap_create failed[%d, %d]\n", 1049 __func__, ret, m_head->m_pkthdr.len); 1050 return (ret); 1051 } 1052 1053 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1054 BUS_DMA_NOWAIT); 1055 1056 if (ret == EFBIG) { 1057 struct mbuf *m; 1058 1059 QL_DPRINT8((ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1060 m_head->m_pkthdr.len)); 1061 1062 m = m_defrag(m_head, M_NOWAIT); 1063 if (m == NULL) { 1064 ha->err_tx_defrag++; 1065 m_freem(m_head); 1066 *m_headp = NULL; 1067 device_printf(ha->pci_dev, 1068 "%s: m_defrag() = NULL [%d]\n", 1069 __func__, ret); 1070 return (ENOBUFS); 1071 } 1072 m_head = m; 1073 1074 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1075 segs, &nsegs, BUS_DMA_NOWAIT))) { 1076 ha->err_tx_dmamap_load++; 1077 1078 device_printf(ha->pci_dev, 1079 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1080 __func__, ret, m_head->m_pkthdr.len); 1081 1082 bus_dmamap_destroy(ha->tx_tag, map); 1083 if (ret != ENOMEM) { 1084 m_freem(m_head); 1085 *m_headp = NULL; 1086 } 1087 return (ret); 1088 } 1089 } else if (ret) { 1090 ha->err_tx_dmamap_load++; 1091 1092 device_printf(ha->pci_dev, 1093 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1094 __func__, ret, m_head->m_pkthdr.len); 1095 1096 bus_dmamap_destroy(ha->tx_tag, map); 1097 1098 if (ret != ENOMEM) { 1099 m_freem(m_head); 1100 *m_headp = NULL; 1101 } 1102 return (ret); 1103 } 1104 1105 QL_ASSERT((nsegs != 0), ("qla_send: empty packet")); 1106 1107 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1108 1109 if (!(ret = qla_hw_send(ha, segs, nsegs, &tx_idx, m_head))) { 1110 ha->tx_buf[tx_idx].m_head = m_head; 1111 ha->tx_buf[tx_idx].map = map; 1112 } else { 1113 if (ret == EINVAL) { 1114 m_freem(m_head); 1115 *m_headp = NULL; 1116 } 1117 } 1118 1119 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1120 return (ret); 1121 } 1122 1123 static void 1124 qla_stop(qla_host_t *ha) 1125 { 1126 struct ifnet *ifp = ha->ifp; 1127 1128 ha->flags.qla_watchdog_pause = 1; 1129 qla_mdelay(__func__, 100); 1130 1131 ha->flags.stop_rcv = 1; 1132 qla_hw_stop_rcv(ha); 1133 1134 qla_del_hw_if(ha); 1135 1136 qla_free_lro(ha); 1137 1138 qla_free_xmt_bufs(ha); 1139 qla_free_rcv_bufs(ha); 1140 1141 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1142 1143 return; 1144 } 1145 1146 /* 1147 * Buffer Management Functions for Transmit and Receive Rings 1148 */ 1149 static int 1150 qla_alloc_xmt_bufs(qla_host_t *ha) 1151 { 1152 if (bus_dma_tag_create(NULL, /* parent */ 1153 1, 0, /* alignment, bounds */ 1154 BUS_SPACE_MAXADDR, /* lowaddr */ 1155 BUS_SPACE_MAXADDR, /* highaddr */ 1156 NULL, NULL, /* filter, filterarg */ 1157 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */ 1158 QLA_MAX_SEGMENTS, /* nsegments */ 1159 PAGE_SIZE, /* maxsegsize */ 1160 BUS_DMA_ALLOCNOW, /* flags */ 1161 NULL, /* lockfunc */ 1162 NULL, /* lockfuncarg */ 1163 &ha->tx_tag)) { 1164 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n", 1165 __func__); 1166 return (ENOMEM); 1167 } 1168 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1169 1170 return 0; 1171 } 1172 1173 /* 1174 * Release mbuf after it sent on the wire 1175 */ 1176 static void 1177 qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1178 { 1179 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1180 1181 if (txb->m_head) { 1182 bus_dmamap_unload(ha->tx_tag, txb->map); 1183 bus_dmamap_destroy(ha->tx_tag, txb->map); 1184 1185 m_freem(txb->m_head); 1186 txb->m_head = NULL; 1187 } 1188 1189 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1190 } 1191 1192 static void 1193 qla_free_xmt_bufs(qla_host_t *ha) 1194 { 1195 int i; 1196 1197 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1198 qla_clear_tx_buf(ha, &ha->tx_buf[i]); 1199 1200 if (ha->tx_tag != NULL) { 1201 bus_dma_tag_destroy(ha->tx_tag); 1202 ha->tx_tag = NULL; 1203 } 1204 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1205 1206 return; 1207 } 1208 1209 static int 1210 qla_alloc_rcv_bufs(qla_host_t *ha) 1211 { 1212 int i, j, ret = 0; 1213 qla_rx_buf_t *rxb; 1214 1215 if (bus_dma_tag_create(NULL, /* parent */ 1216 1, 0, /* alignment, bounds */ 1217 BUS_SPACE_MAXADDR, /* lowaddr */ 1218 BUS_SPACE_MAXADDR, /* highaddr */ 1219 NULL, NULL, /* filter, filterarg */ 1220 MJUM9BYTES, /* maxsize */ 1221 1, /* nsegments */ 1222 MJUM9BYTES, /* maxsegsize */ 1223 BUS_DMA_ALLOCNOW, /* flags */ 1224 NULL, /* lockfunc */ 1225 NULL, /* lockfuncarg */ 1226 &ha->rx_tag)) { 1227 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n", 1228 __func__); 1229 1230 return (ENOMEM); 1231 } 1232 1233 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1234 bzero((void *)ha->rx_jbuf, 1235 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1236 1237 for (i = 0; i < MAX_SDS_RINGS; i++) { 1238 ha->hw.sds[i].sdsr_next = 0; 1239 ha->hw.sds[i].rxb_free = NULL; 1240 ha->hw.sds[i].rx_free = 0; 1241 ha->hw.sds[i].rxjb_free = NULL; 1242 ha->hw.sds[i].rxj_free = 0; 1243 } 1244 1245 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1246 rxb = &ha->rx_buf[i]; 1247 1248 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1249 1250 if (ret) { 1251 device_printf(ha->pci_dev, 1252 "%s: dmamap[%d] failed\n", __func__, i); 1253 1254 for (j = 0; j < i; j++) { 1255 bus_dmamap_destroy(ha->rx_tag, 1256 ha->rx_buf[j].map); 1257 } 1258 goto qla_alloc_rcv_bufs_failed; 1259 } 1260 } 1261 1262 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_NORMAL); 1263 1264 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1265 rxb = &ha->rx_buf[i]; 1266 rxb->handle = i; 1267 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 0))) { 1268 /* 1269 * set the physical address in the corresponding 1270 * descriptor entry in the receive ring/queue for the 1271 * hba 1272 */ 1273 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_NORMAL, i, 1274 rxb->handle, rxb->paddr, 1275 (rxb->m_head)->m_pkthdr.len); 1276 } else { 1277 device_printf(ha->pci_dev, 1278 "%s: qla_get_mbuf [standard(%d)] failed\n", 1279 __func__, i); 1280 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1281 goto qla_alloc_rcv_bufs_failed; 1282 } 1283 } 1284 1285 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1286 rxb = &ha->rx_jbuf[i]; 1287 1288 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1289 1290 if (ret) { 1291 device_printf(ha->pci_dev, 1292 "%s: dmamap[%d] failed\n", __func__, i); 1293 1294 for (j = 0; j < i; j++) { 1295 bus_dmamap_destroy(ha->rx_tag, 1296 ha->rx_jbuf[j].map); 1297 } 1298 goto qla_alloc_rcv_bufs_failed; 1299 } 1300 } 1301 1302 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_JUMBO); 1303 1304 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1305 rxb = &ha->rx_jbuf[i]; 1306 rxb->handle = i; 1307 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 1))) { 1308 /* 1309 * set the physical address in the corresponding 1310 * descriptor entry in the receive ring/queue for the 1311 * hba 1312 */ 1313 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_JUMBO, i, 1314 rxb->handle, rxb->paddr, 1315 (rxb->m_head)->m_pkthdr.len); 1316 } else { 1317 device_printf(ha->pci_dev, 1318 "%s: qla_get_mbuf [jumbo(%d)] failed\n", 1319 __func__, i); 1320 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1321 goto qla_alloc_rcv_bufs_failed; 1322 } 1323 } 1324 1325 return (0); 1326 1327 qla_alloc_rcv_bufs_failed: 1328 qla_free_rcv_bufs(ha); 1329 return (ret); 1330 } 1331 1332 static void 1333 qla_free_rcv_bufs(qla_host_t *ha) 1334 { 1335 int i; 1336 qla_rx_buf_t *rxb; 1337 1338 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1339 rxb = &ha->rx_buf[i]; 1340 if (rxb->m_head != NULL) { 1341 bus_dmamap_unload(ha->rx_tag, rxb->map); 1342 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1343 m_freem(rxb->m_head); 1344 rxb->m_head = NULL; 1345 } 1346 } 1347 1348 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1349 rxb = &ha->rx_jbuf[i]; 1350 if (rxb->m_head != NULL) { 1351 bus_dmamap_unload(ha->rx_tag, rxb->map); 1352 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1353 m_freem(rxb->m_head); 1354 rxb->m_head = NULL; 1355 } 1356 } 1357 1358 if (ha->rx_tag != NULL) { 1359 bus_dma_tag_destroy(ha->rx_tag); 1360 ha->rx_tag = NULL; 1361 } 1362 1363 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1364 bzero((void *)ha->rx_jbuf, 1365 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1366 1367 for (i = 0; i < MAX_SDS_RINGS; i++) { 1368 ha->hw.sds[i].sdsr_next = 0; 1369 ha->hw.sds[i].rxb_free = NULL; 1370 ha->hw.sds[i].rx_free = 0; 1371 ha->hw.sds[i].rxjb_free = NULL; 1372 ha->hw.sds[i].rxj_free = 0; 1373 } 1374 1375 return; 1376 } 1377 1378 int 1379 qla_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp, 1380 uint32_t jumbo) 1381 { 1382 struct mbuf *mp = nmp; 1383 int ret = 0; 1384 uint32_t offset; 1385 1386 QL_DPRINT2((ha->pci_dev, "%s: jumbo(0x%x) enter\n", __func__, jumbo)); 1387 1388 if (mp == NULL) { 1389 if (!jumbo) { 1390 mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1391 1392 if (mp == NULL) { 1393 ha->err_m_getcl++; 1394 ret = ENOBUFS; 1395 device_printf(ha->pci_dev, 1396 "%s: m_getcl failed\n", __func__); 1397 goto exit_qla_get_mbuf; 1398 } 1399 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1400 } else { 1401 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, 1402 MJUM9BYTES); 1403 if (mp == NULL) { 1404 ha->err_m_getjcl++; 1405 ret = ENOBUFS; 1406 device_printf(ha->pci_dev, 1407 "%s: m_getjcl failed\n", __func__); 1408 goto exit_qla_get_mbuf; 1409 } 1410 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1411 } 1412 } else { 1413 if (!jumbo) 1414 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1415 else 1416 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1417 1418 mp->m_data = mp->m_ext.ext_buf; 1419 mp->m_next = NULL; 1420 } 1421 1422 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1423 if (offset) { 1424 offset = 8 - offset; 1425 m_adj(mp, offset); 1426 } 1427 1428 /* 1429 * Using memory from the mbuf cluster pool, invoke the bus_dma 1430 * machinery to arrange the memory mapping. 1431 */ 1432 ret = bus_dmamap_load(ha->rx_tag, rxb->map, 1433 mtod(mp, void *), mp->m_len, 1434 qla_dmamap_callback, &rxb->paddr, 1435 BUS_DMA_NOWAIT); 1436 if (ret || !rxb->paddr) { 1437 m_free(mp); 1438 rxb->m_head = NULL; 1439 device_printf(ha->pci_dev, 1440 "%s: bus_dmamap_load failed\n", __func__); 1441 ret = -1; 1442 goto exit_qla_get_mbuf; 1443 } 1444 rxb->m_head = mp; 1445 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1446 1447 exit_qla_get_mbuf: 1448 QL_DPRINT2((ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1449 return (ret); 1450 } 1451 1452 static void 1453 qla_tx_done(void *context, int pending) 1454 { 1455 qla_host_t *ha = context; 1456 1457 qla_hw_tx_done(ha); 1458 qla_start(ha->ifp); 1459 } 1460