1 /* 2 * Copyright (c) 2013-2016 Qlogic Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * and ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * File: ql_os.c 30 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 37 #include "ql_os.h" 38 #include "ql_hw.h" 39 #include "ql_def.h" 40 #include "ql_inline.h" 41 #include "ql_ver.h" 42 #include "ql_glbl.h" 43 #include "ql_dbg.h" 44 #include <sys/smp.h> 45 46 /* 47 * Some PCI Configuration Space Related Defines 48 */ 49 50 #ifndef PCI_VENDOR_QLOGIC 51 #define PCI_VENDOR_QLOGIC 0x1077 52 #endif 53 54 #ifndef PCI_PRODUCT_QLOGIC_ISP8030 55 #define PCI_PRODUCT_QLOGIC_ISP8030 0x8030 56 #endif 57 58 #define PCI_QLOGIC_ISP8030 \ 59 ((PCI_PRODUCT_QLOGIC_ISP8030 << 16) | PCI_VENDOR_QLOGIC) 60 61 /* 62 * static functions 63 */ 64 static int qla_alloc_parent_dma_tag(qla_host_t *ha); 65 static void qla_free_parent_dma_tag(qla_host_t *ha); 66 static int qla_alloc_xmt_bufs(qla_host_t *ha); 67 static void qla_free_xmt_bufs(qla_host_t *ha); 68 static int qla_alloc_rcv_bufs(qla_host_t *ha); 69 static void qla_free_rcv_bufs(qla_host_t *ha); 70 static void qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb); 71 72 static void qla_init_ifnet(device_t dev, qla_host_t *ha); 73 static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS); 74 static int qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS); 75 static void qla_release(qla_host_t *ha); 76 static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 77 int error); 78 static void qla_stop(qla_host_t *ha); 79 static int qla_send(qla_host_t *ha, struct mbuf **m_headp); 80 static void qla_tx_done(void *context, int pending); 81 static void qla_get_peer(qla_host_t *ha); 82 static void qla_error_recovery(void *context, int pending); 83 static void qla_async_event(void *context, int pending); 84 85 /* 86 * Hooks to the Operating Systems 87 */ 88 static int qla_pci_probe (device_t); 89 static int qla_pci_attach (device_t); 90 static int qla_pci_detach (device_t); 91 92 static void qla_init(void *arg); 93 static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 94 static int qla_media_change(struct ifnet *ifp); 95 static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 96 static void qla_start(struct ifnet *ifp); 97 98 static device_method_t qla_pci_methods[] = { 99 /* Device interface */ 100 DEVMETHOD(device_probe, qla_pci_probe), 101 DEVMETHOD(device_attach, qla_pci_attach), 102 DEVMETHOD(device_detach, qla_pci_detach), 103 { 0, 0 } 104 }; 105 106 static driver_t qla_pci_driver = { 107 "ql", qla_pci_methods, sizeof (qla_host_t), 108 }; 109 110 static devclass_t qla83xx_devclass; 111 112 DRIVER_MODULE(qla83xx, pci, qla_pci_driver, qla83xx_devclass, 0, 0); 113 114 MODULE_DEPEND(qla83xx, pci, 1, 1, 1); 115 MODULE_DEPEND(qla83xx, ether, 1, 1, 1); 116 117 MALLOC_DEFINE(M_QLA83XXBUF, "qla83xxbuf", "Buffers for qla83xx driver"); 118 119 #define QL_STD_REPLENISH_THRES 0 120 #define QL_JUMBO_REPLENISH_THRES 32 121 122 123 static char dev_str[64]; 124 static char ver_str[64]; 125 126 /* 127 * Name: qla_pci_probe 128 * Function: Validate the PCI device to be a QLA80XX device 129 */ 130 static int 131 qla_pci_probe(device_t dev) 132 { 133 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 134 case PCI_QLOGIC_ISP8030: 135 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 136 "Qlogic ISP 83xx PCI CNA Adapter-Ethernet Function", 137 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 138 QLA_VERSION_BUILD); 139 snprintf(ver_str, sizeof(ver_str), "v%d.%d.%d", 140 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 141 QLA_VERSION_BUILD); 142 device_set_desc(dev, dev_str); 143 break; 144 default: 145 return (ENXIO); 146 } 147 148 if (bootverbose) 149 printf("%s: %s\n ", __func__, dev_str); 150 151 return (BUS_PROBE_DEFAULT); 152 } 153 154 static void 155 qla_add_sysctls(qla_host_t *ha) 156 { 157 device_t dev = ha->pci_dev; 158 159 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 160 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 161 OID_AUTO, "version", CTLFLAG_RD, 162 ver_str, 0, "Driver Version"); 163 164 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 165 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 166 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RW, 167 (void *)ha, 0, 168 qla_sysctl_get_stats, "I", "Statistics"); 169 170 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 171 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 172 OID_AUTO, "fw_version", CTLFLAG_RD, 173 ha->fw_ver_str, 0, "firmware version"); 174 175 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 176 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 177 OID_AUTO, "link_status", CTLTYPE_INT | CTLFLAG_RW, 178 (void *)ha, 0, 179 qla_sysctl_get_link_status, "I", "Link Status"); 180 181 ha->dbg_level = 0; 182 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 183 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 184 OID_AUTO, "debug", CTLFLAG_RW, 185 &ha->dbg_level, ha->dbg_level, "Debug Level"); 186 187 ha->std_replenish = QL_STD_REPLENISH_THRES; 188 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 189 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 190 OID_AUTO, "std_replenish", CTLFLAG_RW, 191 &ha->std_replenish, ha->std_replenish, 192 "Threshold for Replenishing Standard Frames"); 193 194 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 195 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 196 OID_AUTO, "ipv4_lro", 197 CTLFLAG_RD, &ha->ipv4_lro, 198 "number of ipv4 lro completions"); 199 200 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 201 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 202 OID_AUTO, "ipv6_lro", 203 CTLFLAG_RD, &ha->ipv6_lro, 204 "number of ipv6 lro completions"); 205 206 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 207 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 208 OID_AUTO, "tx_tso_frames", 209 CTLFLAG_RD, &ha->tx_tso_frames, 210 "number of Tx TSO Frames"); 211 212 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 213 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 214 OID_AUTO, "hw_vlan_tx_frames", 215 CTLFLAG_RD, &ha->hw_vlan_tx_frames, 216 "number of Tx VLAN Frames"); 217 218 return; 219 } 220 221 static void 222 qla_watchdog(void *arg) 223 { 224 qla_host_t *ha = arg; 225 qla_hw_t *hw; 226 struct ifnet *ifp; 227 uint32_t i; 228 qla_hw_tx_cntxt_t *hw_tx_cntxt; 229 230 hw = &ha->hw; 231 ifp = ha->ifp; 232 233 if (ha->flags.qla_watchdog_exit) { 234 ha->qla_watchdog_exited = 1; 235 return; 236 } 237 ha->qla_watchdog_exited = 0; 238 239 if (!ha->flags.qla_watchdog_pause) { 240 if (ql_hw_check_health(ha) || ha->qla_initiate_recovery || 241 (ha->msg_from_peer == QL_PEER_MSG_RESET)) { 242 ha->qla_watchdog_paused = 1; 243 ha->flags.qla_watchdog_pause = 1; 244 ha->qla_initiate_recovery = 0; 245 ha->err_inject = 0; 246 taskqueue_enqueue(ha->err_tq, &ha->err_task); 247 } else { 248 249 if (ha->async_event) { 250 ha->async_event = 0; 251 taskqueue_enqueue(ha->async_event_tq, 252 &ha->async_event_task); 253 } 254 255 for (i = 0; i < ha->hw.num_tx_rings; i++) { 256 hw_tx_cntxt = &hw->tx_cntxt[i]; 257 if (qla_le32_to_host(*(hw_tx_cntxt->tx_cons)) != 258 hw_tx_cntxt->txr_comp) { 259 taskqueue_enqueue(ha->tx_tq, 260 &ha->tx_task); 261 break; 262 } 263 } 264 265 if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) { 266 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 267 } 268 ha->qla_watchdog_paused = 0; 269 } 270 271 } else { 272 ha->qla_watchdog_paused = 1; 273 } 274 275 ha->watchdog_ticks = ha->watchdog_ticks++ % 1000; 276 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 277 qla_watchdog, ha); 278 } 279 280 /* 281 * Name: qla_pci_attach 282 * Function: attaches the device to the operating system 283 */ 284 static int 285 qla_pci_attach(device_t dev) 286 { 287 qla_host_t *ha = NULL; 288 uint32_t rsrc_len; 289 int i; 290 uint32_t num_rcvq = 0; 291 292 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 293 294 if ((ha = device_get_softc(dev)) == NULL) { 295 device_printf(dev, "cannot get softc\n"); 296 return (ENOMEM); 297 } 298 299 memset(ha, 0, sizeof (qla_host_t)); 300 301 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8030) { 302 device_printf(dev, "device is not ISP8030\n"); 303 return (ENXIO); 304 } 305 306 ha->pci_func = pci_get_function(dev); 307 308 ha->pci_dev = dev; 309 310 pci_enable_busmaster(dev); 311 312 ha->reg_rid = PCIR_BAR(0); 313 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 314 RF_ACTIVE); 315 316 if (ha->pci_reg == NULL) { 317 device_printf(dev, "unable to map any ports\n"); 318 goto qla_pci_attach_err; 319 } 320 321 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY, 322 ha->reg_rid); 323 324 mtx_init(&ha->hw_lock, "qla83xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 325 326 mtx_init(&ha->tx_lock, "qla83xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 327 328 qla_add_sysctls(ha); 329 ql_hw_add_sysctls(ha); 330 331 ha->flags.lock_init = 1; 332 333 ha->reg_rid1 = PCIR_BAR(2); 334 ha->pci_reg1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 335 &ha->reg_rid1, RF_ACTIVE); 336 337 ha->msix_count = pci_msix_count(dev); 338 339 if (ha->msix_count < (ha->hw.num_sds_rings + 1)) { 340 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 341 ha->msix_count); 342 goto qla_pci_attach_err; 343 } 344 345 QL_DPRINT2(ha, (dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x" 346 " msix_count 0x%x pci_reg %p\n", __func__, ha, 347 ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg)); 348 349 /* initialize hardware */ 350 if (ql_init_hw(ha)) { 351 device_printf(dev, "%s: ql_init_hw failed\n", __func__); 352 goto qla_pci_attach_err; 353 } 354 355 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__, 356 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 357 ha->fw_ver_build); 358 snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d", 359 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 360 ha->fw_ver_build); 361 362 if (qla_get_nic_partition(ha, NULL, &num_rcvq)) { 363 device_printf(dev, "%s: qla_get_nic_partition failed\n", 364 __func__); 365 goto qla_pci_attach_err; 366 } 367 device_printf(dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x" 368 " msix_count 0x%x pci_reg %p num_rcvq = %d\n", __func__, ha, 369 ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg, num_rcvq); 370 371 372 #ifdef QL_ENABLE_ISCSI_TLV 373 if ((ha->msix_count < 64) || (num_rcvq != 32)) { 374 ha->hw.num_sds_rings = 15; 375 ha->hw.num_tx_rings = 32; 376 } 377 #endif /* #ifdef QL_ENABLE_ISCSI_TLV */ 378 ha->hw.num_rds_rings = ha->hw.num_sds_rings; 379 380 ha->msix_count = ha->hw.num_sds_rings + 1; 381 382 if (pci_alloc_msix(dev, &ha->msix_count)) { 383 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 384 ha->msix_count); 385 ha->msix_count = 0; 386 goto qla_pci_attach_err; 387 } 388 389 ha->mbx_irq_rid = 1; 390 ha->mbx_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 391 &ha->mbx_irq_rid, 392 (RF_ACTIVE | RF_SHAREABLE)); 393 if (ha->mbx_irq == NULL) { 394 device_printf(dev, "could not allocate mbx interrupt\n"); 395 goto qla_pci_attach_err; 396 } 397 if (bus_setup_intr(dev, ha->mbx_irq, (INTR_TYPE_NET | INTR_MPSAFE), 398 NULL, ql_mbx_isr, ha, &ha->mbx_handle)) { 399 device_printf(dev, "could not setup mbx interrupt\n"); 400 goto qla_pci_attach_err; 401 } 402 403 404 for (i = 0; i < ha->hw.num_sds_rings; i++) { 405 ha->irq_vec[i].sds_idx = i; 406 ha->irq_vec[i].ha = ha; 407 ha->irq_vec[i].irq_rid = 2 + i; 408 409 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 410 &ha->irq_vec[i].irq_rid, 411 (RF_ACTIVE | RF_SHAREABLE)); 412 413 if (ha->irq_vec[i].irq == NULL) { 414 device_printf(dev, "could not allocate interrupt\n"); 415 goto qla_pci_attach_err; 416 } 417 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 418 (INTR_TYPE_NET | INTR_MPSAFE), 419 NULL, ql_isr, &ha->irq_vec[i], 420 &ha->irq_vec[i].handle)) { 421 device_printf(dev, "could not setup interrupt\n"); 422 goto qla_pci_attach_err; 423 } 424 } 425 426 printf("%s: mp__ncpus %d sds %d rds %d msi-x %d\n", __func__, mp_ncpus, 427 ha->hw.num_sds_rings, ha->hw.num_rds_rings, ha->msix_count); 428 429 ql_read_mac_addr(ha); 430 431 /* allocate parent dma tag */ 432 if (qla_alloc_parent_dma_tag(ha)) { 433 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n", 434 __func__); 435 goto qla_pci_attach_err; 436 } 437 438 /* alloc all dma buffers */ 439 if (ql_alloc_dma(ha)) { 440 device_printf(dev, "%s: ql_alloc_dma failed\n", __func__); 441 goto qla_pci_attach_err; 442 } 443 qla_get_peer(ha); 444 445 /* create the o.s ethernet interface */ 446 qla_init_ifnet(dev, ha); 447 448 ha->flags.qla_watchdog_active = 1; 449 ha->flags.qla_watchdog_pause = 1; 450 451 452 TASK_INIT(&ha->tx_task, 0, qla_tx_done, ha); 453 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT, 454 taskqueue_thread_enqueue, &ha->tx_tq); 455 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 456 device_get_nameunit(ha->pci_dev)); 457 458 callout_init(&ha->tx_callout, 1); 459 ha->flags.qla_callout_init = 1; 460 461 /* create ioctl device interface */ 462 if (ql_make_cdev(ha)) { 463 device_printf(dev, "%s: ql_make_cdev failed\n", __func__); 464 goto qla_pci_attach_err; 465 } 466 467 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 468 qla_watchdog, ha); 469 470 TASK_INIT(&ha->err_task, 0, qla_error_recovery, ha); 471 ha->err_tq = taskqueue_create_fast("qla_errq", M_NOWAIT, 472 taskqueue_thread_enqueue, &ha->err_tq); 473 taskqueue_start_threads(&ha->err_tq, 1, PI_NET, "%s errq", 474 device_get_nameunit(ha->pci_dev)); 475 476 TASK_INIT(&ha->async_event_task, 0, qla_async_event, ha); 477 ha->async_event_tq = taskqueue_create_fast("qla_asyncq", M_NOWAIT, 478 taskqueue_thread_enqueue, &ha->async_event_tq); 479 taskqueue_start_threads(&ha->async_event_tq, 1, PI_NET, "%s asyncq", 480 device_get_nameunit(ha->pci_dev)); 481 482 QL_DPRINT2(ha, (dev, "%s: exit 0\n", __func__)); 483 return (0); 484 485 qla_pci_attach_err: 486 487 qla_release(ha); 488 489 QL_DPRINT2(ha, (dev, "%s: exit ENXIO\n", __func__)); 490 return (ENXIO); 491 } 492 493 /* 494 * Name: qla_pci_detach 495 * Function: Unhooks the device from the operating system 496 */ 497 static int 498 qla_pci_detach(device_t dev) 499 { 500 qla_host_t *ha = NULL; 501 struct ifnet *ifp; 502 503 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 504 505 if ((ha = device_get_softc(dev)) == NULL) { 506 device_printf(dev, "cannot get softc\n"); 507 return (ENOMEM); 508 } 509 510 ifp = ha->ifp; 511 512 (void)QLA_LOCK(ha, __func__, 0); 513 qla_stop(ha); 514 QLA_UNLOCK(ha, __func__); 515 516 qla_release(ha); 517 518 QL_DPRINT2(ha, (dev, "%s: exit\n", __func__)); 519 520 return (0); 521 } 522 523 /* 524 * SYSCTL Related Callbacks 525 */ 526 static int 527 qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS) 528 { 529 int err, ret = 0; 530 qla_host_t *ha; 531 532 err = sysctl_handle_int(oidp, &ret, 0, req); 533 534 if (err || !req->newptr) 535 return (err); 536 537 if (ret == 1) { 538 ha = (qla_host_t *)arg1; 539 ql_get_stats(ha); 540 } 541 return (err); 542 } 543 static int 544 qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS) 545 { 546 int err, ret = 0; 547 qla_host_t *ha; 548 549 err = sysctl_handle_int(oidp, &ret, 0, req); 550 551 if (err || !req->newptr) 552 return (err); 553 554 if (ret == 1) { 555 ha = (qla_host_t *)arg1; 556 ql_hw_link_status(ha); 557 } 558 return (err); 559 } 560 561 /* 562 * Name: qla_release 563 * Function: Releases the resources allocated for the device 564 */ 565 static void 566 qla_release(qla_host_t *ha) 567 { 568 device_t dev; 569 int i; 570 571 dev = ha->pci_dev; 572 573 if (ha->async_event_tq) { 574 taskqueue_drain(ha->async_event_tq, &ha->async_event_task); 575 taskqueue_free(ha->async_event_tq); 576 } 577 578 if (ha->err_tq) { 579 taskqueue_drain(ha->err_tq, &ha->err_task); 580 taskqueue_free(ha->err_tq); 581 } 582 583 if (ha->tx_tq) { 584 taskqueue_drain(ha->tx_tq, &ha->tx_task); 585 taskqueue_free(ha->tx_tq); 586 } 587 588 ql_del_cdev(ha); 589 590 if (ha->flags.qla_watchdog_active) { 591 ha->flags.qla_watchdog_exit = 1; 592 593 while (ha->qla_watchdog_exited == 0) 594 qla_mdelay(__func__, 1); 595 } 596 597 if (ha->flags.qla_callout_init) 598 callout_stop(&ha->tx_callout); 599 600 if (ha->ifp != NULL) 601 ether_ifdetach(ha->ifp); 602 603 ql_free_dma(ha); 604 qla_free_parent_dma_tag(ha); 605 606 if (ha->mbx_handle) 607 (void)bus_teardown_intr(dev, ha->mbx_irq, ha->mbx_handle); 608 609 if (ha->mbx_irq) 610 (void) bus_release_resource(dev, SYS_RES_IRQ, ha->mbx_irq_rid, 611 ha->mbx_irq); 612 613 for (i = 0; i < ha->hw.num_sds_rings; i++) { 614 615 if (ha->irq_vec[i].handle) { 616 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 617 ha->irq_vec[i].handle); 618 } 619 620 if (ha->irq_vec[i].irq) { 621 (void)bus_release_resource(dev, SYS_RES_IRQ, 622 ha->irq_vec[i].irq_rid, 623 ha->irq_vec[i].irq); 624 } 625 } 626 627 if (ha->msix_count) 628 pci_release_msi(dev); 629 630 if (ha->flags.lock_init) { 631 mtx_destroy(&ha->tx_lock); 632 mtx_destroy(&ha->hw_lock); 633 } 634 635 if (ha->pci_reg) 636 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 637 ha->pci_reg); 638 639 if (ha->pci_reg1) 640 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid1, 641 ha->pci_reg1); 642 } 643 644 /* 645 * DMA Related Functions 646 */ 647 648 static void 649 qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 650 { 651 *((bus_addr_t *)arg) = 0; 652 653 if (error) { 654 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 655 return; 656 } 657 658 *((bus_addr_t *)arg) = segs[0].ds_addr; 659 660 return; 661 } 662 663 int 664 ql_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 665 { 666 int ret = 0; 667 device_t dev; 668 bus_addr_t b_addr; 669 670 dev = ha->pci_dev; 671 672 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 673 674 ret = bus_dma_tag_create( 675 ha->parent_tag,/* parent */ 676 dma_buf->alignment, 677 ((bus_size_t)(1ULL << 32)),/* boundary */ 678 BUS_SPACE_MAXADDR, /* lowaddr */ 679 BUS_SPACE_MAXADDR, /* highaddr */ 680 NULL, NULL, /* filter, filterarg */ 681 dma_buf->size, /* maxsize */ 682 1, /* nsegments */ 683 dma_buf->size, /* maxsegsize */ 684 0, /* flags */ 685 NULL, NULL, /* lockfunc, lockarg */ 686 &dma_buf->dma_tag); 687 688 if (ret) { 689 device_printf(dev, "%s: could not create dma tag\n", __func__); 690 goto ql_alloc_dmabuf_exit; 691 } 692 ret = bus_dmamem_alloc(dma_buf->dma_tag, 693 (void **)&dma_buf->dma_b, 694 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 695 &dma_buf->dma_map); 696 if (ret) { 697 bus_dma_tag_destroy(dma_buf->dma_tag); 698 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 699 goto ql_alloc_dmabuf_exit; 700 } 701 702 ret = bus_dmamap_load(dma_buf->dma_tag, 703 dma_buf->dma_map, 704 dma_buf->dma_b, 705 dma_buf->size, 706 qla_dmamap_callback, 707 &b_addr, BUS_DMA_NOWAIT); 708 709 if (ret || !b_addr) { 710 bus_dma_tag_destroy(dma_buf->dma_tag); 711 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 712 dma_buf->dma_map); 713 ret = -1; 714 goto ql_alloc_dmabuf_exit; 715 } 716 717 dma_buf->dma_addr = b_addr; 718 719 ql_alloc_dmabuf_exit: 720 QL_DPRINT2(ha, (dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 721 __func__, ret, (void *)dma_buf->dma_tag, 722 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 723 dma_buf->size)); 724 725 return ret; 726 } 727 728 void 729 ql_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 730 { 731 bus_dmamap_unload(dma_buf->dma_tag, dma_buf->dma_map); 732 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 733 bus_dma_tag_destroy(dma_buf->dma_tag); 734 } 735 736 static int 737 qla_alloc_parent_dma_tag(qla_host_t *ha) 738 { 739 int ret; 740 device_t dev; 741 742 dev = ha->pci_dev; 743 744 /* 745 * Allocate parent DMA Tag 746 */ 747 ret = bus_dma_tag_create( 748 bus_get_dma_tag(dev), /* parent */ 749 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 750 BUS_SPACE_MAXADDR, /* lowaddr */ 751 BUS_SPACE_MAXADDR, /* highaddr */ 752 NULL, NULL, /* filter, filterarg */ 753 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 754 0, /* nsegments */ 755 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 756 0, /* flags */ 757 NULL, NULL, /* lockfunc, lockarg */ 758 &ha->parent_tag); 759 760 if (ret) { 761 device_printf(dev, "%s: could not create parent dma tag\n", 762 __func__); 763 return (-1); 764 } 765 766 ha->flags.parent_tag = 1; 767 768 return (0); 769 } 770 771 static void 772 qla_free_parent_dma_tag(qla_host_t *ha) 773 { 774 if (ha->flags.parent_tag) { 775 bus_dma_tag_destroy(ha->parent_tag); 776 ha->flags.parent_tag = 0; 777 } 778 } 779 780 /* 781 * Name: qla_init_ifnet 782 * Function: Creates the Network Device Interface and Registers it with the O.S 783 */ 784 785 static void 786 qla_init_ifnet(device_t dev, qla_host_t *ha) 787 { 788 struct ifnet *ifp; 789 790 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 791 792 ifp = ha->ifp = if_alloc(IFT_ETHER); 793 794 if (ifp == NULL) 795 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 796 797 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 798 799 ifp->if_baudrate = IF_Gbps(10); 800 ifp->if_capabilities = IFCAP_LINKSTATE; 801 802 ifp->if_init = qla_init; 803 ifp->if_softc = ha; 804 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 805 ifp->if_ioctl = qla_ioctl; 806 ifp->if_start = qla_start; 807 808 IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha)); 809 ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha); 810 IFQ_SET_READY(&ifp->if_snd); 811 812 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 813 814 ether_ifattach(ifp, qla_get_mac_addr(ha)); 815 816 ifp->if_capabilities = IFCAP_HWCSUM | 817 IFCAP_TSO4 | 818 IFCAP_JUMBO_MTU; 819 820 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 821 ifp->if_capabilities |= IFCAP_VLAN_HWTSO; 822 823 ifp->if_capenable = ifp->if_capabilities; 824 825 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 826 827 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status); 828 829 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0, 830 NULL); 831 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 832 833 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 834 835 QL_DPRINT2(ha, (dev, "%s: exit\n", __func__)); 836 837 return; 838 } 839 840 static void 841 qla_init_locked(qla_host_t *ha) 842 { 843 struct ifnet *ifp = ha->ifp; 844 845 qla_stop(ha); 846 847 if (qla_alloc_xmt_bufs(ha) != 0) 848 return; 849 850 qla_confirm_9kb_enable(ha); 851 852 if (qla_alloc_rcv_bufs(ha) != 0) 853 return; 854 855 bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN); 856 857 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO; 858 859 ha->flags.stop_rcv = 0; 860 if (ql_init_hw_if(ha) == 0) { 861 ifp = ha->ifp; 862 ifp->if_drv_flags |= IFF_DRV_RUNNING; 863 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 864 ha->flags.qla_watchdog_pause = 0; 865 ha->hw_vlan_tx_frames = 0; 866 ha->tx_tso_frames = 0; 867 } 868 869 return; 870 } 871 872 static void 873 qla_init(void *arg) 874 { 875 qla_host_t *ha; 876 877 ha = (qla_host_t *)arg; 878 879 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 880 881 (void)QLA_LOCK(ha, __func__, 0); 882 qla_init_locked(ha); 883 QLA_UNLOCK(ha, __func__); 884 885 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 886 } 887 888 static int 889 qla_set_multi(qla_host_t *ha, uint32_t add_multi) 890 { 891 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 892 struct ifmultiaddr *ifma; 893 int mcnt = 0; 894 struct ifnet *ifp = ha->ifp; 895 int ret = 0; 896 897 if_maddr_rlock(ifp); 898 899 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 900 901 if (ifma->ifma_addr->sa_family != AF_LINK) 902 continue; 903 904 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 905 break; 906 907 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), 908 &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 909 910 mcnt++; 911 } 912 913 if_maddr_runlock(ifp); 914 915 if (QLA_LOCK(ha, __func__, 1) == 0) { 916 ret = ql_hw_set_multi(ha, mta, mcnt, add_multi); 917 QLA_UNLOCK(ha, __func__); 918 } 919 920 return (ret); 921 } 922 923 static int 924 qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 925 { 926 int ret = 0; 927 struct ifreq *ifr = (struct ifreq *)data; 928 struct ifaddr *ifa = (struct ifaddr *)data; 929 qla_host_t *ha; 930 931 ha = (qla_host_t *)ifp->if_softc; 932 933 switch (cmd) { 934 case SIOCSIFADDR: 935 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 936 __func__, cmd)); 937 938 if (ifa->ifa_addr->sa_family == AF_INET) { 939 ifp->if_flags |= IFF_UP; 940 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 941 (void)QLA_LOCK(ha, __func__, 0); 942 qla_init_locked(ha); 943 QLA_UNLOCK(ha, __func__); 944 } 945 QL_DPRINT4(ha, (ha->pci_dev, 946 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 947 __func__, cmd, 948 ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 949 950 arp_ifinit(ifp, ifa); 951 } else { 952 ether_ioctl(ifp, cmd, data); 953 } 954 break; 955 956 case SIOCSIFMTU: 957 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 958 __func__, cmd)); 959 960 if (ifr->ifr_mtu > QLA_MAX_MTU) { 961 ret = EINVAL; 962 } else { 963 (void) QLA_LOCK(ha, __func__, 0); 964 ifp->if_mtu = ifr->ifr_mtu; 965 ha->max_frame_size = 966 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 967 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 968 ret = ql_set_max_mtu(ha, ha->max_frame_size, 969 ha->hw.rcv_cntxt_id); 970 } 971 972 if (ifp->if_mtu > ETHERMTU) 973 ha->std_replenish = QL_JUMBO_REPLENISH_THRES; 974 else 975 ha->std_replenish = QL_STD_REPLENISH_THRES; 976 977 978 QLA_UNLOCK(ha, __func__); 979 980 if (ret) 981 ret = EINVAL; 982 } 983 984 break; 985 986 case SIOCSIFFLAGS: 987 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 988 __func__, cmd)); 989 990 (void)QLA_LOCK(ha, __func__, 0); 991 992 if (ifp->if_flags & IFF_UP) { 993 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 994 if ((ifp->if_flags ^ ha->if_flags) & 995 IFF_PROMISC) { 996 ret = ql_set_promisc(ha); 997 } else if ((ifp->if_flags ^ ha->if_flags) & 998 IFF_ALLMULTI) { 999 ret = ql_set_allmulti(ha); 1000 } 1001 } else { 1002 qla_init_locked(ha); 1003 ha->max_frame_size = ifp->if_mtu + 1004 ETHER_HDR_LEN + ETHER_CRC_LEN; 1005 ret = ql_set_max_mtu(ha, ha->max_frame_size, 1006 ha->hw.rcv_cntxt_id); 1007 } 1008 } else { 1009 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1010 qla_stop(ha); 1011 ha->if_flags = ifp->if_flags; 1012 } 1013 1014 QLA_UNLOCK(ha, __func__); 1015 break; 1016 1017 case SIOCADDMULTI: 1018 QL_DPRINT4(ha, (ha->pci_dev, 1019 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 1020 1021 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1022 if (qla_set_multi(ha, 1)) 1023 ret = EINVAL; 1024 } 1025 break; 1026 1027 case SIOCDELMULTI: 1028 QL_DPRINT4(ha, (ha->pci_dev, 1029 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 1030 1031 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1032 if (qla_set_multi(ha, 0)) 1033 ret = EINVAL; 1034 } 1035 break; 1036 1037 case SIOCSIFMEDIA: 1038 case SIOCGIFMEDIA: 1039 QL_DPRINT4(ha, (ha->pci_dev, 1040 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 1041 __func__, cmd)); 1042 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 1043 break; 1044 1045 case SIOCSIFCAP: 1046 { 1047 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1048 1049 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 1050 __func__, cmd)); 1051 1052 if (mask & IFCAP_HWCSUM) 1053 ifp->if_capenable ^= IFCAP_HWCSUM; 1054 if (mask & IFCAP_TSO4) 1055 ifp->if_capenable ^= IFCAP_TSO4; 1056 if (mask & IFCAP_VLAN_HWTAGGING) 1057 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 1058 if (mask & IFCAP_VLAN_HWTSO) 1059 ifp->if_capenable ^= IFCAP_VLAN_HWTSO; 1060 1061 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1062 qla_init(ha); 1063 1064 VLAN_CAPABILITIES(ifp); 1065 break; 1066 } 1067 1068 default: 1069 QL_DPRINT4(ha, (ha->pci_dev, "%s: default (0x%lx)\n", 1070 __func__, cmd)); 1071 ret = ether_ioctl(ifp, cmd, data); 1072 break; 1073 } 1074 1075 return (ret); 1076 } 1077 1078 static int 1079 qla_media_change(struct ifnet *ifp) 1080 { 1081 qla_host_t *ha; 1082 struct ifmedia *ifm; 1083 int ret = 0; 1084 1085 ha = (qla_host_t *)ifp->if_softc; 1086 1087 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1088 1089 ifm = &ha->media; 1090 1091 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1092 ret = EINVAL; 1093 1094 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1095 1096 return (ret); 1097 } 1098 1099 static void 1100 qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1101 { 1102 qla_host_t *ha; 1103 1104 ha = (qla_host_t *)ifp->if_softc; 1105 1106 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1107 1108 ifmr->ifm_status = IFM_AVALID; 1109 ifmr->ifm_active = IFM_ETHER; 1110 1111 ql_update_link_state(ha); 1112 if (ha->hw.link_up) { 1113 ifmr->ifm_status |= IFM_ACTIVE; 1114 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha)); 1115 } 1116 1117 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit (%s)\n", __func__,\ 1118 (ha->hw.link_up ? "link_up" : "link_down"))); 1119 1120 return; 1121 } 1122 1123 static void 1124 qla_start(struct ifnet *ifp) 1125 { 1126 struct mbuf *m_head; 1127 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 1128 1129 QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1130 1131 if (!mtx_trylock(&ha->tx_lock)) { 1132 QL_DPRINT8(ha, (ha->pci_dev, 1133 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 1134 return; 1135 } 1136 1137 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1138 IFF_DRV_RUNNING) { 1139 QL_DPRINT8(ha, 1140 (ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1141 QLA_TX_UNLOCK(ha); 1142 return; 1143 } 1144 1145 if (!ha->hw.link_up || !ha->watchdog_ticks) 1146 ql_update_link_state(ha); 1147 1148 if (!ha->hw.link_up) { 1149 QL_DPRINT8(ha, (ha->pci_dev, "%s: link down\n", __func__)); 1150 QLA_TX_UNLOCK(ha); 1151 return; 1152 } 1153 1154 while (ifp->if_snd.ifq_head != NULL) { 1155 IF_DEQUEUE(&ifp->if_snd, m_head); 1156 1157 if (m_head == NULL) { 1158 QL_DPRINT8(ha, (ha->pci_dev, "%s: m_head == NULL\n", 1159 __func__)); 1160 break; 1161 } 1162 1163 if (qla_send(ha, &m_head)) { 1164 if (m_head == NULL) 1165 break; 1166 QL_DPRINT8(ha, (ha->pci_dev, "%s: PREPEND\n", __func__)); 1167 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1168 IF_PREPEND(&ifp->if_snd, m_head); 1169 break; 1170 } 1171 /* Send a copy of the frame to the BPF listener */ 1172 ETHER_BPF_MTAP(ifp, m_head); 1173 } 1174 QLA_TX_UNLOCK(ha); 1175 QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1176 return; 1177 } 1178 1179 static int 1180 qla_send(qla_host_t *ha, struct mbuf **m_headp) 1181 { 1182 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1183 bus_dmamap_t map; 1184 int nsegs; 1185 int ret = -1; 1186 uint32_t tx_idx; 1187 struct mbuf *m_head = *m_headp; 1188 uint32_t txr_idx = ha->txr_idx; 1189 uint32_t iscsi_pdu = 0; 1190 1191 QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1192 1193 /* check if flowid is set */ 1194 1195 if (M_HASHTYPE_GET(m_head) != M_HASHTYPE_NONE) { 1196 #ifdef QL_ENABLE_ISCSI_TLV 1197 if (qla_iscsi_pdu(ha, m_head) == 0) { 1198 iscsi_pdu = 1; 1199 txr_idx = m_head->m_pkthdr.flowid & 1200 ((ha->hw.num_tx_rings >> 1) - 1); 1201 } else { 1202 txr_idx = m_head->m_pkthdr.flowid & 1203 (ha->hw.num_tx_rings - 1); 1204 } 1205 #else 1206 txr_idx = m_head->m_pkthdr.flowid & (ha->hw.num_tx_rings - 1); 1207 #endif /* #ifdef QL_ENABLE_ISCSI_TLV */ 1208 } 1209 1210 1211 tx_idx = ha->hw.tx_cntxt[txr_idx].txr_next; 1212 map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map; 1213 1214 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1215 BUS_DMA_NOWAIT); 1216 1217 if (ret == EFBIG) { 1218 1219 struct mbuf *m; 1220 1221 QL_DPRINT8(ha, (ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1222 m_head->m_pkthdr.len)); 1223 1224 m = m_defrag(m_head, M_NOWAIT); 1225 if (m == NULL) { 1226 ha->err_tx_defrag++; 1227 m_freem(m_head); 1228 *m_headp = NULL; 1229 device_printf(ha->pci_dev, 1230 "%s: m_defrag() = NULL [%d]\n", 1231 __func__, ret); 1232 return (ENOBUFS); 1233 } 1234 m_head = m; 1235 *m_headp = m_head; 1236 1237 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1238 segs, &nsegs, BUS_DMA_NOWAIT))) { 1239 1240 ha->err_tx_dmamap_load++; 1241 1242 device_printf(ha->pci_dev, 1243 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1244 __func__, ret, m_head->m_pkthdr.len); 1245 1246 if (ret != ENOMEM) { 1247 m_freem(m_head); 1248 *m_headp = NULL; 1249 } 1250 return (ret); 1251 } 1252 1253 } else if (ret) { 1254 1255 ha->err_tx_dmamap_load++; 1256 1257 device_printf(ha->pci_dev, 1258 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1259 __func__, ret, m_head->m_pkthdr.len); 1260 1261 if (ret != ENOMEM) { 1262 m_freem(m_head); 1263 *m_headp = NULL; 1264 } 1265 return (ret); 1266 } 1267 1268 QL_ASSERT(ha, (nsegs != 0), ("qla_send: empty packet")); 1269 1270 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1271 1272 if (!(ret = ql_hw_send(ha, segs, nsegs, tx_idx, m_head, txr_idx, 1273 iscsi_pdu))) { 1274 ha->tx_ring[txr_idx].count++; 1275 ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head = m_head; 1276 } else { 1277 if (ret == EINVAL) { 1278 if (m_head) 1279 m_freem(m_head); 1280 *m_headp = NULL; 1281 } 1282 } 1283 1284 QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1285 return (ret); 1286 } 1287 1288 static void 1289 qla_stop(qla_host_t *ha) 1290 { 1291 struct ifnet *ifp = ha->ifp; 1292 device_t dev; 1293 1294 dev = ha->pci_dev; 1295 1296 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1297 1298 ha->flags.qla_watchdog_pause = 1; 1299 1300 while (!ha->qla_watchdog_paused) 1301 qla_mdelay(__func__, 1); 1302 1303 ha->flags.stop_rcv = 1; 1304 ql_hw_stop_rcv(ha); 1305 1306 ql_del_hw_if(ha); 1307 1308 qla_free_xmt_bufs(ha); 1309 qla_free_rcv_bufs(ha); 1310 1311 return; 1312 } 1313 1314 /* 1315 * Buffer Management Functions for Transmit and Receive Rings 1316 */ 1317 static int 1318 qla_alloc_xmt_bufs(qla_host_t *ha) 1319 { 1320 int ret = 0; 1321 uint32_t i, j; 1322 qla_tx_buf_t *txb; 1323 1324 if (bus_dma_tag_create(NULL, /* parent */ 1325 1, 0, /* alignment, bounds */ 1326 BUS_SPACE_MAXADDR, /* lowaddr */ 1327 BUS_SPACE_MAXADDR, /* highaddr */ 1328 NULL, NULL, /* filter, filterarg */ 1329 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */ 1330 QLA_MAX_SEGMENTS, /* nsegments */ 1331 PAGE_SIZE, /* maxsegsize */ 1332 BUS_DMA_ALLOCNOW, /* flags */ 1333 NULL, /* lockfunc */ 1334 NULL, /* lockfuncarg */ 1335 &ha->tx_tag)) { 1336 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n", 1337 __func__); 1338 return (ENOMEM); 1339 } 1340 1341 for (i = 0; i < ha->hw.num_tx_rings; i++) { 1342 bzero((void *)ha->tx_ring[i].tx_buf, 1343 (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1344 } 1345 1346 for (j = 0; j < ha->hw.num_tx_rings; j++) { 1347 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) { 1348 1349 txb = &ha->tx_ring[j].tx_buf[i]; 1350 1351 if ((ret = bus_dmamap_create(ha->tx_tag, 1352 BUS_DMA_NOWAIT, &txb->map))) { 1353 1354 ha->err_tx_dmamap_create++; 1355 device_printf(ha->pci_dev, 1356 "%s: bus_dmamap_create failed[%d]\n", 1357 __func__, ret); 1358 1359 qla_free_xmt_bufs(ha); 1360 1361 return (ret); 1362 } 1363 } 1364 } 1365 1366 return 0; 1367 } 1368 1369 /* 1370 * Release mbuf after it sent on the wire 1371 */ 1372 static void 1373 qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1374 { 1375 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1376 1377 if (txb->m_head && txb->map) { 1378 1379 bus_dmamap_unload(ha->tx_tag, txb->map); 1380 1381 m_freem(txb->m_head); 1382 txb->m_head = NULL; 1383 } 1384 1385 if (txb->map) 1386 bus_dmamap_destroy(ha->tx_tag, txb->map); 1387 1388 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1389 } 1390 1391 static void 1392 qla_free_xmt_bufs(qla_host_t *ha) 1393 { 1394 int i, j; 1395 1396 for (j = 0; j < ha->hw.num_tx_rings; j++) { 1397 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1398 qla_clear_tx_buf(ha, &ha->tx_ring[j].tx_buf[i]); 1399 } 1400 1401 if (ha->tx_tag != NULL) { 1402 bus_dma_tag_destroy(ha->tx_tag); 1403 ha->tx_tag = NULL; 1404 } 1405 1406 for (i = 0; i < ha->hw.num_tx_rings; i++) { 1407 bzero((void *)ha->tx_ring[i].tx_buf, 1408 (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1409 } 1410 return; 1411 } 1412 1413 1414 static int 1415 qla_alloc_rcv_std(qla_host_t *ha) 1416 { 1417 int i, j, k, r, ret = 0; 1418 qla_rx_buf_t *rxb; 1419 qla_rx_ring_t *rx_ring; 1420 1421 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1422 1423 rx_ring = &ha->rx_ring[r]; 1424 1425 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1426 1427 rxb = &rx_ring->rx_buf[i]; 1428 1429 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, 1430 &rxb->map); 1431 1432 if (ret) { 1433 device_printf(ha->pci_dev, 1434 "%s: dmamap[%d, %d] failed\n", 1435 __func__, r, i); 1436 1437 for (k = 0; k < r; k++) { 1438 for (j = 0; j < NUM_RX_DESCRIPTORS; 1439 j++) { 1440 rxb = &ha->rx_ring[k].rx_buf[j]; 1441 bus_dmamap_destroy(ha->rx_tag, 1442 rxb->map); 1443 } 1444 } 1445 1446 for (j = 0; j < i; j++) { 1447 bus_dmamap_destroy(ha->rx_tag, 1448 rx_ring->rx_buf[j].map); 1449 } 1450 goto qla_alloc_rcv_std_err; 1451 } 1452 } 1453 } 1454 1455 qla_init_hw_rcv_descriptors(ha); 1456 1457 1458 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1459 1460 rx_ring = &ha->rx_ring[r]; 1461 1462 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1463 rxb = &rx_ring->rx_buf[i]; 1464 rxb->handle = i; 1465 if (!(ret = ql_get_mbuf(ha, rxb, NULL))) { 1466 /* 1467 * set the physical address in the 1468 * corresponding descriptor entry in the 1469 * receive ring/queue for the hba 1470 */ 1471 qla_set_hw_rcv_desc(ha, r, i, rxb->handle, 1472 rxb->paddr, 1473 (rxb->m_head)->m_pkthdr.len); 1474 } else { 1475 device_printf(ha->pci_dev, 1476 "%s: ql_get_mbuf [%d, %d] failed\n", 1477 __func__, r, i); 1478 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1479 goto qla_alloc_rcv_std_err; 1480 } 1481 } 1482 } 1483 return 0; 1484 1485 qla_alloc_rcv_std_err: 1486 return (-1); 1487 } 1488 1489 static void 1490 qla_free_rcv_std(qla_host_t *ha) 1491 { 1492 int i, r; 1493 qla_rx_buf_t *rxb; 1494 1495 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1496 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1497 rxb = &ha->rx_ring[r].rx_buf[i]; 1498 if (rxb->m_head != NULL) { 1499 bus_dmamap_unload(ha->rx_tag, rxb->map); 1500 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1501 m_freem(rxb->m_head); 1502 rxb->m_head = NULL; 1503 } 1504 } 1505 } 1506 return; 1507 } 1508 1509 static int 1510 qla_alloc_rcv_bufs(qla_host_t *ha) 1511 { 1512 int i, ret = 0; 1513 1514 if (bus_dma_tag_create(NULL, /* parent */ 1515 1, 0, /* alignment, bounds */ 1516 BUS_SPACE_MAXADDR, /* lowaddr */ 1517 BUS_SPACE_MAXADDR, /* highaddr */ 1518 NULL, NULL, /* filter, filterarg */ 1519 MJUM9BYTES, /* maxsize */ 1520 1, /* nsegments */ 1521 MJUM9BYTES, /* maxsegsize */ 1522 BUS_DMA_ALLOCNOW, /* flags */ 1523 NULL, /* lockfunc */ 1524 NULL, /* lockfuncarg */ 1525 &ha->rx_tag)) { 1526 1527 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n", 1528 __func__); 1529 1530 return (ENOMEM); 1531 } 1532 1533 bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS)); 1534 1535 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1536 ha->hw.sds[i].sdsr_next = 0; 1537 ha->hw.sds[i].rxb_free = NULL; 1538 ha->hw.sds[i].rx_free = 0; 1539 } 1540 1541 ret = qla_alloc_rcv_std(ha); 1542 1543 return (ret); 1544 } 1545 1546 static void 1547 qla_free_rcv_bufs(qla_host_t *ha) 1548 { 1549 int i; 1550 1551 qla_free_rcv_std(ha); 1552 1553 if (ha->rx_tag != NULL) { 1554 bus_dma_tag_destroy(ha->rx_tag); 1555 ha->rx_tag = NULL; 1556 } 1557 1558 bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS)); 1559 1560 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1561 ha->hw.sds[i].sdsr_next = 0; 1562 ha->hw.sds[i].rxb_free = NULL; 1563 ha->hw.sds[i].rx_free = 0; 1564 } 1565 1566 return; 1567 } 1568 1569 int 1570 ql_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp) 1571 { 1572 register struct mbuf *mp = nmp; 1573 struct ifnet *ifp; 1574 int ret = 0; 1575 uint32_t offset; 1576 bus_dma_segment_t segs[1]; 1577 int nsegs, mbuf_size; 1578 1579 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1580 1581 ifp = ha->ifp; 1582 1583 if (ha->hw.enable_9kb) 1584 mbuf_size = MJUM9BYTES; 1585 else 1586 mbuf_size = MCLBYTES; 1587 1588 if (mp == NULL) { 1589 1590 if (ha->hw.enable_9kb) 1591 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, mbuf_size); 1592 else 1593 mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1594 1595 if (mp == NULL) { 1596 ha->err_m_getcl++; 1597 ret = ENOBUFS; 1598 device_printf(ha->pci_dev, 1599 "%s: m_getcl failed\n", __func__); 1600 goto exit_ql_get_mbuf; 1601 } 1602 mp->m_len = mp->m_pkthdr.len = mbuf_size; 1603 } else { 1604 mp->m_len = mp->m_pkthdr.len = mbuf_size; 1605 mp->m_data = mp->m_ext.ext_buf; 1606 mp->m_next = NULL; 1607 } 1608 1609 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1610 if (offset) { 1611 offset = 8 - offset; 1612 m_adj(mp, offset); 1613 } 1614 1615 /* 1616 * Using memory from the mbuf cluster pool, invoke the bus_dma 1617 * machinery to arrange the memory mapping. 1618 */ 1619 ret = bus_dmamap_load_mbuf_sg(ha->rx_tag, rxb->map, 1620 mp, segs, &nsegs, BUS_DMA_NOWAIT); 1621 rxb->paddr = segs[0].ds_addr; 1622 1623 if (ret || !rxb->paddr || (nsegs != 1)) { 1624 m_free(mp); 1625 rxb->m_head = NULL; 1626 device_printf(ha->pci_dev, 1627 "%s: bus_dmamap_load failed[%d, 0x%016llx, %d]\n", 1628 __func__, ret, (long long unsigned int)rxb->paddr, 1629 nsegs); 1630 ret = -1; 1631 goto exit_ql_get_mbuf; 1632 } 1633 rxb->m_head = mp; 1634 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1635 1636 exit_ql_get_mbuf: 1637 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1638 return (ret); 1639 } 1640 1641 static void 1642 qla_tx_done(void *context, int pending) 1643 { 1644 qla_host_t *ha = context; 1645 struct ifnet *ifp; 1646 1647 ifp = ha->ifp; 1648 1649 if (!ifp) 1650 return; 1651 1652 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1653 QL_DPRINT8(ha, (ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1654 return; 1655 } 1656 ql_hw_tx_done(ha); 1657 1658 qla_start(ha->ifp); 1659 } 1660 1661 static void 1662 qla_get_peer(qla_host_t *ha) 1663 { 1664 device_t *peers; 1665 int count, i, slot; 1666 int my_slot = pci_get_slot(ha->pci_dev); 1667 1668 if (device_get_children(device_get_parent(ha->pci_dev), &peers, &count)) 1669 return; 1670 1671 for (i = 0; i < count; i++) { 1672 slot = pci_get_slot(peers[i]); 1673 1674 if ((slot >= 0) && (slot == my_slot) && 1675 (pci_get_device(peers[i]) == 1676 pci_get_device(ha->pci_dev))) { 1677 if (ha->pci_dev != peers[i]) 1678 ha->peer_dev = peers[i]; 1679 } 1680 } 1681 } 1682 1683 static void 1684 qla_send_msg_to_peer(qla_host_t *ha, uint32_t msg_to_peer) 1685 { 1686 qla_host_t *ha_peer; 1687 1688 if (ha->peer_dev) { 1689 if ((ha_peer = device_get_softc(ha->peer_dev)) != NULL) { 1690 1691 ha_peer->msg_from_peer = msg_to_peer; 1692 } 1693 } 1694 } 1695 1696 static void 1697 qla_error_recovery(void *context, int pending) 1698 { 1699 qla_host_t *ha = context; 1700 uint32_t msecs_100 = 100; 1701 struct ifnet *ifp = ha->ifp; 1702 1703 (void)QLA_LOCK(ha, __func__, 0); 1704 1705 ha->hw.imd_compl = 1; 1706 qla_mdelay(__func__, 300); 1707 1708 ha->flags.stop_rcv = 1; 1709 1710 ql_hw_stop_rcv(ha); 1711 1712 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1713 1714 QLA_UNLOCK(ha, __func__); 1715 1716 if ((ha->pci_func & 0x1) == 0) { 1717 1718 if (!ha->msg_from_peer) { 1719 qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET); 1720 1721 while ((ha->msg_from_peer != QL_PEER_MSG_ACK) && 1722 msecs_100--) 1723 qla_mdelay(__func__, 100); 1724 } 1725 1726 ha->msg_from_peer = 0; 1727 1728 ql_minidump(ha); 1729 1730 (void) ql_init_hw(ha); 1731 qla_free_xmt_bufs(ha); 1732 qla_free_rcv_bufs(ha); 1733 1734 qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK); 1735 1736 } else { 1737 if (ha->msg_from_peer == QL_PEER_MSG_RESET) { 1738 1739 ha->msg_from_peer = 0; 1740 1741 qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK); 1742 } else { 1743 qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET); 1744 } 1745 1746 while ((ha->msg_from_peer != QL_PEER_MSG_ACK) && msecs_100--) 1747 qla_mdelay(__func__, 100); 1748 ha->msg_from_peer = 0; 1749 1750 (void) ql_init_hw(ha); 1751 qla_free_xmt_bufs(ha); 1752 qla_free_rcv_bufs(ha); 1753 } 1754 (void)QLA_LOCK(ha, __func__, 0); 1755 1756 if (qla_alloc_xmt_bufs(ha) != 0) { 1757 QLA_UNLOCK(ha, __func__); 1758 return; 1759 } 1760 qla_confirm_9kb_enable(ha); 1761 1762 if (qla_alloc_rcv_bufs(ha) != 0) { 1763 QLA_UNLOCK(ha, __func__); 1764 return; 1765 } 1766 1767 ha->flags.stop_rcv = 0; 1768 if (ql_init_hw_if(ha) == 0) { 1769 ifp = ha->ifp; 1770 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1771 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1772 ha->flags.qla_watchdog_pause = 0; 1773 } 1774 1775 QLA_UNLOCK(ha, __func__); 1776 } 1777 1778 static void 1779 qla_async_event(void *context, int pending) 1780 { 1781 qla_host_t *ha = context; 1782 1783 (void)QLA_LOCK(ha, __func__, 0); 1784 qla_hw_async_event(ha); 1785 QLA_UNLOCK(ha, __func__); 1786 } 1787 1788