xref: /freebsd/sys/dev/sfxge/common/ef10_intr.c (revision c1d255d3)
1 /*-
2  * Copyright (c) 2012-2016 Solarflare Communications Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  *    this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright notice,
11  *    this list of conditions and the following disclaimer in the documentation
12  *    and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  *
26  * The views and conclusions contained in the software and documentation are
27  * those of the authors and should not be interpreted as representing official
28  * policies, either expressed or implied, of the FreeBSD Project.
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include "efx.h"
35 #include "efx_impl.h"
36 
37 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
38 
39 	__checkReturn	efx_rc_t
40 ef10_intr_init(
41 	__in		efx_nic_t *enp,
42 	__in		efx_intr_type_t type,
43 	__in		efsys_mem_t *esmp)
44 {
45 	_NOTE(ARGUNUSED(enp, type, esmp))
46 	return (0);
47 }
48 
49 			void
50 ef10_intr_enable(
51 	__in		efx_nic_t *enp)
52 {
53 	_NOTE(ARGUNUSED(enp))
54 }
55 
56 			void
57 ef10_intr_disable(
58 	__in		efx_nic_t *enp)
59 {
60 	_NOTE(ARGUNUSED(enp))
61 }
62 
63 			void
64 ef10_intr_disable_unlocked(
65 	__in		efx_nic_t *enp)
66 {
67 	_NOTE(ARGUNUSED(enp))
68 }
69 
70 static	__checkReturn	efx_rc_t
71 efx_mcdi_trigger_interrupt(
72 	__in		efx_nic_t *enp,
73 	__in		unsigned int level)
74 {
75 	efx_mcdi_req_t req;
76 	EFX_MCDI_DECLARE_BUF(payload, MC_CMD_TRIGGER_INTERRUPT_IN_LEN,
77 		MC_CMD_TRIGGER_INTERRUPT_OUT_LEN);
78 	efx_rc_t rc;
79 
80 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
81 	    enp->en_family == EFX_FAMILY_MEDFORD ||
82 	    enp->en_family == EFX_FAMILY_MEDFORD2);
83 
84 	if (level >= enp->en_nic_cfg.enc_intr_limit) {
85 		rc = EINVAL;
86 		goto fail1;
87 	}
88 
89 	req.emr_cmd = MC_CMD_TRIGGER_INTERRUPT;
90 	req.emr_in_buf = payload;
91 	req.emr_in_length = MC_CMD_TRIGGER_INTERRUPT_IN_LEN;
92 	req.emr_out_buf = payload;
93 	req.emr_out_length = MC_CMD_TRIGGER_INTERRUPT_OUT_LEN;
94 
95 	MCDI_IN_SET_DWORD(req, TRIGGER_INTERRUPT_IN_INTR_LEVEL, level);
96 
97 	efx_mcdi_execute(enp, &req);
98 
99 	if (req.emr_rc != 0) {
100 		rc = req.emr_rc;
101 		goto fail2;
102 	}
103 
104 	return (0);
105 
106 fail2:
107 	EFSYS_PROBE(fail2);
108 
109 fail1:
110 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
111 
112 	return (rc);
113 }
114 
115 	__checkReturn	efx_rc_t
116 ef10_intr_trigger(
117 	__in		efx_nic_t *enp,
118 	__in		unsigned int level)
119 {
120 	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
121 	efx_rc_t rc;
122 
123 	if (encp->enc_bug41750_workaround) {
124 		/*
125 		 * bug 41750: Test interrupts don't work on Greenport
126 		 * bug 50084: Test interrupts don't work on VFs
127 		 */
128 		rc = ENOTSUP;
129 		goto fail1;
130 	}
131 
132 	if ((rc = efx_mcdi_trigger_interrupt(enp, level)) != 0)
133 		goto fail2;
134 
135 	return (0);
136 
137 fail2:
138 	EFSYS_PROBE(fail2);
139 fail1:
140 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
141 
142 	return (rc);
143 }
144 
145 			void
146 ef10_intr_status_line(
147 	__in		efx_nic_t *enp,
148 	__out		boolean_t *fatalp,
149 	__out		uint32_t *qmaskp)
150 {
151 	efx_dword_t dword;
152 
153 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
154 	    enp->en_family == EFX_FAMILY_MEDFORD ||
155 	    enp->en_family == EFX_FAMILY_MEDFORD2);
156 
157 	/* Read the queue mask and implicitly acknowledge the interrupt. */
158 	EFX_BAR_READD(enp, ER_DZ_BIU_INT_ISR_REG, &dword, B_FALSE);
159 	*qmaskp = EFX_DWORD_FIELD(dword, EFX_DWORD_0);
160 
161 	EFSYS_PROBE1(qmask, uint32_t, *qmaskp);
162 
163 	*fatalp = B_FALSE;
164 }
165 
166 			void
167 ef10_intr_status_message(
168 	__in		efx_nic_t *enp,
169 	__in		unsigned int message,
170 	__out		boolean_t *fatalp)
171 {
172 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
173 	    enp->en_family == EFX_FAMILY_MEDFORD ||
174 	    enp->en_family == EFX_FAMILY_MEDFORD2);
175 
176 	_NOTE(ARGUNUSED(enp, message))
177 
178 	/* EF10 fatal errors are reported via events */
179 	*fatalp = B_FALSE;
180 }
181 
182 			void
183 ef10_intr_fatal(
184 	__in		efx_nic_t *enp)
185 {
186 	/* EF10 fatal errors are reported via events */
187 	_NOTE(ARGUNUSED(enp))
188 }
189 
190 			void
191 ef10_intr_fini(
192 	__in		efx_nic_t *enp)
193 {
194 	_NOTE(ARGUNUSED(enp))
195 }
196 
197 #endif	/* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
198