1e67df184SAndrew Rybchenko /*-
2929c7febSAndrew Rybchenko * Copyright (c) 2012-2016 Solarflare Communications Inc.
3e67df184SAndrew Rybchenko * All rights reserved.
4e67df184SAndrew Rybchenko *
5e67df184SAndrew Rybchenko * Redistribution and use in source and binary forms, with or without
6e67df184SAndrew Rybchenko * modification, are permitted provided that the following conditions are met:
7e67df184SAndrew Rybchenko *
8e67df184SAndrew Rybchenko * 1. Redistributions of source code must retain the above copyright notice,
9e67df184SAndrew Rybchenko * this list of conditions and the following disclaimer.
10e67df184SAndrew Rybchenko * 2. Redistributions in binary form must reproduce the above copyright notice,
11e67df184SAndrew Rybchenko * this list of conditions and the following disclaimer in the documentation
12e67df184SAndrew Rybchenko * and/or other materials provided with the distribution.
13e67df184SAndrew Rybchenko *
14e67df184SAndrew Rybchenko * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15e67df184SAndrew Rybchenko * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16e67df184SAndrew Rybchenko * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17e67df184SAndrew Rybchenko * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18e67df184SAndrew Rybchenko * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19e67df184SAndrew Rybchenko * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20e67df184SAndrew Rybchenko * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21e67df184SAndrew Rybchenko * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22e67df184SAndrew Rybchenko * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23e67df184SAndrew Rybchenko * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24e67df184SAndrew Rybchenko * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25e67df184SAndrew Rybchenko *
26e67df184SAndrew Rybchenko * The views and conclusions contained in the software and documentation are
27e67df184SAndrew Rybchenko * those of the authors and should not be interpreted as representing official
28e67df184SAndrew Rybchenko * policies, either expressed or implied, of the FreeBSD Project.
29e67df184SAndrew Rybchenko */
30e67df184SAndrew Rybchenko
31e67df184SAndrew Rybchenko #include <sys/cdefs.h>
32e67df184SAndrew Rybchenko #include "efx.h"
33e67df184SAndrew Rybchenko #include "efx_impl.h"
34e67df184SAndrew Rybchenko
35eecf8d28SAndrew Rybchenko #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
36e67df184SAndrew Rybchenko
37e67df184SAndrew Rybchenko #if EFSYS_OPT_MCDI
38e67df184SAndrew Rybchenko
39e67df184SAndrew Rybchenko #ifndef WITH_MCDI_V2
40e67df184SAndrew Rybchenko #error "WITH_MCDI_V2 required for EF10 MCDIv2 commands."
41e67df184SAndrew Rybchenko #endif
42e67df184SAndrew Rybchenko
43e67df184SAndrew Rybchenko __checkReturn efx_rc_t
ef10_mcdi_init(__in efx_nic_t * enp,__in const efx_mcdi_transport_t * emtp)44e67df184SAndrew Rybchenko ef10_mcdi_init(
45e67df184SAndrew Rybchenko __in efx_nic_t *enp,
46e67df184SAndrew Rybchenko __in const efx_mcdi_transport_t *emtp)
47e67df184SAndrew Rybchenko {
48e67df184SAndrew Rybchenko efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
49e67df184SAndrew Rybchenko efsys_mem_t *esmp = emtp->emt_dma_mem;
50e67df184SAndrew Rybchenko efx_dword_t dword;
51e67df184SAndrew Rybchenko efx_rc_t rc;
52e67df184SAndrew Rybchenko
53e67df184SAndrew Rybchenko EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
54eecf8d28SAndrew Rybchenko enp->en_family == EFX_FAMILY_MEDFORD ||
55eecf8d28SAndrew Rybchenko enp->en_family == EFX_FAMILY_MEDFORD2);
56e67df184SAndrew Rybchenko EFSYS_ASSERT(enp->en_features & EFX_FEATURE_MCDI_DMA);
57e67df184SAndrew Rybchenko
58e67df184SAndrew Rybchenko /*
59e67df184SAndrew Rybchenko * All EF10 firmware supports MCDIv2 and MCDIv1.
60e67df184SAndrew Rybchenko * Medford BootROM supports MCDIv2 and MCDIv1.
61e67df184SAndrew Rybchenko * Huntington BootROM supports MCDIv1 only.
62e67df184SAndrew Rybchenko */
63e67df184SAndrew Rybchenko emip->emi_max_version = 2;
64e67df184SAndrew Rybchenko
65e67df184SAndrew Rybchenko /* A host DMA buffer is required for EF10 MCDI */
66e67df184SAndrew Rybchenko if (esmp == NULL) {
67e67df184SAndrew Rybchenko rc = EINVAL;
68e67df184SAndrew Rybchenko goto fail1;
69e67df184SAndrew Rybchenko }
70e67df184SAndrew Rybchenko
71e67df184SAndrew Rybchenko /*
72e67df184SAndrew Rybchenko * Ensure that the MC doorbell is in a known state before issuing MCDI
73e67df184SAndrew Rybchenko * commands. The recovery algorithm requires that the MC command buffer
74e67df184SAndrew Rybchenko * must be 256 byte aligned. See bug24769.
75e67df184SAndrew Rybchenko */
76e67df184SAndrew Rybchenko if ((EFSYS_MEM_ADDR(esmp) & 0xFF) != 0) {
77e67df184SAndrew Rybchenko rc = EINVAL;
78e67df184SAndrew Rybchenko goto fail2;
79e67df184SAndrew Rybchenko }
80e67df184SAndrew Rybchenko EFX_POPULATE_DWORD_1(dword, EFX_DWORD_0, 1);
81e67df184SAndrew Rybchenko EFX_BAR_WRITED(enp, ER_DZ_MC_DB_HWRD_REG, &dword, B_FALSE);
82e67df184SAndrew Rybchenko
83e67df184SAndrew Rybchenko /* Save initial MC reboot status */
84e67df184SAndrew Rybchenko (void) ef10_mcdi_poll_reboot(enp);
85e67df184SAndrew Rybchenko
86e67df184SAndrew Rybchenko /* Start a new epoch (allow fresh MCDI requests to succeed) */
87e67df184SAndrew Rybchenko efx_mcdi_new_epoch(enp);
88e67df184SAndrew Rybchenko
89e67df184SAndrew Rybchenko return (0);
90e67df184SAndrew Rybchenko
91e67df184SAndrew Rybchenko fail2:
92e67df184SAndrew Rybchenko EFSYS_PROBE(fail2);
93e67df184SAndrew Rybchenko fail1:
94e67df184SAndrew Rybchenko EFSYS_PROBE1(fail1, efx_rc_t, rc);
95e67df184SAndrew Rybchenko
96e67df184SAndrew Rybchenko return (rc);
97e67df184SAndrew Rybchenko }
98e67df184SAndrew Rybchenko
99e67df184SAndrew Rybchenko void
ef10_mcdi_fini(__in efx_nic_t * enp)100e67df184SAndrew Rybchenko ef10_mcdi_fini(
101e67df184SAndrew Rybchenko __in efx_nic_t *enp)
102e67df184SAndrew Rybchenko {
103e67df184SAndrew Rybchenko efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
104e67df184SAndrew Rybchenko
105e67df184SAndrew Rybchenko emip->emi_new_epoch = B_FALSE;
106e67df184SAndrew Rybchenko }
107e67df184SAndrew Rybchenko
1088a4fcbd4SAndrew Rybchenko /*
1098a4fcbd4SAndrew Rybchenko * In older firmware all commands are processed in a single thread, so a long
1108a4fcbd4SAndrew Rybchenko * running command for one PCIe function can block processing for another
1118a4fcbd4SAndrew Rybchenko * function (see bug 61269).
1128a4fcbd4SAndrew Rybchenko *
1138a4fcbd4SAndrew Rybchenko * In newer firmware that supports multithreaded MCDI processing, we can extend
1148a4fcbd4SAndrew Rybchenko * the timeout for long-running requests which we know firmware may choose to
1158a4fcbd4SAndrew Rybchenko * process in a background thread.
1168a4fcbd4SAndrew Rybchenko */
1178a4fcbd4SAndrew Rybchenko #define EF10_MCDI_CMD_TIMEOUT_US (10 * 1000 * 1000)
1188a4fcbd4SAndrew Rybchenko #define EF10_MCDI_CMD_LONG_TIMEOUT_US (60 * 1000 * 1000)
1198a4fcbd4SAndrew Rybchenko
1208a4fcbd4SAndrew Rybchenko void
ef10_mcdi_get_timeout(__in efx_nic_t * enp,__in efx_mcdi_req_t * emrp,__out uint32_t * timeoutp)1218a4fcbd4SAndrew Rybchenko ef10_mcdi_get_timeout(
1228a4fcbd4SAndrew Rybchenko __in efx_nic_t *enp,
1238a4fcbd4SAndrew Rybchenko __in efx_mcdi_req_t *emrp,
1248a4fcbd4SAndrew Rybchenko __out uint32_t *timeoutp)
1258a4fcbd4SAndrew Rybchenko {
1268a4fcbd4SAndrew Rybchenko efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1278a4fcbd4SAndrew Rybchenko
1288a4fcbd4SAndrew Rybchenko switch (emrp->emr_cmd) {
1298a4fcbd4SAndrew Rybchenko case MC_CMD_POLL_BIST:
1308a4fcbd4SAndrew Rybchenko case MC_CMD_NVRAM_ERASE:
1318a4fcbd4SAndrew Rybchenko case MC_CMD_LICENSING_V3:
1328a4fcbd4SAndrew Rybchenko case MC_CMD_NVRAM_UPDATE_FINISH:
133348d3529SAndrew Rybchenko if (encp->enc_nvram_update_verify_result_supported != B_FALSE) {
1348a4fcbd4SAndrew Rybchenko /*
1358a4fcbd4SAndrew Rybchenko * Potentially longer running commands, which firmware
1368a4fcbd4SAndrew Rybchenko * may choose to process in a background thread.
1378a4fcbd4SAndrew Rybchenko */
1388a4fcbd4SAndrew Rybchenko *timeoutp = EF10_MCDI_CMD_LONG_TIMEOUT_US;
1398a4fcbd4SAndrew Rybchenko break;
1408a4fcbd4SAndrew Rybchenko }
1418a4fcbd4SAndrew Rybchenko /* FALLTHRU */
1428a4fcbd4SAndrew Rybchenko default:
1438a4fcbd4SAndrew Rybchenko *timeoutp = EF10_MCDI_CMD_TIMEOUT_US;
1448a4fcbd4SAndrew Rybchenko break;
1458a4fcbd4SAndrew Rybchenko }
1468a4fcbd4SAndrew Rybchenko }
1478a4fcbd4SAndrew Rybchenko
148e67df184SAndrew Rybchenko void
ef10_mcdi_send_request(__in efx_nic_t * enp,__in_bcount (hdr_len)void * hdrp,__in size_t hdr_len,__in_bcount (sdu_len)void * sdup,__in size_t sdu_len)149e67df184SAndrew Rybchenko ef10_mcdi_send_request(
150e67df184SAndrew Rybchenko __in efx_nic_t *enp,
1513222b9deSAndrew Rybchenko __in_bcount(hdr_len) void *hdrp,
152e67df184SAndrew Rybchenko __in size_t hdr_len,
1533222b9deSAndrew Rybchenko __in_bcount(sdu_len) void *sdup,
154e67df184SAndrew Rybchenko __in size_t sdu_len)
155e67df184SAndrew Rybchenko {
156e67df184SAndrew Rybchenko const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
157e67df184SAndrew Rybchenko efsys_mem_t *esmp = emtp->emt_dma_mem;
158e67df184SAndrew Rybchenko efx_dword_t dword;
159e67df184SAndrew Rybchenko unsigned int pos;
160e67df184SAndrew Rybchenko
161e67df184SAndrew Rybchenko EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
162eecf8d28SAndrew Rybchenko enp->en_family == EFX_FAMILY_MEDFORD ||
163eecf8d28SAndrew Rybchenko enp->en_family == EFX_FAMILY_MEDFORD2);
164e67df184SAndrew Rybchenko
165e67df184SAndrew Rybchenko /* Write the header */
166e67df184SAndrew Rybchenko for (pos = 0; pos < hdr_len; pos += sizeof (efx_dword_t)) {
167e67df184SAndrew Rybchenko dword = *(efx_dword_t *)((uint8_t *)hdrp + pos);
168e67df184SAndrew Rybchenko EFSYS_MEM_WRITED(esmp, pos, &dword);
169e67df184SAndrew Rybchenko }
170e67df184SAndrew Rybchenko
171e67df184SAndrew Rybchenko /* Write the payload */
172e67df184SAndrew Rybchenko for (pos = 0; pos < sdu_len; pos += sizeof (efx_dword_t)) {
173e67df184SAndrew Rybchenko dword = *(efx_dword_t *)((uint8_t *)sdup + pos);
174e67df184SAndrew Rybchenko EFSYS_MEM_WRITED(esmp, hdr_len + pos, &dword);
175e67df184SAndrew Rybchenko }
176e67df184SAndrew Rybchenko
177e67df184SAndrew Rybchenko /* Guarantee ordering of memory (MCDI request) and PIO (MC doorbell) */
178e67df184SAndrew Rybchenko EFSYS_DMA_SYNC_FOR_DEVICE(esmp, 0, hdr_len + sdu_len);
179e67df184SAndrew Rybchenko EFSYS_PIO_WRITE_BARRIER();
180e67df184SAndrew Rybchenko
181e67df184SAndrew Rybchenko /* Ring the doorbell to post the command DMA address to the MC */
182e67df184SAndrew Rybchenko EFX_POPULATE_DWORD_1(dword, EFX_DWORD_0,
183e67df184SAndrew Rybchenko EFSYS_MEM_ADDR(esmp) >> 32);
184e67df184SAndrew Rybchenko EFX_BAR_WRITED(enp, ER_DZ_MC_DB_LWRD_REG, &dword, B_FALSE);
185e67df184SAndrew Rybchenko
186e67df184SAndrew Rybchenko EFX_POPULATE_DWORD_1(dword, EFX_DWORD_0,
187e67df184SAndrew Rybchenko EFSYS_MEM_ADDR(esmp) & 0xffffffff);
188e67df184SAndrew Rybchenko EFX_BAR_WRITED(enp, ER_DZ_MC_DB_HWRD_REG, &dword, B_FALSE);
189e67df184SAndrew Rybchenko }
190e67df184SAndrew Rybchenko
191e67df184SAndrew Rybchenko __checkReturn boolean_t
ef10_mcdi_poll_response(__in efx_nic_t * enp)192e67df184SAndrew Rybchenko ef10_mcdi_poll_response(
193e67df184SAndrew Rybchenko __in efx_nic_t *enp)
194e67df184SAndrew Rybchenko {
195e67df184SAndrew Rybchenko const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
196e67df184SAndrew Rybchenko efsys_mem_t *esmp = emtp->emt_dma_mem;
197e67df184SAndrew Rybchenko efx_dword_t hdr;
198e67df184SAndrew Rybchenko
199e67df184SAndrew Rybchenko EFSYS_MEM_READD(esmp, 0, &hdr);
200d5a0c7e0SAndrew Rybchenko EFSYS_MEM_READ_BARRIER();
201d5a0c7e0SAndrew Rybchenko
202e67df184SAndrew Rybchenko return (EFX_DWORD_FIELD(hdr, MCDI_HEADER_RESPONSE) ? B_TRUE : B_FALSE);
203e67df184SAndrew Rybchenko }
204e67df184SAndrew Rybchenko
205e67df184SAndrew Rybchenko void
ef10_mcdi_read_response(__in efx_nic_t * enp,__out_bcount (length)void * bufferp,__in size_t offset,__in size_t length)206e67df184SAndrew Rybchenko ef10_mcdi_read_response(
207e67df184SAndrew Rybchenko __in efx_nic_t *enp,
208e67df184SAndrew Rybchenko __out_bcount(length) void *bufferp,
209e67df184SAndrew Rybchenko __in size_t offset,
210e67df184SAndrew Rybchenko __in size_t length)
211e67df184SAndrew Rybchenko {
212e67df184SAndrew Rybchenko const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
213e67df184SAndrew Rybchenko efsys_mem_t *esmp = emtp->emt_dma_mem;
214b20c54ffSAndrew Rybchenko unsigned int pos = 0;
215e67df184SAndrew Rybchenko efx_dword_t data;
216b20c54ffSAndrew Rybchenko size_t remaining = length;
217e67df184SAndrew Rybchenko
218b20c54ffSAndrew Rybchenko while (remaining > 0) {
219b20c54ffSAndrew Rybchenko size_t chunk = MIN(remaining, sizeof (data));
220b20c54ffSAndrew Rybchenko
221e67df184SAndrew Rybchenko EFSYS_MEM_READD(esmp, offset + pos, &data);
222b20c54ffSAndrew Rybchenko memcpy((uint8_t *)bufferp + pos, &data, chunk);
223b20c54ffSAndrew Rybchenko pos += chunk;
224b20c54ffSAndrew Rybchenko remaining -= chunk;
225e67df184SAndrew Rybchenko }
226e67df184SAndrew Rybchenko }
227e67df184SAndrew Rybchenko
228e67df184SAndrew Rybchenko efx_rc_t
ef10_mcdi_poll_reboot(__in efx_nic_t * enp)229e67df184SAndrew Rybchenko ef10_mcdi_poll_reboot(
230e67df184SAndrew Rybchenko __in efx_nic_t *enp)
231e67df184SAndrew Rybchenko {
232e67df184SAndrew Rybchenko efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
233e67df184SAndrew Rybchenko efx_dword_t dword;
234e67df184SAndrew Rybchenko uint32_t old_status;
235e67df184SAndrew Rybchenko uint32_t new_status;
236e67df184SAndrew Rybchenko efx_rc_t rc;
237e67df184SAndrew Rybchenko
238e67df184SAndrew Rybchenko old_status = emip->emi_mc_reboot_status;
239e67df184SAndrew Rybchenko
240e67df184SAndrew Rybchenko /* Update MC reboot status word */
241e67df184SAndrew Rybchenko EFX_BAR_TBL_READD(enp, ER_DZ_BIU_MC_SFT_STATUS_REG, 0, &dword, B_FALSE);
242e67df184SAndrew Rybchenko new_status = dword.ed_u32[0];
243e67df184SAndrew Rybchenko
244e67df184SAndrew Rybchenko /* MC has rebooted if the value has changed */
245e67df184SAndrew Rybchenko if (new_status != old_status) {
246e67df184SAndrew Rybchenko emip->emi_mc_reboot_status = new_status;
247e67df184SAndrew Rybchenko
248e67df184SAndrew Rybchenko /*
249e67df184SAndrew Rybchenko * FIXME: Ignore detected MC REBOOT for now.
250e67df184SAndrew Rybchenko *
251e67df184SAndrew Rybchenko * The Siena support for checking for MC reboot from status
252e67df184SAndrew Rybchenko * flags is broken - see comments in siena_mcdi_poll_reboot().
253e67df184SAndrew Rybchenko * As the generic MCDI code is shared the EF10 reboot
254e67df184SAndrew Rybchenko * detection suffers similar problems.
255e67df184SAndrew Rybchenko *
256e67df184SAndrew Rybchenko * Do not report an error when the boot status changes until
257e67df184SAndrew Rybchenko * this can be handled by common code drivers (and reworked to
258e67df184SAndrew Rybchenko * support Siena too).
259e67df184SAndrew Rybchenko */
2605e951ea7SAndrew Rybchenko _NOTE(CONSTANTCONDITION)
261e67df184SAndrew Rybchenko if (B_FALSE) {
262e67df184SAndrew Rybchenko rc = EIO;
263e67df184SAndrew Rybchenko goto fail1;
264e67df184SAndrew Rybchenko }
265e67df184SAndrew Rybchenko }
266e67df184SAndrew Rybchenko
267e67df184SAndrew Rybchenko return (0);
268e67df184SAndrew Rybchenko
269e67df184SAndrew Rybchenko fail1:
270e67df184SAndrew Rybchenko EFSYS_PROBE1(fail1, efx_rc_t, rc);
271e67df184SAndrew Rybchenko
272e67df184SAndrew Rybchenko return (rc);
273e67df184SAndrew Rybchenko }
274e67df184SAndrew Rybchenko
275e67df184SAndrew Rybchenko __checkReturn efx_rc_t
ef10_mcdi_feature_supported(__in efx_nic_t * enp,__in efx_mcdi_feature_id_t id,__out boolean_t * supportedp)276e67df184SAndrew Rybchenko ef10_mcdi_feature_supported(
277e67df184SAndrew Rybchenko __in efx_nic_t *enp,
278e67df184SAndrew Rybchenko __in efx_mcdi_feature_id_t id,
279e67df184SAndrew Rybchenko __out boolean_t *supportedp)
280e67df184SAndrew Rybchenko {
281e67df184SAndrew Rybchenko efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
282e67df184SAndrew Rybchenko uint32_t privilege_mask = encp->enc_privilege_mask;
283e67df184SAndrew Rybchenko efx_rc_t rc;
284e67df184SAndrew Rybchenko
285e67df184SAndrew Rybchenko EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
286eecf8d28SAndrew Rybchenko enp->en_family == EFX_FAMILY_MEDFORD ||
287eecf8d28SAndrew Rybchenko enp->en_family == EFX_FAMILY_MEDFORD2);
288e67df184SAndrew Rybchenko
289e67df184SAndrew Rybchenko /*
290e67df184SAndrew Rybchenko * Use privilege mask state at MCDI attach.
291e67df184SAndrew Rybchenko */
292e67df184SAndrew Rybchenko
293e67df184SAndrew Rybchenko switch (id) {
294e67df184SAndrew Rybchenko case EFX_MCDI_FEATURE_FW_UPDATE:
295e67df184SAndrew Rybchenko /*
296e67df184SAndrew Rybchenko * Admin privilege must be used prior to introduction of
297e67df184SAndrew Rybchenko * specific flag.
298e67df184SAndrew Rybchenko */
299e67df184SAndrew Rybchenko *supportedp =
300e67df184SAndrew Rybchenko EFX_MCDI_HAVE_PRIVILEGE(privilege_mask, ADMIN);
301e67df184SAndrew Rybchenko break;
302e67df184SAndrew Rybchenko case EFX_MCDI_FEATURE_LINK_CONTROL:
303e67df184SAndrew Rybchenko /*
304e67df184SAndrew Rybchenko * Admin privilege used prior to introduction of
305e67df184SAndrew Rybchenko * specific flag.
306e67df184SAndrew Rybchenko */
307e67df184SAndrew Rybchenko *supportedp =
308e67df184SAndrew Rybchenko EFX_MCDI_HAVE_PRIVILEGE(privilege_mask, LINK) ||
309e67df184SAndrew Rybchenko EFX_MCDI_HAVE_PRIVILEGE(privilege_mask, ADMIN);
310e67df184SAndrew Rybchenko break;
311e67df184SAndrew Rybchenko case EFX_MCDI_FEATURE_MACADDR_CHANGE:
312e67df184SAndrew Rybchenko /*
313e67df184SAndrew Rybchenko * Admin privilege must be used prior to introduction of
314e67df184SAndrew Rybchenko * mac spoofing privilege (at v4.6), which is used up to
315e67df184SAndrew Rybchenko * introduction of change mac spoofing privilege (at v4.7)
316e67df184SAndrew Rybchenko */
317e67df184SAndrew Rybchenko *supportedp =
318e67df184SAndrew Rybchenko EFX_MCDI_HAVE_PRIVILEGE(privilege_mask, CHANGE_MAC) ||
319e67df184SAndrew Rybchenko EFX_MCDI_HAVE_PRIVILEGE(privilege_mask, MAC_SPOOFING) ||
320e67df184SAndrew Rybchenko EFX_MCDI_HAVE_PRIVILEGE(privilege_mask, ADMIN);
321e67df184SAndrew Rybchenko break;
322e67df184SAndrew Rybchenko case EFX_MCDI_FEATURE_MAC_SPOOFING:
323e67df184SAndrew Rybchenko /*
324e67df184SAndrew Rybchenko * Admin privilege must be used prior to introduction of
325e67df184SAndrew Rybchenko * mac spoofing privilege (at v4.6), which is used up to
326e67df184SAndrew Rybchenko * introduction of mac spoofing TX privilege (at v4.7)
327e67df184SAndrew Rybchenko */
328e67df184SAndrew Rybchenko *supportedp =
329e67df184SAndrew Rybchenko EFX_MCDI_HAVE_PRIVILEGE(privilege_mask, MAC_SPOOFING_TX) ||
330e67df184SAndrew Rybchenko EFX_MCDI_HAVE_PRIVILEGE(privilege_mask, MAC_SPOOFING) ||
331e67df184SAndrew Rybchenko EFX_MCDI_HAVE_PRIVILEGE(privilege_mask, ADMIN);
332e67df184SAndrew Rybchenko break;
333e67df184SAndrew Rybchenko default:
334e67df184SAndrew Rybchenko rc = ENOTSUP;
335e67df184SAndrew Rybchenko goto fail1;
336e67df184SAndrew Rybchenko }
337e67df184SAndrew Rybchenko
338e67df184SAndrew Rybchenko return (0);
339e67df184SAndrew Rybchenko
340e67df184SAndrew Rybchenko fail1:
341e67df184SAndrew Rybchenko EFSYS_PROBE1(fail1, efx_rc_t, rc);
342e67df184SAndrew Rybchenko
343e67df184SAndrew Rybchenko return (rc);
344e67df184SAndrew Rybchenko }
345e67df184SAndrew Rybchenko
346e67df184SAndrew Rybchenko #endif /* EFSYS_OPT_MCDI */
347e67df184SAndrew Rybchenko
348eecf8d28SAndrew Rybchenko #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
349