1 /*- 2 * Copyright 2008 by Marco Trillo. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 18 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 19 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 20 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 21 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 * 25 * $FreeBSD$ 26 */ 27 /*- 28 * Copyright (c) 2002, 2003 Tsubai Masanari. All rights reserved. 29 * 30 * Redistribution and use in source and binary forms, with or without 31 * modification, are permitted provided that the following conditions 32 * are met: 33 * 1. Redistributions of source code must retain the above copyright 34 * notice, this list of conditions and the following disclaimer. 35 * 2. Redistributions in binary form must reproduce the above copyright 36 * notice, this list of conditions and the following disclaimer in the 37 * documentation and/or other materials provided with the distribution. 38 * 3. The name of the author may not be used to endorse or promote products 39 * derived from this software without specific prior written permission. 40 * 41 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 42 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 43 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 44 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 45 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 46 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51 * 52 * NetBSD: snapper.c,v 1.28 2008/05/16 03:49:54 macallan Exp 53 * Id: snapper.c,v 1.11 2002/10/31 17:42:13 tsubai Exp 54 */ 55 56 /* 57 * Apple I2S audio controller. 58 */ 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/kernel.h> 63 #include <sys/module.h> 64 #include <sys/bus.h> 65 #include <sys/malloc.h> 66 #include <sys/lock.h> 67 #include <sys/mutex.h> 68 #include <machine/dbdma.h> 69 #include <machine/intr_machdep.h> 70 #include <machine/resource.h> 71 #include <machine/bus.h> 72 #include <machine/pio.h> 73 #include <sys/rman.h> 74 #include <dev/ofw/ofw_bus.h> 75 #include <dev/sound/pcm/sound.h> 76 #include <dev/sound/macio/aoa.h> 77 #include <powerpc/powermac/macgpiovar.h> 78 79 struct i2s_softc { 80 struct aoa_softc aoa; 81 phandle_t node; 82 phandle_t soundnode; 83 struct resource *reg; 84 u_int output_mask; 85 struct mtx port_mtx; 86 }; 87 88 static int i2s_probe(device_t); 89 static int i2s_attach(device_t); 90 static void i2s_postattach(void *); 91 static int i2s_setup(struct i2s_softc *, u_int, u_int, u_int); 92 static void i2s_mute_headphone (struct i2s_softc *, int); 93 static void i2s_mute_lineout (struct i2s_softc *, int); 94 static void i2s_mute_speaker (struct i2s_softc *, int); 95 static void i2s_set_outputs(void *, u_int); 96 97 static struct intr_config_hook *i2s_delayed_attach = NULL; 98 99 kobj_class_t i2s_mixer_class = NULL; 100 device_t i2s_mixer = NULL; 101 102 static device_method_t pcm_i2s_methods[] = { 103 /* Device interface. */ 104 DEVMETHOD(device_probe, i2s_probe), 105 DEVMETHOD(device_attach, i2s_attach), 106 107 { 0, 0 } 108 }; 109 110 static driver_t pcm_i2s_driver = { 111 "pcm", 112 pcm_i2s_methods, 113 PCM_SOFTC_SIZE 114 }; 115 116 DRIVER_MODULE(pcm_i2s, macio, pcm_i2s_driver, pcm_devclass, 0, 0); 117 MODULE_DEPEND(pcm_i2s, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 118 119 static int aoagpio_probe(device_t); 120 static int aoagpio_attach(device_t); 121 122 static device_method_t aoagpio_methods[] = { 123 /* Device interface. */ 124 DEVMETHOD(device_probe, aoagpio_probe), 125 DEVMETHOD(device_attach, aoagpio_attach), 126 127 { 0, 0 } 128 }; 129 130 struct aoagpio_softc { 131 device_t dev; 132 int ctrl; 133 int detect_active; /* for extint-gpio */ 134 int level; /* for extint-gpio */ 135 struct i2s_softc *i2s; /* for extint-gpio */ 136 }; 137 138 static driver_t aoagpio_driver = { 139 "aoagpio", 140 aoagpio_methods, 141 sizeof(struct aoagpio_softc) 142 }; 143 static devclass_t aoagpio_devclass; 144 145 DRIVER_MODULE(aoagpio, macgpio, aoagpio_driver, aoagpio_devclass, 0, 0); 146 147 148 /***************************************************************************** 149 Probe and attachment routines. 150 *****************************************************************************/ 151 static int 152 i2s_probe(device_t self) 153 { 154 const char *name; 155 156 name = ofw_bus_get_name(self); 157 if (!name) 158 return (ENXIO); 159 160 if (strcmp(name, "i2s") != 0) 161 return (ENXIO); 162 163 device_set_desc(self, "Apple I2S Audio Controller"); 164 165 return (0); 166 } 167 168 static phandle_t of_find_firstchild_byname(phandle_t, const char *); 169 170 static int 171 i2s_attach(device_t self) 172 { 173 struct i2s_softc *sc; 174 struct resource *dbdma_irq; 175 void *dbdma_ih; 176 int rid, oirq, err; 177 phandle_t port; 178 179 sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); 180 181 sc->aoa.sc_dev = self; 182 sc->node = ofw_bus_get_node(self); 183 184 port = of_find_firstchild_byname(sc->node, "i2s-a"); 185 if (port == -1) 186 return (ENXIO); 187 sc->soundnode = of_find_firstchild_byname(port, "sound"); 188 if (sc->soundnode == -1) 189 return (ENXIO); 190 191 mtx_init(&sc->port_mtx, "port_mtx", NULL, MTX_DEF); 192 193 /* Map the controller register space. */ 194 rid = 0; 195 sc->reg = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); 196 if (sc->reg == NULL) 197 return ENXIO; 198 199 /* Map the DBDMA channel register space. */ 200 rid = 1; 201 sc->aoa.sc_odma = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 202 RF_ACTIVE); 203 if (sc->aoa.sc_odma == NULL) 204 return ENXIO; 205 206 /* Establish the DBDMA channel edge-triggered interrupt. */ 207 rid = 1; 208 dbdma_irq = bus_alloc_resource_any(self, SYS_RES_IRQ, 209 &rid, RF_SHAREABLE | RF_ACTIVE); 210 if (dbdma_irq == NULL) 211 return (ENXIO); 212 213 /* Now initialize the controller. */ 214 err = i2s_setup(sc, 44100, 16, 64); 215 if (err != 0) 216 return (err); 217 218 snd_setup_intr(self, dbdma_irq, INTR_MPSAFE, aoa_interrupt, 219 sc, &dbdma_ih); 220 221 oirq = rman_get_start(dbdma_irq); 222 err = powerpc_config_intr(oirq, INTR_TRIGGER_EDGE, INTR_POLARITY_LOW); 223 if (err != 0) 224 return (err); 225 226 /* 227 * Register a hook for delayed attach in order to allow 228 * the I2C controller to attach. 229 */ 230 if ((i2s_delayed_attach = malloc(sizeof(struct intr_config_hook), 231 M_TEMP, M_WAITOK | M_ZERO)) == NULL) 232 return (ENOMEM); 233 234 i2s_delayed_attach->ich_func = i2s_postattach; 235 i2s_delayed_attach->ich_arg = sc; 236 237 if (config_intrhook_establish(i2s_delayed_attach) != 0) 238 return (ENOMEM); 239 240 return (aoa_attach(sc)); 241 } 242 243 /***************************************************************************** 244 GPIO routines. 245 *****************************************************************************/ 246 247 enum gpio_ctrl { 248 AMP_MUTE, 249 HEADPHONE_MUTE, 250 LINEOUT_MUTE, 251 AUDIO_HW_RESET, 252 HEADPHONE_DETECT, 253 LINEOUT_DETECT, 254 GPIO_CTRL_NUM 255 }; 256 257 #define GPIO_CTRL_EXTINT_SET \ 258 ((1 << HEADPHONE_DETECT) | \ 259 (1 << LINEOUT_DETECT)) 260 261 static struct aoagpio_softc *gpio_ctrls[GPIO_CTRL_NUM] = 262 {NULL, NULL, NULL, NULL, NULL, NULL}; 263 264 static struct gpio_match { 265 const char *name; 266 enum gpio_ctrl ctrl; 267 } gpio_controls[] = { 268 {"headphone-mute", HEADPHONE_MUTE}, 269 {"lineout-mute", LINEOUT_MUTE}, 270 {"amp-mute", AMP_MUTE}, 271 {"headphone-detect", HEADPHONE_DETECT}, 272 {"lineout-detect", LINEOUT_DETECT}, 273 {"line-output-detect", LINEOUT_DETECT}, 274 {"audio-hw-reset", AUDIO_HW_RESET}, 275 {"hw-reset", AUDIO_HW_RESET}, 276 {NULL, GPIO_CTRL_NUM} 277 }; 278 279 static void i2s_cint(struct i2s_softc *); 280 281 static void 282 aoagpio_int(void *cookie) 283 { 284 device_t self = cookie; 285 struct aoagpio_softc *sc; 286 287 sc = device_get_softc(self); 288 289 if (macgpio_read(self) & GPIO_LEVEL_RO) 290 sc->level = sc->detect_active; 291 else 292 sc->level = !(sc->detect_active); 293 294 if (sc->i2s) 295 i2s_cint(sc->i2s); 296 } 297 298 static int 299 aoagpio_probe(device_t gpio) 300 { 301 phandle_t node; 302 char bname[32]; 303 const char *name; 304 struct gpio_match *m; 305 struct aoagpio_softc *sc; 306 307 node = ofw_bus_get_node(gpio); 308 if (node == 0 || node == -1) 309 return (EINVAL); 310 311 bzero(bname, sizeof(bname)); 312 if (OF_getprop(node, "audio-gpio", bname, sizeof(bname)) > 2) 313 name = bname; 314 else 315 name = ofw_bus_get_name(gpio); 316 317 /* Try to find a match. */ 318 for (m = gpio_controls; m->name != NULL; m++) { 319 if (strcmp(name, m->name) == 0) { 320 sc = device_get_softc(gpio); 321 gpio_ctrls[m->ctrl] = sc; 322 sc->dev = gpio; 323 sc->ctrl = m->ctrl; 324 sc->level = 0; 325 sc->detect_active = 0; 326 sc->i2s = NULL; 327 328 OF_getprop(node, "audio-gpio-active-state", 329 &sc->detect_active, sizeof(sc->detect_active)); 330 331 if ((1 << m->ctrl) & GPIO_CTRL_EXTINT_SET) 332 aoagpio_int(gpio); 333 334 device_set_desc(gpio, m->name); 335 device_quiet(gpio); 336 return (0); 337 } 338 } 339 340 return (ENXIO); 341 } 342 343 static int 344 aoagpio_attach(device_t gpio) 345 { 346 struct aoagpio_softc *sc; 347 struct resource *r; 348 void *cookie; 349 int irq, rid = 0; 350 351 sc = device_get_softc(gpio); 352 353 if ((1 << sc->ctrl) & GPIO_CTRL_EXTINT_SET) { 354 r = bus_alloc_resource_any(gpio, SYS_RES_IRQ, &rid, RF_ACTIVE); 355 if (r == NULL) 356 return (ENXIO); 357 358 irq = rman_get_start(r); 359 DPRINTF(("interrupting at irq %d\n", irq)); 360 361 if (powerpc_config_intr(irq, INTR_TRIGGER_EDGE, 362 INTR_POLARITY_LOW) != 0) 363 return (ENXIO); 364 365 bus_setup_intr(gpio, r, INTR_TYPE_MISC | INTR_MPSAFE | 366 INTR_ENTROPY, NULL, aoagpio_int, gpio, &cookie); 367 } 368 369 return (0); 370 } 371 372 /* 373 * I2S module registers 374 */ 375 #define I2S_INT 0x00 376 #define I2S_FORMAT 0x10 377 #define I2S_FRAMECOUNT 0x40 378 #define I2S_FRAMEMATCH 0x50 379 #define I2S_WORDSIZE 0x60 380 381 /* I2S_INT register definitions */ 382 #define I2S_INT_CLKSTOPPEND 0x01000000 /* clock-stop interrupt pending */ 383 384 /* I2S_FORMAT register definitions */ 385 #define CLKSRC_49MHz 0x80000000 /* Use 49152000Hz Osc. */ 386 #define CLKSRC_45MHz 0x40000000 /* Use 45158400Hz Osc. */ 387 #define CLKSRC_18MHz 0x00000000 /* Use 18432000Hz Osc. */ 388 #define MCLK_DIV_MASK 0x1f000000 /* MCLK = SRC / DIV */ 389 #define SCLK_DIV_MASK 0x00f00000 /* SCLK = MCLK / DIV */ 390 #define SCLK_MASTER 0x00080000 /* Master mode */ 391 #define SCLK_SLAVE 0x00000000 /* Slave mode */ 392 #define SERIAL_FORMAT 0x00070000 393 #define SERIAL_SONY 0x00000000 394 #define SERIAL_64x 0x00010000 395 #define SERIAL_32x 0x00020000 396 #define SERIAL_DAV 0x00040000 397 #define SERIAL_SILICON 0x00050000 398 399 /* I2S_WORDSIZE register definitions */ 400 #define INPUT_STEREO (2 << 24) 401 #define INPUT_MONO (1 << 24) 402 #define INPUT_16BIT (0 << 16) 403 #define INPUT_24BIT (3 << 16) 404 #define OUTPUT_STEREO (2 << 8) 405 #define OUTPUT_MONO (1 << 8) 406 #define OUTPUT_16BIT (0 << 0) 407 #define OUTPUT_24BIT (3 << 0) 408 409 /* Master clock, needed by some codecs. We hardcode this 410 to 256 * fs as this is valid for most codecs. */ 411 #define MCLK_FS 256 412 413 /* Number of clock sources we can use. */ 414 #define NCLKS 3 415 static const struct i2s_clksrc { 416 u_int cs_clock; 417 u_int cs_reg; 418 } clksrc[NCLKS] = { 419 {49152000, CLKSRC_49MHz}, 420 {45158400, CLKSRC_45MHz}, 421 {18432000, CLKSRC_18MHz} 422 }; 423 424 /* Configure the I2S controller for the required settings. 425 'rate' is the frame rate. 426 'wordsize' is the sample size (usually 16 bits). 427 'sclk_fs' is the SCLK/framerate ratio, which needs to be equal 428 or greater to the number of bits per frame. */ 429 430 static int 431 i2s_setup(struct i2s_softc *sc, u_int rate, u_int wordsize, u_int sclk_fs) 432 { 433 u_int mclk, mdiv, sdiv; 434 u_int reg = 0, x, wordformat; 435 u_int i; 436 437 /* Make sure the settings are consistent... */ 438 if ((wordsize * 2) > sclk_fs) 439 return (EINVAL); 440 441 if (sclk_fs != 32 && sclk_fs != 64) 442 return (EINVAL); 443 444 /* 445 * Find a clock source to derive the master clock (MCLK) 446 * and the I2S bit block (SCLK) and set the divisors as 447 * appropriate. 448 */ 449 mclk = rate * MCLK_FS; 450 sdiv = MCLK_FS / sclk_fs; 451 452 for (i = 0; i < NCLKS; ++i) { 453 if ((clksrc[i].cs_clock % mclk) == 0) { 454 reg = clksrc[i].cs_reg; 455 mdiv = clksrc[i].cs_clock / mclk; 456 break; 457 } 458 } 459 if (reg == 0) 460 return (EINVAL); 461 462 switch (mdiv) { 463 /* exception cases */ 464 case 1: 465 x = 14; 466 break; 467 case 3: 468 x = 13; 469 break; 470 case 5: 471 x = 12; 472 break; 473 default: 474 x = (mdiv / 2) - 1; 475 break; 476 } 477 reg |= (x << 24) & MCLK_DIV_MASK; 478 479 switch (sdiv) { 480 case 1: 481 x = 8; 482 break; 483 case 3: 484 x = 9; 485 break; 486 default: 487 x = (sdiv / 2) - 1; 488 break; 489 } 490 reg |= (x << 20) & SCLK_DIV_MASK; 491 492 /* 493 * XXX use master mode for now. This needs to be 494 * revisited if we want to add recording from SPDIF some day. 495 */ 496 reg |= SCLK_MASTER; 497 498 switch (sclk_fs) { 499 case 64: 500 reg |= SERIAL_64x; 501 break; 502 case 32: 503 reg |= SERIAL_32x; 504 break; 505 } 506 507 /* stereo input and output */ 508 wordformat = INPUT_STEREO | OUTPUT_STEREO; 509 510 switch (wordsize) { 511 case 16: 512 wordformat |= INPUT_16BIT | OUTPUT_16BIT; 513 break; 514 case 24: 515 wordformat |= INPUT_24BIT | OUTPUT_24BIT; 516 break; 517 default: 518 return (EINVAL); 519 } 520 521 x = bus_read_4(sc->reg, I2S_WORDSIZE); 522 if (x != wordformat) 523 bus_write_4(sc->reg, I2S_WORDSIZE, wordformat); 524 525 x = bus_read_4(sc->reg, I2S_FORMAT); 526 if (x != reg) { 527 /* 528 * XXX to change the format we need to stop the clock 529 * via the FCR registers. For now, rely on the firmware 530 * to set sane defaults (44100). 531 */ 532 printf("i2s_setup: changing format not supported yet.\n"); 533 return (EOPNOTSUPP); 534 535 #ifdef notyet 536 if (obio_fcr_isset(OBIO_FCR1, I2S0CLKEN)) { 537 538 bus_space_write_4(sc->sc_tag, sc->sc_bsh, I2S_INT, 539 I2S_INT_CLKSTOPPEND); 540 541 obio_fcr_clear(OBIO_FCR1, I2S0CLKEN); 542 543 for (timo = 1000; timo > 0; timo--) { 544 if (bus_space_read_4(sc->sc_tag, sc->sc_bsh, 545 I2S_INT) & I2S_INT_CLKSTOPPEND) 546 break; 547 548 DELAY(10); 549 } 550 551 if (timo == 0) 552 printf("%s: timeout waiting for clock to stop\n", 553 sc->sc_dev.dv_xname); 554 } 555 556 bus_space_write_4(sc->sc_tag, sc->sc_bsh, I2S_FORMAT, reg); 557 558 obio_fcr_set(OBIO_FCR1, I2S0CLKEN); 559 #endif 560 } 561 562 return (0); 563 } 564 565 566 /* XXX this does not belong here. */ 567 static phandle_t 568 of_find_firstchild_byname(phandle_t node, const char *req_name) 569 { 570 char name[32]; /* max name len per OF spec. */ 571 phandle_t n; 572 573 for (n = OF_child(node); n != -1; n = OF_peer(n)) { 574 bzero(name, sizeof(name)); 575 OF_getprop(n, "name", name, sizeof(name)); 576 577 if (strcmp(name, req_name) == 0) 578 return (n); 579 } 580 581 return (-1); 582 } 583 584 585 static u_int 586 gpio_read(enum gpio_ctrl ctrl) 587 { 588 struct aoagpio_softc *sc; 589 590 if ((sc = gpio_ctrls[ctrl]) == NULL) 591 return (0); 592 593 return (macgpio_read(sc->dev) & GPIO_DATA); 594 } 595 596 static void 597 gpio_write(enum gpio_ctrl ctrl, u_int x) 598 { 599 struct aoagpio_softc *sc; 600 u_int reg; 601 602 if ((sc = gpio_ctrls[ctrl]) == NULL) 603 return; 604 605 reg = GPIO_DDR_OUTPUT; 606 if (x) 607 reg |= GPIO_DATA; 608 609 macgpio_write(sc->dev, reg); 610 } 611 612 static void 613 i2s_cint(struct i2s_softc *sc) 614 { 615 u_int mask = 0; 616 617 if (gpio_ctrls[HEADPHONE_DETECT] && 618 gpio_ctrls[HEADPHONE_DETECT]->level) 619 mask |= 1 << 1; 620 621 if (gpio_ctrls[LINEOUT_DETECT] && 622 gpio_ctrls[LINEOUT_DETECT]->level) 623 mask |= 1 << 2; 624 625 if (mask == 0) 626 mask = 1 << 0; /* fall back to speakers. */ 627 628 i2s_set_outputs(sc, mask); 629 } 630 631 #define reset_active 0 632 633 /* these values are in microseconds */ 634 #define RESET_SETUP_TIME 5000 635 #define RESET_HOLD_TIME 20000 636 #define RESET_RELEASE_TIME 10000 637 638 static void 639 i2s_audio_hw_reset(struct i2s_softc *sc) 640 { 641 if (gpio_ctrls[AUDIO_HW_RESET]) { 642 DPRINTF(("resetting codec\n")); 643 644 gpio_write(AUDIO_HW_RESET, !reset_active); /* Negate RESET */ 645 DELAY(RESET_SETUP_TIME); 646 647 gpio_write(AUDIO_HW_RESET, reset_active); /* Assert RESET */ 648 DELAY(RESET_HOLD_TIME); 649 650 gpio_write(AUDIO_HW_RESET, !reset_active); /* Negate RESET */ 651 DELAY(RESET_RELEASE_TIME); 652 653 } else { 654 DPRINTF(("no audio_hw_reset\n")); 655 } 656 } 657 658 #define AMP_ACTIVE 0 /* XXX OF */ 659 #define HEADPHONE_ACTIVE 0 /* XXX OF */ 660 #define LINEOUT_ACTIVE 0 /* XXX OF */ 661 662 #define MUTE_CONTROL(xxx, yyy) \ 663 static void \ 664 i2s_mute_##xxx(struct i2s_softc *sc, int mute) \ 665 { \ 666 int x; \ 667 \ 668 if (gpio_ctrls[yyy##_MUTE] == NULL) \ 669 return; \ 670 if (mute) \ 671 x = yyy##_ACTIVE; \ 672 else \ 673 x = ! yyy##_ACTIVE; \ 674 \ 675 if (x != gpio_read(yyy##_MUTE)) \ 676 gpio_write(yyy##_MUTE, x); \ 677 } 678 679 MUTE_CONTROL(speaker, AMP) 680 MUTE_CONTROL(headphone, HEADPHONE) 681 MUTE_CONTROL(lineout, LINEOUT) 682 683 static void 684 i2s_set_outputs(void *ptr, u_int mask) 685 { 686 struct i2s_softc *sc = ptr; 687 688 if (mask == sc->output_mask) 689 return; 690 691 mtx_lock(&sc->port_mtx); 692 693 i2s_mute_speaker(sc, 1); 694 i2s_mute_headphone(sc, 1); 695 i2s_mute_lineout(sc, 1); 696 697 DPRINTF(("enabled outputs: ")); 698 699 if (mask & (1 << 0)) { 700 DPRINTF(("SPEAKER ")); 701 i2s_mute_speaker(sc, 0); 702 } 703 if (mask & (1 << 1)) { 704 DPRINTF(("HEADPHONE ")); 705 i2s_mute_headphone(sc, 0); 706 } 707 if (mask & (1 << 2)) { 708 DPRINTF(("LINEOUT ")); 709 i2s_mute_lineout(sc, 0); 710 } 711 712 DPRINTF(("\n")); 713 sc->output_mask = mask; 714 715 mtx_unlock(&sc->port_mtx); 716 } 717 718 static void 719 i2s_postattach(void *xsc) 720 { 721 struct i2s_softc *sc = xsc; 722 device_t self; 723 int i; 724 725 self = sc->aoa.sc_dev; 726 727 /* Reset the codec. */ 728 i2s_audio_hw_reset(sc); 729 730 /* If we have a codec, initialize it. */ 731 if (i2s_mixer) 732 mixer_init(self, i2s_mixer_class, i2s_mixer); 733 734 /* Read initial port status. */ 735 i2s_cint(sc); 736 737 /* Enable GPIO interrupt callback. */ 738 for (i = 0; i < GPIO_CTRL_NUM; i++) 739 if (gpio_ctrls[i]) 740 gpio_ctrls[i]->i2s = sc; 741 742 config_intrhook_disestablish(i2s_delayed_attach); 743 free(i2s_delayed_attach, M_TEMP); 744 } 745 746