1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 5 * Copyright (c) 2003-2007 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32 #include <sys/param.h> 33 #include <sys/types.h> 34 #include <sys/bus.h> 35 #include <machine/bus.h> 36 #include <sys/rman.h> 37 #include <sys/systm.h> 38 #include <sys/sbuf.h> 39 #include <sys/queue.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 #include <sys/sysctl.h> 43 #include <sys/kdb.h> 44 45 #include <dev/pci/pcireg.h> 46 #include <dev/pci/pcivar.h> 47 48 #include <machine/clock.h> /* for DELAY */ 49 50 #ifdef HAVE_KERNEL_OPTION_HEADERS 51 #include "opt_snd.h" 52 #endif 53 54 #include <dev/sound/chip.h> 55 #include <dev/sound/pcm/sound.h> 56 #include <dev/sound/pcm/ac97.h> 57 58 #include <dev/sound/pci/emuxkireg.h> 59 #include <dev/sound/pci/emu10kx.h> 60 61 /* hw flags */ 62 #define HAS_51 0x0001 63 #define HAS_71 0x0002 64 #define HAS_AC97 0x0004 65 66 #define IS_EMU10K1 0x0008 67 #define IS_EMU10K2 0x0010 68 #define IS_CA0102 0x0020 69 #define IS_CA0108 0x0040 70 #define IS_UNKNOWN 0x0080 71 72 #define BROKEN_DIGITAL 0x0100 73 #define DIGITAL_ONLY 0x0200 74 75 #define IS_CARDBUS 0x0400 76 77 #define MODE_ANALOG 1 78 #define MODE_DIGITAL 2 79 #define SPDIF_MODE_PCM 1 80 #define SPDIF_MODE_AC3 2 81 82 #define MACS 0x0 83 #define MACS1 0x1 84 #define MACW 0x2 85 #define MACW1 0x3 86 #define MACINTS 0x4 87 #define MACINTW 0x5 88 #define ACC3 0x6 89 #define MACMV 0x7 90 #define ANDXOR 0x8 91 #define TSTNEG 0x9 92 #define LIMIT 0xA 93 #define LIMIT1 0xB 94 #define LOG 0xC 95 #define EXP 0xD 96 #define INTERP 0xE 97 #define SKIP 0xF 98 99 #define GPR(i) (sc->gpr_base+(i)) 100 #define INP(i) (sc->input_base+(i)) 101 #define OUTP(i) (sc->output_base+(i)) 102 #define FX(i) (i) 103 #define FX2(i) (sc->efxc_base+(i)) 104 #define DSP_CONST(i) (sc->dsp_zero+(i)) 105 106 #define COND_NORMALIZED DSP_CONST(0x1) 107 #define COND_BORROW DSP_CONST(0x2) 108 #define COND_MINUS DSP_CONST(0x3) 109 #define COND_LESS_ZERO DSP_CONST(0x4) 110 #define COND_EQ_ZERO DSP_CONST(0x5) 111 #define COND_SATURATION DSP_CONST(0x6) 112 #define COND_NEQ_ZERO DSP_CONST(0x8) 113 114 #define DSP_ACCUM DSP_CONST(0x16) 115 #define DSP_CCR DSP_CONST(0x17) 116 117 /* Live! Inputs */ 118 #define IN_AC97_L 0x00 119 #define IN_AC97_R 0x01 120 #define IN_AC97 IN_AC97_L 121 #define IN_SPDIF_CD_L 0x02 122 #define IN_SPDIF_CD_R 0x03 123 #define IN_SPDIF_CD IN_SPDIF_CD_L 124 #define IN_ZOOM_L 0x04 125 #define IN_ZOOM_R 0x05 126 #define IN_ZOOM IN_ZOOM_L 127 #define IN_TOSLINK_L 0x06 128 #define IN_TOSLINK_R 0x07 129 #define IN_TOSLINK IN_TOSLINK_L 130 #define IN_LINE1_L 0x08 131 #define IN_LINE1_R 0x09 132 #define IN_LINE1 IN_LINE1_L 133 #define IN_COAX_SPDIF_L 0x0a 134 #define IN_COAX_SPDIF_R 0x0b 135 #define IN_COAX_SPDIF IN_COAX_SPDIF_L 136 #define IN_LINE2_L 0x0c 137 #define IN_LINE2_R 0x0d 138 #define IN_LINE2 IN_LINE2_L 139 #define IN_0E 0x0e 140 #define IN_0F 0x0f 141 142 /* Outputs */ 143 #define OUT_AC97_L 0x00 144 #define OUT_AC97_R 0x01 145 #define OUT_AC97 OUT_AC97_L 146 #define OUT_A_FRONT OUT_AC97 147 #define OUT_TOSLINK_L 0x02 148 #define OUT_TOSLINK_R 0x03 149 #define OUT_TOSLINK OUT_TOSLINK_L 150 #define OUT_D_CENTER 0x04 151 #define OUT_D_SUB 0x05 152 #define OUT_HEADPHONE_L 0x06 153 #define OUT_HEADPHONE_R 0x07 154 #define OUT_HEADPHONE OUT_HEADPHONE_L 155 #define OUT_REAR_L 0x08 156 #define OUT_REAR_R 0x09 157 #define OUT_REAR OUT_REAR_L 158 #define OUT_ADC_REC_L 0x0a 159 #define OUT_ADC_REC_R 0x0b 160 #define OUT_ADC_REC OUT_ADC_REC_L 161 #define OUT_MIC_CAP 0x0c 162 163 /* Live! 5.1 Digital, non-standard 5.1 (center & sub) outputs */ 164 #define OUT_A_CENTER 0x11 165 #define OUT_A_SUB 0x12 166 167 /* Audigy Inputs */ 168 #define A_IN_AC97_L 0x00 169 #define A_IN_AC97_R 0x01 170 #define A_IN_AC97 A_IN_AC97_L 171 #define A_IN_SPDIF_CD_L 0x02 172 #define A_IN_SPDIF_CD_R 0x03 173 #define A_IN_SPDIF_CD A_IN_SPDIF_CD_L 174 #define A_IN_O_SPDIF_L 0x04 175 #define A_IN_O_SPDIF_R 0x05 176 #define A_IN_O_SPDIF A_IN_O_SPDIF_L 177 #define A_IN_LINE2_L 0x08 178 #define A_IN_LINE2_R 0x09 179 #define A_IN_LINE2 A_IN_LINE2_L 180 #define A_IN_R_SPDIF_L 0x0a 181 #define A_IN_R_SPDIF_R 0x0b 182 #define A_IN_R_SPDIF A_IN_R_SPDIF_L 183 #define A_IN_AUX2_L 0x0c 184 #define A_IN_AUX2_R 0x0d 185 #define A_IN_AUX2 A_IN_AUX2_L 186 187 /* Audigy Outputs */ 188 #define A_OUT_D_FRONT_L 0x00 189 #define A_OUT_D_FRONT_R 0x01 190 #define A_OUT_D_FRONT A_OUT_D_FRONT_L 191 #define A_OUT_D_CENTER 0x02 192 #define A_OUT_D_SUB 0x03 193 #define A_OUT_D_SIDE_L 0x04 194 #define A_OUT_D_SIDE_R 0x05 195 #define A_OUT_D_SIDE A_OUT_D_SIDE_L 196 #define A_OUT_D_REAR_L 0x06 197 #define A_OUT_D_REAR_R 0x07 198 #define A_OUT_D_REAR A_OUT_D_REAR_L 199 200 /* on Audigy Platinum only */ 201 #define A_OUT_HPHONE_L 0x04 202 #define A_OUT_HPHONE_R 0x05 203 #define A_OUT_HPHONE A_OUT_HPHONE_L 204 205 #define A_OUT_A_FRONT_L 0x08 206 #define A_OUT_A_FRONT_R 0x09 207 #define A_OUT_A_FRONT A_OUT_A_FRONT_L 208 #define A_OUT_A_CENTER 0x0a 209 #define A_OUT_A_SUB 0x0b 210 #define A_OUT_A_SIDE_L 0x0c 211 #define A_OUT_A_SIDE_R 0x0d 212 #define A_OUT_A_SIDE A_OUT_A_SIDE_L 213 #define A_OUT_A_REAR_L 0x0e 214 #define A_OUT_A_REAR_R 0x0f 215 #define A_OUT_A_REAR A_OUT_A_REAR_L 216 #define A_OUT_AC97_L 0x10 217 #define A_OUT_AC97_R 0x11 218 #define A_OUT_AC97 A_OUT_AC97_L 219 #define A_OUT_ADC_REC_L 0x16 220 #define A_OUT_ADC_REC_R 0x17 221 #define A_OUT_ADC_REC A_OUT_ADC_REC_L 222 223 #define EMU_DATA2 0x24 224 #define EMU_IPR2 0x28 225 #define EMU_INTE2 0x2c 226 #define EMU_IPR3 0x38 227 #define EMU_INTE3 0x3c 228 229 #define EMU_A2_SRCSel 0x60 230 #define EMU_A2_SRCMULTI_ENABLE 0x6e 231 232 #define EMU_A_I2S_CAPTURE_96000 0x00000400 233 234 #define EMU_A2_MIXER_I2S_ENABLE 0x7B 235 #define EMU_A2_MIXER_SPDIF_ENABLE 0x7A 236 237 #define C_FRONT_L 0 238 #define C_FRONT_R 1 239 #define C_REC_L 2 240 #define C_REC_R 3 241 #define C_REAR_L 4 242 #define C_REAR_R 5 243 #define C_CENTER 6 244 #define C_SUB 7 245 #define C_SIDE_L 8 246 #define C_SIDE_R 9 247 #define NUM_CACHES 10 248 249 #define CDSPDIFMUTE 0 250 #define ANALOGMUTE 1 251 #define NUM_MUTE 2 252 253 #define EMU_MAX_GPR 512 254 #define EMU_MAX_IRQ_CONSUMERS 32 255 256 struct emu_voice { 257 int vnum; 258 unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1; 259 int speed; 260 int start; 261 int end; 262 int vol; 263 uint32_t buf; 264 void *vbuf; 265 struct emu_voice *slave; 266 uint32_t sa; 267 uint32_t ea; 268 uint32_t routing[8]; 269 uint32_t amounts[8]; 270 }; 271 272 struct emu_memblk { 273 SLIST_ENTRY(emu_memblk) link; 274 void *buf; 275 char owner[16]; 276 bus_addr_t buf_addr; 277 uint32_t pte_start, pte_size; 278 bus_dmamap_t buf_map; 279 }; 280 281 struct emu_mem { 282 uint8_t bmap[EMU_MAXPAGES / 8]; 283 uint32_t *ptb_pages; 284 void *silent_page; 285 bus_addr_t ptb_pages_addr; 286 bus_addr_t silent_page_addr; 287 bus_dmamap_t ptb_map; 288 bus_dmamap_t silent_map; 289 bus_dma_tag_t dmat; 290 struct emu_sc_info *card; 291 SLIST_HEAD(, emu_memblk) blocks; 292 }; 293 294 /* rm */ 295 struct emu_rm { 296 struct emu_sc_info *card; 297 struct mtx gpr_lock; 298 signed int allocmap[EMU_MAX_GPR]; 299 int num_gprs; 300 int last_free_gpr; 301 int num_used; 302 }; 303 304 struct emu_intr_handler { 305 void* softc; 306 uint32_t intr_mask; 307 uint32_t inte_mask; 308 uint32_t(*irq_func) (void *softc, uint32_t irq); 309 }; 310 311 struct emu_sc_info { 312 struct mtx lock; 313 struct mtx rw; /* Hardware exclusive access lock */ 314 315 /* Hardware and subdevices */ 316 device_t dev; 317 device_t pcm[RT_COUNT]; 318 device_t midi[2]; 319 uint32_t type; 320 uint32_t rev; 321 322 bus_space_tag_t st; 323 bus_space_handle_t sh; 324 325 struct cdev *cdev; /* /dev/emu10k character device */ 326 struct mtx emu10kx_lock; 327 int emu10kx_isopen; 328 struct sbuf emu10kx_sbuf; 329 int emu10kx_bufptr; 330 331 332 /* Resources */ 333 struct resource *reg; 334 struct resource *irq; 335 void *ih; 336 337 /* IRQ handlers */ 338 struct emu_intr_handler ihandler[EMU_MAX_IRQ_CONSUMERS]; 339 340 /* Card HW configuration */ 341 unsigned int mode; /* analog / digital */ 342 unsigned int mchannel_fx; 343 unsigned int dsp_zero; 344 unsigned int code_base; 345 unsigned int code_size; 346 unsigned int gpr_base; 347 unsigned int num_gprs; 348 unsigned int input_base; 349 unsigned int output_base; 350 unsigned int efxc_base; 351 unsigned int opcode_shift; 352 unsigned int high_operand_shift; 353 unsigned int address_mask; 354 uint32_t is_emu10k1:1, is_emu10k2, is_ca0102, is_ca0108:1, 355 has_ac97:1, has_51:1, has_71:1, 356 enable_ir:1, 357 broken_digital:1, is_cardbus:1; 358 359 signed int mch_disabled, mch_rec, dbg_level; 360 signed int num_inputs; 361 unsigned int num_outputs; 362 unsigned int num_fxbuses; 363 unsigned int routing_code_start; 364 unsigned int routing_code_end; 365 366 /* HW resources */ 367 struct emu_voice voice[NUM_G]; /* Hardware voices */ 368 uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */ 369 int timer[EMU_MAX_IRQ_CONSUMERS]; /* timer */ 370 int timerinterval; 371 struct emu_rm *rm; 372 struct emu_mem mem; /* memory */ 373 374 /* Mixer */ 375 int mixer_gpr[NUM_MIXERS]; 376 int mixer_volcache[NUM_MIXERS]; 377 int cache_gpr[NUM_CACHES]; 378 int dummy_gpr; 379 int mute_gpr[NUM_MUTE]; 380 struct sysctl_ctx_list *ctx; 381 struct sysctl_oid *root; 382 }; 383 384 static void emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error); 385 static void* emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, bus_dmamap_t *map); 386 static void emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map); 387 static void* emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char * owner); 388 static int emu_memfree(struct emu_mem *mem, void *membuf); 389 static int emu_memstart(struct emu_mem *mem, void *membuf); 390 391 /* /dev */ 392 static int emu10kx_dev_init(struct emu_sc_info *sc); 393 static int emu10kx_dev_uninit(struct emu_sc_info *sc); 394 static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s); 395 396 static void emumix_set_mode(struct emu_sc_info *sc, int mode); 397 static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode); 398 static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol); 399 static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val); 400 static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS); 401 402 static int emu_rm_init(struct emu_sc_info *sc); 403 static int emu_rm_uninit(struct emu_sc_info *sc); 404 static int emu_rm_gpr_alloc(struct emu_rm *rm, int count); 405 406 static unsigned int emu_getcard(device_t dev); 407 static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size); 408 static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size); 409 static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data); 410 411 static void emu_vstop(struct emu_sc_info *sc, char channel, int enable); 412 413 static void emu_intr(void *p); 414 static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data); 415 static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc); 416 static void emu_initefx(struct emu_sc_info *sc); 417 418 static int emu_cardbus_init(struct emu_sc_info *sc); 419 static int emu_init(struct emu_sc_info *sc); 420 static int emu_uninit(struct emu_sc_info *sc); 421 422 static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t * result); 423 static int emu_write_ivar(device_t bus __unused, device_t dev __unused, 424 int ivar_index, uintptr_t value __unused); 425 426 static int emu_pci_probe(device_t dev); 427 static int emu_pci_attach(device_t dev); 428 static int emu_pci_detach(device_t dev); 429 static int emu_modevent(module_t mod __unused, int cmd, void *data __unused); 430 431 #ifdef SND_EMU10KX_DEBUG 432 433 #define EMU_MTX_DEBUG() do { \ 434 if (mtx_owned(&sc->rw)) { \ 435 printf("RW owned in %s line %d for %s\n", __func__, \ 436 __LINE__ , device_get_nameunit(sc->dev)); \ 437 printf("rw lock owned: %d\n", mtx_owned(&sc->rw)); \ 438 printf("rw lock: value %x thread %x\n", \ 439 ((&sc->rw)->mtx_lock & ~MTX_FLAGMASK), \ 440 (uintptr_t)curthread); \ 441 printf("rw lock: recursed %d\n", mtx_recursed(&sc->rw));\ 442 db_show_mtx(&sc->rw); \ 443 } \ 444 } while (0) 445 #else 446 #define EMU_MTX_DEBUG() do { \ 447 } while (0) 448 #endif 449 450 #define EMU_RWLOCK() do { \ 451 EMU_MTX_DEBUG(); \ 452 mtx_lock(&(sc->rw)); \ 453 } while (0) 454 455 #define EMU_RWUNLOCK() do { \ 456 mtx_unlock(&(sc->rw)); \ 457 EMU_MTX_DEBUG(); \ 458 } while (0) 459 460 /* Supported cards */ 461 struct emu_hwinfo { 462 uint16_t vendor; 463 uint16_t device; 464 uint16_t subvendor; 465 uint16_t subdevice; 466 char SBcode[8]; 467 char desc[32]; 468 int flags; 469 }; 470 471 static struct emu_hwinfo emu_cards[] = { 472 {0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", 0}, 473 /* 0x0020..0x002f 4.0 EMU10K1 cards */ 474 {0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 475 {0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", HAS_AC97 | IS_EMU10K1}, 476 {0x1102, 0x0002, 0x1102, 0x002f, "CT????", "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1}, 477 478 /* (range unknown) 5.1 EMU10K1 cards */ 479 {0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 480 481 /* 0x80??..0x805? 4.0 EMU10K1 cards */ 482 {0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 483 {0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", HAS_AC97 | IS_EMU10K1}, 484 {0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1}, 485 {0x1102, 0x0002, 0x1102, 0x8025, "CT????", "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1}, 486 {0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 487 {0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 488 {0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", HAS_AC97 | IS_EMU10K1}, 489 {0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 490 {0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1}, 491 {0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 492 493 /* 0x8061..0x???? 5.1 EMU10K1 cards */ 494 {0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 495 {0x1102, 0x0002, 0x1102, 0x8062, "CT4830", "SBLive! 1024", HAS_AC97 | HAS_51 | IS_EMU10K1}, 496 {0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 497 {0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1}, 498 {0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1}, 499 {0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", HAS_AC97 | HAS_51 | IS_EMU10K1}, 500 501 /* Generic SB Live! */ 502 {0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", HAS_AC97 | IS_EMU10K1}, 503 504 /* 0x0041..0x0043 EMU10K2 (some kind of Audigy) cards */ 505 506 /* 0x0051..0x0051 5.1 CA0100-IAF cards */ 507 {0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", HAS_AC97 | HAS_51 | IS_EMU10K2}, 508 /* ES is CA0100-IDF chip that don't work in digital mode */ 509 {0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL}, 510 /* 0x0053..0x005C 5.1 CA0101-NAF cards */ 511 {0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2}, 512 {0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2}, 513 514 /* 0x1002..0x1009 5.1 CA0102-IAT cards */ 515 {0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", HAS_51 | IS_CA0102}, 516 {0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", HAS_51 | IS_CA0102}, 517 {0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", HAS_AC97 | HAS_51 | IS_CA0102}, 518 519 /* 0x2001..0x2003 7.1 CA0102-ICT cards */ 520 {0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 521 {0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 522 /* XXX No reports about 0x2003 & 0x2004 cards */ 523 {0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 524 {0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 525 {0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 526 527 /* (range unknown) 7.1 CA0102-xxx Audigy 4 cards */ 528 {0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", HAS_AC97 | HAS_71 | IS_CA0102}, 529 530 /* Generic Audigy or Audigy 2 */ 531 {0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", HAS_AC97 | HAS_51 | IS_EMU10K2}, 532 533 /* We don't support CA0103-DAT (Audigy LS) cards */ 534 /* There is NO CA0104-xxx cards */ 535 /* There is NO CA0105-xxx cards */ 536 /* We don't support CA0106-DAT (SB Live! 24 bit) cards */ 537 /* There is NO CA0107-xxx cards */ 538 539 /* 0x1000..0x1001 7.1 CA0108-IAT cards */ 540 {0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY}, 541 {0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY}, 542 {0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY}, 543 544 {0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS}, 545 546 {0x1102, 0x0008, 0x0000, 0x0000, "SB????", "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108}, 547 }; 548 /* Unsupported cards */ 549 550 static struct emu_hwinfo emu_bad_cards[] = { 551 /* APS cards should be possible to support */ 552 {0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0}, 553 {0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0}, 554 {0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0}, 555 /* Similar-named ("Live!" or "Audigy") cards on different chipsets */ 556 {0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0}, 557 {0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", 0}, 558 {0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0}, 559 }; 560 561 /* 562 * Get best known information about device. 563 */ 564 static unsigned int 565 emu_getcard(device_t dev) 566 { 567 uint16_t device; 568 uint16_t subdevice; 569 unsigned int thiscard; 570 int i; 571 572 device = pci_read_config(dev, PCIR_DEVICE, /* bytes */ 2); 573 subdevice = pci_read_config(dev, PCIR_SUBDEV_0, /* bytes */ 2); 574 575 thiscard = 0; 576 for (i = 1; i < nitems(emu_cards); i++) { 577 if (device == emu_cards[i].device) { 578 if (subdevice == emu_cards[i].subdevice) { 579 thiscard = i; 580 break; 581 } 582 if (0x0000 == emu_cards[i].subdevice) { 583 thiscard = i; 584 /* 585 * don't break, we can get more specific card 586 * later in the list. 587 */ 588 } 589 } 590 } 591 592 for (i = 0; i < nitems(emu_bad_cards); i++) { 593 if (device == emu_bad_cards[i].device) { 594 if (subdevice == emu_bad_cards[i].subdevice) { 595 thiscard = 0; 596 break; 597 } 598 if (0x0000 == emu_bad_cards[i].subdevice) { 599 thiscard = 0; 600 break; /* we avoid all this cards */ 601 } 602 } 603 } 604 return (thiscard); 605 } 606 607 608 /* 609 * Base hardware interface are 32 (Audigy) or 64 (Audigy2) registers. 610 * Some of them are used directly, some of them provide pointer / data pairs. 611 */ 612 static uint32_t 613 emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size) 614 { 615 616 KASSERT(sc != NULL, ("emu_rd: NULL sc")); 617 switch (size) { 618 case 1: 619 return (bus_space_read_1(sc->st, sc->sh, regno)); 620 case 2: 621 return (bus_space_read_2(sc->st, sc->sh, regno)); 622 case 4: 623 return (bus_space_read_4(sc->st, sc->sh, regno)); 624 } 625 return (0xffffffff); 626 } 627 628 static void 629 emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size) 630 { 631 632 KASSERT(sc != NULL, ("emu_rd: NULL sc")); 633 switch (size) { 634 case 1: 635 bus_space_write_1(sc->st, sc->sh, regno, data); 636 break; 637 case 2: 638 bus_space_write_2(sc->st, sc->sh, regno, data); 639 break; 640 case 4: 641 bus_space_write_4(sc->st, sc->sh, regno, data); 642 break; 643 } 644 } 645 /* 646 * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made 647 * via (channel, register) pair. Some registers are channel-specific, 648 * some not. 649 */ 650 uint32_t 651 emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg) 652 { 653 uint32_t ptr, val, mask, size, offset; 654 655 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK); 656 657 EMU_RWLOCK(); 658 emu_wr_nolock(sc, EMU_PTR, ptr, 4); 659 val = emu_rd_nolock(sc, EMU_DATA, 4); 660 EMU_RWUNLOCK(); 661 662 /* 663 * XXX Some register numbers has data size and offset encoded in 664 * it to get only part of 32bit register. This use is not described 665 * in register name, be careful! 666 */ 667 if (reg & 0xff000000) { 668 size = (reg >> 24) & 0x3f; 669 offset = (reg >> 16) & 0x1f; 670 mask = ((1 << size) - 1) << offset; 671 val &= mask; 672 val >>= offset; 673 } 674 return (val); 675 } 676 677 void 678 emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data) 679 { 680 uint32_t ptr, mask, size, offset; 681 682 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK); 683 684 EMU_RWLOCK(); 685 emu_wr_nolock(sc, EMU_PTR, ptr, 4); 686 /* 687 * XXX Another kind of magic encoding in register number. This can 688 * give you side effect - it will read previous data from register 689 * and change only required bits. 690 */ 691 if (reg & 0xff000000) { 692 size = (reg >> 24) & 0x3f; 693 offset = (reg >> 16) & 0x1f; 694 mask = ((1 << size) - 1) << offset; 695 data <<= offset; 696 data &= mask; 697 data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask; 698 } 699 emu_wr_nolock(sc, EMU_DATA, data, 4); 700 EMU_RWUNLOCK(); 701 } 702 /* 703 * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made 704 * via (channel, register) pair. Some registers are channel-specific, 705 * some not. This interface is supported by CA0102 and CA0108 chips only. 706 */ 707 uint32_t 708 emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg) 709 { 710 uint32_t val; 711 712 /* XXX separate lock? */ 713 EMU_RWLOCK(); 714 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4); 715 val = emu_rd_nolock(sc, EMU_DATA2, 4); 716 717 EMU_RWUNLOCK(); 718 719 return (val); 720 } 721 722 void 723 emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data) 724 { 725 726 EMU_RWLOCK(); 727 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4); 728 emu_wr_nolock(sc, EMU_DATA2, data, 4); 729 EMU_RWUNLOCK(); 730 } 731 /* 732 * XXX CardBus interface. Not tested on any real hardware. 733 */ 734 static void 735 emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data) 736 { 737 uint32_t val; 738 739 /* 740 * 0x38 is IPE3 (CD S/PDIF interrupt pending register) on CA0102. Seems 741 * to be some reg/value accessible kind of config register on CardBus 742 * CA0108, with value(?) in top 16 bit, address(?) in low 16 743 */ 744 745 val = emu_rd_nolock(sc, 0x38, 4); 746 emu_wr_nolock(sc, 0x38, data, 4); 747 val = emu_rd_nolock(sc, 0x38, 4); 748 749 } 750 751 /* 752 * Direct hardware register access 753 * Assume that it is never used to access EMU_PTR-based registers and can run unlocked. 754 */ 755 void 756 emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size) 757 { 758 KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR")); 759 KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR")); 760 761 emu_wr_nolock(sc, regno, data, size); 762 } 763 764 uint32_t 765 emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size) 766 { 767 uint32_t rd; 768 769 KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA")); 770 KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2")); 771 772 rd = emu_rd_nolock(sc, regno, size); 773 return (rd); 774 } 775 776 /* 777 * Enabling IR MIDI messages is another kind of black magic. It just 778 * has to be made this way. It really do it. 779 */ 780 void 781 emu_enable_ir(struct emu_sc_info *sc) 782 { 783 uint32_t iocfg; 784 785 if (sc->is_emu10k2 || sc->is_ca0102) { 786 iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2); 787 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2); 788 DELAY(500); 789 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2); 790 DELAY(500); 791 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2); 792 DELAY(100); 793 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2); 794 device_printf(sc->dev, "Audigy IR MIDI events enabled.\n"); 795 sc->enable_ir = 1; 796 } 797 if (sc->is_emu10k1) { 798 iocfg = emu_rd_nolock(sc, EMU_HCFG, 4); 799 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4); 800 DELAY(500); 801 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4); 802 DELAY(100); 803 emu_wr_nolock(sc, EMU_HCFG, iocfg, 4); 804 device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n"); 805 sc->enable_ir = 1; 806 } 807 } 808 809 810 /* 811 * emu_timer_ - HW timer management 812 */ 813 int 814 emu_timer_create(struct emu_sc_info *sc) 815 { 816 int i, timer; 817 818 timer = -1; 819 820 mtx_lock(&sc->lock); 821 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 822 if (sc->timer[i] == 0) { 823 sc->timer[i] = -1; /* disable it */ 824 timer = i; 825 mtx_unlock(&sc->lock); 826 return (timer); 827 } 828 mtx_unlock(&sc->lock); 829 830 return (-1); 831 } 832 833 int 834 emu_timer_set(struct emu_sc_info *sc, int timer, int delay) 835 { 836 int i; 837 838 if (timer < 0) 839 return (-1); 840 841 RANGE(delay, 16, 1024); 842 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 843 844 mtx_lock(&sc->lock); 845 sc->timer[timer] = delay; 846 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 847 if (sc->timerinterval > sc->timer[i]) 848 sc->timerinterval = sc->timer[i]; 849 850 /* XXX */ 851 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2); 852 mtx_unlock(&sc->lock); 853 854 return (timer); 855 } 856 857 int 858 emu_timer_enable(struct emu_sc_info *sc, int timer, int go) 859 { 860 uint32_t x; 861 int ena_int; 862 int i; 863 864 if (timer < 0) 865 return (-1); 866 867 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 868 869 mtx_lock(&sc->lock); 870 871 if ((go == 1) && (sc->timer[timer] < 0)) 872 sc->timer[timer] = -sc->timer[timer]; 873 if ((go == 0) && (sc->timer[timer] > 0)) 874 sc->timer[timer] = -sc->timer[timer]; 875 876 ena_int = 0; 877 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) { 878 if (sc->timerinterval > sc->timer[i]) 879 sc->timerinterval = sc->timer[i]; 880 if (sc->timer[i] > 0) 881 ena_int = 1; 882 } 883 884 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2); 885 886 if (ena_int == 1) { 887 x = emu_rd(sc, EMU_INTE, 4); 888 x |= EMU_INTE_INTERTIMERENB; 889 emu_wr(sc, EMU_INTE, x, 4); 890 } else { 891 x = emu_rd(sc, EMU_INTE, 4); 892 x &= ~EMU_INTE_INTERTIMERENB; 893 emu_wr(sc, EMU_INTE, x, 4); 894 } 895 mtx_unlock(&sc->lock); 896 return (0); 897 } 898 899 int 900 emu_timer_clear(struct emu_sc_info *sc, int timer) 901 { 902 if (timer < 0) 903 return (-1); 904 905 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 906 907 emu_timer_enable(sc, timer, 0); 908 909 mtx_lock(&sc->lock); 910 if (sc->timer[timer] != 0) 911 sc->timer[timer] = 0; 912 mtx_unlock(&sc->lock); 913 914 return (timer); 915 } 916 917 /* 918 * emu_intr_ - HW interrupt handler management 919 */ 920 int 921 emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc) 922 { 923 int i; 924 uint32_t x; 925 926 mtx_lock(&sc->lock); 927 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 928 if (sc->ihandler[i].inte_mask == 0) { 929 sc->ihandler[i].inte_mask = inte_mask; 930 sc->ihandler[i].intr_mask = intr_mask; 931 sc->ihandler[i].softc = isc; 932 sc->ihandler[i].irq_func = func; 933 x = emu_rd(sc, EMU_INTE, 4); 934 x |= inte_mask; 935 emu_wr(sc, EMU_INTE, x, 4); 936 mtx_unlock(&sc->lock); 937 if (sc->dbg_level > 1) 938 device_printf(sc->dev, "ihandle %d registered\n", i); 939 940 return (i); 941 } 942 mtx_unlock(&sc->lock); 943 if (sc->dbg_level > 1) 944 device_printf(sc->dev, "ihandle not registered\n"); 945 946 return (-1); 947 } 948 949 int 950 emu_intr_unregister(struct emu_sc_info *sc, int hnumber) 951 { 952 uint32_t x; 953 int i; 954 955 mtx_lock(&sc->lock); 956 957 if (sc->ihandler[hnumber].inte_mask == 0) { 958 mtx_unlock(&sc->lock); 959 return (-1); 960 } 961 962 x = emu_rd(sc, EMU_INTE, 4); 963 x &= ~sc->ihandler[hnumber].inte_mask; 964 965 sc->ihandler[hnumber].inte_mask = 0; 966 sc->ihandler[hnumber].intr_mask = 0; 967 sc->ihandler[hnumber].softc = NULL; 968 sc->ihandler[hnumber].irq_func = NULL; 969 970 /* other interrupt handlers may use this EMU_INTE value */ 971 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 972 if (sc->ihandler[i].inte_mask != 0) 973 x |= sc->ihandler[i].inte_mask; 974 975 emu_wr(sc, EMU_INTE, x, 4); 976 977 mtx_unlock(&sc->lock); 978 return (hnumber); 979 } 980 981 static void 982 emu_intr(void *p) 983 { 984 struct emu_sc_info *sc = (struct emu_sc_info *)p; 985 uint32_t stat, ack; 986 int i; 987 988 for (;;) { 989 stat = emu_rd(sc, EMU_IPR, 4); 990 ack = 0; 991 if (stat == 0) 992 break; 993 emu_wr(sc, EMU_IPR, stat, 4); 994 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) { 995 if ((((sc->ihandler[i].intr_mask) & stat) != 0) && 996 (((void *)sc->ihandler[i].irq_func) != NULL)) { 997 ack |= sc->ihandler[i].irq_func(sc->ihandler[i].softc, 998 (sc->ihandler[i].intr_mask) & stat); 999 } 1000 } 1001 if (sc->dbg_level > 1) 1002 if (stat & (~ack)) 1003 device_printf(sc->dev, "Unhandled interrupt: %08x\n", stat & (~ack)); 1004 1005 } 1006 1007 if ((sc->is_ca0102) || (sc->is_ca0108)) 1008 for (;;) { 1009 stat = emu_rd(sc, EMU_IPR2, 4); 1010 ack = 0; 1011 if (stat == 0) 1012 break; 1013 emu_wr(sc, EMU_IPR2, stat, 4); 1014 if (sc->dbg_level > 1) 1015 device_printf(sc->dev, "EMU_IPR2: %08x\n", stat); 1016 1017 break; /* to avoid infinite loop. should be removed 1018 * after completion of P16V interface. */ 1019 } 1020 1021 if (sc->is_ca0102) 1022 for (;;) { 1023 stat = emu_rd(sc, EMU_IPR3, 4); 1024 ack = 0; 1025 if (stat == 0) 1026 break; 1027 emu_wr(sc, EMU_IPR3, stat, 4); 1028 if (sc->dbg_level > 1) 1029 device_printf(sc->dev, "EMU_IPR3: %08x\n", stat); 1030 1031 break; /* to avoid infinite loop. should be removed 1032 * after completion of S/PDIF interface */ 1033 } 1034 } 1035 1036 1037 /* 1038 * Get data from private emu10kx structure for PCM buffer allocation. 1039 * Used by PCM code only. 1040 */ 1041 bus_dma_tag_t 1042 emu_gettag(struct emu_sc_info *sc) 1043 { 1044 return (sc->mem.dmat); 1045 } 1046 1047 static void 1048 emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error) 1049 { 1050 bus_addr_t *phys = (bus_addr_t *) arg; 1051 1052 *phys = error ? 0 : (bus_addr_t) segs->ds_addr; 1053 1054 if (bootverbose) { 1055 printf("emu10kx: setmap (%lx, %lx), nseg=%d, error=%d\n", 1056 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 1057 nseg, error); 1058 } 1059 } 1060 1061 static void * 1062 emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, 1063 bus_dmamap_t *map) 1064 { 1065 void *dmabuf; 1066 int error; 1067 1068 *addr = 0; 1069 if ((error = bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, map))) { 1070 if (mem->card->dbg_level > 2) 1071 device_printf(mem->card->dev, "emu_malloc: failed to alloc DMA map: %d\n", error); 1072 return (NULL); 1073 } 1074 if ((error = bus_dmamap_load(mem->dmat, *map, dmabuf, sz, emu_setmap, addr, 0)) || !*addr) { 1075 if (mem->card->dbg_level > 2) 1076 device_printf(mem->card->dev, "emu_malloc: failed to load DMA memory: %d\n", error); 1077 bus_dmamem_free(mem->dmat, dmabuf, *map); 1078 return (NULL); 1079 } 1080 return (dmabuf); 1081 } 1082 1083 static void 1084 emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map) 1085 { 1086 bus_dmamap_unload(mem->dmat, map); 1087 bus_dmamem_free(mem->dmat, dmabuf, map); 1088 } 1089 1090 static void * 1091 emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char *owner) 1092 { 1093 uint32_t blksz, start, idx, ofs, tmp, found; 1094 struct emu_memblk *blk; 1095 void *membuf; 1096 1097 blksz = sz / EMUPAGESIZE; 1098 if (sz > (blksz * EMUPAGESIZE)) 1099 blksz++; 1100 if (blksz > EMU_MAX_BUFSZ / EMUPAGESIZE) { 1101 if (mem->card->dbg_level > 2) 1102 device_printf(mem->card->dev, "emu_memalloc: memory request tool large\n"); 1103 return (NULL); 1104 } 1105 /* find a free block in the bitmap */ 1106 found = 0; 1107 start = 1; 1108 while (!found && start + blksz < EMU_MAXPAGES) { 1109 found = 1; 1110 for (idx = start; idx < start + blksz; idx++) 1111 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1112 found = 0; 1113 if (!found) 1114 start++; 1115 } 1116 if (!found) { 1117 if (mem->card->dbg_level > 2) 1118 device_printf(mem->card->dev, "emu_memalloc: no free space in bitmap\n"); 1119 return (NULL); 1120 } 1121 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT); 1122 if (blk == NULL) { 1123 if (mem->card->dbg_level > 2) 1124 device_printf(mem->card->dev, "emu_memalloc: buffer allocation failed\n"); 1125 return (NULL); 1126 } 1127 bzero(blk, sizeof(*blk)); 1128 membuf = emu_malloc(mem, sz, &blk->buf_addr, &blk->buf_map); 1129 *addr = blk->buf_addr; 1130 if (membuf == NULL) { 1131 if (mem->card->dbg_level > 2) 1132 device_printf(mem->card->dev, "emu_memalloc: can't setup HW memory\n"); 1133 free(blk, M_DEVBUF); 1134 return (NULL); 1135 } 1136 blk->buf = membuf; 1137 blk->pte_start = start; 1138 blk->pte_size = blksz; 1139 strncpy(blk->owner, owner, 15); 1140 blk->owner[15] = '\0'; 1141 ofs = 0; 1142 for (idx = start; idx < start + blksz; idx++) { 1143 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1144 tmp = (uint32_t) (blk->buf_addr + ofs); 1145 mem->ptb_pages[idx] = (tmp << 1) | idx; 1146 ofs += EMUPAGESIZE; 1147 } 1148 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1149 return (membuf); 1150 } 1151 1152 static int 1153 emu_memfree(struct emu_mem *mem, void *membuf) 1154 { 1155 uint32_t idx, tmp; 1156 struct emu_memblk *blk, *i; 1157 1158 blk = NULL; 1159 SLIST_FOREACH(i, &mem->blocks, link) { 1160 if (i->buf == membuf) 1161 blk = i; 1162 } 1163 if (blk == NULL) 1164 return (EINVAL); 1165 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1166 emu_free(mem, membuf, blk->buf_map); 1167 tmp = (uint32_t) (mem->silent_page_addr) << 1; 1168 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1169 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1170 mem->ptb_pages[idx] = tmp | idx; 1171 } 1172 free(blk, M_DEVBUF); 1173 return (0); 1174 } 1175 1176 static int 1177 emu_memstart(struct emu_mem *mem, void *membuf) 1178 { 1179 struct emu_memblk *blk, *i; 1180 1181 blk = NULL; 1182 SLIST_FOREACH(i, &mem->blocks, link) { 1183 if (i->buf == membuf) 1184 blk = i; 1185 } 1186 if (blk == NULL) 1187 return (-1); 1188 return (blk->pte_start); 1189 } 1190 1191 1192 static uint32_t 1193 emu_rate_to_pitch(uint32_t rate) 1194 { 1195 static uint32_t logMagTable[128] = { 1196 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 1197 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 1198 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 1199 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 1200 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 1201 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 1202 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 1203 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 1204 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 1205 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 1206 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 1207 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 1208 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 1209 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 1210 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 1211 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 1212 }; 1213 static char logSlopeTable[128] = { 1214 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 1215 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 1216 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 1217 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 1218 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 1219 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 1220 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 1221 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 1222 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 1223 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 1224 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 1225 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 1226 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 1227 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 1228 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 1229 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 1230 }; 1231 int i; 1232 1233 if (rate == 0) 1234 return (0); 1235 rate *= 11185; /* Scale 48000 to 0x20002380 */ 1236 for (i = 31; i > 0; i--) { 1237 if (rate & 0x80000000) { /* Detect leading "1" */ 1238 return (((uint32_t) (i - 15) << 20) + 1239 logMagTable[0x7f & (rate >> 24)] + 1240 (0x7f & (rate >> 17)) * 1241 logSlopeTable[0x7f & (rate >> 24)]); 1242 } 1243 rate <<= 1; 1244 } 1245 /* NOTREACHED */ 1246 return (0); 1247 } 1248 1249 static uint32_t 1250 emu_rate_to_linearpitch(uint32_t rate) 1251 { 1252 rate = (rate << 8) / 375; 1253 return ((rate >> 1) + (rate & 1)); 1254 } 1255 1256 struct emu_voice * 1257 emu_valloc(struct emu_sc_info *sc) 1258 { 1259 struct emu_voice *v; 1260 int i; 1261 1262 v = NULL; 1263 mtx_lock(&sc->lock); 1264 for (i = 0; i < NUM_G && sc->voice[i].busy; i++); 1265 if (i < NUM_G) { 1266 v = &sc->voice[i]; 1267 v->busy = 1; 1268 } 1269 mtx_unlock(&sc->lock); 1270 return (v); 1271 } 1272 1273 void 1274 emu_vfree(struct emu_sc_info *sc, struct emu_voice *v) 1275 { 1276 int i, r; 1277 1278 mtx_lock(&sc->lock); 1279 for (i = 0; i < NUM_G; i++) { 1280 if (v == &sc->voice[i] && sc->voice[i].busy) { 1281 v->busy = 0; 1282 /* 1283 * XXX What we should do with mono channels? 1284 * See -pcm.c emupchan_init for other side of 1285 * this problem 1286 */ 1287 if (v->slave != NULL) 1288 r = emu_memfree(&sc->mem, v->vbuf); 1289 } 1290 } 1291 mtx_unlock(&sc->lock); 1292 } 1293 1294 int 1295 emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s, 1296 uint32_t sz, struct snd_dbuf *b) 1297 { 1298 void *vbuf; 1299 bus_addr_t tmp_addr; 1300 1301 vbuf = emu_memalloc(&sc->mem, sz, &tmp_addr, "vinit"); 1302 if (vbuf == NULL) { 1303 if(sc->dbg_level > 2) 1304 device_printf(sc->dev, "emu_memalloc returns NULL in enu_vinit\n"); 1305 return (ENOMEM); 1306 } 1307 if (b != NULL) 1308 sndbuf_setup(b, vbuf, sz); 1309 m->start = emu_memstart(&sc->mem, vbuf) * EMUPAGESIZE; 1310 if (m->start < 0) { 1311 if(sc->dbg_level > 2) 1312 device_printf(sc->dev, "emu_memstart returns (-1) in enu_vinit\n"); 1313 emu_memfree(&sc->mem, vbuf); 1314 return (ENOMEM); 1315 } 1316 m->end = m->start + sz; 1317 m->speed = 0; 1318 m->b16 = 0; 1319 m->stereo = 0; 1320 m->running = 0; 1321 m->ismaster = 1; 1322 m->vol = 0xff; 1323 m->buf = tmp_addr; 1324 m->vbuf = vbuf; 1325 m->slave = s; 1326 if (s != NULL) { 1327 s->start = m->start; 1328 s->end = m->end; 1329 s->speed = 0; 1330 s->b16 = 0; 1331 s->stereo = 0; 1332 s->running = 0; 1333 s->ismaster = 0; 1334 s->vol = m->vol; 1335 s->buf = m->buf; 1336 s->vbuf = NULL; 1337 s->slave = NULL; 1338 } 1339 return (0); 1340 } 1341 1342 void 1343 emu_vsetup(struct emu_voice *v, int fmt, int spd) 1344 { 1345 if (fmt) { 1346 v->b16 = (fmt & AFMT_16BIT) ? 1 : 0; 1347 v->stereo = (AFMT_CHANNEL(fmt) > 1) ? 1 : 0; 1348 if (v->slave != NULL) { 1349 v->slave->b16 = v->b16; 1350 v->slave->stereo = v->stereo; 1351 } 1352 } 1353 if (spd) { 1354 v->speed = spd; 1355 if (v->slave != NULL) 1356 v->slave->speed = v->speed; 1357 } 1358 } 1359 1360 void 1361 emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v) 1362 { 1363 int i; 1364 1365 for (i = 0; i < 8; i++) { 1366 v->routing[i] = rt->routing_left[i]; 1367 v->amounts[i] = rt->amounts_left[i]; 1368 } 1369 if ((v->stereo) && (v->ismaster == 0)) 1370 for (i = 0; i < 8; i++) { 1371 v->routing[i] = rt->routing_right[i]; 1372 v->amounts[i] = rt->amounts_right[i]; 1373 } 1374 1375 if ((v->stereo) && (v->slave != NULL)) 1376 emu_vroute(sc, rt, v->slave); 1377 } 1378 1379 void 1380 emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v) 1381 { 1382 int s; 1383 uint32_t start, val, silent_page; 1384 1385 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0); 1386 1387 v->sa = v->start >> s; 1388 v->ea = v->end >> s; 1389 1390 1391 if (v->stereo) { 1392 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK); 1393 } else { 1394 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0); 1395 } 1396 val = v->stereo ? 28 : 30; 1397 val *= v->b16 ? 1 : 2; 1398 start = v->sa + val; 1399 1400 if (sc->is_emu10k1) { 1401 emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) | 1402 (v->routing[2] << 8) | 1403 (v->routing[1] << 4) | 1404 (v->routing[0] << 0)) << 16); 1405 } else { 1406 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) | 1407 (v->routing[2] << 16) | 1408 (v->routing[1] << 8) | 1409 (v->routing[0] << 0)); 1410 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) | 1411 (v->routing[6] << 16) | 1412 (v->routing[5] << 8) | 1413 (v->routing[4] << 0)); 1414 emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) | 1415 (v->amounts[6] << 26) | 1416 (v->amounts[5] << 8) | 1417 (v->amounts[4] << 0)); 1418 } 1419 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0)); 1420 emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24)); 1421 emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24)); 1422 1423 emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT)); 1424 emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0); 1425 emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0); 1426 1427 silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK; 1428 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page); 1429 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page); 1430 1431 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK); 1432 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK); 1433 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0); 1434 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK); 1435 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000); 1436 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000); 1437 emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0); 1438 emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0); 1439 emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0); 1440 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000); 1441 1442 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK); 1443 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000); 1444 1445 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f); 1446 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0); 1447 if ((v->stereo) && (v->slave != NULL)) 1448 emu_vwrite(sc, v->slave); 1449 } 1450 1451 static void 1452 emu_vstop(struct emu_sc_info *sc, char channel, int enable) 1453 { 1454 int reg; 1455 1456 reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL; 1457 channel &= 0x1f; 1458 reg |= 1 << 24; 1459 reg |= channel << 16; 1460 emu_wrptr(sc, 0, reg, enable); 1461 } 1462 1463 void 1464 emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go) 1465 { 1466 uint32_t pitch_target, initial_pitch; 1467 uint32_t cra, cs, ccis; 1468 uint32_t sample, i; 1469 1470 if (go) { 1471 cra = 64; 1472 cs = v->stereo ? 4 : 2; 1473 ccis = v->stereo ? 28 : 30; 1474 ccis *= v->b16 ? 1 : 2; 1475 sample = v->b16 ? 0x00000000 : 0x80808080; 1476 for (i = 0; i < cs; i++) 1477 emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample); 1478 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0); 1479 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra); 1480 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis); 1481 1482 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00); 1483 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff); 1484 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff); 1485 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f); 1486 emu_vstop(sc, v->vnum, 0); 1487 1488 pitch_target = emu_rate_to_linearpitch(v->speed); 1489 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 1490 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target); 1491 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target); 1492 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch); 1493 } else { 1494 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0); 1495 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0); 1496 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff); 1497 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff); 1498 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff); 1499 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0); 1500 emu_vstop(sc, v->vnum, 1); 1501 } 1502 if ((v->stereo) && (v->slave != NULL)) 1503 emu_vtrigger(sc, v->slave, go); 1504 } 1505 1506 int 1507 emu_vpos(struct emu_sc_info *sc, struct emu_voice *v) 1508 { 1509 int s, ptr; 1510 1511 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0); 1512 ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s; 1513 return (ptr & ~0x0000001f); 1514 } 1515 1516 1517 /* fx */ 1518 static void 1519 emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data) 1520 { 1521 emu_wrptr(sc, 0, sc->code_base + pc, data); 1522 } 1523 1524 1525 static void 1526 emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc) 1527 { 1528 if ((*pc) + 1 > sc->code_size) { 1529 device_printf(sc->dev, "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", (*pc)); 1530 return; 1531 } 1532 emu_wrefx(sc, (*pc) * 2, (x << sc->high_operand_shift) | y); 1533 emu_wrefx(sc, (*pc) * 2 + 1, (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w); 1534 (*pc)++; 1535 } 1536 1537 static int 1538 sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS) 1539 { 1540 struct emu_sc_info *sc; 1541 int mixer_id; 1542 int new_vol; 1543 int err; 1544 1545 sc = arg1; 1546 mixer_id = arg2; 1547 1548 new_vol = emumix_get_volume(sc, mixer_id); 1549 err = sysctl_handle_int(oidp, &new_vol, 0, req); 1550 1551 if (err || req->newptr == NULL) 1552 return (err); 1553 if (new_vol < 0 || new_vol > 100) 1554 return (EINVAL); 1555 emumix_set_volume(sc, mixer_id, new_vol); 1556 1557 return (0); 1558 } 1559 1560 static int 1561 emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume) 1562 { 1563 int volgpr; 1564 char sysctl_name[32]; 1565 1566 volgpr = emu_rm_gpr_alloc(sc->rm, 1); 1567 emumix_set_fxvol(sc, volgpr, defvolume); 1568 /* 1569 * Mixer controls with NULL mix_name are handled 1570 * by AC97 emulation code or PCM mixer. 1571 */ 1572 if (mix_name != NULL) { 1573 /* 1574 * Temporary sysctls should start with underscore, 1575 * see freebsd-current mailing list, emu10kx driver 1576 * discussion around 2006-05-24. 1577 */ 1578 snprintf(sysctl_name, 32, "_%s", mix_name); 1579 SYSCTL_ADD_PROC(sc->ctx, 1580 SYSCTL_CHILDREN(sc->root), OID_AUTO, sysctl_name, 1581 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, mix_id, 1582 sysctl_emu_mixer_control, "I", ""); 1583 } 1584 1585 return (volgpr); 1586 } 1587 1588 static int 1589 sysctl_emu_digitalswitch_control(SYSCTL_HANDLER_ARGS) 1590 { 1591 struct emu_sc_info *sc; 1592 int new_val; 1593 int err; 1594 1595 sc = arg1; 1596 1597 new_val = (sc->mode == MODE_DIGITAL) ? 1 : 0; 1598 err = sysctl_handle_int(oidp, &new_val, 0, req); 1599 1600 if (err || req->newptr == NULL) 1601 return (err); 1602 if (new_val < 0 || new_val > 1) 1603 return (EINVAL); 1604 1605 switch (new_val) { 1606 case 0: 1607 emumix_set_mode(sc, MODE_ANALOG); 1608 break; 1609 case 1: 1610 emumix_set_mode(sc, MODE_DIGITAL); 1611 break; 1612 } 1613 return (0); 1614 } 1615 1616 static void 1617 emu_digitalswitch(struct emu_sc_info *sc) 1618 { 1619 /* XXX temporary? */ 1620 SYSCTL_ADD_PROC(sc->ctx, SYSCTL_CHILDREN(sc->root), OID_AUTO, 1621 "_digital", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 1622 sc, 0, sysctl_emu_digitalswitch_control, "I", 1623 "Enable digital output"); 1624 1625 return; 1626 } 1627 1628 /* 1629 * Allocate cache GPRs that will hold mixed output channels 1630 * and clear it on every DSP run. 1631 */ 1632 #define EFX_CACHE(CACHE_IDX) do { \ 1633 sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \ 1634 emu_addefxop(sc, ACC3, \ 1635 GPR(sc->cache_gpr[CACHE_IDX]), \ 1636 DSP_CONST(0), \ 1637 DSP_CONST(0), \ 1638 DSP_CONST(0), \ 1639 &pc); \ 1640 } while (0) 1641 1642 /* Allocate GPR for volume control and route sound: OUT = OUT + IN * VOL */ 1643 #define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) do { \ 1644 sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, IN_GPR_IDX, DEF); \ 1645 sc->mixer_volcache[IN_GPR_IDX] = DEF; \ 1646 emu_addefxop(sc, MACS, \ 1647 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1648 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1649 INP_NR, \ 1650 GPR(sc->mixer_gpr[IN_GPR_IDX]), \ 1651 &pc); \ 1652 } while (0) 1653 1654 /* allocate GPR, OUT = IN * VOL */ 1655 #define EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) do { \ 1656 sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, OUT_GPR_IDX, DEF); \ 1657 sc->mixer_volcache[OUT_GPR_IDX] = DEF; \ 1658 emu_addefxop(sc, MACS, \ 1659 OUTP(OUTP_NR), \ 1660 DSP_CONST(0), \ 1661 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1662 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \ 1663 &pc); \ 1664 } while (0) 1665 1666 /* like EFX_OUTPUT, but don't allocate mixer gpr */ 1667 #define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) do { \ 1668 emu_addefxop(sc, MACS, \ 1669 OUTP(OUTP_NR), \ 1670 DSP_CONST(0), \ 1671 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1672 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \ 1673 &pc); \ 1674 } while (0) 1675 1676 /* skip next OPCOUNT instructions if FLAG != 0 */ 1677 #define EFX_SKIP(OPCOUNT, FLAG_GPR) do { \ 1678 emu_addefxop(sc, MACS, \ 1679 DSP_CONST(0), \ 1680 GPR(sc->mute_gpr[FLAG_GPR]), \ 1681 DSP_CONST(0), \ 1682 DSP_CONST(0), \ 1683 &pc); \ 1684 emu_addefxop(sc, SKIP, \ 1685 DSP_CCR, \ 1686 DSP_CCR, \ 1687 COND_NEQ_ZERO, \ 1688 OPCOUNT, \ 1689 &pc); \ 1690 } while (0) 1691 1692 #define EFX_COPY(TO, FROM) do { \ 1693 emu_addefxop(sc, ACC3, \ 1694 TO, \ 1695 DSP_CONST(0), \ 1696 DSP_CONST(0), \ 1697 FROM, \ 1698 &pc); \ 1699 } while (0) 1700 1701 1702 static void 1703 emu_initefx(struct emu_sc_info *sc) 1704 { 1705 unsigned int i; 1706 uint32_t pc; 1707 1708 /* stop DSP */ 1709 if (sc->is_emu10k1) { 1710 emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP); 1711 } else { 1712 emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP); 1713 } 1714 1715 /* code size is in instructions */ 1716 pc = 0; 1717 for (i = 0; i < sc->code_size; i++) { 1718 if (sc->is_emu10k1) { 1719 emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), &pc); 1720 } else { 1721 emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0xf), DSP_CONST(0x0), &pc); 1722 } 1723 } 1724 1725 /* allocate GPRs for mute switches (EFX_SKIP). Mute by default */ 1726 for (i = 0; i < NUM_MUTE; i++) { 1727 sc->mute_gpr[i] = emu_rm_gpr_alloc(sc->rm, 1); 1728 emumix_set_gpr(sc, sc->mute_gpr[i], 1); 1729 } 1730 emu_digitalswitch(sc); 1731 1732 pc = 0; 1733 1734 /* 1735 * DSP code below is not good, because: 1736 * 1. It can be written smaller, if it can use DSP accumulator register 1737 * instead of cache_gpr[]. 1738 * 2. It can be more careful when volume is 100%, because in DSP 1739 * x*0x7fffffff may not be equal to x ! 1740 */ 1741 1742 /* clean outputs */ 1743 for (i = 0; i < 16 ; i++) { 1744 emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc); 1745 } 1746 1747 1748 if (sc->is_emu10k1) { 1749 EFX_CACHE(C_FRONT_L); 1750 EFX_CACHE(C_FRONT_R); 1751 EFX_CACHE(C_REC_L); 1752 EFX_CACHE(C_REC_R); 1753 1754 /* fx0 to front/record, 100%/muted by default */ 1755 EFX_ROUTE("pcm_front_l", FX(0), M_FX0_FRONT_L, C_FRONT_L, 100); 1756 EFX_ROUTE("pcm_front_r", FX(1), M_FX1_FRONT_R, C_FRONT_R, 100); 1757 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0); 1758 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0); 1759 1760 /* in0, from AC97 codec output */ 1761 EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 0); 1762 EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 0); 1763 EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, 0); 1764 EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, 0); 1765 1766 /* in1, from CD S/PDIF */ 1767 /* XXX EFX_SKIP 4 assumes that each EFX_ROUTE is one DSP op */ 1768 EFX_SKIP(4, CDSPDIFMUTE); 1769 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0); 1770 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0); 1771 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0); 1772 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0); 1773 1774 if (sc->dbg_level > 0) { 1775 /* in2, ZoomVide (???) */ 1776 EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, C_FRONT_L, 0); 1777 EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, C_FRONT_R, 0); 1778 EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, C_REC_L, 0); 1779 EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, C_REC_R, 0); 1780 } 1781 1782 /* in3, TOSLink */ 1783 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_FRONT_L, C_FRONT_L, 0); 1784 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_FRONT_R, C_FRONT_R, 0); 1785 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_REC_L, C_REC_L, 0); 1786 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_REC_R, C_REC_R, 0); 1787 /* in4, LineIn */ 1788 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_FRONT_L, C_FRONT_L, 0); 1789 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_FRONT_R, C_FRONT_R, 0); 1790 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_REC_L, C_REC_L, 0); 1791 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_REC_R, C_REC_R, 0); 1792 1793 /* in5, on-card S/PDIF */ 1794 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0); 1795 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0); 1796 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_REC_L, C_REC_L, 0); 1797 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_REC_R, C_REC_R, 0); 1798 1799 /* in6, Line2 on Live!Drive */ 1800 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_FRONT_L, C_FRONT_L, 0); 1801 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_FRONT_R, C_FRONT_R, 0); 1802 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_REC_L, C_REC_L, 0); 1803 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_REC_R, C_REC_R, 0); 1804 1805 if (sc->dbg_level > 0) { 1806 /* in7, unknown */ 1807 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0); 1808 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0); 1809 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0); 1810 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0); 1811 } 1812 1813 /* analog and digital */ 1814 EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, OUT_AC97_L, 100); 1815 EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, OUT_AC97_R, 100); 1816 /* S/PDIF */ 1817 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_TOSLINK_L); 1818 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_TOSLINK_R); 1819 /* Headphones */ 1820 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_HEADPHONE_L); 1821 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_HEADPHONE_R); 1822 1823 /* rec output to "ADC" */ 1824 EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, OUT_ADC_REC_L, 100); 1825 EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, OUT_ADC_REC_R, 100); 1826 1827 if (!(sc->mch_disabled)) { 1828 /* 1829 * Additional channel volume is controlled by mixer in 1830 * emu_dspmixer_set() in -pcm.c 1831 */ 1832 1833 /* fx2/3 (pcm1) to rear */ 1834 EFX_CACHE(C_REAR_L); 1835 EFX_CACHE(C_REAR_R); 1836 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100); 1837 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100); 1838 1839 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, 100); 1840 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, 100); 1841 if (sc->has_51) { 1842 /* fx4 (pcm2) to center */ 1843 EFX_CACHE(C_CENTER); 1844 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100); 1845 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100); 1846 1847 /* XXX in digital mode (default) this should be muted because 1848 this output is shared with digital out */ 1849 EFX_SKIP(1, ANALOGMUTE); 1850 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER); 1851 1852 /* fx5 (pcm3) to sub */ 1853 EFX_CACHE(C_SUB); 1854 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100); 1855 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100); 1856 1857 /* XXX in digital mode (default) this should be muted because 1858 this output is shared with digital out */ 1859 EFX_SKIP(1, ANALOGMUTE); 1860 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB); 1861 1862 } 1863 } else { 1864 /* SND_EMU10KX_MULTICHANNEL_DISABLED */ 1865 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_REAR_L, OUT_REAR_L, 57); /* 75%*75% */ 1866 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_REAR_R, OUT_REAR_R, 57); /* 75%*75% */ 1867 1868 #if 0 1869 /* XXX 5.1 does not work */ 1870 1871 if (sc->has_51) { 1872 /* (fx0+fx1)/2 to center */ 1873 EFX_CACHE(C_CENTER); 1874 emu_addefxop(sc, MACS, 1875 GPR(sc->cache_gpr[C_CENTER]), 1876 GPR(sc->cache_gpr[C_CENTER]), 1877 DSP_CONST(0xd), /* = 1/2 */ 1878 GPR(sc->cache_gpr[C_FRONT_L]), 1879 &pc); 1880 emu_addefxop(sc, MACS, 1881 GPR(sc->cache_gpr[C_CENTER]), 1882 GPR(sc->cache_gpr[C_CENTER]), 1883 DSP_CONST(0xd), /* = 1/2 */ 1884 GPR(sc->cache_gpr[C_FRONT_R]), 1885 &pc); 1886 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100); 1887 1888 /* XXX in digital mode (default) this should be muted because 1889 this output is shared with digital out */ 1890 EFX_SKIP(1, ANALOGMUTE); 1891 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER); 1892 1893 /* (fx0+fx1)/2 to sub */ 1894 EFX_CACHE(C_SUB); 1895 emu_addefxop(sc, MACS, 1896 GPR(sc->cache_gpr[C_CENTER]), 1897 GPR(sc->cache_gpr[C_CENTER]), 1898 DSP_CONST(0xd), /* = 1/2 */ 1899 GPR(sc->cache_gpr[C_FRONT_L]), 1900 &pc); 1901 emu_addefxop(sc, MACS, 1902 GPR(sc->cache_gpr[C_CENTER]), 1903 GPR(sc->cache_gpr[C_CENTER]), 1904 DSP_CONST(0xd), /* = 1/2 */ 1905 GPR(sc->cache_gpr[C_FRONT_R]), 1906 &pc); 1907 /* XXX add lowpass filter here */ 1908 1909 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100); 1910 1911 /* XXX in digital mode (default) this should be muted because 1912 this output is shared with digital out */ 1913 EFX_SKIP(1, ANALOGMUTE); 1914 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB); 1915 } 1916 #endif 1917 } /* !mch_disabled */ 1918 if (sc->mch_rec) { 1919 /* 1920 * MCH RECORDING , hight 16 slots. On 5.1 cards first 4 slots 1921 * are used as outputs and already filled with data 1922 */ 1923 /* 1924 * XXX On Live! cards stream does not begin at zero offset. 1925 * It can be HW, driver or sound buffering problem. 1926 * Use sync substream (offset 0x3E) to let userland find 1927 * correct data. 1928 */ 1929 1930 /* 1931 * Substream map (in byte offsets, each substream is 2 bytes): 1932 * 0x00..0x1E - outputs 1933 * 0x20..0x3E - FX, inputs and sync stream 1934 */ 1935 1936 /* First 2 channels (offset 0x20,0x22) are empty */ 1937 for(i = (sc->has_51 ? 2 : 0); i < 2; i++) 1938 EFX_COPY(FX2(i), DSP_CONST(0)); 1939 1940 /* PCM Playback monitoring, offset 0x24..0x2A */ 1941 for(i = 0; i < 4; i++) 1942 EFX_COPY(FX2(i+2), FX(i)); 1943 1944 /* Copy of some inputs, offset 0x2C..0x3C */ 1945 for(i = 0; i < 9; i++) 1946 EFX_COPY(FX2(i+8), INP(i)); 1947 1948 /* sync data (0xc0de, offset 0x3E) */ 1949 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1); 1950 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000); 1951 1952 EFX_COPY(FX2(15), GPR(sc->dummy_gpr)); 1953 } /* mch_rec */ 1954 } else /* emu10k2 and later */ { 1955 EFX_CACHE(C_FRONT_L); 1956 EFX_CACHE(C_FRONT_R); 1957 EFX_CACHE(C_REC_L); 1958 EFX_CACHE(C_REC_R); 1959 1960 /* fx0 to front/record, 100%/muted by default */ 1961 /* 1962 * FRONT_[L|R] is controlled by AC97 emulation in 1963 * emu_ac97_[read|write]_emulation in -pcm.c 1964 */ 1965 EFX_ROUTE(NULL, FX(0), M_FX0_FRONT_L, C_FRONT_L, 100); 1966 EFX_ROUTE(NULL, FX(1), M_FX1_FRONT_R, C_FRONT_R, 100); 1967 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0); 1968 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0); 1969 1970 /* in0, from AC97 codec output */ 1971 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 100); 1972 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 100); 1973 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_REC_L, C_REC_L, 0); 1974 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_REC_R, C_REC_R, 0); 1975 1976 /* in1, from CD S/PDIF */ 1977 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0); 1978 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0); 1979 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0); 1980 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0); 1981 1982 /* in2, optical & coax S/PDIF on AudigyDrive*/ 1983 /* XXX Should be muted when GPRSCS valid stream == 0 */ 1984 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, 0); 1985 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, 0); 1986 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_REC_L, C_REC_L, 0); 1987 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_REC_R, C_REC_R, 0); 1988 1989 if (sc->dbg_level > 0) { 1990 /* in3, unknown */ 1991 EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, C_FRONT_L, 0); 1992 EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, C_FRONT_R, 0); 1993 EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, 0); 1994 EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, 0); 1995 } 1996 1997 /* in4, LineIn 2 on AudigyDrive */ 1998 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_FRONT_L, C_FRONT_L, 0); 1999 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_FRONT_R, C_FRONT_R, 0); 2000 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_REC_L, C_REC_L, 0); 2001 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_REC_R, C_REC_R, 0); 2002 2003 /* in5, on-card S/PDIF */ 2004 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0); 2005 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0); 2006 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_REC_L, C_REC_L, 0); 2007 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_REC_R, C_REC_R, 0); 2008 2009 /* in6, AUX2 on AudigyDrive */ 2010 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_FRONT_L, C_FRONT_L, 0); 2011 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_FRONT_R, C_FRONT_R, 0); 2012 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_REC_L, C_REC_L, 0); 2013 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_REC_R, C_REC_R, 0); 2014 2015 if (sc->dbg_level > 0) { 2016 /* in7, unknown */ 2017 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0); 2018 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0); 2019 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0); 2020 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0); 2021 } 2022 2023 /* front output to headphones and alog and digital *front */ 2024 /* volume controlled by AC97 emulation */ 2025 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, 100); 2026 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, 100); 2027 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_FRONT_L); 2028 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_FRONT_R); 2029 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_HPHONE_L); 2030 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_HPHONE_R); 2031 2032 /* rec output to "ADC" */ 2033 /* volume controlled by AC97 emulation */ 2034 EFX_OUTPUT(NULL, C_REC_L, M_MASTER_REC_L, A_OUT_ADC_REC_L, 100); 2035 EFX_OUTPUT(NULL, C_REC_R, M_MASTER_REC_R, A_OUT_ADC_REC_R, 100); 2036 2037 if (!(sc->mch_disabled)) { 2038 /* 2039 * Additional channel volume is controlled by mixer in 2040 * emu_dspmixer_set() in -pcm.c 2041 */ 2042 2043 /* fx2/3 (pcm1) to rear */ 2044 EFX_CACHE(C_REAR_L); 2045 EFX_CACHE(C_REAR_R); 2046 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100); 2047 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100); 2048 2049 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, A_OUT_A_REAR_L, 100); 2050 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, A_OUT_A_REAR_R, 100); 2051 EFX_OUTPUTD(C_REAR_L, M_MASTER_REAR_L, A_OUT_D_REAR_L); 2052 EFX_OUTPUTD(C_REAR_R, M_MASTER_REAR_R, A_OUT_D_REAR_R); 2053 2054 /* fx4 (pcm2) to center */ 2055 EFX_CACHE(C_CENTER); 2056 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100); 2057 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100); 2058 #if 0 2059 /* 2060 * XXX in digital mode (default) this should be muted 2061 * because this output is shared with digital out 2062 */ 2063 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER); 2064 #endif 2065 /* fx5 (pcm3) to sub */ 2066 EFX_CACHE(C_SUB); 2067 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100); 2068 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100); 2069 #if 0 2070 /* 2071 * XXX in digital mode (default) this should be muted 2072 * because this output is shared with digital out 2073 */ 2074 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB); 2075 #endif 2076 if (sc->has_71) { 2077 /* XXX this will broke headphones on AudigyDrive */ 2078 /* fx6/7 (pcm4) to side */ 2079 EFX_CACHE(C_SIDE_L); 2080 EFX_CACHE(C_SIDE_R); 2081 EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, 100); 2082 EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, 100); 2083 EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, A_OUT_A_SIDE_L, 100); 2084 EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, A_OUT_A_SIDE_R, 100); 2085 EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, A_OUT_D_SIDE_L); 2086 EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, A_OUT_D_SIDE_R); 2087 } 2088 } else { /* mch_disabled */ 2089 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_REAR_L); 2090 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_REAR_R); 2091 2092 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_REAR_L); 2093 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_REAR_R); 2094 2095 if (sc->has_51) { 2096 /* (fx0+fx1)/2 to center */ 2097 EFX_CACHE(C_CENTER); 2098 emu_addefxop(sc, MACS, 2099 GPR(sc->cache_gpr[C_CENTER]), 2100 GPR(sc->cache_gpr[C_CENTER]), 2101 DSP_CONST(0xd), /* = 1/2 */ 2102 GPR(sc->cache_gpr[C_FRONT_L]), 2103 &pc); 2104 emu_addefxop(sc, MACS, 2105 GPR(sc->cache_gpr[C_CENTER]), 2106 GPR(sc->cache_gpr[C_CENTER]), 2107 DSP_CONST(0xd), /* = 1/2 */ 2108 GPR(sc->cache_gpr[C_FRONT_R]), 2109 &pc); 2110 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100); 2111 2112 /* XXX in digital mode (default) this should be muted because 2113 this output is shared with digital out */ 2114 EFX_SKIP(1, ANALOGMUTE); 2115 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER); 2116 2117 /* (fx0+fx1)/2 to sub */ 2118 EFX_CACHE(C_SUB); 2119 emu_addefxop(sc, MACS, 2120 GPR(sc->cache_gpr[C_SUB]), 2121 GPR(sc->cache_gpr[C_SUB]), 2122 DSP_CONST(0xd), /* = 1/2 */ 2123 GPR(sc->cache_gpr[C_FRONT_L]), 2124 &pc); 2125 emu_addefxop(sc, MACS, 2126 GPR(sc->cache_gpr[C_SUB]), 2127 GPR(sc->cache_gpr[C_SUB]), 2128 DSP_CONST(0xd), /* = 1/2 */ 2129 GPR(sc->cache_gpr[C_FRONT_R]), 2130 &pc); 2131 /* XXX add lowpass filter here */ 2132 2133 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100); 2134 2135 /* XXX in digital mode (default) this should be muted because 2136 this output is shared with digital out */ 2137 EFX_SKIP(1, ANALOGMUTE); 2138 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB); 2139 } 2140 } /* mch_disabled */ 2141 if (sc->mch_rec) { 2142 /* MCH RECORDING, high 32 slots */ 2143 2144 /* 2145 * Stream map (in byte offsets): 2146 * 0x00..0x3E - outputs 2147 * 0x40..0x7E - FX, inputs 2148 * each substream is 2 bytes. 2149 */ 2150 /* 2151 * XXX Audigy 2 Value cards (and, possibly, 2152 * Audigy 4) write some unknown data in place of 2153 * some outputs (offsets 0x20..0x3F) and one 2154 * input (offset 0x7E). 2155 */ 2156 2157 /* PCM Playback monitoring, offsets 0x40..0x5E */ 2158 for(i = 0; i < 16; i++) 2159 EFX_COPY(FX2(i), FX(i)); 2160 2161 /* Copy of all inputs, offsets 0x60..0x7E */ 2162 for(i = 0; i < 16; i++) 2163 EFX_COPY(FX2(i+16), INP(i)); 2164 #if 0 2165 /* XXX Audigy seems to work correct and does not need this */ 2166 /* sync data (0xc0de), offset 0x7E */ 2167 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1); 2168 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000); 2169 EFX_COPY(FX2(31), GPR(sc->dummy_gpr)); 2170 #endif 2171 } /* mch_rec */ 2172 } 2173 2174 sc->routing_code_end = pc; 2175 2176 /* start DSP */ 2177 if (sc->is_emu10k1) { 2178 emu_wrptr(sc, 0, EMU_DBG, 0); 2179 } else { 2180 emu_wrptr(sc, 0, EMU_A_DBG, 0); 2181 } 2182 } 2183 2184 /* /dev/em10kx */ 2185 static d_open_t emu10kx_open; 2186 static d_close_t emu10kx_close; 2187 static d_read_t emu10kx_read; 2188 2189 static struct cdevsw emu10kx_cdevsw = { 2190 .d_open = emu10kx_open, 2191 .d_close = emu10kx_close, 2192 .d_read = emu10kx_read, 2193 .d_name = "emu10kx", 2194 .d_version = D_VERSION, 2195 }; 2196 2197 2198 static int 2199 emu10kx_open(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused) 2200 { 2201 int error; 2202 struct emu_sc_info *sc; 2203 2204 sc = i_dev->si_drv1; 2205 mtx_lock(&sc->emu10kx_lock); 2206 if (sc->emu10kx_isopen) { 2207 mtx_unlock(&sc->emu10kx_lock); 2208 return (EBUSY); 2209 } 2210 sc->emu10kx_isopen = 1; 2211 mtx_unlock(&sc->emu10kx_lock); 2212 if (sbuf_new(&sc->emu10kx_sbuf, NULL, 4096, 0) == NULL) { 2213 error = ENXIO; 2214 goto out; 2215 } 2216 sc->emu10kx_bufptr = 0; 2217 error = (emu10kx_prepare(sc, &sc->emu10kx_sbuf) > 0) ? 0 : ENOMEM; 2218 out: 2219 if (error) { 2220 mtx_lock(&sc->emu10kx_lock); 2221 sc->emu10kx_isopen = 0; 2222 mtx_unlock(&sc->emu10kx_lock); 2223 } 2224 return (error); 2225 } 2226 2227 static int 2228 emu10kx_close(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused) 2229 { 2230 struct emu_sc_info *sc; 2231 2232 sc = i_dev->si_drv1; 2233 2234 mtx_lock(&sc->emu10kx_lock); 2235 if (!(sc->emu10kx_isopen)) { 2236 mtx_unlock(&sc->emu10kx_lock); 2237 return (EBADF); 2238 } 2239 sbuf_delete(&sc->emu10kx_sbuf); 2240 sc->emu10kx_isopen = 0; 2241 mtx_unlock(&sc->emu10kx_lock); 2242 2243 return (0); 2244 } 2245 2246 static int 2247 emu10kx_read(struct cdev *i_dev, struct uio *buf, int flag __unused) 2248 { 2249 int l, err; 2250 struct emu_sc_info *sc; 2251 2252 sc = i_dev->si_drv1; 2253 mtx_lock(&sc->emu10kx_lock); 2254 if (!(sc->emu10kx_isopen)) { 2255 mtx_unlock(&sc->emu10kx_lock); 2256 return (EBADF); 2257 } 2258 mtx_unlock(&sc->emu10kx_lock); 2259 2260 l = min(buf->uio_resid, sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr); 2261 err = (l > 0) ? uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : 0; 2262 sc->emu10kx_bufptr += l; 2263 2264 return (err); 2265 } 2266 2267 static int 2268 emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s) 2269 { 2270 int i; 2271 2272 sbuf_printf(s, "FreeBSD EMU10Kx Audio Driver\n"); 2273 sbuf_printf(s, "\nHardware resource usage:\n"); 2274 sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", sc->rm->num_used, sc->rm->num_gprs); 2275 sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", sc->routing_code_end, sc->code_size); 2276 sbuf_printf(s, "Card supports"); 2277 if (sc->has_ac97) { 2278 sbuf_printf(s, " AC97 codec"); 2279 } else { 2280 sbuf_printf(s, " NO AC97 codec"); 2281 } 2282 if (sc->has_51) { 2283 if (sc->has_71) 2284 sbuf_printf(s, " and 7.1 output"); 2285 else 2286 sbuf_printf(s, " and 5.1 output"); 2287 } 2288 if (sc->is_emu10k1) 2289 sbuf_printf(s, ", SBLive! DSP code"); 2290 if (sc->is_emu10k2) 2291 sbuf_printf(s, ", Audigy DSP code"); 2292 if (sc->is_ca0102) 2293 sbuf_printf(s, ", Audigy DSP code with Audigy2 hacks"); 2294 if (sc->is_ca0108) 2295 sbuf_printf(s, ", Audigy DSP code with Audigy2Value hacks"); 2296 sbuf_printf(s, "\n"); 2297 if (sc->broken_digital) 2298 sbuf_printf(s, "Digital mode unsupported\n"); 2299 sbuf_printf(s, "\nInstalled devices:\n"); 2300 for (i = 0; i < RT_COUNT; i++) 2301 if (sc->pcm[i] != NULL) 2302 if (device_is_attached(sc->pcm[i])) { 2303 sbuf_printf(s, "%s on %s\n", device_get_desc(sc->pcm[i]), device_get_nameunit(sc->pcm[i])); 2304 } 2305 if (sc->midi[0] != NULL) 2306 if (device_is_attached(sc->midi[0])) { 2307 sbuf_printf(s, "EMU10Kx MIDI Interface\n"); 2308 sbuf_printf(s, "\tOn-card connector on %s\n", device_get_nameunit(sc->midi[0])); 2309 } 2310 if (sc->midi[1] != NULL) 2311 if (device_is_attached(sc->midi[1])) { 2312 sbuf_printf(s, "\tOn-Drive connector on %s\n", device_get_nameunit(sc->midi[1])); 2313 } 2314 if (sc->midi[0] != NULL) 2315 if (device_is_attached(sc->midi[0])) { 2316 sbuf_printf(s, "\tIR receiver MIDI events %s\n", sc->enable_ir ? "enabled" : "disabled"); 2317 } 2318 sbuf_printf(s, "Card is in %s mode\n", (sc->mode == MODE_ANALOG) ? "analog" : "digital"); 2319 2320 sbuf_finish(s); 2321 return (sbuf_len(s)); 2322 } 2323 2324 /* INIT & UNINIT */ 2325 static int 2326 emu10kx_dev_init(struct emu_sc_info *sc) 2327 { 2328 int unit; 2329 2330 mtx_init(&sc->emu10kx_lock, device_get_nameunit(sc->dev), "kxdevlock", 0); 2331 unit = device_get_unit(sc->dev); 2332 2333 sc->cdev = make_dev(&emu10kx_cdevsw, PCMMINOR(unit), UID_ROOT, GID_WHEEL, 0640, "emu10kx%d", unit); 2334 if (sc->cdev != NULL) { 2335 sc->cdev->si_drv1 = sc; 2336 return (0); 2337 } 2338 return (ENXIO); 2339 } 2340 2341 static int 2342 emu10kx_dev_uninit(struct emu_sc_info *sc) 2343 { 2344 mtx_lock(&sc->emu10kx_lock); 2345 if (sc->emu10kx_isopen) { 2346 mtx_unlock(&sc->emu10kx_lock); 2347 return (EBUSY); 2348 } 2349 if (sc->cdev) 2350 destroy_dev(sc->cdev); 2351 sc->cdev = NULL; 2352 2353 mtx_destroy(&sc->emu10kx_lock); 2354 return (0); 2355 } 2356 2357 /* resource manager */ 2358 int 2359 emu_rm_init(struct emu_sc_info *sc) 2360 { 2361 int i; 2362 int maxcount; 2363 struct emu_rm *rm; 2364 2365 rm = malloc(sizeof(struct emu_rm), M_DEVBUF, M_NOWAIT | M_ZERO); 2366 if (rm == NULL) { 2367 return (ENOMEM); 2368 } 2369 sc->rm = rm; 2370 rm->card = sc; 2371 maxcount = sc->num_gprs; 2372 rm->num_used = 0; 2373 mtx_init(&(rm->gpr_lock), device_get_nameunit(sc->dev), "gpr alloc", MTX_DEF); 2374 rm->num_gprs = (maxcount < EMU_MAX_GPR ? maxcount : EMU_MAX_GPR); 2375 for (i = 0; i < rm->num_gprs; i++) 2376 rm->allocmap[i] = 0; 2377 /* pre-allocate gpr[0] */ 2378 rm->allocmap[0] = 1; 2379 rm->last_free_gpr = 1; 2380 2381 return (0); 2382 } 2383 2384 int 2385 emu_rm_uninit(struct emu_sc_info *sc) 2386 { 2387 int i; 2388 2389 if (sc->dbg_level > 1) { 2390 mtx_lock(&(sc->rm->gpr_lock)); 2391 for (i = 1; i < sc->rm->last_free_gpr; i++) 2392 if (sc->rm->allocmap[i] > 0) 2393 device_printf(sc->dev, "rm: gpr %d not free before uninit\n", i); 2394 mtx_unlock(&(sc->rm->gpr_lock)); 2395 } 2396 2397 mtx_destroy(&(sc->rm->gpr_lock)); 2398 free(sc->rm, M_DEVBUF); 2399 return (0); 2400 } 2401 2402 static int 2403 emu_rm_gpr_alloc(struct emu_rm *rm, int count) 2404 { 2405 int i, j; 2406 int allocated_gpr; 2407 2408 allocated_gpr = rm->num_gprs; 2409 /* try fast way first */ 2410 mtx_lock(&(rm->gpr_lock)); 2411 if (rm->last_free_gpr + count <= rm->num_gprs) { 2412 allocated_gpr = rm->last_free_gpr; 2413 rm->last_free_gpr += count; 2414 rm->allocmap[allocated_gpr] = count; 2415 for (i = 1; i < count; i++) 2416 rm->allocmap[allocated_gpr + i] = -(count - i); 2417 } else { 2418 /* longer */ 2419 i = 0; 2420 allocated_gpr = rm->num_gprs; 2421 while (i < rm->last_free_gpr - count) { 2422 if (rm->allocmap[i] > 0) { 2423 i += rm->allocmap[i]; 2424 } else { 2425 allocated_gpr = i; 2426 for (j = 1; j < count; j++) { 2427 if (rm->allocmap[i + j] != 0) 2428 allocated_gpr = rm->num_gprs; 2429 } 2430 if (allocated_gpr == i) 2431 break; 2432 } 2433 } 2434 if (allocated_gpr + count < rm->last_free_gpr) { 2435 rm->allocmap[allocated_gpr] = count; 2436 for (i = 1; i < count; i++) 2437 rm->allocmap[allocated_gpr + i] = -(count - i); 2438 2439 } 2440 } 2441 if (allocated_gpr == rm->num_gprs) 2442 allocated_gpr = (-1); 2443 if (allocated_gpr >= 0) 2444 rm->num_used += count; 2445 mtx_unlock(&(rm->gpr_lock)); 2446 return (allocated_gpr); 2447 } 2448 2449 /* mixer */ 2450 void 2451 emumix_set_mode(struct emu_sc_info *sc, int mode) 2452 { 2453 uint32_t a_iocfg; 2454 uint32_t hcfg; 2455 uint32_t tmp; 2456 2457 switch (mode) { 2458 case MODE_DIGITAL: 2459 /* FALLTHROUGH */ 2460 case MODE_ANALOG: 2461 break; 2462 default: 2463 return; 2464 } 2465 2466 hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE; 2467 a_iocfg = 0; 2468 2469 if (sc->rev >= 6) 2470 hcfg |= EMU_HCFG_JOYENABLE; 2471 2472 if (sc->is_emu10k1) 2473 hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK; 2474 else 2475 hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE; 2476 2477 2478 if (mode == MODE_DIGITAL) { 2479 if (sc->broken_digital) { 2480 device_printf(sc->dev, "Digital mode is reported as broken on this card.\n"); 2481 } 2482 a_iocfg |= EMU_A_IOCFG_GPOUT1; 2483 hcfg |= EMU_HCFG_GPOUT0; 2484 } 2485 2486 if (mode == MODE_ANALOG) 2487 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM); 2488 2489 if (sc->is_emu10k2) 2490 a_iocfg |= 0x80; /* XXX */ 2491 2492 if ((sc->is_ca0102) || (sc->is_ca0108)) 2493 /* 2494 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things 2495 * on diffrerent cards. 2496 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108) 2497 * "disable analog outs" on Audigy (emu10k2) 2498 */ 2499 a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG; 2500 2501 if (sc->is_ca0108) 2502 a_iocfg |= 0x20; /* XXX */ 2503 2504 /* Mute analog center & subwoofer before mode change */ 2505 if (mode == MODE_DIGITAL) 2506 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1); 2507 2508 emu_wr(sc, EMU_HCFG, hcfg, 4); 2509 2510 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2511 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2512 tmp = a_iocfg; 2513 emu_wr(sc, EMU_A_IOCFG, tmp, 2); 2514 } 2515 2516 /* Unmute if we have changed mode to analog. */ 2517 2518 if (mode == MODE_ANALOG) 2519 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 0); 2520 2521 sc->mode = mode; 2522 } 2523 2524 void 2525 emumix_set_spdif_mode(struct emu_sc_info *sc, int mode) 2526 { 2527 uint32_t spcs; 2528 2529 switch (mode) { 2530 case SPDIF_MODE_PCM: 2531 break; 2532 case SPDIF_MODE_AC3: 2533 device_printf(sc->dev, "AC3 mode does not work and disabled\n"); 2534 return; 2535 default: 2536 return; 2537 } 2538 2539 spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 | 2540 EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC | 2541 EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 2542 EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT; 2543 2544 mode = SPDIF_MODE_PCM; 2545 2546 emu_wrptr(sc, 0, EMU_SPCS0, spcs); 2547 emu_wrptr(sc, 0, EMU_SPCS1, spcs); 2548 emu_wrptr(sc, 0, EMU_SPCS2, spcs); 2549 } 2550 2551 #define L2L_POINTS 10 2552 2553 static int l2l_df[L2L_POINTS] = { 2554 0x572C5CA, /* 100..90 */ 2555 0x3211625, /* 90..80 */ 2556 0x1CC1A76, /* 80..70 */ 2557 0x108428F, /* 70..60 */ 2558 0x097C70A, /* 60..50 */ 2559 0x0572C5C, /* 50..40 */ 2560 0x0321162, /* 40..30 */ 2561 0x01CC1A7, /* 30..20 */ 2562 0x0108428, /* 20..10 */ 2563 0x016493D /* 10..0 */ 2564 }; 2565 2566 static int l2l_f[L2L_POINTS] = { 2567 0x4984461A, /* 90 */ 2568 0x2A3968A7, /* 80 */ 2569 0x18406003, /* 70 */ 2570 0x0DEDC66D, /* 60 */ 2571 0x07FFFFFF, /* 50 */ 2572 0x04984461, /* 40 */ 2573 0x02A3968A, /* 30 */ 2574 0x01840600, /* 20 */ 2575 0x00DEDC66, /* 10 */ 2576 0x00000000 /* 0 */ 2577 }; 2578 2579 2580 static int 2581 log2lin(int log_t) 2582 { 2583 int lin_t; 2584 int idx, lin; 2585 2586 if (log_t <= 0) { 2587 lin_t = 0x00000000; 2588 return (lin_t); 2589 } 2590 2591 if (log_t >= 100) { 2592 lin_t = 0x7fffffff; 2593 return (lin_t); 2594 } 2595 2596 idx = (L2L_POINTS - 1) - log_t / (L2L_POINTS); 2597 lin = log_t % (L2L_POINTS); 2598 lin_t = l2l_df[idx] * lin + l2l_f[idx]; 2599 return (lin_t); 2600 } 2601 2602 2603 void 2604 emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol) 2605 { 2606 2607 vol = log2lin(vol); 2608 emumix_set_gpr(sc, gpr, vol); 2609 } 2610 2611 void 2612 emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val) 2613 { 2614 if (sc->dbg_level > 1) 2615 if (gpr == 0) { 2616 device_printf(sc->dev, "Zero gpr write access\n"); 2617 #ifdef KDB 2618 kdb_backtrace(); 2619 #endif 2620 return; 2621 } 2622 2623 emu_wrptr(sc, 0, GPR(gpr), val); 2624 } 2625 2626 void 2627 emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume) 2628 { 2629 2630 RANGE(volume, 0, 100); 2631 if (mixer_idx < NUM_MIXERS) { 2632 sc->mixer_volcache[mixer_idx] = volume; 2633 emumix_set_fxvol(sc, sc->mixer_gpr[mixer_idx], volume); 2634 } 2635 } 2636 2637 int 2638 emumix_get_volume(struct emu_sc_info *sc, int mixer_idx) 2639 { 2640 if ((mixer_idx < NUM_MIXERS) && (mixer_idx >= 0)) 2641 return (sc->mixer_volcache[mixer_idx]); 2642 return (-1); 2643 } 2644 2645 /* Init CardBus part */ 2646 static int 2647 emu_cardbus_init(struct emu_sc_info *sc) 2648 { 2649 2650 /* 2651 * XXX May not need this if we have EMU_IPR3 handler. 2652 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments? 2653 * Looks much like "(data << 16) | register". 2654 */ 2655 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000); 2656 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0001); 2657 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x005f); 2658 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x007f); 2659 2660 emu_wr_cbptr(sc, (0x0090 << 16) | 0x007f); 2661 2662 return (0); 2663 } 2664 2665 /* Probe and attach the card */ 2666 static int 2667 emu_init(struct emu_sc_info *sc) 2668 { 2669 uint32_t ch, tmp; 2670 uint32_t spdif_sr; 2671 uint32_t ac97slot; 2672 int def_mode; 2673 int i; 2674 2675 /* disable audio and lock cache */ 2676 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4); 2677 2678 /* reset recording buffers */ 2679 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); 2680 emu_wrptr(sc, 0, EMU_MICBA, 0); 2681 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE); 2682 emu_wrptr(sc, 0, EMU_FXBA, 0); 2683 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE); 2684 emu_wrptr(sc, 0, EMU_ADCBA, 0); 2685 2686 /* disable channel interrupt */ 2687 emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4); 2688 emu_wrptr(sc, 0, EMU_CLIEL, 0); 2689 emu_wrptr(sc, 0, EMU_CLIEH, 0); 2690 emu_wrptr(sc, 0, EMU_SOLEL, 0); 2691 emu_wrptr(sc, 0, EMU_SOLEH, 0); 2692 2693 /* disable P16V and S/PDIF interrupts */ 2694 if ((sc->is_ca0102) || (sc->is_ca0108)) 2695 emu_wr(sc, EMU_INTE2, 0, 4); 2696 2697 if (sc->is_ca0102) 2698 emu_wr(sc, EMU_INTE3, 0, 4); 2699 2700 /* init phys inputs and outputs */ 2701 ac97slot = 0; 2702 if (sc->has_51) 2703 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE; 2704 if (sc->has_71) 2705 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT; 2706 if (sc->is_emu10k2) 2707 ac97slot |= 0x40; 2708 emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot); 2709 2710 if (sc->is_emu10k2) /* XXX for later cards? */ 2711 emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00); /* What will happen if 2712 * we write 1 here? */ 2713 2714 if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev), 2715 /* alignment */ 2, /* boundary */ 0, 2716 /* lowaddr */ (1U << 31) - 1, /* can only access 0-2gb */ 2717 /* highaddr */ BUS_SPACE_MAXADDR, 2718 /* filter */ NULL, /* filterarg */ NULL, 2719 /* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, /* maxsegz */ 0x3ffff, 2720 /* flags */ 0, /* lockfunc */ busdma_lock_mutex, 2721 /* lockarg */ &Giant, &(sc->mem.dmat)) != 0) { 2722 device_printf(sc->dev, "unable to create dma tag\n"); 2723 bus_dma_tag_destroy(sc->mem.dmat); 2724 return (ENOMEM); 2725 } 2726 2727 sc->mem.card = sc; 2728 SLIST_INIT(&sc->mem.blocks); 2729 sc->mem.ptb_pages = emu_malloc(&sc->mem, EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr, &sc->mem.ptb_map); 2730 if (sc->mem.ptb_pages == NULL) 2731 return (ENOMEM); 2732 2733 sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, &sc->mem.silent_page_addr, &sc->mem.silent_map); 2734 if (sc->mem.silent_page == NULL) { 2735 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map); 2736 return (ENOMEM); 2737 } 2738 /* Clear page with silence & setup all pointers to this page */ 2739 bzero(sc->mem.silent_page, EMUPAGESIZE); 2740 tmp = (uint32_t) (sc->mem.silent_page_addr) << 1; 2741 for (i = 0; i < EMU_MAXPAGES; i++) 2742 sc->mem.ptb_pages[i] = tmp | i; 2743 2744 for (ch = 0; ch < NUM_G; ch++) { 2745 emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK); 2746 emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK); 2747 } 2748 emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr)); 2749 emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */ 2750 emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */ 2751 2752 /* init envelope engine */ 2753 for (ch = 0; ch < NUM_G; ch++) { 2754 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0); 2755 emu_wrptr(sc, ch, EMU_CHAN_IP, 0); 2756 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff); 2757 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff); 2758 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0); 2759 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0); 2760 emu_wrptr(sc, ch, EMU_CHAN_CCR, 0); 2761 2762 emu_wrptr(sc, ch, EMU_CHAN_PSST, 0); 2763 emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10); 2764 emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0); 2765 emu_wrptr(sc, ch, EMU_CHAN_Z1, 0); 2766 emu_wrptr(sc, ch, EMU_CHAN_Z2, 0); 2767 emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000); 2768 2769 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0); 2770 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0); 2771 emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff); 2772 emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0); 2773 emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0); 2774 emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */ 2775 emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */ 2776 emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0); 2777 2778 /*** these are last so OFF prevents writing ***/ 2779 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0); 2780 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0); 2781 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0); 2782 emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0); 2783 emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0); 2784 2785 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2786 emu_wrptr(sc, ch, 0x4c, 0x0); 2787 emu_wrptr(sc, ch, 0x4d, 0x0); 2788 emu_wrptr(sc, ch, 0x4e, 0x0); 2789 emu_wrptr(sc, ch, 0x4f, 0x0); 2790 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x3f3f3f3f); 2791 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f); 2792 emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0x0); 2793 } 2794 } 2795 2796 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM); 2797 2798 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) 2799 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, EMU_A_SPDIF_48000); 2800 2801 /* 2802 * CAxxxx cards needs additional setup: 2803 * 1. Set I2S capture sample rate to 96000 2804 * 2. Disable P16v / P17v proceesing 2805 * 3. Allow EMU10K DSP inputs 2806 */ 2807 if ((sc->is_ca0102) || (sc->is_ca0108)) { 2808 2809 spdif_sr = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE); 2810 spdif_sr &= 0xfffff1ff; 2811 spdif_sr |= EMU_A_I2S_CAPTURE_96000; 2812 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, spdif_sr); 2813 2814 /* Disable P16v processing */ 2815 emu_wr_p16vptr(sc, 0, EMU_A2_SRCSel, 0x14); 2816 2817 /* Setup P16v/P17v sound routing */ 2818 if (sc->is_ca0102) 2819 emu_wr_p16vptr(sc, 0, EMU_A2_SRCMULTI_ENABLE, 0xFF00FF00); 2820 else { 2821 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_I2S_ENABLE, 0xFF000000); 2822 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_SPDIF_ENABLE, 0xFF000000); 2823 2824 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2825 emu_wr(sc, EMU_A_IOCFG, tmp & ~0x8, 2); 2826 } 2827 } 2828 emu_initefx(sc); 2829 2830 def_mode = MODE_ANALOG; 2831 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) 2832 def_mode = MODE_DIGITAL; 2833 if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && (sc->broken_digital)) { 2834 device_printf(sc->dev, "Audigy card initialized in analog mode.\n"); 2835 def_mode = MODE_ANALOG; 2836 } 2837 emumix_set_mode(sc, def_mode); 2838 2839 if (bootverbose) { 2840 tmp = emu_rd(sc, EMU_HCFG, 4); 2841 device_printf(sc->dev, "Card Configuration ( 0x%08x )\n", tmp); 2842 device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n", 2843 (tmp & 0x80000000 ? "[Legacy MPIC] " : ""), 2844 (tmp & 0x40000000 ? "[0x40] " : ""), 2845 (tmp & 0x20000000 ? "[0x20] " : ""), 2846 (tmp & 0x10000000 ? "[0x10] " : ""), 2847 (tmp & 0x08000000 ? "[0x08] " : ""), 2848 (tmp & 0x04000000 ? "[0x04] " : ""), 2849 (tmp & 0x02000000 ? "[0x02] " : ""), 2850 (tmp & 0x01000000 ? "[0x01]" : " ")); 2851 device_printf(sc->dev, "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n", 2852 (tmp & 0x00800000 ? "[0x80] " : ""), 2853 (tmp & 0x00400000 ? "[0x40] " : ""), 2854 (tmp & 0x00200000 ? "[Legacy INT] " : ""), 2855 (tmp & 0x00100000 ? "[0x10] " : ""), 2856 (tmp & 0x00080000 ? "[0x08] " : ""), 2857 (tmp & 0x00040000 ? "[Codec4] " : ""), 2858 (tmp & 0x00020000 ? "[Codec2] " : ""), 2859 (tmp & 0x00010000 ? "[I2S Codec]" : " ")); 2860 device_printf(sc->dev, "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n", 2861 (tmp & 0x00008000 ? "[0x80] " : ""), 2862 (tmp & 0x00004000 ? "[GPINPUT0] " : ""), 2863 (tmp & 0x00002000 ? "[GPINPUT1] " : ""), 2864 (tmp & 0x00001000 ? "[GPOUT0] " : ""), 2865 (tmp & 0x00000800 ? "[GPOUT1] " : ""), 2866 (tmp & 0x00000400 ? "[GPOUT2] " : ""), 2867 (tmp & 0x00000200 ? "[Joystick] " : ""), 2868 (tmp & 0x00000100 ? "[0x01]" : " ")); 2869 device_printf(sc->dev, "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n", 2870 (tmp & 0x00000080 ? "[0x80] " : ""), 2871 (tmp & 0x00000040 ? "[0x40] " : ""), 2872 (tmp & 0x00000020 ? "[0x20] " : ""), 2873 (tmp & 0x00000010 ? "[AUTOMUTE] " : ""), 2874 (tmp & 0x00000008 ? "[LOCKSOUNDCACHE] " : ""), 2875 (tmp & 0x00000004 ? "[LOCKTANKCACHE] " : ""), 2876 (tmp & 0x00000002 ? "[MUTEBUTTONENABLE] " : ""), 2877 (tmp & 0x00000001 ? "[AUDIOENABLE]" : " ")); 2878 2879 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2880 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2881 device_printf(sc->dev, "Audigy Card Configuration ( 0x%04x )\n", tmp); 2882 device_printf(sc->dev, "Audigy Card Configuration ( & 0xff00 )"); 2883 printf(" : %s%s%s%s%s%s%s%s\n", 2884 (tmp & 0x8000 ? "[Rear Speakers] " : ""), 2885 (tmp & 0x4000 ? "[Front Speakers] " : ""), 2886 (tmp & 0x2000 ? "[0x20] " : ""), 2887 (tmp & 0x1000 ? "[0x10] " : ""), 2888 (tmp & 0x0800 ? "[0x08] " : ""), 2889 (tmp & 0x0400 ? "[0x04] " : ""), 2890 (tmp & 0x0200 ? "[0x02] " : ""), 2891 (tmp & 0x0100 ? "[AudigyDrive Phones]" : " ")); 2892 device_printf(sc->dev, "Audigy Card Configuration ( & 0x00ff )"); 2893 printf(" : %s%s%s%s%s%s%s%s\n", 2894 (tmp & 0x0080 ? "[0x80] " : ""), 2895 (tmp & 0x0040 ? "[Mute AnalogOut] " : ""), 2896 (tmp & 0x0020 ? "[0x20] " : ""), 2897 (tmp & 0x0010 ? "[0x10] " : ""), 2898 (tmp & 0x0008 ? "[0x08] " : ""), 2899 (tmp & 0x0004 ? "[GPOUT0] " : ""), 2900 (tmp & 0x0002 ? "[GPOUT1] " : ""), 2901 (tmp & 0x0001 ? "[GPOUT2]" : " ")); 2902 } /* is_emu10k2 or ca* */ 2903 } /* bootverbose */ 2904 return (0); 2905 } 2906 2907 static int 2908 emu_uninit(struct emu_sc_info *sc) 2909 { 2910 uint32_t ch; 2911 struct emu_memblk *blk; 2912 2913 emu_wr(sc, EMU_INTE, 0, 4); 2914 for (ch = 0; ch < NUM_G; ch++) 2915 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0); 2916 for (ch = 0; ch < NUM_G; ch++) { 2917 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0); 2918 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0); 2919 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0); 2920 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0); 2921 } 2922 2923 /* disable audio and lock cache */ 2924 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4); 2925 2926 emu_wrptr(sc, 0, EMU_PTB, 0); 2927 /* reset recording buffers */ 2928 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); 2929 emu_wrptr(sc, 0, EMU_MICBA, 0); 2930 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE); 2931 emu_wrptr(sc, 0, EMU_FXBA, 0); 2932 emu_wrptr(sc, 0, EMU_FXWC, 0); 2933 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE); 2934 emu_wrptr(sc, 0, EMU_ADCBA, 0); 2935 emu_wrptr(sc, 0, EMU_TCB, 0); 2936 emu_wrptr(sc, 0, EMU_TCBS, 0); 2937 2938 /* disable channel interrupt */ 2939 emu_wrptr(sc, 0, EMU_CLIEL, 0); 2940 emu_wrptr(sc, 0, EMU_CLIEH, 0); 2941 emu_wrptr(sc, 0, EMU_SOLEL, 0); 2942 emu_wrptr(sc, 0, EMU_SOLEH, 0); 2943 2944 if (!SLIST_EMPTY(&sc->mem.blocks)) 2945 device_printf(sc->dev, "warning: memblock list not empty\n"); 2946 2947 SLIST_FOREACH(blk, &sc->mem.blocks, link) 2948 if (blk != NULL) 2949 device_printf(sc->dev, "lost %d for %s\n", blk->pte_size, blk->owner); 2950 2951 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map); 2952 emu_free(&sc->mem, sc->mem.silent_page, sc->mem.silent_map); 2953 2954 return (0); 2955 } 2956 2957 static int 2958 emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t * result) 2959 { 2960 struct sndcard_func *func = device_get_ivars(dev); 2961 struct emu_sc_info *sc = device_get_softc(bus); 2962 2963 if (func==NULL) 2964 return (ENOMEM); 2965 if (sc == NULL) 2966 return (ENOMEM); 2967 2968 switch (ivar_index) { 2969 case EMU_VAR_FUNC: 2970 *result = func->func; 2971 break; 2972 case EMU_VAR_ROUTE: 2973 if (func->varinfo == NULL) 2974 return (ENOMEM); 2975 *result = ((struct emu_pcminfo *)func->varinfo)->route; 2976 break; 2977 case EMU_VAR_ISEMU10K1: 2978 *result = sc->is_emu10k1; 2979 break; 2980 case EMU_VAR_MCH_DISABLED: 2981 *result = sc->mch_disabled; 2982 break; 2983 case EMU_VAR_MCH_REC: 2984 *result = sc->mch_rec; 2985 break; 2986 default: 2987 return (ENOENT); 2988 } 2989 2990 return (0); 2991 } 2992 2993 static int 2994 emu_write_ivar(device_t bus __unused, device_t dev __unused, 2995 int ivar_index, uintptr_t value __unused) 2996 { 2997 2998 switch (ivar_index) { 2999 case 0: 3000 return (EINVAL); 3001 3002 default: 3003 return (ENOENT); 3004 } 3005 } 3006 3007 static int 3008 emu_pci_probe(device_t dev) 3009 { 3010 struct sbuf *s; 3011 unsigned int thiscard = 0; 3012 uint16_t vendor; 3013 3014 vendor = pci_read_config(dev, PCIR_DEVVENDOR, /* bytes */ 2); 3015 if (vendor != 0x1102) 3016 return (ENXIO); /* Not Creative */ 3017 3018 thiscard = emu_getcard(dev); 3019 if (thiscard == 0) 3020 return (ENXIO); 3021 3022 s = sbuf_new(NULL, NULL, 4096, 0); 3023 if (s == NULL) 3024 return (ENOMEM); 3025 sbuf_printf(s, "Creative %s [%s]", emu_cards[thiscard].desc, emu_cards[thiscard].SBcode); 3026 sbuf_finish(s); 3027 3028 device_set_desc_copy(dev, sbuf_data(s)); 3029 3030 sbuf_delete(s); 3031 3032 return (BUS_PROBE_DEFAULT); 3033 } 3034 3035 3036 static int 3037 emu_pci_attach(device_t dev) 3038 { 3039 struct sndcard_func *func; 3040 struct emu_sc_info *sc; 3041 struct emu_pcminfo *pcminfo; 3042 #if 0 3043 struct emu_midiinfo *midiinfo; 3044 #endif 3045 int i; 3046 int device_flags; 3047 char status[255]; 3048 int error = ENXIO; 3049 int unit; 3050 3051 sc = device_get_softc(dev); 3052 unit = device_get_unit(dev); 3053 3054 /* Get configuration */ 3055 3056 sc->ctx = device_get_sysctl_ctx(dev); 3057 if (sc->ctx == NULL) 3058 goto bad; 3059 sc->root = device_get_sysctl_tree(dev); 3060 if (sc->root == NULL) 3061 goto bad; 3062 3063 if (resource_int_value("emu10kx", unit, "multichannel_disabled", &(sc->mch_disabled))) 3064 RANGE(sc->mch_disabled, 0, 1); 3065 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3066 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3067 OID_AUTO, "multichannel_disabled", CTLFLAG_RD, &(sc->mch_disabled), 0, "Multichannel playback setting"); 3068 3069 if (resource_int_value("emu10kx", unit, "multichannel_recording", &(sc->mch_rec))) 3070 RANGE(sc->mch_rec, 0, 1); 3071 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3072 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3073 OID_AUTO, "multichannel_recording", CTLFLAG_RD, &(sc->mch_rec), 0, "Multichannel recording setting"); 3074 3075 if (resource_int_value("emu10kx", unit, "debug", &(sc->dbg_level))) 3076 RANGE(sc->mch_rec, 0, 2); 3077 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3078 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3079 OID_AUTO, "debug", CTLFLAG_RW, &(sc->dbg_level), 0, "Debug level"); 3080 3081 /* Fill in the softc. */ 3082 mtx_init(&sc->lock, device_get_nameunit(dev), "bridge conf", MTX_DEF); 3083 mtx_init(&sc->rw, device_get_nameunit(dev), "exclusive io", MTX_DEF); 3084 sc->dev = dev; 3085 sc->type = pci_get_devid(dev); 3086 sc->rev = pci_get_revid(dev); 3087 sc->enable_ir = 0; 3088 sc->has_ac97 = 0; 3089 sc->has_51 = 0; 3090 sc->has_71 = 0; 3091 sc->broken_digital = 0; 3092 sc->is_emu10k1 = 0; 3093 sc->is_emu10k2 = 0; 3094 sc->is_ca0102 = 0; 3095 sc->is_ca0108 = 0; 3096 sc->is_cardbus = 0; 3097 3098 device_flags = emu_cards[emu_getcard(dev)].flags; 3099 if (device_flags & HAS_51) 3100 sc->has_51 = 1; 3101 if (device_flags & HAS_71) { 3102 sc->has_51 = 1; 3103 sc->has_71 = 1; 3104 } 3105 if (device_flags & IS_EMU10K1) 3106 sc->is_emu10k1 = 1; 3107 if (device_flags & IS_EMU10K2) 3108 sc->is_emu10k2 = 1; 3109 if (device_flags & IS_CA0102) 3110 sc->is_ca0102 = 1; 3111 if (device_flags & IS_CA0108) 3112 sc->is_ca0108 = 1; 3113 if ((sc->is_emu10k2) && (sc->rev == 4)) { 3114 sc->is_emu10k2 = 0; 3115 sc->is_ca0102 = 1; /* for unknown Audigy 2 cards */ 3116 } 3117 if ((sc->is_ca0102 == 1) || (sc->is_ca0108 == 1)) 3118 if (device_flags & IS_CARDBUS) 3119 sc->is_cardbus = 1; 3120 3121 if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != 1) { 3122 device_printf(sc->dev, "Unable to detect HW chipset\n"); 3123 goto bad; 3124 } 3125 if (device_flags & BROKEN_DIGITAL) 3126 sc->broken_digital = 1; 3127 if (device_flags & HAS_AC97) 3128 sc->has_ac97 = 1; 3129 3130 sc->opcode_shift = 0; 3131 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 3132 sc->opcode_shift = 24; 3133 sc->high_operand_shift = 12; 3134 3135 /* DSP map */ 3136 /* sc->fx_base = 0x0 */ 3137 sc->input_base = 0x40; 3138 /* sc->p16vinput_base = 0x50; */ 3139 sc->output_base = 0x60; 3140 sc->efxc_base = 0x80; 3141 /* sc->output32h_base = 0xa0; */ 3142 /* sc->output32l_base = 0xb0; */ 3143 sc->dsp_zero = 0xc0; 3144 /* 0xe0...0x100 are unknown */ 3145 /* sc->tram_base = 0x200 */ 3146 /* sc->tram_addr_base = 0x300 */ 3147 sc->gpr_base = EMU_A_FXGPREGBASE; 3148 sc->num_gprs = 0x200; 3149 sc->code_base = EMU_A_MICROCODEBASE; 3150 sc->code_size = 0x800 / 2; /* 0x600-0xdff, 2048 words, 3151 * 1024 instructions */ 3152 3153 sc->mchannel_fx = 8; 3154 sc->num_fxbuses = 16; 3155 sc->num_inputs = 8; 3156 sc->num_outputs = 16; 3157 sc->address_mask = EMU_A_PTR_ADDR_MASK; 3158 } 3159 if (sc->is_emu10k1) { 3160 sc->has_51 = 0; /* We don't support 5.1 sound on SB Live! 5.1 */ 3161 sc->opcode_shift = 20; 3162 sc->high_operand_shift = 10; 3163 sc->code_base = EMU_MICROCODEBASE; 3164 sc->code_size = 0x400 / 2; /* 0x400-0x7ff, 1024 words, 3165 * 512 instructions */ 3166 sc->gpr_base = EMU_FXGPREGBASE; 3167 sc->num_gprs = 0x100; 3168 sc->input_base = 0x10; 3169 sc->output_base = 0x20; 3170 /* 3171 * XXX 5.1 Analog outputs are inside efxc address space! 3172 * They use output+0x11/+0x12 (=efxc+1/+2). 3173 * Don't use this efx registers for recording on SB Live! 5.1! 3174 */ 3175 sc->efxc_base = 0x30; 3176 sc->dsp_zero = 0x40; 3177 sc->mchannel_fx = 0; 3178 sc->num_fxbuses = 8; 3179 sc->num_inputs = 8; 3180 sc->num_outputs = 16; 3181 sc->address_mask = EMU_PTR_ADDR_MASK; 3182 } 3183 if (sc->opcode_shift == 0) 3184 goto bad; 3185 3186 pci_enable_busmaster(dev); 3187 3188 i = PCIR_BAR(0); 3189 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE); 3190 if (sc->reg == NULL) { 3191 device_printf(dev, "unable to map register space\n"); 3192 goto bad; 3193 } 3194 sc->st = rman_get_bustag(sc->reg); 3195 sc->sh = rman_get_bushandle(sc->reg); 3196 3197 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 3198 sc->timer[i] = 0; /* disable it */ 3199 3200 i = 0; 3201 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, RF_ACTIVE | RF_SHAREABLE); 3202 if ((sc->irq == NULL) || bus_setup_intr(dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV, 3203 NULL, 3204 emu_intr, sc, &sc->ih)) { 3205 device_printf(dev, "unable to map interrupt\n"); 3206 goto bad; 3207 } 3208 if (emu_rm_init(sc) != 0) { 3209 device_printf(dev, "unable to create resource manager\n"); 3210 goto bad; 3211 } 3212 if (sc->is_cardbus) 3213 if (emu_cardbus_init(sc) != 0) { 3214 device_printf(dev, "unable to initialize CardBus interface\n"); 3215 goto bad; 3216 } 3217 if (emu_init(sc) != 0) { 3218 device_printf(dev, "unable to initialize the card\n"); 3219 goto bad; 3220 } 3221 if (emu10kx_dev_init(sc) != 0) { 3222 device_printf(dev, "unable to create control device\n"); 3223 goto bad; 3224 } 3225 snprintf(status, 255, "rev %d at io 0x%jx irq %jd", sc->rev, rman_get_start(sc->reg), rman_get_start(sc->irq)); 3226 3227 /* Voices */ 3228 for (i = 0; i < NUM_G; i++) { 3229 sc->voice[i].vnum = i; 3230 sc->voice[i].slave = NULL; 3231 sc->voice[i].busy = 0; 3232 sc->voice[i].ismaster = 0; 3233 sc->voice[i].running = 0; 3234 sc->voice[i].b16 = 0; 3235 sc->voice[i].stereo = 0; 3236 sc->voice[i].speed = 0; 3237 sc->voice[i].start = 0; 3238 sc->voice[i].end = 0; 3239 } 3240 3241 /* PCM Audio */ 3242 for (i = 0; i < RT_COUNT; i++) 3243 sc->pcm[i] = NULL; 3244 3245 /* FRONT */ 3246 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3247 if (func == NULL) { 3248 error = ENOMEM; 3249 goto bad; 3250 } 3251 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3252 if (pcminfo == NULL) { 3253 error = ENOMEM; 3254 goto bad; 3255 } 3256 pcminfo->card = sc; 3257 pcminfo->route = RT_FRONT; 3258 3259 func->func = SCF_PCM; 3260 func->varinfo = pcminfo; 3261 sc->pcm[RT_FRONT] = device_add_child(dev, "pcm", -1); 3262 device_set_ivars(sc->pcm[RT_FRONT], func); 3263 3264 if (!(sc->mch_disabled)) { 3265 /* REAR */ 3266 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3267 if (func == NULL) { 3268 error = ENOMEM; 3269 goto bad; 3270 } 3271 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3272 if (pcminfo == NULL) { 3273 error = ENOMEM; 3274 goto bad; 3275 } 3276 pcminfo->card = sc; 3277 pcminfo->route = RT_REAR; 3278 3279 func->func = SCF_PCM; 3280 func->varinfo = pcminfo; 3281 sc->pcm[RT_REAR] = device_add_child(dev, "pcm", -1); 3282 device_set_ivars(sc->pcm[RT_REAR], func); 3283 if (sc->has_51) { 3284 /* CENTER */ 3285 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3286 if (func == NULL) { 3287 error = ENOMEM; 3288 goto bad; 3289 } 3290 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3291 if (pcminfo == NULL) { 3292 error = ENOMEM; 3293 goto bad; 3294 } 3295 pcminfo->card = sc; 3296 pcminfo->route = RT_CENTER; 3297 3298 func->func = SCF_PCM; 3299 func->varinfo = pcminfo; 3300 sc->pcm[RT_CENTER] = device_add_child(dev, "pcm", -1); 3301 device_set_ivars(sc->pcm[RT_CENTER], func); 3302 /* SUB */ 3303 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3304 if (func == NULL) { 3305 error = ENOMEM; 3306 goto bad; 3307 } 3308 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3309 if (pcminfo == NULL) { 3310 error = ENOMEM; 3311 goto bad; 3312 } 3313 pcminfo->card = sc; 3314 pcminfo->route = RT_SUB; 3315 3316 func->func = SCF_PCM; 3317 func->varinfo = pcminfo; 3318 sc->pcm[RT_SUB] = device_add_child(dev, "pcm", -1); 3319 device_set_ivars(sc->pcm[RT_SUB], func); 3320 } 3321 if (sc->has_71) { 3322 /* SIDE */ 3323 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3324 if (func == NULL) { 3325 error = ENOMEM; 3326 goto bad; 3327 } 3328 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3329 if (pcminfo == NULL) { 3330 error = ENOMEM; 3331 goto bad; 3332 } 3333 pcminfo->card = sc; 3334 pcminfo->route = RT_SIDE; 3335 3336 func->func = SCF_PCM; 3337 func->varinfo = pcminfo; 3338 sc->pcm[RT_SIDE] = device_add_child(dev, "pcm", -1); 3339 device_set_ivars(sc->pcm[RT_SIDE], func); 3340 } 3341 } /* mch_disabled */ 3342 3343 if (sc->mch_rec) { 3344 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3345 if (func == NULL) { 3346 error = ENOMEM; 3347 goto bad; 3348 } 3349 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3350 if (pcminfo == NULL) { 3351 error = ENOMEM; 3352 goto bad; 3353 } 3354 pcminfo->card = sc; 3355 pcminfo->route = RT_MCHRECORD; 3356 3357 func->func = SCF_PCM; 3358 func->varinfo = pcminfo; 3359 sc->pcm[RT_MCHRECORD] = device_add_child(dev, "pcm", -1); 3360 device_set_ivars(sc->pcm[RT_MCHRECORD], func); 3361 } /*mch_rec */ 3362 3363 for (i = 0; i < 2; i++) 3364 sc->midi[i] = NULL; 3365 3366 /* MIDI has some memory mangament and (possible) locking problems */ 3367 #if 0 3368 /* Midi Interface 1: Live!, Audigy, Audigy 2 */ 3369 if ((sc->is_emu10k1) || (sc->is_emu10k2) || (sc->is_ca0102)) { 3370 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3371 if (func == NULL) { 3372 error = ENOMEM; 3373 goto bad; 3374 } 3375 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3376 if (midiinfo == NULL) { 3377 error = ENOMEM; 3378 goto bad; 3379 } 3380 midiinfo->card = sc; 3381 if (sc->is_emu10k2 || (sc->is_ca0102)) { 3382 midiinfo->port = EMU_A_MUDATA1; 3383 midiinfo->portnr = 1; 3384 } 3385 if (sc->is_emu10k1) { 3386 midiinfo->port = MUDATA; 3387 midiinfo->portnr = 1; 3388 } 3389 func->func = SCF_MIDI; 3390 func->varinfo = midiinfo; 3391 sc->midi[0] = device_add_child(dev, "midi", -1); 3392 device_set_ivars(sc->midi[0], func); 3393 } 3394 /* Midi Interface 2: Audigy, Audigy 2 (on AudigyDrive) */ 3395 if (sc->is_emu10k2 || (sc->is_ca0102)) { 3396 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3397 if (func == NULL) { 3398 error = ENOMEM; 3399 goto bad; 3400 } 3401 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3402 if (midiinfo == NULL) { 3403 error = ENOMEM; 3404 goto bad; 3405 } 3406 midiinfo->card = sc; 3407 3408 midiinfo->port = EMU_A_MUDATA2; 3409 midiinfo->portnr = 2; 3410 3411 func->func = SCF_MIDI; 3412 func->varinfo = midiinfo; 3413 sc->midi[1] = device_add_child(dev, "midi", -1); 3414 device_set_ivars(sc->midi[1], func); 3415 } 3416 #endif 3417 return (bus_generic_attach(dev)); 3418 3419 bad: 3420 /* XXX can we just call emu_pci_detach here? */ 3421 if (sc->cdev) 3422 emu10kx_dev_uninit(sc); 3423 if (sc->rm != NULL) 3424 emu_rm_uninit(sc); 3425 if (sc->reg) 3426 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 3427 if (sc->ih) 3428 bus_teardown_intr(dev, sc->irq, sc->ih); 3429 if (sc->irq) 3430 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 3431 mtx_destroy(&sc->rw); 3432 mtx_destroy(&sc->lock); 3433 return (error); 3434 } 3435 3436 static int 3437 emu_pci_detach(device_t dev) 3438 { 3439 struct emu_sc_info *sc; 3440 struct sndcard_func *func; 3441 int devcount, i; 3442 device_t *childlist; 3443 int r = 0; 3444 3445 sc = device_get_softc(dev); 3446 3447 for (i = 0; i < RT_COUNT; i++) { 3448 if (sc->pcm[i] != NULL) { 3449 func = device_get_ivars(sc->pcm[i]); 3450 if (func != NULL && func->func == SCF_PCM) { 3451 device_set_ivars(sc->pcm[i], NULL); 3452 free(func->varinfo, M_DEVBUF); 3453 free(func, M_DEVBUF); 3454 } 3455 r = device_delete_child(dev, sc->pcm[i]); 3456 if (r) return (r); 3457 } 3458 } 3459 3460 if (sc->midi[0] != NULL) { 3461 func = device_get_ivars(sc->midi[0]); 3462 if (func != NULL && func->func == SCF_MIDI) { 3463 device_set_ivars(sc->midi[0], NULL); 3464 free(func->varinfo, M_DEVBUF); 3465 free(func, M_DEVBUF); 3466 } 3467 r = device_delete_child(dev, sc->midi[0]); 3468 if (r) return (r); 3469 } 3470 3471 if (sc->midi[1] != NULL) { 3472 func = device_get_ivars(sc->midi[1]); 3473 if (func != NULL && func->func == SCF_MIDI) { 3474 device_set_ivars(sc->midi[1], NULL); 3475 free(func->varinfo, M_DEVBUF); 3476 free(func, M_DEVBUF); 3477 } 3478 r = device_delete_child(dev, sc->midi[1]); 3479 if (r) return (r); 3480 } 3481 3482 if (device_get_children(dev, &childlist, &devcount) == 0) 3483 for (i = 0; i < devcount - 1; i++) { 3484 device_printf(dev, "removing stale child %d (unit %d)\n", i, device_get_unit(childlist[i])); 3485 func = device_get_ivars(childlist[i]); 3486 if (func != NULL && (func->func == SCF_MIDI || func->func == SCF_PCM)) { 3487 device_set_ivars(childlist[i], NULL); 3488 free(func->varinfo, M_DEVBUF); 3489 free(func, M_DEVBUF); 3490 } 3491 device_delete_child(dev, childlist[i]); 3492 } 3493 if (childlist != NULL) 3494 free(childlist, M_TEMP); 3495 3496 r = emu10kx_dev_uninit(sc); 3497 if (r) 3498 return (r); 3499 3500 /* shutdown chip */ 3501 emu_uninit(sc); 3502 emu_rm_uninit(sc); 3503 3504 if (sc->mem.dmat) 3505 bus_dma_tag_destroy(sc->mem.dmat); 3506 3507 if (sc->reg) 3508 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 3509 bus_teardown_intr(dev, sc->irq, sc->ih); 3510 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 3511 mtx_destroy(&sc->rw); 3512 mtx_destroy(&sc->lock); 3513 3514 return (bus_generic_detach(dev)); 3515 } 3516 /* add suspend, resume */ 3517 static device_method_t emu_methods[] = { 3518 /* Device interface */ 3519 DEVMETHOD(device_probe, emu_pci_probe), 3520 DEVMETHOD(device_attach, emu_pci_attach), 3521 DEVMETHOD(device_detach, emu_pci_detach), 3522 /* Bus methods */ 3523 DEVMETHOD(bus_read_ivar, emu_read_ivar), 3524 DEVMETHOD(bus_write_ivar, emu_write_ivar), 3525 3526 DEVMETHOD_END 3527 }; 3528 3529 3530 static driver_t emu_driver = { 3531 "emu10kx", 3532 emu_methods, 3533 sizeof(struct emu_sc_info), 3534 NULL, 3535 0, 3536 NULL 3537 }; 3538 3539 static int 3540 emu_modevent(module_t mod __unused, int cmd, void *data __unused) 3541 { 3542 int err = 0; 3543 3544 switch (cmd) { 3545 case MOD_LOAD: 3546 break; /* Success */ 3547 3548 case MOD_UNLOAD: 3549 case MOD_SHUTDOWN: 3550 3551 /* XXX Should we check state of pcm & midi subdevices here? */ 3552 3553 break; /* Success */ 3554 3555 default: 3556 err = EINVAL; 3557 break; 3558 } 3559 3560 return (err); 3561 3562 } 3563 3564 static devclass_t emu_devclass; 3565 3566 DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_devclass, emu_modevent, NULL); 3567 MODULE_VERSION(snd_emu10kx, SND_EMU10KX_PREFVER); 3568