xref: /freebsd/sys/dev/sound/pci/neomagic.c (revision 39beb93c)
1 /*-
2  * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
3  * All rights reserved.
4  *
5  * Derived from the public domain Linux driver
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <dev/sound/pcm/sound.h>
30 #include <dev/sound/pcm/ac97.h>
31 #include <dev/sound/pci/neomagic.h>
32 #include <dev/sound/pci/neomagic-coeff.h>
33 
34 #include <dev/pci/pcireg.h>
35 #include <dev/pci/pcivar.h>
36 
37 SND_DECLARE_FILE("$FreeBSD$");
38 
39 /* -------------------------------------------------------------------- */
40 
41 #define	NM_BUFFSIZE	16384
42 
43 #define NM256AV_PCI_ID 	0x800510c8
44 #define NM256ZX_PCI_ID 	0x800610c8
45 
46 struct sc_info;
47 
48 /* channel registers */
49 struct sc_chinfo {
50 	int active, spd, dir, fmt;
51 	u_int32_t blksize, wmark;
52 	struct snd_dbuf *buffer;
53 	struct pcm_channel *channel;
54 	struct sc_info *parent;
55 };
56 
57 /* device private data */
58 struct sc_info {
59 	device_t	dev;
60 	u_int32_t 	type;
61 
62 	struct resource *reg, *irq, *buf;
63 	int		regid, irqid, bufid;
64 	void		*ih;
65 
66 	u_int32_t 	ac97_base, ac97_status, ac97_busy;
67 	u_int32_t	buftop, pbuf, rbuf, cbuf, acbuf;
68 	u_int32_t	playint, recint, misc1int, misc2int;
69 	u_int32_t	irsz, badintr;
70 
71 	struct sc_chinfo pch, rch;
72 };
73 
74 /* -------------------------------------------------------------------- */
75 
76 /*
77  * prototypes
78  */
79 
80 /* stuff */
81 static int 	 nm_loadcoeff(struct sc_info *sc, int dir, int num);
82 static int	 nm_setch(struct sc_chinfo *ch);
83 static int       nm_init(struct sc_info *);
84 static void      nm_intr(void *);
85 
86 /* talk to the card */
87 static u_int32_t nm_rd(struct sc_info *, int, int);
88 static void 	 nm_wr(struct sc_info *, int, u_int32_t, int);
89 static u_int32_t nm_rdbuf(struct sc_info *, int, int);
90 static void 	 nm_wrbuf(struct sc_info *, int, u_int32_t, int);
91 
92 static u_int32_t badcards[] = {
93 	0x0007103c,
94 	0x008f1028,
95 	0x00dd1014,
96 	0x8005110a,
97 };
98 #define NUM_BADCARDS (sizeof(badcards) / sizeof(u_int32_t))
99 
100 /* The actual rates supported by the card. */
101 static int samplerates[9] = {
102 	8000,
103 	11025,
104 	16000,
105 	22050,
106 	24000,
107 	32000,
108 	44100,
109 	48000,
110 	99999999
111 };
112 
113 /* -------------------------------------------------------------------- */
114 
115 static u_int32_t nm_fmt[] = {
116 	AFMT_U8,
117 	AFMT_STEREO | AFMT_U8,
118 	AFMT_S16_LE,
119 	AFMT_STEREO | AFMT_S16_LE,
120 	0
121 };
122 static struct pcmchan_caps nm_caps = {4000, 48000, nm_fmt, 0};
123 
124 /* -------------------------------------------------------------------- */
125 
126 /* Hardware */
127 static u_int32_t
128 nm_rd(struct sc_info *sc, int regno, int size)
129 {
130 	bus_space_tag_t st = rman_get_bustag(sc->reg);
131 	bus_space_handle_t sh = rman_get_bushandle(sc->reg);
132 
133 	switch (size) {
134 	case 1:
135 		return bus_space_read_1(st, sh, regno);
136 	case 2:
137 		return bus_space_read_2(st, sh, regno);
138 	case 4:
139 		return bus_space_read_4(st, sh, regno);
140 	default:
141 		return 0xffffffff;
142 	}
143 }
144 
145 static void
146 nm_wr(struct sc_info *sc, int regno, u_int32_t data, int size)
147 {
148 	bus_space_tag_t st = rman_get_bustag(sc->reg);
149 	bus_space_handle_t sh = rman_get_bushandle(sc->reg);
150 
151 	switch (size) {
152 	case 1:
153 		bus_space_write_1(st, sh, regno, data);
154 		break;
155 	case 2:
156 		bus_space_write_2(st, sh, regno, data);
157 		break;
158 	case 4:
159 		bus_space_write_4(st, sh, regno, data);
160 		break;
161 	}
162 }
163 
164 static u_int32_t
165 nm_rdbuf(struct sc_info *sc, int regno, int size)
166 {
167 	bus_space_tag_t st = rman_get_bustag(sc->buf);
168 	bus_space_handle_t sh = rman_get_bushandle(sc->buf);
169 
170 	switch (size) {
171 	case 1:
172 		return bus_space_read_1(st, sh, regno);
173 	case 2:
174 		return bus_space_read_2(st, sh, regno);
175 	case 4:
176 		return bus_space_read_4(st, sh, regno);
177 	default:
178 		return 0xffffffff;
179 	}
180 }
181 
182 static void
183 nm_wrbuf(struct sc_info *sc, int regno, u_int32_t data, int size)
184 {
185 	bus_space_tag_t st = rman_get_bustag(sc->buf);
186 	bus_space_handle_t sh = rman_get_bushandle(sc->buf);
187 
188 	switch (size) {
189 	case 1:
190 		bus_space_write_1(st, sh, regno, data);
191 		break;
192 	case 2:
193 		bus_space_write_2(st, sh, regno, data);
194 		break;
195 	case 4:
196 		bus_space_write_4(st, sh, regno, data);
197 		break;
198 	}
199 }
200 
201 /* -------------------------------------------------------------------- */
202 /* ac97 codec */
203 static int
204 nm_waitcd(struct sc_info *sc)
205 {
206 	int cnt = 10;
207 	int fail = 1;
208 
209 	while (cnt-- > 0) {
210 		if (nm_rd(sc, sc->ac97_status, 2) & sc->ac97_busy) {
211 			DELAY(100);
212 		} else {
213 			fail = 0;
214 			break;
215 		}
216 	}
217 	return (fail);
218 }
219 
220 static u_int32_t
221 nm_initcd(kobj_t obj, void *devinfo)
222 {
223 	struct sc_info *sc = (struct sc_info *)devinfo;
224 
225 	nm_wr(sc, 0x6c0, 0x01, 1);
226 #if 0
227 	/*
228 	 * The following code-line may cause a hang for some chipsets, see
229 	 * PR 56617.
230 	 * In case of a bugreport without this line have a look at the PR and
231 	 * conditionize the code-line based upon the specific version of
232 	 * the chip.
233 	 */
234 	nm_wr(sc, 0x6cc, 0x87, 1);
235 #endif
236 	nm_wr(sc, 0x6cc, 0x80, 1);
237 	nm_wr(sc, 0x6cc, 0x00, 1);
238 	return 1;
239 }
240 
241 static int
242 nm_rdcd(kobj_t obj, void *devinfo, int regno)
243 {
244 	struct sc_info *sc = (struct sc_info *)devinfo;
245 	u_int32_t x;
246 
247 	if (!nm_waitcd(sc)) {
248 		x = nm_rd(sc, sc->ac97_base + regno, 2);
249 		DELAY(1000);
250 		return x;
251 	} else {
252 		device_printf(sc->dev, "ac97 codec not ready\n");
253 		return -1;
254 	}
255 }
256 
257 static int
258 nm_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data)
259 {
260 	struct sc_info *sc = (struct sc_info *)devinfo;
261 	int cnt = 3;
262 
263 	if (!nm_waitcd(sc)) {
264 		while (cnt-- > 0) {
265 			nm_wr(sc, sc->ac97_base + regno, data, 2);
266 			if (!nm_waitcd(sc)) {
267 				DELAY(1000);
268 				return 0;
269 			}
270 		}
271 	}
272 	device_printf(sc->dev, "ac97 codec not ready\n");
273 	return -1;
274 }
275 
276 static kobj_method_t nm_ac97_methods[] = {
277     	KOBJMETHOD(ac97_init,		nm_initcd),
278     	KOBJMETHOD(ac97_read,		nm_rdcd),
279     	KOBJMETHOD(ac97_write,		nm_wrcd),
280 	{ 0, 0 }
281 };
282 AC97_DECLARE(nm_ac97);
283 
284 /* -------------------------------------------------------------------- */
285 
286 static void
287 nm_ackint(struct sc_info *sc, u_int32_t num)
288 {
289 	if (sc->type == NM256AV_PCI_ID) {
290 		nm_wr(sc, NM_INT_REG, num << 1, 2);
291 	} else if (sc->type == NM256ZX_PCI_ID) {
292 		nm_wr(sc, NM_INT_REG, num, 4);
293 	}
294 }
295 
296 static int
297 nm_loadcoeff(struct sc_info *sc, int dir, int num)
298 {
299 	int ofs, sz, i;
300 	u_int32_t addr;
301 
302 	addr = (dir == PCMDIR_PLAY)? 0x01c : 0x21c;
303 	if (dir == PCMDIR_REC)
304 		num += 8;
305 	sz = coefficientSizes[num];
306 	ofs = 0;
307 	while (num-- > 0)
308 		ofs+= coefficientSizes[num];
309 	for (i = 0; i < sz; i++)
310 		nm_wrbuf(sc, sc->cbuf + i, coefficients[ofs + i], 1);
311 	nm_wr(sc, addr, sc->cbuf, 4);
312 	if (dir == PCMDIR_PLAY)
313 		sz--;
314 	nm_wr(sc, addr + 4, sc->cbuf + sz, 4);
315 	return 0;
316 }
317 
318 static int
319 nm_setch(struct sc_chinfo *ch)
320 {
321 	struct sc_info *sc = ch->parent;
322 	u_int32_t base;
323 	u_int8_t x;
324 
325 	for (x = 0; x < 8; x++)
326 		if (ch->spd < (samplerates[x] + samplerates[x + 1]) / 2)
327 			break;
328 
329 	if (x == 8) return 1;
330 
331 	ch->spd = samplerates[x];
332 	nm_loadcoeff(sc, ch->dir, x);
333 
334 	x <<= 4;
335 	x &= NM_RATE_MASK;
336 	if (ch->fmt & AFMT_16BIT) x |= NM_RATE_BITS_16;
337 	if (ch->fmt & AFMT_STEREO) x |= NM_RATE_STEREO;
338 
339 	base = (ch->dir == PCMDIR_PLAY)? NM_PLAYBACK_REG_OFFSET : NM_RECORD_REG_OFFSET;
340 	nm_wr(sc, base + NM_RATE_REG_OFFSET, x, 1);
341 	return 0;
342 }
343 
344 /* channel interface */
345 static void *
346 nmchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir)
347 {
348 	struct sc_info *sc = devinfo;
349 	struct sc_chinfo *ch;
350 	u_int32_t chnbuf;
351 
352 	chnbuf = (dir == PCMDIR_PLAY)? sc->pbuf : sc->rbuf;
353 	ch = (dir == PCMDIR_PLAY)? &sc->pch : &sc->rch;
354 	ch->active = 0;
355 	ch->blksize = 0;
356 	ch->wmark = 0;
357 	ch->buffer = b;
358 	sndbuf_setup(ch->buffer, (u_int8_t *)rman_get_virtual(sc->buf) + chnbuf, NM_BUFFSIZE);
359 	if (bootverbose)
360 		device_printf(sc->dev, "%s buf %p\n", (dir == PCMDIR_PLAY)?
361 			      "play" : "rec", sndbuf_getbuf(ch->buffer));
362 	ch->parent = sc;
363 	ch->channel = c;
364 	ch->dir = dir;
365 	return ch;
366 }
367 
368 static int
369 nmchan_free(kobj_t obj, void *data)
370 {
371 	return 0;
372 }
373 
374 static int
375 nmchan_setformat(kobj_t obj, void *data, u_int32_t format)
376 {
377 	struct sc_chinfo *ch = data;
378 
379 	ch->fmt = format;
380 	return nm_setch(ch);
381 }
382 
383 static int
384 nmchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
385 {
386 	struct sc_chinfo *ch = data;
387 
388 	ch->spd = speed;
389 	return nm_setch(ch)? 0 : ch->spd;
390 }
391 
392 static int
393 nmchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
394 {
395 	struct sc_chinfo *ch = data;
396 
397 	ch->blksize = blocksize;
398 
399 	return blocksize;
400 }
401 
402 static int
403 nmchan_trigger(kobj_t obj, void *data, int go)
404 {
405 	struct sc_chinfo *ch = data;
406 	struct sc_info *sc = ch->parent;
407 	int ssz;
408 
409 	if (!PCMTRIG_COMMON(go))
410 		return 0;
411 
412 	ssz = (ch->fmt & AFMT_16BIT)? 2 : 1;
413 	if (ch->fmt & AFMT_STEREO)
414 		ssz <<= 1;
415 
416 	if (ch->dir == PCMDIR_PLAY) {
417 		if (go == PCMTRIG_START) {
418 			ch->active = 1;
419 			ch->wmark = ch->blksize;
420 			nm_wr(sc, NM_PBUFFER_START, sc->pbuf, 4);
421 			nm_wr(sc, NM_PBUFFER_END, sc->pbuf + NM_BUFFSIZE - ssz, 4);
422 			nm_wr(sc, NM_PBUFFER_CURRP, sc->pbuf, 4);
423 			nm_wr(sc, NM_PBUFFER_WMARK, sc->pbuf + ch->wmark, 4);
424 			nm_wr(sc, NM_PLAYBACK_ENABLE_REG, NM_PLAYBACK_FREERUN |
425 				NM_PLAYBACK_ENABLE_FLAG, 1);
426 			nm_wr(sc, NM_AUDIO_MUTE_REG, 0, 2);
427 		} else {
428 			ch->active = 0;
429 			nm_wr(sc, NM_PLAYBACK_ENABLE_REG, 0, 1);
430 			nm_wr(sc, NM_AUDIO_MUTE_REG, NM_AUDIO_MUTE_BOTH, 2);
431 		}
432 	} else {
433 		if (go == PCMTRIG_START) {
434 			ch->active = 1;
435 			ch->wmark = ch->blksize;
436 			nm_wr(sc, NM_RECORD_ENABLE_REG, NM_RECORD_FREERUN |
437 				NM_RECORD_ENABLE_FLAG, 1);
438 			nm_wr(sc, NM_RBUFFER_START, sc->rbuf, 4);
439 			nm_wr(sc, NM_RBUFFER_END, sc->rbuf + NM_BUFFSIZE, 4);
440 			nm_wr(sc, NM_RBUFFER_CURRP, sc->rbuf, 4);
441 			nm_wr(sc, NM_RBUFFER_WMARK, sc->rbuf + ch->wmark, 4);
442 		} else {
443 			ch->active = 0;
444 			nm_wr(sc, NM_RECORD_ENABLE_REG, 0, 1);
445 		}
446 	}
447 	return 0;
448 }
449 
450 static int
451 nmchan_getptr(kobj_t obj, void *data)
452 {
453 	struct sc_chinfo *ch = data;
454 	struct sc_info *sc = ch->parent;
455 
456 	if (ch->dir == PCMDIR_PLAY)
457 		return nm_rd(sc, NM_PBUFFER_CURRP, 4) - sc->pbuf;
458 	else
459 		return nm_rd(sc, NM_RBUFFER_CURRP, 4) - sc->rbuf;
460 }
461 
462 static struct pcmchan_caps *
463 nmchan_getcaps(kobj_t obj, void *data)
464 {
465 	return &nm_caps;
466 }
467 
468 static kobj_method_t nmchan_methods[] = {
469     	KOBJMETHOD(channel_init,		nmchan_init),
470     	KOBJMETHOD(channel_free,		nmchan_free),
471     	KOBJMETHOD(channel_setformat,		nmchan_setformat),
472     	KOBJMETHOD(channel_setspeed,		nmchan_setspeed),
473     	KOBJMETHOD(channel_setblocksize,	nmchan_setblocksize),
474     	KOBJMETHOD(channel_trigger,		nmchan_trigger),
475     	KOBJMETHOD(channel_getptr,		nmchan_getptr),
476     	KOBJMETHOD(channel_getcaps,		nmchan_getcaps),
477 	{ 0, 0 }
478 };
479 CHANNEL_DECLARE(nmchan);
480 
481 /* The interrupt handler */
482 static void
483 nm_intr(void *p)
484 {
485 	struct sc_info *sc = (struct sc_info *)p;
486 	int status, x;
487 
488 	status = nm_rd(sc, NM_INT_REG, sc->irsz);
489 	if (status == 0)
490 		return;
491 
492 	if (status & sc->playint) {
493 		status &= ~sc->playint;
494 		sc->pch.wmark += sc->pch.blksize;
495 		sc->pch.wmark %= NM_BUFFSIZE;
496 		nm_wr(sc, NM_PBUFFER_WMARK, sc->pbuf + sc->pch.wmark, 4);
497 
498 		nm_ackint(sc, sc->playint);
499 		chn_intr(sc->pch.channel);
500 	}
501 	if (status & sc->recint) {
502 		status &= ~sc->recint;
503 		sc->rch.wmark += sc->rch.blksize;
504 		sc->rch.wmark %= NM_BUFFSIZE;
505 		nm_wr(sc, NM_RBUFFER_WMARK, sc->rbuf + sc->rch.wmark, 4);
506 
507 		nm_ackint(sc, sc->recint);
508 		chn_intr(sc->rch.channel);
509 	}
510 	if (status & sc->misc1int) {
511 		status &= ~sc->misc1int;
512 		nm_ackint(sc, sc->misc1int);
513 		x = nm_rd(sc, 0x400, 1);
514 		nm_wr(sc, 0x400, x | 2, 1);
515 	 	device_printf(sc->dev, "misc int 1\n");
516 	}
517 	if (status & sc->misc2int) {
518 		status &= ~sc->misc2int;
519 		nm_ackint(sc, sc->misc2int);
520 		x = nm_rd(sc, 0x400, 1);
521 		nm_wr(sc, 0x400, x & ~2, 1);
522 	 	device_printf(sc->dev, "misc int 2\n");
523 	}
524 	if (status) {
525 		nm_ackint(sc, status);
526 	 	device_printf(sc->dev, "unknown int\n");
527 	}
528 }
529 
530 /* -------------------------------------------------------------------- */
531 
532 /*
533  * Probe and attach the card
534  */
535 
536 static int
537 nm_init(struct sc_info *sc)
538 {
539 	u_int32_t ofs, i;
540 
541 	if (sc->type == NM256AV_PCI_ID) {
542 		sc->ac97_base = NM_MIXER_OFFSET;
543 		sc->ac97_status = NM_MIXER_STATUS_OFFSET;
544 		sc->ac97_busy = NM_MIXER_READY_MASK;
545 
546 		sc->buftop = 2560 * 1024;
547 
548 		sc->irsz = 2;
549 		sc->playint = NM_PLAYBACK_INT;
550 		sc->recint = NM_RECORD_INT;
551 		sc->misc1int = NM_MISC_INT_1;
552 		sc->misc2int = NM_MISC_INT_2;
553 	} else if (sc->type == NM256ZX_PCI_ID) {
554 		sc->ac97_base = NM_MIXER_OFFSET;
555 		sc->ac97_status = NM2_MIXER_STATUS_OFFSET;
556 		sc->ac97_busy = NM2_MIXER_READY_MASK;
557 
558 		sc->buftop = (nm_rd(sc, 0xa0b, 2)? 6144 : 4096) * 1024;
559 
560 		sc->irsz = 4;
561 		sc->playint = NM2_PLAYBACK_INT;
562 		sc->recint = NM2_RECORD_INT;
563 		sc->misc1int = NM2_MISC_INT_1;
564 		sc->misc2int = NM2_MISC_INT_2;
565 	} else return -1;
566 	sc->badintr = 0;
567 	ofs = sc->buftop - 0x0400;
568 	sc->buftop -= 0x1400;
569 
570 	if (bootverbose)
571 		device_printf(sc->dev, "buftop is 0x%08x\n", sc->buftop);
572  	if ((nm_rdbuf(sc, ofs, 4) & NM_SIG_MASK) == NM_SIGNATURE) {
573 		i = nm_rdbuf(sc, ofs + 4, 4);
574 		if (i != 0 && i != 0xffffffff) {
575 			if (bootverbose)
576 				device_printf(sc->dev, "buftop is changed to 0x%08x\n", i);
577 			sc->buftop = i;
578 		}
579 	}
580 
581 	sc->cbuf = sc->buftop - NM_MAX_COEFFICIENT;
582 	sc->rbuf = sc->cbuf - NM_BUFFSIZE;
583 	sc->pbuf = sc->rbuf - NM_BUFFSIZE;
584 	sc->acbuf = sc->pbuf - (NM_TOTAL_COEFF_COUNT * 4);
585 
586 	nm_wr(sc, 0, 0x11, 1);
587 	nm_wr(sc, NM_RECORD_ENABLE_REG, 0, 1);
588 	nm_wr(sc, 0x214, 0, 2);
589 
590 	return 0;
591 }
592 
593 static int
594 nm_pci_probe(device_t dev)
595 {
596 	struct sc_info *sc = NULL;
597 	char *s = NULL;
598 	u_int32_t subdev, i, data;
599 
600 	subdev = (pci_get_subdevice(dev) << 16) | pci_get_subvendor(dev);
601 	switch (pci_get_devid(dev)) {
602 	case NM256AV_PCI_ID:
603 		i = 0;
604 		while ((i < NUM_BADCARDS) && (badcards[i] != subdev))
605 			i++;
606 
607 		/* Try to catch other non-ac97 cards */
608 
609 		if (i == NUM_BADCARDS) {
610 			if (!(sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT | M_ZERO))) {
611 				device_printf(dev, "cannot allocate softc\n");
612 				return ENXIO;
613 			}
614 
615 			data = pci_read_config(dev, PCIR_COMMAND, 2);
616 			pci_write_config(dev, PCIR_COMMAND, data |
617 					 PCIM_CMD_PORTEN | PCIM_CMD_MEMEN |
618 					 PCIM_CMD_BUSMASTEREN, 2);
619 
620 			sc->regid = PCIR_BAR(1);
621 			sc->reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
622 							 &sc->regid,
623 							 RF_ACTIVE);
624 
625 			if (!sc->reg) {
626 				device_printf(dev, "unable to map register space\n");
627 				pci_write_config(dev, PCIR_COMMAND, data, 2);
628 				free(sc, M_DEVBUF);
629 				return ENXIO;
630 			}
631 
632 			/*
633 			 * My Panasonic CF-M2EV needs resetting device
634 			 * before checking mixer is present or not.
635 			 * t.ichinoseki@nifty.com.
636 			 */
637 			nm_wr(sc, 0, 0x11, 1); /* reset device */
638 			if ((nm_rd(sc, NM_MIXER_PRESENCE, 2) &
639 				NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
640 				i = 0;	/* non-ac97 card, but not listed */
641 				DEB(device_printf(dev, "subdev = 0x%x - badcard?\n",
642 				    subdev));
643 			}
644 			pci_write_config(dev, PCIR_COMMAND, data, 2);
645 			bus_release_resource(dev, SYS_RES_MEMORY, sc->regid,
646 					     sc->reg);
647 			free(sc, M_DEVBUF);
648 		}
649 
650 		if (i == NUM_BADCARDS)
651 			s = "NeoMagic 256AV";
652 		DEB(else)
653 			DEB(device_printf(dev, "this is a non-ac97 NM256AV, not attaching\n"));
654 
655 		break;
656 
657 	case NM256ZX_PCI_ID:
658 		s = "NeoMagic 256ZX";
659 		break;
660 	}
661 
662 	if (s) device_set_desc(dev, s);
663 	return s? 0 : ENXIO;
664 }
665 
666 static int
667 nm_pci_attach(device_t dev)
668 {
669 	u_int32_t	data;
670 	struct sc_info *sc;
671 	struct ac97_info *codec = 0;
672 	char 		status[SND_STATUSLEN];
673 
674 	sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
675 	sc->dev = dev;
676 	sc->type = pci_get_devid(dev);
677 
678 	data = pci_read_config(dev, PCIR_COMMAND, 2);
679 	data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
680 	pci_write_config(dev, PCIR_COMMAND, data, 2);
681 	data = pci_read_config(dev, PCIR_COMMAND, 2);
682 
683 	sc->bufid = PCIR_BAR(0);
684 	sc->buf = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->bufid,
685 					 RF_ACTIVE);
686 	sc->regid = PCIR_BAR(1);
687 	sc->reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->regid,
688 					 RF_ACTIVE);
689 
690 	if (!sc->buf || !sc->reg) {
691 		device_printf(dev, "unable to map register space\n");
692 		goto bad;
693 	}
694 
695 	if (nm_init(sc) == -1) {
696 		device_printf(dev, "unable to initialize the card\n");
697 		goto bad;
698 	}
699 
700 	codec = AC97_CREATE(dev, sc, nm_ac97);
701 	if (codec == NULL) goto bad;
702 	if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad;
703 
704 	sc->irqid = 0;
705 	sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid,
706 					 RF_ACTIVE | RF_SHAREABLE);
707 	if (!sc->irq || snd_setup_intr(dev, sc->irq, 0, nm_intr, sc, &sc->ih)) {
708 		device_printf(dev, "unable to map interrupt\n");
709 		goto bad;
710 	}
711 
712 	snprintf(status, SND_STATUSLEN, "at memory 0x%lx, 0x%lx irq %ld %s",
713 		 rman_get_start(sc->buf), rman_get_start(sc->reg),
714 		 rman_get_start(sc->irq),PCM_KLDSTRING(snd_neomagic));
715 
716 	if (pcm_register(dev, sc, 1, 1)) goto bad;
717 	pcm_addchan(dev, PCMDIR_REC, &nmchan_class, sc);
718 	pcm_addchan(dev, PCMDIR_PLAY, &nmchan_class, sc);
719 	pcm_setstatus(dev, status);
720 
721 	return 0;
722 
723 bad:
724 	if (codec) ac97_destroy(codec);
725 	if (sc->buf) bus_release_resource(dev, SYS_RES_MEMORY, sc->bufid, sc->buf);
726 	if (sc->reg) bus_release_resource(dev, SYS_RES_MEMORY, sc->regid, sc->reg);
727 	if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih);
728 	if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq);
729 	free(sc, M_DEVBUF);
730 	return ENXIO;
731 }
732 
733 static int
734 nm_pci_detach(device_t dev)
735 {
736 	int r;
737 	struct sc_info *sc;
738 
739 	r = pcm_unregister(dev);
740 	if (r)
741 		return r;
742 
743 	sc = pcm_getdevinfo(dev);
744 	bus_release_resource(dev, SYS_RES_MEMORY, sc->bufid, sc->buf);
745 	bus_release_resource(dev, SYS_RES_MEMORY, sc->regid, sc->reg);
746 	bus_teardown_intr(dev, sc->irq, sc->ih);
747 	bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq);
748 	free(sc, M_DEVBUF);
749 
750 	return 0;
751 }
752 
753 static int
754 nm_pci_suspend(device_t dev)
755 {
756 	struct sc_info *sc;
757 
758 	sc = pcm_getdevinfo(dev);
759 
760 	/* stop playing */
761 	if (sc->pch.active) {
762 		nm_wr(sc, NM_PLAYBACK_ENABLE_REG, 0, 1);
763 		nm_wr(sc, NM_AUDIO_MUTE_REG, NM_AUDIO_MUTE_BOTH, 2);
764 	}
765 	/* stop recording */
766 	if (sc->rch.active) {
767 		nm_wr(sc, NM_RECORD_ENABLE_REG, 0, 1);
768 	}
769 	return 0;
770 }
771 
772 static int
773 nm_pci_resume(device_t dev)
774 {
775 	struct sc_info *sc;
776 
777 	sc = pcm_getdevinfo(dev);
778 
779 	/*
780 	 * Reinit audio device.
781 	 * Don't call nm_init(). It would change buftop if X ran or
782 	 * is running. This makes playing and recording buffer address
783 	 * shift but these buffers of channel layer are not changed.
784 	 * As a result of this inconsistency, periodic noise will be
785 	 * generated while playing.
786 	 */
787 	nm_wr(sc, 0, 0x11, 1);
788 	nm_wr(sc, 0x214, 0, 2);
789 
790 	/* Reinit mixer */
791     	if (mixer_reinit(dev) == -1) {
792 		device_printf(dev, "unable to reinitialize the mixer\n");
793 		return ENXIO;
794 	}
795 	/* restart playing */
796 	if (sc->pch.active) {
797 		nm_wr(sc, NM_PLAYBACK_ENABLE_REG, NM_PLAYBACK_FREERUN |
798 			  NM_PLAYBACK_ENABLE_FLAG, 1);
799 		nm_wr(sc, NM_AUDIO_MUTE_REG, 0, 2);
800 	}
801 	/* restart recording */
802 	if (sc->rch.active) {
803 		nm_wr(sc, NM_RECORD_ENABLE_REG, NM_RECORD_FREERUN |
804 			  NM_RECORD_ENABLE_FLAG, 1);
805 	}
806 	return 0;
807 }
808 
809 static device_method_t nm_methods[] = {
810 	/* Device interface */
811 	DEVMETHOD(device_probe,		nm_pci_probe),
812 	DEVMETHOD(device_attach,	nm_pci_attach),
813 	DEVMETHOD(device_detach,	nm_pci_detach),
814 	DEVMETHOD(device_suspend,	nm_pci_suspend),
815 	DEVMETHOD(device_resume,	nm_pci_resume),
816 	{ 0, 0 }
817 };
818 
819 static driver_t nm_driver = {
820 	"pcm",
821 	nm_methods,
822 	PCM_SOFTC_SIZE,
823 };
824 
825 DRIVER_MODULE(snd_neomagic, pci, nm_driver, pcm_devclass, 0, 0);
826 MODULE_DEPEND(snd_neomagic, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
827 MODULE_VERSION(snd_neomagic, 1);
828