1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2002 Orion Hodson <orion@freebsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _SYS_SOUND_PCI_VIA8233_H_ 32 #define _SYS_SOUND_PCI_VIA8233_H_ 33 34 /* 35 * VIA Technologies VT8233 Southbridge Audio Driver 36 * 37 * Documentation sources: 38 * 39 * o V8233C specs. from VIA, gratefully received under NDA. 40 * o AC97 R2.2 specs. 41 * o ALSA driver (very useful comments) 42 */ 43 44 #define VIA_PCI_SPDIF 0x49 45 #define VIA_SPDIF_EN 0x08 46 47 #define VIA_DXS0_BASE 0x00 48 #define VIA_DXS1_BASE 0x10 49 #define VIA_DXS2_BASE 0x20 50 #define VIA_DXS3_BASE 0x30 51 #define VIA_DXS_BASE(n) (0x10 * (n)) 52 #define BASE_IS_VIA_DXS_REG(x) ((x) <= VIA_DXS3_BASE) 53 54 #define VIA8233_RP_DXS_LVOL 0x02 55 #define VIA8233_RP_DXS_RVOL 0x03 56 #define VIA8233_DXS_MUTE 0x3f 57 #define VIA8233_RP_DXS_RATEFMT 0x08 58 #define VIA8233_DXS_STOP_INDEX 0xff000000 59 #define VIA8233_DXS_RATEFMT_48K 0x000fffff 60 #define VIA8233_DXS_RATEFMT_STEREO 0x00100000 61 #define VIA8233_DXS_RATEFMT_16BIT 0x00200000 62 63 #define VIA_PCI_ACLINK_STAT 0x40 64 # define VIA_PCI_ACLINK_C11_READY 0x20 65 # define VIA_PCI_ACLINK_C10_READY 0x10 66 # define VIA_PCI_ACLINK_C01_READY 0x04 67 # define VIA_PCI_ACLINK_LOW_POWER 0x02 68 # define VIA_PCI_ACLINK_C00_READY 0x01 69 70 #define VIA_PCI_ACLINK_CTRL 0x41 71 # define VIA_PCI_ACLINK_EN 0x80 72 # define VIA_PCI_ACLINK_NRST 0x40 73 # define VIA_PCI_ACLINK_SYNC 0x20 74 # define VIA_PCI_ACLINK_SERIAL 0x10 75 # define VIA_PCI_ACLINK_VRATE 0x08 76 # define VIA_PCI_ACLINK_SGD 0x04 77 # define VIA_PCI_ACLINK_DESIRED (VIA_PCI_ACLINK_EN | \ 78 VIA_PCI_ACLINK_NRST | \ 79 VIA_PCI_ACLINK_VRATE | \ 80 VIA_PCI_ACLINK_SGD) 81 82 #define VIA_MC_SGD_STATUS 0x40 83 #define VIA_WR0_SGD_STATUS 0x60 84 #define VIA_WR1_SGD_STATUS 0x70 85 # define SGD_STATUS_ACTIVE 0x80 86 # define SGD_STATUS_AT_STOP 0x40 87 # define SGD_STATUS_TRIGGER_Q 0x08 88 # define SGD_STATUS_STOP_I_S 0x04 89 # define SGD_STATUS_EOL 0x02 90 # define SGD_STATUS_FLAG 0x01 91 # define SGD_STATUS_INTR (SGD_STATUS_EOL | SGD_STATUS_FLAG) 92 93 #define VIA_WR_BASE(n) (0x60 + (n) * 0x10) 94 95 #define VIA_MC_SGD_CONTROL 0x41 96 #define VIA_WR0_SGD_CONTROL 0x61 97 #define VIA_WR1_SGD_CONTROL 0x71 98 # define SGD_CONTROL_START 0x80 99 # define SGD_CONTROL_STOP 0x40 100 # define SGD_CONTROL_AUTOSTART 0x20 101 # define SGD_CONTROL_PAUSE 0x08 102 # define SGD_CONTROL_I_STOP 0x04 103 # define SGD_CONTROL_I_EOL 0x02 104 # define SGD_CONTROL_I_FLAG 0x01 105 106 #define VIA_MC_SGD_FORMAT 0x42 107 # define MC_SGD_16BIT 0x80 108 # define MC_SGD_8BIT 0x00 109 # define MC_SGD_CHANNELS(x) (((x)& 0x07) << 4) 110 111 #define VIA_WR0_SGD_FORMAT 0x62 112 #define VIA_WR1_SGD_FORMAT 0x72 113 #define VIA_WR_RP_SGD_FORMAT 0x02 114 # define WR_FIFO_ENABLE 0x40 115 116 #define VIA_WR0_SGD_INPUT 0x63 117 #define VIA_WR1_SGD_INPUT 0x73 118 # define WR_LINE_IN 0x00 119 # define WR_MIC_IN 0x04 120 # define WR_PRIMARY_CODEC 0x00 121 # define WR_SECONDARY_CODEC1 0x01 122 # define WR_SECONDARY_CODEC2 0x02 123 # define WR_SECONDARY_CODEC3 0x03 124 125 #define VIA_MC_TABLE_PTR_BASE 0x44 126 #define VIA_WR0_TABLE_PTR_BASE 0x64 127 #define VIA_WR1_TABLE_PTR_BASE 0x74 128 129 #define VIA_MC_SLOT_SELECT 0x48 130 # define SLOT3(x) (x) 131 # define SLOT4(x) ((x) << 4) 132 # define SLOT7(x) ((x) << 8) 133 # define SLOT8(x) ((x) << 12) 134 # define SLOT6(x) ((x) << 16) 135 # define SLOT9(x) ((x) << 20) 136 137 #define VIA_MC_CURRENT_COUNT 0x4c 138 139 #define VIA_WR0_FORMAT 0x68 140 #define VIA_WR1_FORMAT 0x78 141 # define WR_FORMAT_STOP_INDEX 0xff000000 142 # define WR_FORMAT_STEREO 0x00100000 143 # define WR_FORMAT_16BIT 0x00200000 144 145 /* Relative offsets */ 146 #define VIA_RP_STATUS 0x00 147 #define VIA_RP_CONTROL 0x01 148 #define VIA_RP_TABLE_PTR 0x04 149 #define VIA_RP_CURRENT_COUNT 0x0c 150 151 #define VIA_AC97_CONTROL 0x80 152 # define VIA_AC97_CODECID11 0xc0000000 153 # define VIA_AC97_CODECID10 0x80000000 154 # define VIA_AC97_CODECID01 0x40000000 155 # define VIA_AC97_CODEC11_VALID 0x20000000 156 # define VIA_AC97_CODEC10_VALID 0x10000000 157 # define VIA_AC97_CODEC01_VALID 0x08000000 158 # define VIA_AC97_CODEC00_VALID 0x02000000 159 # define VIA_AC97_BUSY 0x01000000 160 # define VIA_AC97_READ 0x00800000 161 # define VIA_AC97_INDEX(x) ((x) << 16) 162 # define VIA_AC97_DATA(x) ((x) & 0xffff) 163 164 #define VIA_CODEC_BUSY 0x01000000 165 #define VIA_CODEC_PRIVALID 0x02000000 166 #define VIA_CODEC_INDEX(x) ((x)<<16) 167 168 #endif /* SYS_SOUND_PCI_VIA8233_H_ */ 169