1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2019 Andriy Gapon 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 #include <sys/conf.h> 37 #include <sys/kernel.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/malloc.h> 41 #include <sys/module.h> 42 #include <sys/proc.h> 43 #include <sys/rman.h> 44 #include <sys/sbuf.h> 45 #include <sys/time.h> 46 47 #include <machine/bus.h> 48 #include <machine/resource.h> 49 #include <machine/stdarg.h> 50 51 #include <isa/isavar.h> 52 53 #include <dev/superio/superio.h> 54 #include <dev/superio/superio_io.h> 55 56 #include "isa_if.h" 57 58 typedef void (*sio_conf_enter_f)(struct resource*, uint16_t); 59 typedef void (*sio_conf_exit_f)(struct resource*, uint16_t); 60 61 struct sio_conf_methods { 62 sio_conf_enter_f enter; 63 sio_conf_exit_f exit; 64 superio_vendor_t vendor; 65 }; 66 67 struct sio_device { 68 uint8_t ldn; 69 superio_dev_type_t type; 70 }; 71 72 struct superio_devinfo { 73 STAILQ_ENTRY(superio_devinfo) link; 74 struct resource_list resources; 75 device_t dev; 76 uint8_t ldn; 77 superio_dev_type_t type; 78 uint16_t iobase; 79 uint16_t iobase2; 80 uint8_t irq; 81 uint8_t dma; 82 }; 83 84 struct siosc { 85 struct mtx conf_lock; 86 STAILQ_HEAD(, superio_devinfo) devlist; 87 struct resource* io_res; 88 struct cdev *chardev; 89 int io_rid; 90 uint16_t io_port; 91 const struct sio_conf_methods *methods; 92 const struct sio_device *known_devices; 93 superio_vendor_t vendor; 94 uint16_t devid; 95 uint8_t revid; 96 uint8_t current_ldn; 97 uint8_t ldn_reg; 98 uint8_t enable_reg; 99 }; 100 101 static d_ioctl_t superio_ioctl; 102 103 static struct cdevsw superio_cdevsw = { 104 .d_version = D_VERSION, 105 .d_ioctl = superio_ioctl, 106 .d_name = "superio", 107 }; 108 109 #define NUMPORTS 2 110 111 static uint8_t 112 sio_read(struct resource* res, uint8_t reg) 113 { 114 bus_write_1(res, 0, reg); 115 return (bus_read_1(res, 1)); 116 } 117 118 /* Read a word from two one-byte registers, big endian. */ 119 static uint16_t 120 sio_readw(struct resource* res, uint8_t reg) 121 { 122 uint16_t v; 123 124 v = sio_read(res, reg); 125 v <<= 8; 126 v |= sio_read(res, reg + 1); 127 return (v); 128 } 129 130 static void 131 sio_write(struct resource* res, uint8_t reg, uint8_t val) 132 { 133 bus_write_1(res, 0, reg); 134 bus_write_1(res, 1, val); 135 } 136 137 static void 138 sio_ldn_select(struct siosc *sc, uint8_t ldn) 139 { 140 mtx_assert(&sc->conf_lock, MA_OWNED); 141 if (ldn == sc->current_ldn) 142 return; 143 sio_write(sc->io_res, sc->ldn_reg, ldn); 144 sc->current_ldn = ldn; 145 } 146 147 static uint8_t 148 sio_ldn_read(struct siosc *sc, uint8_t ldn, uint8_t reg) 149 { 150 mtx_assert(&sc->conf_lock, MA_OWNED); 151 if (reg >= sc->enable_reg) { 152 sio_ldn_select(sc, ldn); 153 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 154 } 155 return (sio_read(sc->io_res, reg)); 156 } 157 158 static uint16_t 159 sio_ldn_readw(struct siosc *sc, uint8_t ldn, uint8_t reg) 160 { 161 mtx_assert(&sc->conf_lock, MA_OWNED); 162 if (reg >= sc->enable_reg) { 163 sio_ldn_select(sc, ldn); 164 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 165 } 166 return (sio_readw(sc->io_res, reg)); 167 } 168 169 static void 170 sio_ldn_write(struct siosc *sc, uint8_t ldn, uint8_t reg, uint8_t val) 171 { 172 mtx_assert(&sc->conf_lock, MA_OWNED); 173 if (reg <= sc->ldn_reg) { 174 printf("ignored attempt to write special register 0x%x\n", reg); 175 return; 176 } 177 sio_ldn_select(sc, ldn); 178 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 179 sio_write(sc->io_res, reg, val); 180 } 181 182 static void 183 sio_conf_enter(struct siosc *sc) 184 { 185 mtx_lock(&sc->conf_lock); 186 sc->methods->enter(sc->io_res, sc->io_port); 187 } 188 189 static void 190 sio_conf_exit(struct siosc *sc) 191 { 192 sc->methods->exit(sc->io_res, sc->io_port); 193 sc->current_ldn = 0xff; 194 mtx_unlock(&sc->conf_lock); 195 } 196 197 static void 198 ite_conf_enter(struct resource* res, uint16_t port) 199 { 200 bus_write_1(res, 0, 0x87); 201 bus_write_1(res, 0, 0x01); 202 bus_write_1(res, 0, 0x55); 203 bus_write_1(res, 0, port == 0x2e ? 0x55 : 0xaa); 204 } 205 206 static void 207 ite_conf_exit(struct resource* res, uint16_t port) 208 { 209 sio_write(res, 0x02, 0x02); 210 } 211 212 static const struct sio_conf_methods ite_conf_methods = { 213 .enter = ite_conf_enter, 214 .exit = ite_conf_exit, 215 .vendor = SUPERIO_VENDOR_ITE 216 }; 217 218 static void 219 nvt_conf_enter(struct resource* res, uint16_t port) 220 { 221 bus_write_1(res, 0, 0x87); 222 bus_write_1(res, 0, 0x87); 223 } 224 225 static void 226 nvt_conf_exit(struct resource* res, uint16_t port) 227 { 228 bus_write_1(res, 0, 0xaa); 229 } 230 231 static const struct sio_conf_methods nvt_conf_methods = { 232 .enter = nvt_conf_enter, 233 .exit = nvt_conf_exit, 234 .vendor = SUPERIO_VENDOR_NUVOTON 235 }; 236 237 static void 238 fintek_conf_enter(struct resource* res, uint16_t port) 239 { 240 bus_write_1(res, 0, 0x87); 241 bus_write_1(res, 0, 0x87); 242 } 243 244 static void 245 fintek_conf_exit(struct resource* res, uint16_t port) 246 { 247 bus_write_1(res, 0, 0xaa); 248 } 249 250 static const struct sio_conf_methods fintek_conf_methods = { 251 .enter = fintek_conf_enter, 252 .exit = fintek_conf_exit, 253 .vendor = SUPERIO_VENDOR_FINTEK 254 }; 255 256 static const struct sio_conf_methods * const methods_table[] = { 257 &ite_conf_methods, 258 &nvt_conf_methods, 259 &fintek_conf_methods, 260 NULL 261 }; 262 263 static const uint16_t ports_table[] = { 264 0x2e, 0x4e, 0 265 }; 266 267 const struct sio_device ite_devices[] = { 268 { .ldn = 4, .type = SUPERIO_DEV_HWM }, 269 { .ldn = 7, .type = SUPERIO_DEV_WDT }, 270 { .type = SUPERIO_DEV_NONE }, 271 }; 272 273 const struct sio_device nvt_devices[] = { 274 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 275 { .type = SUPERIO_DEV_NONE }, 276 }; 277 278 const struct sio_device nct5104_devices[] = { 279 { .ldn = 7, .type = SUPERIO_DEV_GPIO }, 280 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 281 { .ldn = 15, .type = SUPERIO_DEV_GPIO }, 282 { .type = SUPERIO_DEV_NONE }, 283 }; 284 285 const struct sio_device fintek_devices[] = { 286 { .ldn = 6, .type = SUPERIO_DEV_GPIO }, 287 { .ldn = 7, .type = SUPERIO_DEV_WDT }, 288 { .type = SUPERIO_DEV_NONE }, 289 }; 290 291 static const struct { 292 superio_vendor_t vendor; 293 uint16_t devid; 294 uint16_t mask; 295 const char *descr; 296 const struct sio_device *devices; 297 } superio_table[] = { 298 { 299 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8712, 300 .devices = ite_devices, 301 }, 302 { 303 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8716, 304 .devices = ite_devices, 305 }, 306 { 307 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8718, 308 .devices = ite_devices, 309 }, 310 { 311 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8720, 312 .devices = ite_devices, 313 }, 314 { 315 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8721, 316 .devices = ite_devices, 317 }, 318 { 319 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8726, 320 .devices = ite_devices, 321 }, 322 { 323 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8728, 324 .devices = ite_devices, 325 }, 326 { 327 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8771, 328 .devices = ite_devices, 329 }, 330 { 331 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x1061, .mask = 0x00, 332 .descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. A)", 333 .devices = nct5104_devices, 334 }, 335 { 336 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5200, .mask = 0xff, 337 .descr = "Winbond 83627HF/F/HG/G", 338 .devices = nvt_devices, 339 }, 340 { 341 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5900, .mask = 0xff, 342 .descr = "Winbond 83627S", 343 .devices = nvt_devices, 344 }, 345 { 346 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6000, .mask = 0xff, 347 .descr = "Winbond 83697HF", 348 .devices = nvt_devices, 349 }, 350 { 351 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6800, .mask = 0xff, 352 .descr = "Winbond 83697UG", 353 .devices = nvt_devices, 354 }, 355 { 356 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x7000, .mask = 0xff, 357 .descr = "Winbond 83637HF", 358 .devices = nvt_devices, 359 }, 360 { 361 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8200, .mask = 0xff, 362 .descr = "Winbond 83627THF", 363 .devices = nvt_devices, 364 }, 365 { 366 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8500, .mask = 0xff, 367 .descr = "Winbond 83687THF", 368 .devices = nvt_devices, 369 }, 370 { 371 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8800, .mask = 0xff, 372 .descr = "Winbond 83627EHF", 373 .devices = nvt_devices, 374 }, 375 { 376 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa000, .mask = 0xff, 377 .descr = "Winbond 83627DHG", 378 .devices = nvt_devices, 379 }, 380 { 381 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa200, .mask = 0xff, 382 .descr = "Winbond 83627UHG", 383 .devices = nvt_devices, 384 }, 385 { 386 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa500, .mask = 0xff, 387 .descr = "Winbond 83667HG", 388 .devices = nvt_devices, 389 }, 390 { 391 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb000, .mask = 0xff, 392 .descr = "Winbond 83627DHG-P", 393 .devices = nvt_devices, 394 }, 395 { 396 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb300, .mask = 0xff, 397 .descr = "Winbond 83667HG-B", 398 .devices = nvt_devices, 399 }, 400 { 401 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb400, .mask = 0xff, 402 .descr = "Nuvoton NCT6775", 403 .devices = nvt_devices, 404 }, 405 { 406 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc300, .mask = 0xff, 407 .descr = "Nuvoton NCT6776", 408 .devices = nvt_devices, 409 }, 410 { 411 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc400, .mask = 0xff, 412 .descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. B+)", 413 .devices = nct5104_devices, 414 }, 415 { 416 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc500, .mask = 0xff, 417 .descr = "Nuvoton NCT6779", 418 .devices = nvt_devices, 419 }, 420 { 421 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc800, .mask = 0xff, 422 .descr = "Nuvoton NCT6791", 423 .devices = nvt_devices, 424 }, 425 { 426 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc900, .mask = 0xff, 427 .descr = "Nuvoton NCT6792", 428 .devices = nvt_devices, 429 }, 430 { 431 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd100, .mask = 0xff, 432 .descr = "Nuvoton NCT6793", 433 .devices = nvt_devices, 434 }, 435 { 436 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd300, .mask = 0xff, 437 .descr = "Nuvoton NCT6795", 438 .devices = nvt_devices, 439 }, 440 { 441 .vendor = SUPERIO_VENDOR_FINTEK, .devid = 0x1210, .mask = 0xff, 442 .descr = "Fintek F81803", 443 .devices = fintek_devices, 444 }, 445 { 446 .vendor = SUPERIO_VENDOR_FINTEK, .devid = 0x0704, 447 .descr = "Fintek F81865", 448 .devices = fintek_devices, 449 }, 450 { 0, 0 } 451 }; 452 453 static const char * 454 devtype_to_str(superio_dev_type_t type) 455 { 456 switch (type) { 457 case SUPERIO_DEV_NONE: 458 return ("none"); 459 case SUPERIO_DEV_HWM: 460 return ("HWM"); 461 case SUPERIO_DEV_WDT: 462 return ("WDT"); 463 case SUPERIO_DEV_GPIO: 464 return ("GPIO"); 465 case SUPERIO_DEV_MAX: 466 return ("invalid"); 467 } 468 return ("invalid"); 469 } 470 471 static int 472 superio_detect(device_t dev, bool claim, struct siosc *sc) 473 { 474 struct resource *res; 475 rman_res_t port; 476 rman_res_t count; 477 uint16_t devid; 478 uint8_t revid; 479 int error; 480 int rid; 481 int i, m; 482 483 error = bus_get_resource(dev, SYS_RES_IOPORT, 0, &port, &count); 484 if (error != 0) 485 return (error); 486 if (port > UINT16_MAX || count < NUMPORTS) { 487 device_printf(dev, "unexpected I/O range size\n"); 488 return (ENXIO); 489 } 490 491 /* 492 * Make a temporary resource reservation for hardware probing. 493 * If we can't get the resources we need then 494 * we need to abort. Possibly this indicates 495 * the resources were used by another device 496 * in which case the probe would have failed anyhow. 497 */ 498 rid = 0; 499 res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE); 500 if (res == NULL) { 501 if (claim) 502 device_printf(dev, "failed to allocate I/O resource\n"); 503 return (ENXIO); 504 } 505 506 for (m = 0; methods_table[m] != NULL; m++) { 507 methods_table[m]->enter(res, port); 508 if (methods_table[m]->vendor == SUPERIO_VENDOR_ITE) { 509 devid = sio_readw(res, 0x20); 510 revid = sio_read(res, 0x22); 511 } else if (methods_table[m]->vendor == SUPERIO_VENDOR_NUVOTON) { 512 devid = sio_read(res, 0x20); 513 revid = sio_read(res, 0x21); 514 devid = (devid << 8) | revid; 515 } else if (methods_table[m]->vendor == SUPERIO_VENDOR_FINTEK) { 516 devid = sio_read(res, 0x20); 517 revid = sio_read(res, 0x21); 518 devid = (devid << 8) | revid; 519 } else { 520 continue; 521 } 522 methods_table[m]->exit(res, port); 523 for (i = 0; superio_table[i].vendor != 0; i++) { 524 uint16_t mask; 525 526 mask = superio_table[i].mask; 527 if (superio_table[i].vendor != 528 methods_table[m]->vendor) 529 continue; 530 if ((superio_table[i].devid & ~mask) != (devid & ~mask)) 531 continue; 532 break; 533 } 534 535 /* Found a matching SuperIO entry. */ 536 if (superio_table[i].vendor != 0) 537 break; 538 } 539 540 if (methods_table[m] == NULL) 541 error = ENXIO; 542 else 543 error = 0; 544 if (!claim || error != 0) { 545 bus_release_resource(dev, SYS_RES_IOPORT, rid, res); 546 return (error); 547 } 548 549 sc->methods = methods_table[m]; 550 sc->vendor = sc->methods->vendor; 551 sc->known_devices = superio_table[i].devices; 552 sc->io_res = res; 553 sc->io_rid = rid; 554 sc->io_port = port; 555 sc->devid = devid; 556 sc->revid = revid; 557 558 KASSERT(sc->vendor == SUPERIO_VENDOR_ITE || 559 sc->vendor == SUPERIO_VENDOR_NUVOTON || 560 sc->vendor == SUPERIO_VENDOR_FINTEK, 561 ("Only ITE, Nuvoton and Fintek SuperIO-s are supported")); 562 sc->ldn_reg = 0x07; 563 sc->enable_reg = 0x30; 564 sc->current_ldn = 0xff; /* no device should have this */ 565 566 if (superio_table[i].descr != NULL) { 567 device_set_desc(dev, superio_table[i].descr); 568 } else if (sc->vendor == SUPERIO_VENDOR_ITE) { 569 char descr[64]; 570 571 snprintf(descr, sizeof(descr), 572 "ITE IT%4x SuperIO (revision 0x%02x)", 573 sc->devid, sc->revid); 574 device_set_desc_copy(dev, descr); 575 } 576 return (0); 577 } 578 579 static void 580 superio_identify(driver_t *driver, device_t parent) 581 { 582 device_t child; 583 int i; 584 585 /* 586 * Don't create child devices if any already exist. 587 * Those could be created via isa hints or if this 588 * driver is loaded, unloaded and then loaded again. 589 */ 590 if (device_find_child(parent, "superio", -1)) { 591 if (bootverbose) 592 printf("superio: device(s) already created\n"); 593 return; 594 } 595 596 /* 597 * Create a child for each candidate port. 598 * It would be nice if we could somehow clean up those 599 * that this driver fails to probe. 600 */ 601 for (i = 0; ports_table[i] != 0; i++) { 602 child = BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE, 603 "superio", -1); 604 if (child == NULL) { 605 device_printf(parent, "failed to add superio child\n"); 606 continue; 607 } 608 bus_set_resource(child, SYS_RES_IOPORT, 0, ports_table[i], 2); 609 if (superio_detect(child, false, NULL) != 0) 610 device_delete_child(parent, child); 611 } 612 } 613 614 static int 615 superio_probe(device_t dev) 616 { 617 struct siosc *sc; 618 int error; 619 620 /* Make sure we do not claim some ISA PNP device. */ 621 if (isa_get_logicalid(dev) != 0) 622 return (ENXIO); 623 624 /* 625 * XXX We can populate the softc now only because we return 626 * BUS_PROBE_SPECIFIC 627 */ 628 sc = device_get_softc(dev); 629 error = superio_detect(dev, true, sc); 630 if (error != 0) 631 return (error); 632 return (BUS_PROBE_SPECIFIC); 633 } 634 635 static void 636 superio_add_known_child(device_t dev, superio_dev_type_t type, uint8_t ldn) 637 { 638 struct siosc *sc = device_get_softc(dev); 639 struct superio_devinfo *dinfo; 640 device_t child; 641 642 child = BUS_ADD_CHILD(dev, 0, NULL, -1); 643 if (child == NULL) { 644 device_printf(dev, "failed to add child for ldn %d, type %s\n", 645 ldn, devtype_to_str(type)); 646 return; 647 } 648 dinfo = device_get_ivars(child); 649 dinfo->ldn = ldn; 650 dinfo->type = type; 651 sio_conf_enter(sc); 652 dinfo->iobase = sio_ldn_readw(sc, ldn, 0x60); 653 dinfo->iobase2 = sio_ldn_readw(sc, ldn, 0x62); 654 dinfo->irq = sio_ldn_readw(sc, ldn, 0x70); 655 dinfo->dma = sio_ldn_readw(sc, ldn, 0x74); 656 sio_conf_exit(sc); 657 STAILQ_INSERT_TAIL(&sc->devlist, dinfo, link); 658 } 659 660 static int 661 superio_attach(device_t dev) 662 { 663 struct siosc *sc = device_get_softc(dev); 664 int i; 665 666 mtx_init(&sc->conf_lock, device_get_nameunit(dev), "superio", MTX_DEF); 667 STAILQ_INIT(&sc->devlist); 668 669 for (i = 0; sc->known_devices[i].type != SUPERIO_DEV_NONE; i++) { 670 superio_add_known_child(dev, sc->known_devices[i].type, 671 sc->known_devices[i].ldn); 672 } 673 674 bus_generic_probe(dev); 675 bus_generic_attach(dev); 676 677 sc->chardev = make_dev(&superio_cdevsw, device_get_unit(dev), 678 UID_ROOT, GID_WHEEL, 0600, "superio%d", device_get_unit(dev)); 679 if (sc->chardev == NULL) 680 device_printf(dev, "failed to create character device\n"); 681 else 682 sc->chardev->si_drv1 = sc; 683 return (0); 684 } 685 686 static int 687 superio_detach(device_t dev) 688 { 689 struct siosc *sc = device_get_softc(dev); 690 int error; 691 692 error = bus_generic_detach(dev); 693 if (error != 0) 694 return (error); 695 if (sc->chardev != NULL) 696 destroy_dev(sc->chardev); 697 device_delete_children(dev); 698 bus_release_resource(dev, SYS_RES_IOPORT, sc->io_rid, sc->io_res); 699 mtx_destroy(&sc->conf_lock); 700 return (0); 701 } 702 703 static device_t 704 superio_add_child(device_t dev, u_int order, const char *name, int unit) 705 { 706 struct superio_devinfo *dinfo; 707 device_t child; 708 709 child = device_add_child_ordered(dev, order, name, unit); 710 if (child == NULL) 711 return (NULL); 712 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 713 if (dinfo == NULL) { 714 device_delete_child(dev, child); 715 return (NULL); 716 } 717 dinfo->ldn = 0xff; 718 dinfo->type = SUPERIO_DEV_NONE; 719 dinfo->dev = child; 720 resource_list_init(&dinfo->resources); 721 device_set_ivars(child, dinfo); 722 return (child); 723 } 724 725 static int 726 superio_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 727 { 728 struct superio_devinfo *dinfo; 729 730 dinfo = device_get_ivars(child); 731 switch (which) { 732 case SUPERIO_IVAR_LDN: 733 *result = dinfo->ldn; 734 break; 735 case SUPERIO_IVAR_TYPE: 736 *result = dinfo->type; 737 break; 738 case SUPERIO_IVAR_IOBASE: 739 *result = dinfo->iobase; 740 break; 741 case SUPERIO_IVAR_IOBASE2: 742 *result = dinfo->iobase2; 743 break; 744 case SUPERIO_IVAR_IRQ: 745 *result = dinfo->irq; 746 break; 747 case SUPERIO_IVAR_DMA: 748 *result = dinfo->dma; 749 break; 750 default: 751 return (ENOENT); 752 } 753 return (0); 754 } 755 756 static int 757 superio_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 758 { 759 760 switch (which) { 761 case SUPERIO_IVAR_LDN: 762 case SUPERIO_IVAR_TYPE: 763 case SUPERIO_IVAR_IOBASE: 764 case SUPERIO_IVAR_IOBASE2: 765 case SUPERIO_IVAR_IRQ: 766 case SUPERIO_IVAR_DMA: 767 return (EINVAL); 768 default: 769 return (ENOENT); 770 } 771 } 772 773 static struct resource_list * 774 superio_get_resource_list(device_t dev, device_t child) 775 { 776 struct superio_devinfo *dinfo = device_get_ivars(child); 777 778 return (&dinfo->resources); 779 } 780 781 static int 782 superio_printf(struct superio_devinfo *dinfo, const char *fmt, ...) 783 { 784 va_list ap; 785 int retval; 786 787 retval = printf("superio:%s@ldn%0x2x: ", 788 devtype_to_str(dinfo->type), dinfo->ldn); 789 va_start(ap, fmt); 790 retval += vprintf(fmt, ap); 791 va_end(ap); 792 return (retval); 793 } 794 795 static void 796 superio_child_detached(device_t dev, device_t child) 797 { 798 struct superio_devinfo *dinfo; 799 struct resource_list *rl; 800 801 dinfo = device_get_ivars(child); 802 rl = &dinfo->resources; 803 804 if (resource_list_release_active(rl, dev, child, SYS_RES_IRQ) != 0) 805 superio_printf(dinfo, "Device leaked IRQ resources\n"); 806 if (resource_list_release_active(rl, dev, child, SYS_RES_MEMORY) != 0) 807 superio_printf(dinfo, "Device leaked memory resources\n"); 808 if (resource_list_release_active(rl, dev, child, SYS_RES_IOPORT) != 0) 809 superio_printf(dinfo, "Device leaked I/O resources\n"); 810 } 811 812 static int 813 superio_child_location(device_t parent, device_t child, struct sbuf *sb) 814 { 815 uint8_t ldn; 816 817 ldn = superio_get_ldn(child); 818 sbuf_printf(sb, "ldn=0x%02x", ldn); 819 return (0); 820 } 821 822 static int 823 superio_child_pnp(device_t parent, device_t child, struct sbuf *sb) 824 { 825 superio_dev_type_t type; 826 827 type = superio_get_type(child); 828 sbuf_printf(sb, "type=%s", devtype_to_str(type)); 829 return (0); 830 } 831 832 static int 833 superio_print_child(device_t parent, device_t child) 834 { 835 superio_dev_type_t type; 836 uint8_t ldn; 837 int retval; 838 839 ldn = superio_get_ldn(child); 840 type = superio_get_type(child); 841 842 retval = bus_print_child_header(parent, child); 843 retval += printf(" at %s ldn 0x%02x", devtype_to_str(type), ldn); 844 retval += bus_print_child_footer(parent, child); 845 846 return (retval); 847 } 848 849 superio_vendor_t 850 superio_vendor(device_t dev) 851 { 852 device_t sio_dev = device_get_parent(dev); 853 struct siosc *sc = device_get_softc(sio_dev); 854 855 return (sc->vendor); 856 } 857 858 uint16_t 859 superio_devid(device_t dev) 860 { 861 device_t sio_dev = device_get_parent(dev); 862 struct siosc *sc = device_get_softc(sio_dev); 863 864 return (sc->devid); 865 } 866 867 uint8_t 868 superio_revid(device_t dev) 869 { 870 device_t sio_dev = device_get_parent(dev); 871 struct siosc *sc = device_get_softc(sio_dev); 872 873 return (sc->revid); 874 } 875 876 uint8_t 877 superio_read(device_t dev, uint8_t reg) 878 { 879 device_t sio_dev = device_get_parent(dev); 880 struct siosc *sc = device_get_softc(sio_dev); 881 struct superio_devinfo *dinfo = device_get_ivars(dev); 882 uint8_t v; 883 884 sio_conf_enter(sc); 885 v = sio_ldn_read(sc, dinfo->ldn, reg); 886 sio_conf_exit(sc); 887 return (v); 888 } 889 890 void 891 superio_write(device_t dev, uint8_t reg, uint8_t val) 892 { 893 device_t sio_dev = device_get_parent(dev); 894 struct siosc *sc = device_get_softc(sio_dev); 895 struct superio_devinfo *dinfo = device_get_ivars(dev); 896 897 sio_conf_enter(sc); 898 sio_ldn_write(sc, dinfo->ldn, reg, val); 899 sio_conf_exit(sc); 900 } 901 902 bool 903 superio_dev_enabled(device_t dev, uint8_t mask) 904 { 905 device_t sio_dev = device_get_parent(dev); 906 struct siosc *sc = device_get_softc(sio_dev); 907 struct superio_devinfo *dinfo = device_get_ivars(dev); 908 uint8_t v; 909 910 /* GPIO device is always active in ITE chips. */ 911 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 912 return (true); 913 914 v = superio_read(dev, sc->enable_reg); 915 return ((v & mask) != 0); 916 } 917 918 void 919 superio_dev_enable(device_t dev, uint8_t mask) 920 { 921 device_t sio_dev = device_get_parent(dev); 922 struct siosc *sc = device_get_softc(sio_dev); 923 struct superio_devinfo *dinfo = device_get_ivars(dev); 924 uint8_t v; 925 926 /* GPIO device is always active in ITE chips. */ 927 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 928 return; 929 930 sio_conf_enter(sc); 931 v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg); 932 v |= mask; 933 sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v); 934 sio_conf_exit(sc); 935 } 936 937 void 938 superio_dev_disable(device_t dev, uint8_t mask) 939 { 940 device_t sio_dev = device_get_parent(dev); 941 struct siosc *sc = device_get_softc(sio_dev); 942 struct superio_devinfo *dinfo = device_get_ivars(dev); 943 uint8_t v; 944 945 /* GPIO device is always active in ITE chips. */ 946 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 947 return; 948 949 sio_conf_enter(sc); 950 v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg); 951 v &= ~mask; 952 sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v); 953 sio_conf_exit(sc); 954 } 955 956 device_t 957 superio_find_dev(device_t superio, superio_dev_type_t type, int ldn) 958 { 959 struct siosc *sc = device_get_softc(superio); 960 struct superio_devinfo *dinfo; 961 962 if (ldn < -1 || ldn > UINT8_MAX) 963 return (NULL); /* ERANGE */ 964 if (type == SUPERIO_DEV_NONE && ldn == -1) 965 return (NULL); /* EINVAL */ 966 967 STAILQ_FOREACH(dinfo, &sc->devlist, link) { 968 if (ldn != -1 && dinfo->ldn != ldn) 969 continue; 970 if (type != SUPERIO_DEV_NONE && dinfo->type != type) 971 continue; 972 return (dinfo->dev); 973 } 974 return (NULL); 975 } 976 977 static int 978 superio_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int flags, 979 struct thread *td) 980 { 981 struct siosc *sc; 982 struct superiocmd *s; 983 984 sc = dev->si_drv1; 985 s = (struct superiocmd *)data; 986 switch (cmd) { 987 case SUPERIO_CR_READ: 988 sio_conf_enter(sc); 989 s->val = sio_ldn_read(sc, s->ldn, s->cr); 990 sio_conf_exit(sc); 991 return (0); 992 case SUPERIO_CR_WRITE: 993 sio_conf_enter(sc); 994 sio_ldn_write(sc, s->ldn, s->cr, s->val); 995 sio_conf_exit(sc); 996 return (0); 997 default: 998 return (ENOTTY); 999 } 1000 } 1001 1002 static device_method_t superio_methods[] = { 1003 DEVMETHOD(device_identify, superio_identify), 1004 DEVMETHOD(device_probe, superio_probe), 1005 DEVMETHOD(device_attach, superio_attach), 1006 DEVMETHOD(device_detach, superio_detach), 1007 DEVMETHOD(device_shutdown, bus_generic_shutdown), 1008 DEVMETHOD(device_suspend, bus_generic_suspend), 1009 DEVMETHOD(device_resume, bus_generic_resume), 1010 1011 DEVMETHOD(bus_add_child, superio_add_child), 1012 DEVMETHOD(bus_child_detached, superio_child_detached), 1013 DEVMETHOD(bus_child_location, superio_child_location), 1014 DEVMETHOD(bus_child_pnpinfo, superio_child_pnp), 1015 DEVMETHOD(bus_print_child, superio_print_child), 1016 DEVMETHOD(bus_read_ivar, superio_read_ivar), 1017 DEVMETHOD(bus_write_ivar, superio_write_ivar), 1018 DEVMETHOD(bus_get_resource_list, superio_get_resource_list), 1019 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 1020 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 1021 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 1022 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 1023 DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource), 1024 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 1025 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 1026 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 1027 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 1028 1029 DEVMETHOD_END 1030 }; 1031 1032 static driver_t superio_driver = { 1033 "superio", 1034 superio_methods, 1035 sizeof(struct siosc) 1036 }; 1037 1038 DRIVER_MODULE(superio, isa, superio_driver, 0, 0); 1039 MODULE_VERSION(superio, 1); 1040