xref: /freebsd/sys/dev/superio/superio.c (revision a3557ef0)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2019 Andriy Gapon
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  */
29 
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bus.h>
36 #include <sys/conf.h>
37 #include <sys/kernel.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 #include <sys/malloc.h>
41 #include <sys/module.h>
42 #include <sys/proc.h>
43 #include <sys/rman.h>
44 #include <sys/time.h>
45 
46 #include <machine/bus.h>
47 #include <machine/resource.h>
48 #include <machine/stdarg.h>
49 
50 #include <isa/isavar.h>
51 
52 #include <dev/superio/superio.h>
53 #include <dev/superio/superio_io.h>
54 
55 #include "isa_if.h"
56 
57 
58 typedef void (*sio_conf_enter_f)(struct resource*, uint16_t);
59 typedef void (*sio_conf_exit_f)(struct resource*, uint16_t);
60 
61 struct sio_conf_methods {
62 	sio_conf_enter_f	enter;
63 	sio_conf_exit_f		exit;
64 	superio_vendor_t	vendor;
65 };
66 
67 struct sio_device {
68 	uint8_t			ldn;
69 	superio_dev_type_t	type;
70 };
71 
72 struct superio_devinfo {
73 	STAILQ_ENTRY(superio_devinfo) link;
74 	struct resource_list	resources;
75 	device_t		dev;
76 	uint8_t			ldn;
77 	superio_dev_type_t	type;
78 	uint16_t		iobase;
79 	uint16_t		iobase2;
80 	uint8_t			irq;
81 	uint8_t			dma;
82 };
83 
84 struct siosc {
85 	struct mtx			conf_lock;
86 	STAILQ_HEAD(, superio_devinfo)	devlist;
87 	struct resource*		io_res;
88 	struct cdev			*chardev;
89 	int				io_rid;
90 	uint16_t			io_port;
91 	const struct sio_conf_methods	*methods;
92 	const struct sio_device		*known_devices;
93 	superio_vendor_t		vendor;
94 	uint16_t			devid;
95 	uint8_t				revid;
96 	uint8_t				current_ldn;
97 	uint8_t				ldn_reg;
98 	uint8_t				enable_reg;
99 };
100 
101 static	d_ioctl_t	superio_ioctl;
102 
103 static struct cdevsw superio_cdevsw = {
104 	.d_version =	D_VERSION,
105 	.d_ioctl =	superio_ioctl,
106 	.d_name =	"superio",
107 };
108 
109 #define NUMPORTS	2
110 
111 static uint8_t
112 sio_read(struct resource* res, uint8_t reg)
113 {
114 	bus_write_1(res, 0, reg);
115 	return (bus_read_1(res, 1));
116 }
117 
118 /* Read a word from two one-byte registers, big endian. */
119 static uint16_t
120 sio_readw(struct resource* res, uint8_t reg)
121 {
122 	uint16_t v;
123 
124 	v = sio_read(res, reg);
125 	v <<= 8;
126 	v |= sio_read(res, reg + 1);
127 	return (v);
128 }
129 
130 static void
131 sio_write(struct resource* res, uint8_t reg, uint8_t val)
132 {
133 	bus_write_1(res, 0, reg);
134 	bus_write_1(res, 1, val);
135 }
136 
137 static void
138 sio_ldn_select(struct siosc *sc, uint8_t ldn)
139 {
140 	mtx_assert(&sc->conf_lock, MA_OWNED);
141 	if (ldn == sc->current_ldn)
142 		return;
143 	sio_write(sc->io_res, sc->ldn_reg, ldn);
144 	sc->current_ldn = ldn;
145 }
146 
147 static uint8_t
148 sio_ldn_read(struct siosc *sc, uint8_t ldn, uint8_t reg)
149 {
150 	mtx_assert(&sc->conf_lock, MA_OWNED);
151 	if (reg >= sc->enable_reg) {
152 		sio_ldn_select(sc, ldn);
153 		KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed"));
154 	}
155 	return (sio_read(sc->io_res, reg));
156 }
157 
158 static uint16_t
159 sio_ldn_readw(struct siosc *sc, uint8_t ldn, uint8_t reg)
160 {
161 	mtx_assert(&sc->conf_lock, MA_OWNED);
162 	if (reg >= sc->enable_reg) {
163 		sio_ldn_select(sc, ldn);
164 		KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed"));
165 	}
166 	return (sio_readw(sc->io_res, reg));
167 }
168 
169 static void
170 sio_ldn_write(struct siosc *sc, uint8_t ldn, uint8_t reg, uint8_t val)
171 {
172 	mtx_assert(&sc->conf_lock, MA_OWNED);
173 	if (reg <= sc->ldn_reg) {
174 		printf("ignored attempt to write special register 0x%x\n", reg);
175 		return;
176 	}
177 	sio_ldn_select(sc, ldn);
178 	KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed"));
179 	sio_write(sc->io_res, reg, val);
180 }
181 
182 static void
183 sio_conf_enter(struct siosc *sc)
184 {
185 	mtx_lock(&sc->conf_lock);
186 	sc->methods->enter(sc->io_res, sc->io_port);
187 }
188 
189 static void
190 sio_conf_exit(struct siosc *sc)
191 {
192 	sc->methods->exit(sc->io_res, sc->io_port);
193 	sc->current_ldn = 0xff;
194 	mtx_unlock(&sc->conf_lock);
195 }
196 
197 static void
198 ite_conf_enter(struct resource* res, uint16_t port)
199 {
200 	bus_write_1(res, 0, 0x87);
201 	bus_write_1(res, 0, 0x01);
202 	bus_write_1(res, 0, 0x55);
203 	bus_write_1(res, 0, port == 0x2e ? 0x55 : 0xaa);
204 }
205 
206 static void
207 ite_conf_exit(struct resource* res, uint16_t port)
208 {
209 	sio_write(res, 0x02, 0x02);
210 }
211 
212 static const struct sio_conf_methods ite_conf_methods = {
213 	.enter = ite_conf_enter,
214 	.exit = ite_conf_exit,
215 	.vendor = SUPERIO_VENDOR_ITE
216 };
217 
218 static void
219 nvt_conf_enter(struct resource* res, uint16_t port)
220 {
221 	bus_write_1(res, 0, 0x87);
222 	bus_write_1(res, 0, 0x87);
223 }
224 
225 static void
226 nvt_conf_exit(struct resource* res, uint16_t port)
227 {
228 	bus_write_1(res, 0, 0xaa);
229 }
230 
231 static const struct sio_conf_methods nvt_conf_methods = {
232 	.enter = nvt_conf_enter,
233 	.exit = nvt_conf_exit,
234 	.vendor = SUPERIO_VENDOR_NUVOTON
235 };
236 
237 static const struct sio_conf_methods * const methods_table[] = {
238 	&ite_conf_methods,
239 	&nvt_conf_methods,
240 	NULL
241 };
242 
243 static const uint16_t ports_table[] = {
244 	0x2e, 0x4e, 0
245 };
246 
247 const struct sio_device ite_devices[] = {
248 	{ .ldn = 4, .type = SUPERIO_DEV_HWM },
249 	{ .ldn = 7, .type = SUPERIO_DEV_WDT },
250 	{ .type = SUPERIO_DEV_NONE },
251 };
252 
253 const struct sio_device nvt_devices[] = {
254 	{ .ldn = 8, .type = SUPERIO_DEV_WDT },
255 	{ .type = SUPERIO_DEV_NONE },
256 };
257 
258 const struct sio_device nct5104_devices[] = {
259 	{ .ldn = 7, .type = SUPERIO_DEV_GPIO },
260 	{ .ldn = 8, .type = SUPERIO_DEV_WDT },
261 	{ .ldn = 15, .type = SUPERIO_DEV_GPIO },
262 	{ .type = SUPERIO_DEV_NONE },
263 };
264 
265 static const struct {
266 	superio_vendor_t	vendor;
267 	uint16_t		devid;
268 	uint16_t		mask;
269 	const char		*descr;
270 	const struct sio_device	*devices;
271 } superio_table[] = {
272 	{
273 		.vendor = SUPERIO_VENDOR_ITE, .devid = 0x8712,
274 		.devices = ite_devices,
275 	},
276 	{
277 		.vendor = SUPERIO_VENDOR_ITE, .devid = 0x8716,
278 		.devices = ite_devices,
279 	},
280 	{
281 		.vendor = SUPERIO_VENDOR_ITE, .devid = 0x8718,
282 		.devices = ite_devices,
283 	},
284 	{
285 		.vendor = SUPERIO_VENDOR_ITE, .devid = 0x8720,
286 		.devices = ite_devices,
287 	},
288 	{
289 		.vendor = SUPERIO_VENDOR_ITE, .devid = 0x8721,
290 		.devices = ite_devices,
291 	},
292 	{
293 		.vendor = SUPERIO_VENDOR_ITE, .devid = 0x8726,
294 		.devices = ite_devices,
295 	},
296 	{
297 		.vendor = SUPERIO_VENDOR_ITE, .devid = 0x8728,
298 		.devices = ite_devices,
299 	},
300 	{
301 		.vendor = SUPERIO_VENDOR_ITE, .devid = 0x8771,
302 		.devices = ite_devices,
303 	},
304 	{
305 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x1061, .mask = 0x00,
306 		.descr	= "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. A)",
307 		.devices = nct5104_devices,
308 	},
309 	{
310 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5200, .mask = 0xff,
311 		.descr = "Winbond 83627HF/F/HG/G",
312 		.devices = nvt_devices,
313 	},
314 	{
315 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5900, .mask = 0xff,
316 		.descr = "Winbond 83627S",
317 		.devices = nvt_devices,
318 	},
319 	{
320 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6000, .mask = 0xff,
321 		.descr = "Winbond 83697HF",
322 		.devices = nvt_devices,
323 	},
324 	{
325 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6800, .mask = 0xff,
326 		.descr = "Winbond 83697UG",
327 		.devices = nvt_devices,
328 	},
329 	{
330 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x7000, .mask = 0xff,
331 		.descr = "Winbond 83637HF",
332 		.devices = nvt_devices,
333 	},
334 	{
335 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8200, .mask = 0xff,
336 		.descr = "Winbond 83627THF",
337 		.devices = nvt_devices,
338 	},
339 	{
340 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8500, .mask = 0xff,
341 		.descr = "Winbond 83687THF",
342 		.devices = nvt_devices,
343 	},
344 	{
345 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8800, .mask = 0xff,
346 		.descr = "Winbond 83627EHF",
347 		.devices = nvt_devices,
348 	},
349 	{
350 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa000, .mask = 0xff,
351 		.descr = "Winbond 83627DHG",
352 		.devices = nvt_devices,
353 	},
354 	{
355 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa200, .mask = 0xff,
356 		.descr = "Winbond 83627UHG",
357 		.devices = nvt_devices,
358 	},
359 	{
360 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa500, .mask = 0xff,
361 		.descr = "Winbond 83667HG",
362 		.devices = nvt_devices,
363 	},
364 	{
365 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb000, .mask = 0xff,
366 		.descr = "Winbond 83627DHG-P",
367 		.devices = nvt_devices,
368 	},
369 	{
370 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb300, .mask = 0xff,
371 		.descr = "Winbond 83667HG-B",
372 		.devices = nvt_devices,
373 	},
374 	{
375 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb400, .mask = 0xff,
376 		.descr = "Nuvoton NCT6775",
377 		.devices = nvt_devices,
378 	},
379 	{
380 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc300, .mask = 0xff,
381 		.descr = "Nuvoton NCT6776",
382 		.devices = nvt_devices,
383 	},
384 	{
385 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc400, .mask = 0xff,
386 		.descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. B+)",
387 		.devices = nct5104_devices,
388 	},
389 	{
390 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc500, .mask = 0xff,
391 		.descr = "Nuvoton NCT6779",
392 		.devices = nvt_devices,
393 	},
394 	{
395 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc800, .mask = 0xff,
396 		.descr = "Nuvoton NCT6791",
397 		.devices = nvt_devices,
398 	},
399 	{
400 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc900, .mask = 0xff,
401 		.descr = "Nuvoton NCT6792",
402 		.devices = nvt_devices,
403 	},
404 	{
405 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd100, .mask = 0xff,
406 		.descr = "Nuvoton NCT6793",
407 		.devices = nvt_devices,
408 	},
409 	{
410 		.vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd300, .mask = 0xff,
411 		.descr = "Nuvoton NCT6795",
412 		.devices = nvt_devices,
413 	},
414 	{ 0, 0 }
415 };
416 
417 static const char *
418 devtype_to_str(superio_dev_type_t type)
419 {
420 	switch (type) {
421 	case SUPERIO_DEV_NONE:
422 		return ("none");
423 	case SUPERIO_DEV_HWM:
424 		return ("HWM");
425 	case SUPERIO_DEV_WDT:
426 		return ("WDT");
427 	case SUPERIO_DEV_GPIO:
428 		return ("GPIO");
429 	case SUPERIO_DEV_MAX:
430 		return ("invalid");
431 	}
432 	return ("invalid");
433 }
434 
435 static int
436 superio_detect(device_t dev, bool claim, struct siosc *sc)
437 {
438 	struct resource *res;
439 	rman_res_t port;
440 	rman_res_t count;
441 	uint16_t devid;
442 	uint8_t revid;
443 	int error;
444 	int rid;
445 	int i, m;
446 
447 	error = bus_get_resource(dev, SYS_RES_IOPORT, 0, &port, &count);
448 	if (error != 0)
449 		return (error);
450 	if (port > UINT16_MAX || count < NUMPORTS) {
451 		device_printf(dev, "unexpected I/O range size\n");
452 		return (ENXIO);
453 	}
454 
455 	/*
456 	 * Make a temporary resource reservation for hardware probing.
457 	 * If we can't get the resources we need then
458 	 * we need to abort.  Possibly this indicates
459 	 * the resources were used by another device
460 	 * in which case the probe would have failed anyhow.
461 	 */
462 	rid = 0;
463 	res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
464 	if (res == NULL) {
465 		if (claim)
466 			device_printf(dev, "failed to allocate I/O resource\n");
467 		return (ENXIO);
468 	}
469 
470 	for (m = 0; methods_table[m] != NULL; m++) {
471 		methods_table[m]->enter(res, port);
472 		if (methods_table[m]->vendor == SUPERIO_VENDOR_ITE) {
473 			devid = sio_readw(res, 0x20);
474 			revid = sio_read(res, 0x22);
475 		} else if (methods_table[m]->vendor == SUPERIO_VENDOR_NUVOTON) {
476 			devid = sio_read(res, 0x20);
477 			revid = sio_read(res, 0x21);
478 			devid = (devid << 8) | revid;
479 		} else {
480 			continue;
481 		}
482 		methods_table[m]->exit(res, port);
483 		for (i = 0; superio_table[i].vendor != 0; i++) {
484 			uint16_t mask;
485 
486 			mask = superio_table[i].mask;
487 			if (superio_table[i].vendor !=
488 			    methods_table[m]->vendor)
489 				continue;
490 			if ((superio_table[i].devid & ~mask) != (devid & ~mask))
491 				continue;
492 			break;
493 		}
494 
495 		/* Found a matching SuperIO entry. */
496 		if (superio_table[i].vendor != 0)
497 			break;
498 	}
499 
500 	if (methods_table[m] == NULL)
501 		error = ENXIO;
502 	else
503 		error = 0;
504 	if (!claim || error != 0) {
505 		bus_release_resource(dev, SYS_RES_IOPORT, rid, res);
506 		return (error);
507 	}
508 
509 	sc->methods = methods_table[m];
510 	sc->vendor = sc->methods->vendor;
511 	sc->known_devices = superio_table[i].devices;
512 	sc->io_res = res;
513 	sc->io_rid = rid;
514 	sc->io_port = port;
515 	sc->devid = devid;
516 	sc->revid = revid;
517 
518 	KASSERT(sc->vendor == SUPERIO_VENDOR_ITE ||
519 	    sc->vendor == SUPERIO_VENDOR_NUVOTON,
520 	    ("Only ITE and Nuvoton SuperIO-s are supported"));
521 	sc->ldn_reg = 0x07;
522 	sc->enable_reg = 0x30;
523 	sc->current_ldn = 0xff;	/* no device should have this */
524 
525 	if (superio_table[i].descr != NULL) {
526 		device_set_desc(dev, superio_table[i].descr);
527 	} else if (sc->vendor == SUPERIO_VENDOR_ITE) {
528 		char descr[64];
529 
530 		snprintf(descr, sizeof(descr),
531 		    "ITE IT%4x SuperIO (revision 0x%02x)",
532 		    sc->devid, sc->revid);
533 		device_set_desc_copy(dev, descr);
534 	}
535 	return (0);
536 }
537 
538 static void
539 superio_identify(driver_t *driver, device_t parent)
540 {
541 	device_t	child;
542 	int i;
543 
544 	/*
545 	 * Don't create child devices if any already exist.
546 	 * Those could be created via isa hints or if this
547 	 * driver is loaded, unloaded and then loaded again.
548 	 */
549 	if (device_find_child(parent, "superio", -1)) {
550 		if (bootverbose)
551 			printf("superio: device(s) already created\n");
552 		return;
553 	}
554 
555 	/*
556 	 * Create a child for each candidate port.
557 	 * It would be nice if we could somehow clean up those
558 	 * that this driver fails to probe.
559 	 */
560 	for (i = 0; ports_table[i] != 0; i++) {
561 		child = BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE,
562 		    "superio", -1);
563 		if (child == NULL) {
564 			device_printf(parent, "failed to add superio child\n");
565 			continue;
566 		}
567 		bus_set_resource(child, SYS_RES_IOPORT,	0, ports_table[i], 2);
568 		if (superio_detect(child, false, NULL) != 0)
569 			device_delete_child(parent, child);
570 	}
571 }
572 
573 static int
574 superio_probe(device_t dev)
575 {
576 	struct siosc *sc;
577 	int error;
578 
579 	/* Make sure we do not claim some ISA PNP device. */
580 	if (isa_get_logicalid(dev) != 0)
581 		return (ENXIO);
582 
583 	/*
584 	 * XXX We can populate the softc now only because we return
585 	 * BUS_PROBE_SPECIFIC
586 	 */
587 	sc = device_get_softc(dev);
588 	error = superio_detect(dev, true, sc);
589 	if (error != 0)
590 		return (error);
591 	return (BUS_PROBE_SPECIFIC);
592 }
593 
594 static void
595 superio_add_known_child(device_t dev, superio_dev_type_t type, uint8_t ldn)
596 {
597 	struct siosc *sc = device_get_softc(dev);
598 	struct superio_devinfo *dinfo;
599 	device_t child;
600 
601 	child = BUS_ADD_CHILD(dev, 0, NULL, -1);
602 	if (child == NULL) {
603 		device_printf(dev, "failed to add child for ldn %d, type %s\n",
604 		    ldn, devtype_to_str(type));
605 		return;
606 	}
607 	dinfo = device_get_ivars(child);
608 	dinfo->ldn = ldn;
609 	dinfo->type = type;
610 	sio_conf_enter(sc);
611 	dinfo->iobase = sio_ldn_readw(sc, ldn, 0x60);
612 	dinfo->iobase2 = sio_ldn_readw(sc, ldn, 0x62);
613 	dinfo->irq = sio_ldn_readw(sc, ldn, 0x70);
614 	dinfo->dma = sio_ldn_readw(sc, ldn, 0x74);
615 	sio_conf_exit(sc);
616 	STAILQ_INSERT_TAIL(&sc->devlist, dinfo, link);
617 }
618 
619 static int
620 superio_attach(device_t dev)
621 {
622 	struct siosc *sc = device_get_softc(dev);
623 	int i;
624 
625 	mtx_init(&sc->conf_lock, device_get_nameunit(dev), "superio", MTX_DEF);
626 	STAILQ_INIT(&sc->devlist);
627 
628 	for (i = 0; sc->known_devices[i].type != SUPERIO_DEV_NONE; i++) {
629 		superio_add_known_child(dev, sc->known_devices[i].type,
630 		    sc->known_devices[i].ldn);
631 	}
632 
633 	bus_generic_probe(dev);
634 	bus_generic_attach(dev);
635 
636 	sc->chardev = make_dev(&superio_cdevsw, device_get_unit(dev),
637 	    UID_ROOT, GID_WHEEL, 0600, "superio%d", device_get_unit(dev));
638 	if (sc->chardev == NULL)
639 		device_printf(dev, "failed to create character device\n");
640 	else
641 		sc->chardev->si_drv1 = sc;
642 	return (0);
643 }
644 
645 static int
646 superio_detach(device_t dev)
647 {
648 	struct siosc *sc = device_get_softc(dev);
649 	int error;
650 
651 	error = bus_generic_detach(dev);
652 	if (error != 0)
653 		return (error);
654 	if (sc->chardev != NULL)
655 		destroy_dev(sc->chardev);
656 	device_delete_children(dev);
657 	bus_release_resource(dev, SYS_RES_IOPORT, sc->io_rid, sc->io_res);
658 	mtx_destroy(&sc->conf_lock);
659 	return (0);
660 }
661 
662 static device_t
663 superio_add_child(device_t dev, u_int order, const char *name, int unit)
664 {
665 	struct superio_devinfo *dinfo;
666 	device_t child;
667 
668 	child = device_add_child_ordered(dev, order, name, unit);
669 	if (child == NULL)
670 		return (NULL);
671 	dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
672 	if (dinfo == NULL) {
673 		device_delete_child(dev, child);
674 		return (NULL);
675 	}
676 	dinfo->ldn = 0xff;
677 	dinfo->type = SUPERIO_DEV_NONE;
678 	dinfo->dev = child;
679 	resource_list_init(&dinfo->resources);
680 	device_set_ivars(child, dinfo);
681 	return (child);
682 }
683 
684 static int
685 superio_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
686 {
687 	struct superio_devinfo *dinfo;
688 
689 	dinfo = device_get_ivars(child);
690 	switch (which) {
691 	case SUPERIO_IVAR_LDN:
692 		*result = dinfo->ldn;
693 		break;
694 	case SUPERIO_IVAR_TYPE:
695 		*result = dinfo->type;
696 		break;
697 	case SUPERIO_IVAR_IOBASE:
698 		*result = dinfo->iobase;
699 		break;
700 	case SUPERIO_IVAR_IOBASE2:
701 		*result = dinfo->iobase2;
702 		break;
703 	case SUPERIO_IVAR_IRQ:
704 		*result = dinfo->irq;
705 		break;
706 	case SUPERIO_IVAR_DMA:
707 		*result = dinfo->dma;
708 		break;
709 	default:
710 		return (ENOENT);
711 	}
712 	return (0);
713 }
714 
715 static int
716 superio_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
717 {
718 
719 	switch (which) {
720 	case SUPERIO_IVAR_LDN:
721 	case SUPERIO_IVAR_TYPE:
722 	case SUPERIO_IVAR_IOBASE:
723 	case SUPERIO_IVAR_IOBASE2:
724 	case SUPERIO_IVAR_IRQ:
725 	case SUPERIO_IVAR_DMA:
726 		return (EINVAL);
727 	default:
728 		return (ENOENT);
729 	}
730 }
731 
732 static struct resource_list *
733 superio_get_resource_list(device_t dev, device_t child)
734 {
735 	struct superio_devinfo *dinfo = device_get_ivars(child);
736 
737 	return (&dinfo->resources);
738 }
739 
740 static int
741 superio_printf(struct superio_devinfo *dinfo, const char *fmt, ...)
742 {
743 	va_list ap;
744 	int retval;
745 
746 	retval = printf("superio:%s@ldn%0x2x: ",
747 	    devtype_to_str(dinfo->type), dinfo->ldn);
748 	va_start(ap, fmt);
749 	retval += vprintf(fmt, ap);
750 	va_end(ap);
751 	return (retval);
752 }
753 
754 static void
755 superio_child_detached(device_t dev, device_t child)
756 {
757 	struct superio_devinfo *dinfo;
758 	struct resource_list *rl;
759 
760 	dinfo = device_get_ivars(child);
761 	rl = &dinfo->resources;
762 
763 	if (resource_list_release_active(rl, dev, child, SYS_RES_IRQ) != 0)
764 		superio_printf(dinfo, "Device leaked IRQ resources\n");
765 	if (resource_list_release_active(rl, dev, child, SYS_RES_MEMORY) != 0)
766 		superio_printf(dinfo, "Device leaked memory resources\n");
767 	if (resource_list_release_active(rl, dev, child, SYS_RES_IOPORT) != 0)
768 		superio_printf(dinfo, "Device leaked I/O resources\n");
769 }
770 
771 static int
772 superio_child_location_str(device_t parent, device_t child, char *buf,
773     size_t buflen)
774 {
775 	uint8_t ldn;
776 
777 	ldn = superio_get_ldn(child);
778 	snprintf(buf, buflen, "ldn=0x%02x", ldn);
779 	return (0);
780 }
781 
782 static int
783 superio_child_pnp_str(device_t parent, device_t child, char *buf,
784     size_t buflen)
785 {
786 	superio_dev_type_t type;
787 
788 	type = superio_get_type(child);
789 	snprintf(buf, buflen, "type=%s", devtype_to_str(type));
790 	return (0);
791 }
792 
793 static int
794 superio_print_child(device_t parent, device_t child)
795 {
796 	superio_dev_type_t type;
797 	uint8_t ldn;
798 	int retval;
799 
800 	ldn = superio_get_ldn(child);
801 	type = superio_get_type(child);
802 
803 	retval = bus_print_child_header(parent, child);
804 	retval += printf(" at %s ldn 0x%02x", devtype_to_str(type), ldn);
805 	retval += bus_print_child_footer(parent, child);
806 
807 	return (retval);
808 }
809 
810 superio_vendor_t
811 superio_vendor(device_t dev)
812 {
813 	device_t sio_dev = device_get_parent(dev);
814 	struct siosc *sc = device_get_softc(sio_dev);
815 
816 	return (sc->vendor);
817 }
818 
819 uint16_t
820 superio_devid(device_t dev)
821 {
822 	device_t sio_dev = device_get_parent(dev);
823 	struct siosc *sc = device_get_softc(sio_dev);
824 
825 	return (sc->devid);
826 }
827 
828 uint8_t
829 superio_revid(device_t dev)
830 {
831 	device_t sio_dev = device_get_parent(dev);
832 	struct siosc *sc = device_get_softc(sio_dev);
833 
834 	return (sc->revid);
835 }
836 
837 uint8_t
838 superio_read(device_t dev, uint8_t reg)
839 {
840 	device_t sio_dev = device_get_parent(dev);
841 	struct siosc *sc = device_get_softc(sio_dev);
842 	struct superio_devinfo *dinfo = device_get_ivars(dev);
843 	uint8_t v;
844 
845 	sio_conf_enter(sc);
846 	v = sio_ldn_read(sc, dinfo->ldn, reg);
847 	sio_conf_exit(sc);
848 	return (v);
849 }
850 
851 void
852 superio_write(device_t dev, uint8_t reg, uint8_t val)
853 {
854 	device_t sio_dev = device_get_parent(dev);
855 	struct siosc *sc = device_get_softc(sio_dev);
856 	struct superio_devinfo *dinfo = device_get_ivars(dev);
857 
858 	sio_conf_enter(sc);
859 	sio_ldn_write(sc, dinfo->ldn, reg, val);
860 	sio_conf_exit(sc);
861 }
862 
863 bool
864 superio_dev_enabled(device_t dev, uint8_t mask)
865 {
866 	device_t sio_dev = device_get_parent(dev);
867 	struct siosc *sc = device_get_softc(sio_dev);
868 	struct superio_devinfo *dinfo = device_get_ivars(dev);
869 	uint8_t v;
870 
871 	/* GPIO device is always active in ITE chips. */
872 	if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7)
873 		return (true);
874 
875 	v = superio_read(dev, sc->enable_reg);
876 	return ((v & mask) != 0);
877 }
878 
879 void
880 superio_dev_enable(device_t dev, uint8_t mask)
881 {
882 	device_t sio_dev = device_get_parent(dev);
883 	struct siosc *sc = device_get_softc(sio_dev);
884 	struct superio_devinfo *dinfo = device_get_ivars(dev);
885 	uint8_t v;
886 
887 	/* GPIO device is always active in ITE chips. */
888 	if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7)
889 		return;
890 
891 	sio_conf_enter(sc);
892 	v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg);
893 	v |= mask;
894 	sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v);
895 	sio_conf_exit(sc);
896 }
897 
898 void
899 superio_dev_disable(device_t dev, uint8_t mask)
900 {
901 	device_t sio_dev = device_get_parent(dev);
902 	struct siosc *sc = device_get_softc(sio_dev);
903 	struct superio_devinfo *dinfo = device_get_ivars(dev);
904 	uint8_t v;
905 
906 	/* GPIO device is always active in ITE chips. */
907 	if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7)
908 		return;
909 
910 	sio_conf_enter(sc);
911 	v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg);
912 	v &= ~mask;
913 	sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v);
914 	sio_conf_exit(sc);
915 }
916 
917 device_t
918 superio_find_dev(device_t superio, superio_dev_type_t type, int ldn)
919 {
920 	struct siosc *sc = device_get_softc(superio);
921 	struct superio_devinfo *dinfo;
922 
923 	if (ldn < -1 || ldn > UINT8_MAX)
924 		return (NULL);		/* ERANGE */
925 	if (type == SUPERIO_DEV_NONE && ldn == -1)
926 		return (NULL);		/* EINVAL */
927 
928 	STAILQ_FOREACH(dinfo, &sc->devlist, link) {
929 		if (ldn != -1 && dinfo->ldn != ldn)
930 			continue;
931 		if (type != SUPERIO_DEV_NONE && dinfo->type != type)
932 			continue;
933 		return (dinfo->dev);
934 	}
935 	return (NULL);
936 }
937 
938 static int
939 superio_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int flags,
940     struct thread *td)
941 {
942 	struct siosc *sc;
943 	struct superiocmd *s;
944 
945 	sc = dev->si_drv1;
946 	s = (struct superiocmd *)data;
947 	switch (cmd) {
948 	case SUPERIO_CR_READ:
949 		sio_conf_enter(sc);
950 		s->val = sio_ldn_read(sc, s->ldn, s->cr);
951 		sio_conf_exit(sc);
952 		return (0);
953 	case SUPERIO_CR_WRITE:
954 		sio_conf_enter(sc);
955 		sio_ldn_write(sc, s->ldn, s->cr, s->val);
956 		sio_conf_exit(sc);
957 		return (0);
958 	default:
959 		return (ENOTTY);
960 	}
961 }
962 
963 static devclass_t superio_devclass;
964 
965 static device_method_t superio_methods[] = {
966 	DEVMETHOD(device_identify,	superio_identify),
967 	DEVMETHOD(device_probe,		superio_probe),
968 	DEVMETHOD(device_attach,	superio_attach),
969 	DEVMETHOD(device_detach,	superio_detach),
970 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
971 	DEVMETHOD(device_suspend,	bus_generic_suspend),
972 	DEVMETHOD(device_resume,	bus_generic_resume),
973 
974 	DEVMETHOD(bus_add_child,	superio_add_child),
975 	DEVMETHOD(bus_child_detached,	superio_child_detached),
976 	DEVMETHOD(bus_child_location_str, superio_child_location_str),
977 	DEVMETHOD(bus_child_pnpinfo_str, superio_child_pnp_str),
978 	DEVMETHOD(bus_print_child,	superio_print_child),
979 	DEVMETHOD(bus_read_ivar,	superio_read_ivar),
980 	DEVMETHOD(bus_write_ivar,	superio_write_ivar),
981 	DEVMETHOD(bus_get_resource_list, superio_get_resource_list),
982 	DEVMETHOD(bus_alloc_resource,	bus_generic_rl_alloc_resource),
983 	DEVMETHOD(bus_release_resource,	bus_generic_rl_release_resource),
984 	DEVMETHOD(bus_set_resource,	bus_generic_rl_set_resource),
985 	DEVMETHOD(bus_get_resource,	bus_generic_rl_get_resource),
986 	DEVMETHOD(bus_delete_resource,	bus_generic_rl_delete_resource),
987 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
988 	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
989 	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
990 	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
991 
992 	DEVMETHOD_END
993 };
994 
995 static driver_t superio_driver = {
996 	"superio",
997 	superio_methods,
998 	sizeof(struct siosc)
999 };
1000 
1001 DRIVER_MODULE(superio, isa, superio_driver, superio_devclass, 0, 0);
1002 MODULE_VERSION(superio, 1);
1003