1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2019 Andriy Gapon 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/bus.h> 31 #include <sys/conf.h> 32 #include <sys/kernel.h> 33 #include <sys/lock.h> 34 #include <sys/mutex.h> 35 #include <sys/malloc.h> 36 #include <sys/module.h> 37 #include <sys/proc.h> 38 #include <sys/rman.h> 39 #include <sys/sbuf.h> 40 #include <sys/time.h> 41 42 #include <machine/bus.h> 43 #include <machine/resource.h> 44 #include <machine/stdarg.h> 45 46 #include <isa/isavar.h> 47 48 #include <dev/superio/superio.h> 49 #include <dev/superio/superio_io.h> 50 51 #include "isa_if.h" 52 53 typedef void (*sio_conf_enter_f)(struct resource*, uint16_t); 54 typedef void (*sio_conf_exit_f)(struct resource*, uint16_t); 55 56 struct sio_conf_methods { 57 sio_conf_enter_f enter; 58 sio_conf_exit_f exit; 59 superio_vendor_t vendor; 60 }; 61 62 struct sio_device { 63 uint8_t ldn; 64 superio_dev_type_t type; 65 }; 66 67 struct superio_devinfo { 68 STAILQ_ENTRY(superio_devinfo) link; 69 struct resource_list resources; 70 device_t dev; 71 uint8_t ldn; 72 superio_dev_type_t type; 73 uint16_t iobase; 74 uint16_t iobase2; 75 uint8_t irq; 76 uint8_t dma; 77 }; 78 79 struct siosc { 80 struct mtx conf_lock; 81 STAILQ_HEAD(, superio_devinfo) devlist; 82 struct resource* io_res; 83 struct cdev *chardev; 84 int io_rid; 85 uint16_t io_port; 86 const struct sio_conf_methods *methods; 87 const struct sio_device *known_devices; 88 superio_vendor_t vendor; 89 uint16_t devid; 90 uint8_t revid; 91 int extid; 92 uint8_t current_ldn; 93 uint8_t ldn_reg; 94 uint8_t enable_reg; 95 }; 96 97 static d_ioctl_t superio_ioctl; 98 99 static struct cdevsw superio_cdevsw = { 100 .d_version = D_VERSION, 101 .d_ioctl = superio_ioctl, 102 .d_name = "superio", 103 }; 104 105 #define NUMPORTS 2 106 107 static uint8_t 108 sio_read(struct resource* res, uint8_t reg) 109 { 110 bus_write_1(res, 0, reg); 111 return (bus_read_1(res, 1)); 112 } 113 114 /* Read a word from two one-byte registers, big endian. */ 115 static uint16_t 116 sio_readw(struct resource* res, uint8_t reg) 117 { 118 uint16_t v; 119 120 v = sio_read(res, reg); 121 v <<= 8; 122 v |= sio_read(res, reg + 1); 123 return (v); 124 } 125 126 static void 127 sio_write(struct resource* res, uint8_t reg, uint8_t val) 128 { 129 bus_write_1(res, 0, reg); 130 bus_write_1(res, 1, val); 131 } 132 133 static void 134 sio_ldn_select(struct siosc *sc, uint8_t ldn) 135 { 136 mtx_assert(&sc->conf_lock, MA_OWNED); 137 if (ldn == sc->current_ldn) 138 return; 139 sio_write(sc->io_res, sc->ldn_reg, ldn); 140 sc->current_ldn = ldn; 141 } 142 143 static uint8_t 144 sio_ldn_read(struct siosc *sc, uint8_t ldn, uint8_t reg) 145 { 146 mtx_assert(&sc->conf_lock, MA_OWNED); 147 if (reg >= sc->enable_reg) { 148 sio_ldn_select(sc, ldn); 149 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 150 } 151 return (sio_read(sc->io_res, reg)); 152 } 153 154 static uint16_t 155 sio_ldn_readw(struct siosc *sc, uint8_t ldn, uint8_t reg) 156 { 157 mtx_assert(&sc->conf_lock, MA_OWNED); 158 if (reg >= sc->enable_reg) { 159 sio_ldn_select(sc, ldn); 160 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 161 } 162 return (sio_readw(sc->io_res, reg)); 163 } 164 165 static void 166 sio_ldn_write(struct siosc *sc, uint8_t ldn, uint8_t reg, uint8_t val) 167 { 168 mtx_assert(&sc->conf_lock, MA_OWNED); 169 if (reg <= sc->ldn_reg) { 170 printf("ignored attempt to write special register 0x%x\n", reg); 171 return; 172 } 173 sio_ldn_select(sc, ldn); 174 KASSERT(sc->current_ldn == ldn, ("sio_ldn_select failed")); 175 sio_write(sc->io_res, reg, val); 176 } 177 178 static void 179 sio_conf_enter(struct siosc *sc) 180 { 181 mtx_lock(&sc->conf_lock); 182 sc->methods->enter(sc->io_res, sc->io_port); 183 } 184 185 static void 186 sio_conf_exit(struct siosc *sc) 187 { 188 sc->methods->exit(sc->io_res, sc->io_port); 189 sc->current_ldn = 0xff; 190 mtx_unlock(&sc->conf_lock); 191 } 192 193 static void 194 ite_conf_enter(struct resource* res, uint16_t port) 195 { 196 bus_write_1(res, 0, 0x87); 197 bus_write_1(res, 0, 0x01); 198 bus_write_1(res, 0, 0x55); 199 bus_write_1(res, 0, port == 0x2e ? 0x55 : 0xaa); 200 } 201 202 static void 203 ite_conf_exit(struct resource* res, uint16_t port) 204 { 205 sio_write(res, 0x02, 0x02); 206 } 207 208 static const struct sio_conf_methods ite_conf_methods = { 209 .enter = ite_conf_enter, 210 .exit = ite_conf_exit, 211 .vendor = SUPERIO_VENDOR_ITE 212 }; 213 214 static void 215 nvt_conf_enter(struct resource* res, uint16_t port) 216 { 217 bus_write_1(res, 0, 0x87); 218 bus_write_1(res, 0, 0x87); 219 } 220 221 static void 222 nvt_conf_exit(struct resource* res, uint16_t port) 223 { 224 bus_write_1(res, 0, 0xaa); 225 } 226 227 static const struct sio_conf_methods nvt_conf_methods = { 228 .enter = nvt_conf_enter, 229 .exit = nvt_conf_exit, 230 .vendor = SUPERIO_VENDOR_NUVOTON 231 }; 232 233 static void 234 fintek_conf_enter(struct resource* res, uint16_t port) 235 { 236 bus_write_1(res, 0, 0x87); 237 bus_write_1(res, 0, 0x87); 238 } 239 240 static void 241 fintek_conf_exit(struct resource* res, uint16_t port) 242 { 243 bus_write_1(res, 0, 0xaa); 244 } 245 246 static const struct sio_conf_methods fintek_conf_methods = { 247 .enter = fintek_conf_enter, 248 .exit = fintek_conf_exit, 249 .vendor = SUPERIO_VENDOR_FINTEK 250 }; 251 252 static const struct sio_conf_methods * const methods_table[] = { 253 &ite_conf_methods, 254 &nvt_conf_methods, 255 &fintek_conf_methods, 256 NULL 257 }; 258 259 static const uint16_t ports_table[] = { 260 0x2e, 0x4e, 0 261 }; 262 263 const struct sio_device ite_devices[] = { 264 { .ldn = 4, .type = SUPERIO_DEV_HWM }, 265 { .ldn = 7, .type = SUPERIO_DEV_WDT }, 266 { .type = SUPERIO_DEV_NONE }, 267 }; 268 269 const struct sio_device w83627_devices[] = { 270 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 271 { .ldn = 9, .type = SUPERIO_DEV_GPIO }, 272 { .type = SUPERIO_DEV_NONE }, 273 }; 274 275 const struct sio_device nvt_devices[] = { 276 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 277 { .type = SUPERIO_DEV_NONE }, 278 }; 279 280 const struct sio_device nct5104_devices[] = { 281 { .ldn = 7, .type = SUPERIO_DEV_GPIO }, 282 { .ldn = 8, .type = SUPERIO_DEV_WDT }, 283 { .ldn = 15, .type = SUPERIO_DEV_GPIO }, 284 { .type = SUPERIO_DEV_NONE }, 285 }; 286 287 const struct sio_device nct5585_devices[] = { 288 { .ldn = 9, .type = SUPERIO_DEV_GPIO }, 289 { .type = SUPERIO_DEV_NONE }, 290 }; 291 292 const struct sio_device nct611x_devices[] = { 293 { .ldn = 0x7, .type = SUPERIO_DEV_GPIO }, 294 { .ldn = 0x8, .type = SUPERIO_DEV_WDT }, 295 { .type = SUPERIO_DEV_NONE }, 296 }; 297 298 const struct sio_device nct67xx_devices[] = { 299 { .ldn = 0x8, .type = SUPERIO_DEV_WDT }, 300 { .ldn = 0x9, .type = SUPERIO_DEV_GPIO }, 301 { .ldn = 0xb, .type = SUPERIO_DEV_HWM }, 302 { .type = SUPERIO_DEV_NONE }, 303 }; 304 305 const struct sio_device fintek_devices[] = { 306 { .ldn = 6, .type = SUPERIO_DEV_GPIO }, 307 { .ldn = 7, .type = SUPERIO_DEV_WDT }, 308 { .type = SUPERIO_DEV_NONE }, 309 }; 310 311 static const struct { 312 superio_vendor_t vendor; 313 uint16_t devid; 314 uint16_t mask; 315 int extid; /* Extra ID: used to handle conflicting devid. */ 316 const char *descr; 317 const struct sio_device *devices; 318 } superio_table[] = { 319 { 320 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8613, 321 .devices = ite_devices, 322 }, 323 { 324 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8712, 325 .devices = ite_devices, 326 }, 327 { 328 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8716, 329 .devices = ite_devices, 330 }, 331 { 332 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8718, 333 .devices = ite_devices, 334 }, 335 { 336 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8720, 337 .devices = ite_devices, 338 }, 339 { 340 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8721, 341 .devices = ite_devices, 342 }, 343 { 344 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8726, 345 .devices = ite_devices, 346 }, 347 { 348 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8728, 349 .devices = ite_devices, 350 }, 351 { 352 .vendor = SUPERIO_VENDOR_ITE, .devid = 0x8771, 353 .devices = ite_devices, 354 }, 355 { 356 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x1061, .mask = 0x00, 357 .descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. A)", 358 .devices = nct5104_devices, 359 }, 360 { 361 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5200, .mask = 0xff, 362 .descr = "Winbond 83627HF/F/HG/G", 363 .devices = nvt_devices, 364 }, 365 { 366 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x5900, .mask = 0xff, 367 .descr = "Winbond 83627S", 368 .devices = nvt_devices, 369 }, 370 { 371 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6000, .mask = 0xff, 372 .descr = "Winbond 83697HF", 373 .devices = nvt_devices, 374 }, 375 { 376 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x6800, .mask = 0xff, 377 .descr = "Winbond 83697UG", 378 .devices = nvt_devices, 379 }, 380 { 381 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x7000, .mask = 0xff, 382 .descr = "Winbond 83637HF", 383 .devices = nvt_devices, 384 }, 385 { 386 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8200, .mask = 0xff, 387 .descr = "Winbond 83627THF", 388 .devices = nvt_devices, 389 }, 390 { 391 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8500, .mask = 0xff, 392 .descr = "Winbond 83687THF", 393 .devices = nvt_devices, 394 }, 395 { 396 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0x8800, .mask = 0xff, 397 .descr = "Winbond 83627EHF", 398 .devices = nvt_devices, 399 }, 400 { 401 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa000, .mask = 0xff, 402 .descr = "Winbond 83627DHG", 403 .devices = w83627_devices, 404 }, 405 { 406 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa200, .mask = 0xff, 407 .descr = "Winbond 83627UHG", 408 .devices = nvt_devices, 409 }, 410 { 411 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xa500, .mask = 0xff, 412 .descr = "Winbond 83667HG", 413 .devices = nvt_devices, 414 }, 415 { 416 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb000, .mask = 0xff, 417 .descr = "Winbond 83627DHG-P", 418 .devices = nvt_devices, 419 }, 420 { 421 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb300, .mask = 0xff, 422 .descr = "Winbond 83667HG-B", 423 .devices = nvt_devices, 424 }, 425 { 426 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xb400, .mask = 0xff, 427 .descr = "Nuvoton NCT6775", 428 .devices = nvt_devices, 429 }, 430 { 431 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc300, .mask = 0xff, 432 .descr = "Nuvoton NCT6776", 433 .devices = nvt_devices, 434 }, 435 { 436 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc400, .mask = 0xff, 437 .descr = "Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. B+)", 438 .devices = nct5104_devices, 439 }, 440 { 441 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc500, .mask = 0xff, 442 .descr = "Nuvoton NCT6779D", 443 .devices = nct67xx_devices, 444 }, 445 { 446 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd42a, .extid = 1, 447 .descr = "Nuvoton NCT6796D-E", 448 .devices = nct67xx_devices, 449 }, 450 { 451 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd42a, .extid = 2, 452 .descr = "Nuvoton NCT5585D", 453 .devices = nct5585_devices, 454 }, 455 { 456 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc800, .mask = 0xff, 457 .descr = "Nuvoton NCT6791", 458 .devices = nvt_devices, 459 }, 460 { 461 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xc900, .mask = 0xff, 462 .descr = "Nuvoton NCT6792", 463 .devices = nvt_devices, 464 }, 465 { 466 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd100, .mask = 0xff, 467 .descr = "Nuvoton NCT6793", 468 .devices = nvt_devices, 469 }, 470 { 471 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd200, .mask = 0xff, 472 .descr = "Nuvoton NCT6112D/NCT6114D/NCT6116D", 473 .devices = nct611x_devices, 474 }, 475 { 476 .vendor = SUPERIO_VENDOR_NUVOTON, .devid = 0xd300, .mask = 0xff, 477 .descr = "Nuvoton NCT6795", 478 .devices = nvt_devices, 479 }, 480 { 481 .vendor = SUPERIO_VENDOR_FINTEK, .devid = 0x1210, .mask = 0xff, 482 .descr = "Fintek F81803", 483 .devices = fintek_devices, 484 }, 485 { 486 .vendor = SUPERIO_VENDOR_FINTEK, .devid = 0x0704, 487 .descr = "Fintek F81865", 488 .devices = fintek_devices, 489 }, 490 { 0, 0 } 491 }; 492 493 static const char * 494 devtype_to_str(superio_dev_type_t type) 495 { 496 switch (type) { 497 case SUPERIO_DEV_NONE: 498 return ("none"); 499 case SUPERIO_DEV_HWM: 500 return ("HWM"); 501 case SUPERIO_DEV_WDT: 502 return ("WDT"); 503 case SUPERIO_DEV_GPIO: 504 return ("GPIO"); 505 case SUPERIO_DEV_MAX: 506 return ("invalid"); 507 } 508 return ("invalid"); 509 } 510 511 static int 512 superio_detect(device_t dev, bool claim, struct siosc *sc) 513 { 514 struct resource *res; 515 rman_res_t port; 516 rman_res_t count; 517 uint16_t devid; 518 uint8_t revid; 519 int error; 520 int rid; 521 int i, m; 522 int prefer; 523 524 error = bus_get_resource(dev, SYS_RES_IOPORT, 0, &port, &count); 525 if (error != 0) 526 return (error); 527 if (port > UINT16_MAX || count < NUMPORTS) { 528 device_printf(dev, "unexpected I/O range size\n"); 529 return (ENXIO); 530 } 531 532 /* 533 * Make a temporary resource reservation for hardware probing. 534 * If we can't get the resources we need then 535 * we need to abort. Possibly this indicates 536 * the resources were used by another device 537 * in which case the probe would have failed anyhow. 538 */ 539 rid = 0; 540 res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE); 541 if (res == NULL) { 542 if (claim) 543 device_printf(dev, "failed to allocate I/O resource\n"); 544 return (ENXIO); 545 } 546 547 prefer = 0; 548 resource_int_value(device_get_name(dev), device_get_unit(dev), "prefer", &prefer); 549 if (bootverbose && prefer > 0) 550 device_printf(dev, "prefer extid %d\n", prefer); 551 552 for (m = 0; methods_table[m] != NULL; m++) { 553 methods_table[m]->enter(res, port); 554 if (methods_table[m]->vendor == SUPERIO_VENDOR_ITE) { 555 devid = sio_readw(res, 0x20); 556 revid = sio_read(res, 0x22); 557 } else if (methods_table[m]->vendor == SUPERIO_VENDOR_NUVOTON) { 558 devid = sio_read(res, 0x20); 559 revid = sio_read(res, 0x21); 560 devid = (devid << 8) | revid; 561 } else if (methods_table[m]->vendor == SUPERIO_VENDOR_FINTEK) { 562 devid = sio_read(res, 0x20); 563 revid = sio_read(res, 0x21); 564 devid = (devid << 8) | revid; 565 } else { 566 continue; 567 } 568 methods_table[m]->exit(res, port); 569 for (i = 0; superio_table[i].vendor != 0; i++) { 570 uint16_t mask; 571 572 mask = superio_table[i].mask; 573 if (superio_table[i].vendor != 574 methods_table[m]->vendor) 575 continue; 576 if ((superio_table[i].devid & ~mask) != (devid & ~mask)) 577 continue; 578 if (prefer > 0 && prefer != superio_table[i].extid) 579 continue; 580 break; 581 } 582 583 /* Found a matching SuperIO entry. */ 584 if (superio_table[i].vendor != 0) 585 break; 586 } 587 588 if (methods_table[m] == NULL) 589 error = ENXIO; 590 else 591 error = 0; 592 if (!claim || error != 0) { 593 bus_release_resource(dev, SYS_RES_IOPORT, rid, res); 594 return (error); 595 } 596 597 sc->methods = methods_table[m]; 598 sc->vendor = sc->methods->vendor; 599 sc->known_devices = superio_table[i].devices; 600 sc->io_res = res; 601 sc->io_rid = rid; 602 sc->io_port = port; 603 sc->devid = devid; 604 sc->revid = revid; 605 sc->extid = superio_table[i].extid; 606 607 KASSERT(sc->vendor == SUPERIO_VENDOR_ITE || 608 sc->vendor == SUPERIO_VENDOR_NUVOTON || 609 sc->vendor == SUPERIO_VENDOR_FINTEK, 610 ("Only ITE, Nuvoton and Fintek SuperIO-s are supported")); 611 sc->ldn_reg = 0x07; 612 sc->enable_reg = 0x30; /* FIXME enable_reg not used by nctgpio(4). */ 613 sc->current_ldn = 0xff; /* no device should have this */ 614 615 if (superio_table[i].descr != NULL) { 616 device_set_desc(dev, superio_table[i].descr); 617 } else if (sc->vendor == SUPERIO_VENDOR_ITE) { 618 char descr[64]; 619 620 snprintf(descr, sizeof(descr), 621 "ITE IT%4x SuperIO (revision 0x%02x)", 622 sc->devid, sc->revid); 623 device_set_desc_copy(dev, descr); 624 } 625 return (0); 626 } 627 628 static void 629 superio_identify(driver_t *driver, device_t parent) 630 { 631 device_t child; 632 int i; 633 634 /* 635 * Don't create child devices if any already exist. 636 * Those could be created via isa hints or if this 637 * driver is loaded, unloaded and then loaded again. 638 */ 639 if (device_find_child(parent, "superio", -1)) { 640 if (bootverbose) 641 printf("superio: device(s) already created\n"); 642 return; 643 } 644 645 /* 646 * Create a child for each candidate port. 647 * It would be nice if we could somehow clean up those 648 * that this driver fails to probe. 649 */ 650 for (i = 0; ports_table[i] != 0; i++) { 651 child = BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE, 652 "superio", -1); 653 if (child == NULL) { 654 device_printf(parent, "failed to add superio child\n"); 655 continue; 656 } 657 bus_set_resource(child, SYS_RES_IOPORT, 0, ports_table[i], 2); 658 if (superio_detect(child, false, NULL) != 0) 659 device_delete_child(parent, child); 660 } 661 } 662 663 static int 664 superio_probe(device_t dev) 665 { 666 struct siosc *sc; 667 int error; 668 669 /* Make sure we do not claim some ISA PNP device. */ 670 if (isa_get_logicalid(dev) != 0) 671 return (ENXIO); 672 673 /* 674 * XXX We can populate the softc now only because we return 675 * BUS_PROBE_SPECIFIC 676 */ 677 sc = device_get_softc(dev); 678 error = superio_detect(dev, true, sc); 679 if (error != 0) 680 return (error); 681 return (BUS_PROBE_SPECIFIC); 682 } 683 684 static void 685 superio_add_known_child(device_t dev, superio_dev_type_t type, uint8_t ldn) 686 { 687 struct siosc *sc = device_get_softc(dev); 688 struct superio_devinfo *dinfo; 689 device_t child; 690 691 child = BUS_ADD_CHILD(dev, 0, NULL, -1); 692 if (child == NULL) { 693 device_printf(dev, "failed to add child for ldn %d, type %s\n", 694 ldn, devtype_to_str(type)); 695 return; 696 } 697 dinfo = device_get_ivars(child); 698 dinfo->ldn = ldn; 699 dinfo->type = type; 700 sio_conf_enter(sc); 701 dinfo->iobase = sio_ldn_readw(sc, ldn, 0x60); 702 dinfo->iobase2 = sio_ldn_readw(sc, ldn, 0x62); 703 dinfo->irq = sio_ldn_readw(sc, ldn, 0x70); 704 dinfo->dma = sio_ldn_readw(sc, ldn, 0x74); 705 sio_conf_exit(sc); 706 STAILQ_INSERT_TAIL(&sc->devlist, dinfo, link); 707 } 708 709 static int 710 superio_attach(device_t dev) 711 { 712 struct siosc *sc = device_get_softc(dev); 713 int i; 714 715 mtx_init(&sc->conf_lock, device_get_nameunit(dev), "superio", MTX_DEF); 716 STAILQ_INIT(&sc->devlist); 717 718 for (i = 0; sc->known_devices[i].type != SUPERIO_DEV_NONE; i++) { 719 superio_add_known_child(dev, sc->known_devices[i].type, 720 sc->known_devices[i].ldn); 721 } 722 723 bus_generic_probe(dev); 724 bus_generic_attach(dev); 725 726 sc->chardev = make_dev(&superio_cdevsw, device_get_unit(dev), 727 UID_ROOT, GID_WHEEL, 0600, "superio%d", device_get_unit(dev)); 728 if (sc->chardev == NULL) 729 device_printf(dev, "failed to create character device\n"); 730 else 731 sc->chardev->si_drv1 = sc; 732 return (0); 733 } 734 735 static int 736 superio_detach(device_t dev) 737 { 738 struct siosc *sc = device_get_softc(dev); 739 int error; 740 741 error = bus_generic_detach(dev); 742 if (error != 0) 743 return (error); 744 if (sc->chardev != NULL) 745 destroy_dev(sc->chardev); 746 device_delete_children(dev); 747 bus_release_resource(dev, SYS_RES_IOPORT, sc->io_rid, sc->io_res); 748 mtx_destroy(&sc->conf_lock); 749 return (0); 750 } 751 752 static device_t 753 superio_add_child(device_t dev, u_int order, const char *name, int unit) 754 { 755 struct superio_devinfo *dinfo; 756 device_t child; 757 758 child = device_add_child_ordered(dev, order, name, unit); 759 if (child == NULL) 760 return (NULL); 761 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 762 if (dinfo == NULL) { 763 device_delete_child(dev, child); 764 return (NULL); 765 } 766 dinfo->ldn = 0xff; 767 dinfo->type = SUPERIO_DEV_NONE; 768 dinfo->dev = child; 769 resource_list_init(&dinfo->resources); 770 device_set_ivars(child, dinfo); 771 return (child); 772 } 773 774 static int 775 superio_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 776 { 777 struct superio_devinfo *dinfo; 778 779 dinfo = device_get_ivars(child); 780 switch (which) { 781 case SUPERIO_IVAR_LDN: 782 *result = dinfo->ldn; 783 break; 784 case SUPERIO_IVAR_TYPE: 785 *result = dinfo->type; 786 break; 787 case SUPERIO_IVAR_IOBASE: 788 *result = dinfo->iobase; 789 break; 790 case SUPERIO_IVAR_IOBASE2: 791 *result = dinfo->iobase2; 792 break; 793 case SUPERIO_IVAR_IRQ: 794 *result = dinfo->irq; 795 break; 796 case SUPERIO_IVAR_DMA: 797 *result = dinfo->dma; 798 break; 799 default: 800 return (ENOENT); 801 } 802 return (0); 803 } 804 805 static int 806 superio_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 807 { 808 809 switch (which) { 810 case SUPERIO_IVAR_LDN: 811 case SUPERIO_IVAR_TYPE: 812 case SUPERIO_IVAR_IOBASE: 813 case SUPERIO_IVAR_IOBASE2: 814 case SUPERIO_IVAR_IRQ: 815 case SUPERIO_IVAR_DMA: 816 return (EINVAL); 817 default: 818 return (ENOENT); 819 } 820 } 821 822 static struct resource_list * 823 superio_get_resource_list(device_t dev, device_t child) 824 { 825 struct superio_devinfo *dinfo = device_get_ivars(child); 826 827 return (&dinfo->resources); 828 } 829 830 static int 831 superio_printf(struct superio_devinfo *dinfo, const char *fmt, ...) 832 { 833 va_list ap; 834 int retval; 835 836 retval = printf("superio:%s@ldn%0x2x: ", 837 devtype_to_str(dinfo->type), dinfo->ldn); 838 va_start(ap, fmt); 839 retval += vprintf(fmt, ap); 840 va_end(ap); 841 return (retval); 842 } 843 844 static void 845 superio_child_detached(device_t dev, device_t child) 846 { 847 struct superio_devinfo *dinfo; 848 struct resource_list *rl; 849 850 dinfo = device_get_ivars(child); 851 rl = &dinfo->resources; 852 853 if (resource_list_release_active(rl, dev, child, SYS_RES_IRQ) != 0) 854 superio_printf(dinfo, "Device leaked IRQ resources\n"); 855 if (resource_list_release_active(rl, dev, child, SYS_RES_MEMORY) != 0) 856 superio_printf(dinfo, "Device leaked memory resources\n"); 857 if (resource_list_release_active(rl, dev, child, SYS_RES_IOPORT) != 0) 858 superio_printf(dinfo, "Device leaked I/O resources\n"); 859 } 860 861 static int 862 superio_child_location(device_t parent, device_t child, struct sbuf *sb) 863 { 864 uint8_t ldn; 865 866 ldn = superio_get_ldn(child); 867 sbuf_printf(sb, "ldn=0x%02x", ldn); 868 return (0); 869 } 870 871 static int 872 superio_child_pnp(device_t parent, device_t child, struct sbuf *sb) 873 { 874 superio_dev_type_t type; 875 876 type = superio_get_type(child); 877 sbuf_printf(sb, "type=%s", devtype_to_str(type)); 878 return (0); 879 } 880 881 static int 882 superio_print_child(device_t parent, device_t child) 883 { 884 superio_dev_type_t type; 885 uint8_t ldn; 886 int retval; 887 888 ldn = superio_get_ldn(child); 889 type = superio_get_type(child); 890 891 retval = bus_print_child_header(parent, child); 892 retval += printf(" at %s ldn 0x%02x", devtype_to_str(type), ldn); 893 retval += bus_print_child_footer(parent, child); 894 895 return (retval); 896 } 897 898 superio_vendor_t 899 superio_vendor(device_t dev) 900 { 901 device_t sio_dev = device_get_parent(dev); 902 struct siosc *sc = device_get_softc(sio_dev); 903 904 return (sc->vendor); 905 } 906 907 uint16_t 908 superio_devid(device_t dev) 909 { 910 device_t sio_dev = device_get_parent(dev); 911 struct siosc *sc = device_get_softc(sio_dev); 912 913 return (sc->devid); 914 } 915 916 uint8_t 917 superio_revid(device_t dev) 918 { 919 device_t sio_dev = device_get_parent(dev); 920 struct siosc *sc = device_get_softc(sio_dev); 921 922 return (sc->revid); 923 } 924 925 int 926 superio_extid(device_t dev) 927 { 928 device_t sio_dev = device_get_parent(dev); 929 struct siosc *sc = device_get_softc(sio_dev); 930 931 return (sc->extid); 932 } 933 934 uint8_t 935 superio_ldn_read(device_t dev, uint8_t ldn, uint8_t reg) 936 { 937 device_t sio_dev = device_get_parent(dev); 938 struct siosc *sc = device_get_softc(sio_dev); 939 uint8_t v; 940 941 sio_conf_enter(sc); 942 v = sio_ldn_read(sc, ldn, reg); 943 sio_conf_exit(sc); 944 return (v); 945 } 946 947 uint8_t 948 superio_read(device_t dev, uint8_t reg) 949 { 950 struct superio_devinfo *dinfo = device_get_ivars(dev); 951 952 return (superio_ldn_read(dev, dinfo->ldn, reg)); 953 } 954 955 void 956 superio_ldn_write(device_t dev, uint8_t ldn, uint8_t reg, uint8_t val) 957 { 958 device_t sio_dev = device_get_parent(dev); 959 struct siosc *sc = device_get_softc(sio_dev); 960 961 sio_conf_enter(sc); 962 sio_ldn_write(sc, ldn, reg, val); 963 sio_conf_exit(sc); 964 } 965 966 void 967 superio_write(device_t dev, uint8_t reg, uint8_t val) 968 { 969 struct superio_devinfo *dinfo = device_get_ivars(dev); 970 971 return (superio_ldn_write(dev, dinfo->ldn, reg, val)); 972 } 973 974 bool 975 superio_dev_enabled(device_t dev, uint8_t mask) 976 { 977 device_t sio_dev = device_get_parent(dev); 978 struct siosc *sc = device_get_softc(sio_dev); 979 struct superio_devinfo *dinfo = device_get_ivars(dev); 980 uint8_t v; 981 982 /* GPIO device is always active in ITE chips. */ 983 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 984 return (true); 985 986 v = superio_read(dev, sc->enable_reg); /* FIXME enable_reg not used by nctgpio(4). */ 987 return ((v & mask) != 0); 988 } 989 990 void 991 superio_dev_enable(device_t dev, uint8_t mask) 992 { 993 device_t sio_dev = device_get_parent(dev); 994 struct siosc *sc = device_get_softc(sio_dev); 995 struct superio_devinfo *dinfo = device_get_ivars(dev); 996 uint8_t v; 997 998 /* GPIO device is always active in ITE chips. */ 999 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 1000 return; 1001 1002 sio_conf_enter(sc); 1003 v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg); 1004 v |= mask; 1005 sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v); 1006 sio_conf_exit(sc); 1007 } 1008 1009 void 1010 superio_dev_disable(device_t dev, uint8_t mask) 1011 { 1012 device_t sio_dev = device_get_parent(dev); 1013 struct siosc *sc = device_get_softc(sio_dev); 1014 struct superio_devinfo *dinfo = device_get_ivars(dev); 1015 uint8_t v; 1016 1017 /* GPIO device is always active in ITE chips. */ 1018 if (sc->vendor == SUPERIO_VENDOR_ITE && dinfo->ldn == 7) 1019 return; 1020 1021 sio_conf_enter(sc); 1022 v = sio_ldn_read(sc, dinfo->ldn, sc->enable_reg); 1023 v &= ~mask; 1024 sio_ldn_write(sc, dinfo->ldn, sc->enable_reg, v); 1025 sio_conf_exit(sc); 1026 } 1027 1028 device_t 1029 superio_find_dev(device_t superio, superio_dev_type_t type, int ldn) 1030 { 1031 struct siosc *sc = device_get_softc(superio); 1032 struct superio_devinfo *dinfo; 1033 1034 if (ldn < -1 || ldn > UINT8_MAX) 1035 return (NULL); /* ERANGE */ 1036 if (type == SUPERIO_DEV_NONE && ldn == -1) 1037 return (NULL); /* EINVAL */ 1038 1039 STAILQ_FOREACH(dinfo, &sc->devlist, link) { 1040 if (ldn != -1 && dinfo->ldn != ldn) 1041 continue; 1042 if (type != SUPERIO_DEV_NONE && dinfo->type != type) 1043 continue; 1044 return (dinfo->dev); 1045 } 1046 return (NULL); 1047 } 1048 1049 static int 1050 superio_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int flags, 1051 struct thread *td) 1052 { 1053 struct siosc *sc; 1054 struct superiocmd *s; 1055 1056 sc = dev->si_drv1; 1057 s = (struct superiocmd *)data; 1058 switch (cmd) { 1059 case SUPERIO_CR_READ: 1060 sio_conf_enter(sc); 1061 s->val = sio_ldn_read(sc, s->ldn, s->cr); 1062 sio_conf_exit(sc); 1063 return (0); 1064 case SUPERIO_CR_WRITE: 1065 sio_conf_enter(sc); 1066 sio_ldn_write(sc, s->ldn, s->cr, s->val); 1067 sio_conf_exit(sc); 1068 return (0); 1069 default: 1070 return (ENOTTY); 1071 } 1072 } 1073 1074 static device_method_t superio_methods[] = { 1075 DEVMETHOD(device_identify, superio_identify), 1076 DEVMETHOD(device_probe, superio_probe), 1077 DEVMETHOD(device_attach, superio_attach), 1078 DEVMETHOD(device_detach, superio_detach), 1079 DEVMETHOD(device_shutdown, bus_generic_shutdown), 1080 DEVMETHOD(device_suspend, bus_generic_suspend), 1081 DEVMETHOD(device_resume, bus_generic_resume), 1082 1083 DEVMETHOD(bus_add_child, superio_add_child), 1084 DEVMETHOD(bus_child_detached, superio_child_detached), 1085 DEVMETHOD(bus_child_location, superio_child_location), 1086 DEVMETHOD(bus_child_pnpinfo, superio_child_pnp), 1087 DEVMETHOD(bus_print_child, superio_print_child), 1088 DEVMETHOD(bus_read_ivar, superio_read_ivar), 1089 DEVMETHOD(bus_write_ivar, superio_write_ivar), 1090 DEVMETHOD(bus_get_resource_list, superio_get_resource_list), 1091 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 1092 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 1093 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 1094 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 1095 DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource), 1096 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 1097 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 1098 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 1099 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 1100 1101 DEVMETHOD_END 1102 }; 1103 1104 static driver_t superio_driver = { 1105 "superio", 1106 superio_methods, 1107 sizeof(struct siosc) 1108 }; 1109 1110 DRIVER_MODULE(superio, isa, superio_driver, 0, 0); 1111 MODULE_VERSION(superio, 1); 1112