1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/stdint.h> 32 #include <sys/stddef.h> 33 #include <sys/param.h> 34 #include <sys/queue.h> 35 #include <sys/types.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/bus.h> 39 #include <sys/module.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 #include <sys/condvar.h> 43 #include <sys/sysctl.h> 44 #include <sys/sx.h> 45 #include <sys/unistd.h> 46 #include <sys/callout.h> 47 #include <sys/malloc.h> 48 #include <sys/priv.h> 49 50 #include <dev/usb/usb.h> 51 #include <dev/usb/usbdi.h> 52 53 #include <dev/usb/usb_core.h> 54 #include <dev/usb/usb_busdma.h> 55 #include <dev/usb/usb_process.h> 56 #include <dev/usb/usb_util.h> 57 58 #include <dev/usb/usb_controller.h> 59 #include <dev/usb/usb_bus.h> 60 #include <dev/usb/usb_pci.h> 61 #include <dev/usb/controller/xhci.h> 62 #include <dev/usb/controller/xhcireg.h> 63 #include "usb_if.h" 64 65 static device_probe_t xhci_pci_probe; 66 static device_attach_t xhci_pci_attach; 67 static device_detach_t xhci_pci_detach; 68 static usb_take_controller_t xhci_pci_take_controller; 69 70 static device_method_t xhci_device_methods[] = { 71 /* device interface */ 72 DEVMETHOD(device_probe, xhci_pci_probe), 73 DEVMETHOD(device_attach, xhci_pci_attach), 74 DEVMETHOD(device_detach, xhci_pci_detach), 75 DEVMETHOD(device_suspend, bus_generic_suspend), 76 DEVMETHOD(device_resume, bus_generic_resume), 77 DEVMETHOD(device_shutdown, bus_generic_shutdown), 78 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 79 80 DEVMETHOD_END 81 }; 82 83 static driver_t xhci_driver = { 84 .name = "xhci", 85 .methods = xhci_device_methods, 86 .size = sizeof(struct xhci_softc), 87 }; 88 89 static devclass_t xhci_devclass; 90 91 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL); 92 MODULE_DEPEND(xhci, usb, 1, 1, 1); 93 94 static const char * 95 xhci_pci_match(device_t self) 96 { 97 uint32_t device_id = pci_get_devid(self); 98 99 switch (device_id) { 100 case 0x145c1022: 101 return ("AMD KERNCZ USB 3.0 controller"); 102 case 0x43ba1022: 103 return ("AMD X399 USB 3.0 controller"); 104 case 0x43b91022: /* X370 */ 105 case 0x43bb1022: /* B350 */ 106 return ("AMD 300 Series USB 3.0 controller"); 107 case 0x78141022: 108 return ("AMD FCH USB 3.0 controller"); 109 110 case 0x01941033: 111 return ("NEC uPD720200 USB 3.0 controller"); 112 case 0x00151912: 113 return ("NEC uPD720202 USB 3.0 controller"); 114 115 case 0x10001b73: 116 return ("Fresco Logic FL1000G USB 3.0 controller"); 117 case 0x11001b73: 118 return ("Fresco Logic FL1100 USB 3.0 controller"); 119 120 case 0x10421b21: 121 return ("ASMedia ASM1042 USB 3.0 controller"); 122 case 0x11421b21: 123 return ("ASMedia ASM1042A USB 3.0 controller"); 124 125 case 0x0f358086: 126 return ("Intel BayTrail USB 3.0 controller"); 127 case 0x19d08086: 128 return ("Intel Denverton USB 3.0 controller"); 129 case 0x9c318086: 130 case 0x1e318086: 131 return ("Intel Panther Point USB 3.0 controller"); 132 case 0x22b58086: 133 return ("Intel Braswell USB 3.0 controller"); 134 case 0x5aa88086: 135 return ("Intel Apollo Lake USB 3.0 controller"); 136 case 0x8c318086: 137 return ("Intel Lynx Point USB 3.0 controller"); 138 case 0x8cb18086: 139 return ("Intel Wildcat Point USB 3.0 controller"); 140 case 0x8d318086: 141 return ("Intel Wellsburg USB 3.0 controller"); 142 case 0x9cb18086: 143 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 144 case 0x9d2f8086: 145 return ("Intel Sunrise Point-LP USB 3.0 controller"); 146 case 0xa12f8086: 147 return ("Intel Sunrise Point USB 3.0 controller"); 148 case 0xa1af8086: 149 return ("Intel Lewisburg USB 3.0 controller"); 150 case 0xa2af8086: 151 return ("Intel Union Point USB 3.0 controller"); 152 153 case 0xa01b177d: 154 return ("Cavium ThunderX USB 3.0 controller"); 155 156 default: 157 break; 158 } 159 160 if ((pci_get_class(self) == PCIC_SERIALBUS) 161 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 162 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 163 return ("XHCI (generic) USB 3.0 controller"); 164 } 165 return (NULL); /* dunno */ 166 } 167 168 static int 169 xhci_pci_probe(device_t self) 170 { 171 const char *desc = xhci_pci_match(self); 172 173 if (desc) { 174 device_set_desc(self, desc); 175 return (BUS_PROBE_DEFAULT); 176 } else { 177 return (ENXIO); 178 } 179 } 180 181 static int xhci_use_msi = 1; 182 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 183 static int xhci_use_msix = 1; 184 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix); 185 186 static void 187 xhci_interrupt_poll(void *_sc) 188 { 189 struct xhci_softc *sc = _sc; 190 USB_BUS_UNLOCK(&sc->sc_bus); 191 xhci_interrupt(sc); 192 USB_BUS_LOCK(&sc->sc_bus); 193 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 194 } 195 196 static int 197 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 198 { 199 uint32_t temp; 200 uint32_t usb3_mask; 201 uint32_t usb2_mask; 202 203 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 204 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 205 206 temp |= set; 207 temp &= ~clear; 208 209 /* Don't set bits which the hardware doesn't support */ 210 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 211 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 212 213 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 214 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 215 216 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 217 218 return (0); 219 } 220 221 static int 222 xhci_pci_attach(device_t self) 223 { 224 struct xhci_softc *sc = device_get_softc(self); 225 int count, err, msix_table, rid; 226 uint8_t usemsi = 1; 227 uint8_t usedma32 = 0; 228 229 rid = PCI_XHCI_CBMEM; 230 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 231 RF_ACTIVE); 232 if (!sc->sc_io_res) { 233 device_printf(self, "Could not map memory\n"); 234 return (ENOMEM); 235 } 236 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 237 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 238 sc->sc_io_size = rman_get_size(sc->sc_io_res); 239 240 switch (pci_get_devid(self)) { 241 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 242 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 243 /* Don't use 64-bit DMA on these controllers. */ 244 usedma32 = 1; 245 break; 246 case 0x10001b73: /* FL1000G */ 247 /* Fresco Logic host doesn't support MSI. */ 248 usemsi = 0; 249 break; 250 case 0x0f358086: /* BayTrail */ 251 case 0x9c318086: /* Panther Point */ 252 case 0x1e318086: /* Panther Point */ 253 case 0x8c318086: /* Lynx Point */ 254 case 0x8cb18086: /* Wildcat Point */ 255 case 0x9cb18086: /* Broadwell Mobile Integrated */ 256 /* 257 * On Intel chipsets, reroute ports from EHCI to XHCI 258 * controller and use a different IMOD value. 259 */ 260 sc->sc_port_route = &xhci_pci_port_route; 261 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 262 sc->sc_ctlstep = 1; 263 break; 264 } 265 266 if (xhci_init(sc, self, usedma32)) { 267 device_printf(self, "Could not initialize softc\n"); 268 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 269 sc->sc_io_res); 270 return (ENXIO); 271 } 272 273 pci_enable_busmaster(self); 274 275 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 276 277 rid = 0; 278 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) { 279 sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, 280 &msix_table, RF_ACTIVE); 281 if (sc->sc_msix_res == NULL) { 282 /* May not be enabled */ 283 device_printf(self, 284 "Unable to map MSI-X table \n"); 285 } else { 286 count = 1; 287 if (pci_alloc_msix(self, &count) == 0) { 288 if (bootverbose) 289 device_printf(self, "MSI-X enabled\n"); 290 rid = 1; 291 } else { 292 bus_release_resource(self, SYS_RES_MEMORY, 293 msix_table, sc->sc_msix_res); 294 sc->sc_msix_res = NULL; 295 } 296 } 297 } 298 if (rid == 0 && xhci_use_msi && usemsi) { 299 count = 1; 300 if (pci_alloc_msi(self, &count) == 0) { 301 if (bootverbose) 302 device_printf(self, "MSI enabled\n"); 303 rid = 1; 304 } 305 } 306 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 307 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 308 if (sc->sc_irq_res == NULL) { 309 pci_release_msi(self); 310 device_printf(self, "Could not allocate IRQ\n"); 311 /* goto error; FALLTHROUGH - use polling */ 312 } 313 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 314 if (sc->sc_bus.bdev == NULL) { 315 device_printf(self, "Could not add USB device\n"); 316 goto error; 317 } 318 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 319 320 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 321 322 if (sc->sc_irq_res != NULL) { 323 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 324 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 325 if (err != 0) { 326 bus_release_resource(self, SYS_RES_IRQ, 327 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 328 sc->sc_irq_res = NULL; 329 pci_release_msi(self); 330 device_printf(self, "Could not setup IRQ, err=%d\n", err); 331 sc->sc_intr_hdl = NULL; 332 } 333 } 334 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 335 if (xhci_use_polling() != 0) { 336 device_printf(self, "Interrupt polling at %dHz\n", hz); 337 USB_BUS_LOCK(&sc->sc_bus); 338 xhci_interrupt_poll(sc); 339 USB_BUS_UNLOCK(&sc->sc_bus); 340 } else 341 goto error; 342 } 343 344 xhci_pci_take_controller(self); 345 346 err = xhci_halt_controller(sc); 347 348 if (err == 0) 349 err = xhci_start_controller(sc); 350 351 if (err == 0) 352 err = device_probe_and_attach(sc->sc_bus.bdev); 353 354 if (err) { 355 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 356 goto error; 357 } 358 return (0); 359 360 error: 361 xhci_pci_detach(self); 362 return (ENXIO); 363 } 364 365 static int 366 xhci_pci_detach(device_t self) 367 { 368 struct xhci_softc *sc = device_get_softc(self); 369 370 /* during module unload there are lots of children leftover */ 371 device_delete_children(self); 372 373 usb_callout_drain(&sc->sc_callout); 374 xhci_halt_controller(sc); 375 xhci_reset_controller(sc); 376 377 pci_disable_busmaster(self); 378 379 if (sc->sc_irq_res && sc->sc_intr_hdl) { 380 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 381 sc->sc_intr_hdl = NULL; 382 } 383 if (sc->sc_irq_res) { 384 bus_release_resource(self, SYS_RES_IRQ, 385 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 386 sc->sc_irq_res = NULL; 387 pci_release_msi(self); 388 } 389 if (sc->sc_io_res) { 390 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 391 sc->sc_io_res); 392 sc->sc_io_res = NULL; 393 } 394 if (sc->sc_msix_res) { 395 bus_release_resource(self, SYS_RES_MEMORY, 396 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res); 397 sc->sc_msix_res = NULL; 398 } 399 400 xhci_uninit(sc); 401 402 return (0); 403 } 404 405 static int 406 xhci_pci_take_controller(device_t self) 407 { 408 struct xhci_softc *sc = device_get_softc(self); 409 uint32_t cparams; 410 uint32_t eecp; 411 uint32_t eec; 412 uint16_t to; 413 uint8_t bios_sem; 414 415 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 416 417 eec = -1; 418 419 /* Synchronise with the BIOS if it owns the controller. */ 420 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 421 eecp += XHCI_XECP_NEXT(eec) << 2) { 422 eec = XREAD4(sc, capa, eecp); 423 424 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 425 continue; 426 bios_sem = XREAD1(sc, capa, eecp + 427 XHCI_XECP_BIOS_SEM); 428 if (bios_sem == 0) 429 continue; 430 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 431 "to give up control\n"); 432 XWRITE1(sc, capa, eecp + 433 XHCI_XECP_OS_SEM, 1); 434 to = 500; 435 while (1) { 436 bios_sem = XREAD1(sc, capa, eecp + 437 XHCI_XECP_BIOS_SEM); 438 if (bios_sem == 0) 439 break; 440 441 if (--to == 0) { 442 device_printf(sc->sc_bus.bdev, 443 "timed out waiting for BIOS\n"); 444 break; 445 } 446 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 447 } 448 } 449 return (0); 450 } 451