1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2012 Ben Gray <bgray@freebsd.org>. 5 * Copyright (C) 2018 The FreeBSD Foundation. 6 * 7 * This software was developed by Arshan Khanifar <arshankhanifar@gmail.com> 8 * under sponsorship from the FreeBSD Foundation. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * $FreeBSD$ 32 */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 /* 38 * USB-To-Ethernet adapter driver for Microchip's LAN78XX and related families. 39 * 40 * USB 3.1 to 10/100/1000 Mbps Ethernet 41 * LAN7800 http://www.microchip.com/wwwproducts/en/LAN7800 42 * 43 * USB 2.0 to 10/100/1000 Mbps Ethernet 44 * LAN7850 http://www.microchip.com/wwwproducts/en/LAN7850 45 * 46 * USB 2 to 10/100/1000 Mbps Ethernet with built-in USB hub 47 * LAN7515 (no datasheet available, but probes and functions as LAN7800) 48 * 49 * This driver is based on the if_smsc driver, with lan78xx-specific 50 * functionality modelled on Microchip's Linux lan78xx driver. 51 * 52 * UNIMPLEMENTED FEATURES 53 * ------------------ 54 * A number of features supported by the lan78xx are not yet implemented in 55 * this driver: 56 * 57 * - TX checksum offloading: Nothing has been implemented yet. 58 * - Direct address translation filtering: Implemented but untested. 59 * - VLAN tag removal. 60 * - Support for USB interrupt endpoints. 61 * - Latency Tolerance Messaging (LTM) support. 62 * - TCP LSO support. 63 * 64 */ 65 66 #include <sys/param.h> 67 #include <sys/bus.h> 68 #include <sys/callout.h> 69 #include <sys/condvar.h> 70 #include <sys/kernel.h> 71 #include <sys/lock.h> 72 #include <sys/malloc.h> 73 #include <sys/module.h> 74 #include <sys/mutex.h> 75 #include <sys/priv.h> 76 #include <sys/queue.h> 77 #include <sys/random.h> 78 #include <sys/socket.h> 79 #include <sys/stddef.h> 80 #include <sys/stdint.h> 81 #include <sys/sx.h> 82 #include <sys/sysctl.h> 83 #include <sys/systm.h> 84 #include <sys/unistd.h> 85 86 #include <net/if.h> 87 #include <net/if_var.h> 88 #include <net/if_media.h> 89 90 #include <dev/mii/mii.h> 91 #include <dev/mii/miivar.h> 92 93 #include <netinet/in.h> 94 #include <netinet/ip.h> 95 96 #include "opt_platform.h" 97 98 #ifdef FDT 99 #include <dev/fdt/fdt_common.h> 100 #include <dev/ofw/ofw_bus.h> 101 #include <dev/ofw/ofw_bus_subr.h> 102 #include <dev/usb/usb_fdt_support.h> 103 #endif 104 105 #include <dev/usb/usb.h> 106 #include <dev/usb/usbdi.h> 107 #include <dev/usb/usbdi_util.h> 108 #include "usbdevs.h" 109 110 #define USB_DEBUG_VAR lan78xx_debug 111 #include <dev/usb/usb_debug.h> 112 #include <dev/usb/usb_process.h> 113 114 #include <dev/usb/net/usb_ethernet.h> 115 116 #include <dev/usb/net/if_mugereg.h> 117 118 #include "miibus_if.h" 119 120 #ifdef USB_DEBUG 121 static int muge_debug = 0; 122 123 SYSCTL_NODE(_hw_usb, OID_AUTO, muge, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 124 "Microchip LAN78xx USB-GigE"); 125 SYSCTL_INT(_hw_usb_muge, OID_AUTO, debug, CTLFLAG_RWTUN, &muge_debug, 0, 126 "Debug level"); 127 #endif 128 129 #define MUGE_DEFAULT_TX_CSUM_ENABLE (false) 130 #define MUGE_DEFAULT_TSO_ENABLE (false) 131 132 /* Supported Vendor and Product IDs. */ 133 static const struct usb_device_id lan78xx_devs[] = { 134 #define MUGE_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) } 135 MUGE_DEV(LAN7800_ETH, 0), 136 MUGE_DEV(LAN7801_ETH, 0), 137 MUGE_DEV(LAN7850_ETH, 0), 138 #undef MUGE_DEV 139 }; 140 141 #ifdef USB_DEBUG 142 #define muge_dbg_printf(sc, fmt, args...) \ 143 do { \ 144 if (muge_debug > 0) \ 145 device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \ 146 } while(0) 147 #else 148 #define muge_dbg_printf(sc, fmt, args...) do { } while (0) 149 #endif 150 151 #define muge_warn_printf(sc, fmt, args...) \ 152 device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args) 153 154 #define muge_err_printf(sc, fmt, args...) \ 155 device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args) 156 157 #define ETHER_IS_VALID(addr) \ 158 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 159 160 /* USB endpoints. */ 161 162 enum { 163 MUGE_BULK_DT_RD, 164 MUGE_BULK_DT_WR, 165 #if 0 /* Ignore interrupt endpoints for now as we poll on MII status. */ 166 MUGE_INTR_DT_WR, 167 MUGE_INTR_DT_RD, 168 #endif 169 MUGE_N_TRANSFER, 170 }; 171 172 struct muge_softc { 173 struct usb_ether sc_ue; 174 struct mtx sc_mtx; 175 struct usb_xfer *sc_xfer[MUGE_N_TRANSFER]; 176 int sc_phyno; 177 uint32_t sc_leds; 178 uint16_t sc_led_modes; 179 uint16_t sc_led_modes_mask; 180 181 /* Settings for the mac control (MAC_CSR) register. */ 182 uint32_t sc_rfe_ctl; 183 uint32_t sc_mdix_ctl; 184 uint16_t chipid; 185 uint16_t chiprev; 186 uint32_t sc_mchash_table[ETH_DP_SEL_VHF_HASH_LEN]; 187 uint32_t sc_pfilter_table[MUGE_NUM_PFILTER_ADDRS_][2]; 188 189 uint32_t sc_flags; 190 #define MUGE_FLAG_LINK 0x0001 191 #define MUGE_FLAG_INIT_DONE 0x0002 192 }; 193 194 #define MUGE_IFACE_IDX 0 195 196 #define MUGE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 197 #define MUGE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 198 #define MUGE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) 199 200 static device_probe_t muge_probe; 201 static device_attach_t muge_attach; 202 static device_detach_t muge_detach; 203 204 static usb_callback_t muge_bulk_read_callback; 205 static usb_callback_t muge_bulk_write_callback; 206 207 static miibus_readreg_t lan78xx_miibus_readreg; 208 static miibus_writereg_t lan78xx_miibus_writereg; 209 static miibus_statchg_t lan78xx_miibus_statchg; 210 211 static int muge_attach_post_sub(struct usb_ether *ue); 212 static uether_fn_t muge_attach_post; 213 static uether_fn_t muge_init; 214 static uether_fn_t muge_stop; 215 static uether_fn_t muge_start; 216 static uether_fn_t muge_tick; 217 static uether_fn_t muge_setmulti; 218 static uether_fn_t muge_setpromisc; 219 220 static int muge_ifmedia_upd(struct ifnet *); 221 static void muge_ifmedia_sts(struct ifnet *, struct ifmediareq *); 222 223 static int lan78xx_chip_init(struct muge_softc *sc); 224 static int muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 225 226 static const struct usb_config muge_config[MUGE_N_TRANSFER] = { 227 [MUGE_BULK_DT_WR] = { 228 .type = UE_BULK, 229 .endpoint = UE_ADDR_ANY, 230 .direction = UE_DIR_OUT, 231 .frames = 16, 232 .bufsize = 16 * (MCLBYTES + 16), 233 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 234 .callback = muge_bulk_write_callback, 235 .timeout = 10000, /* 10 seconds */ 236 }, 237 238 [MUGE_BULK_DT_RD] = { 239 .type = UE_BULK, 240 .endpoint = UE_ADDR_ANY, 241 .direction = UE_DIR_IN, 242 .bufsize = 20480, /* bytes */ 243 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 244 .callback = muge_bulk_read_callback, 245 .timeout = 0, /* no timeout */ 246 }, 247 /* 248 * The chip supports interrupt endpoints, however they aren't 249 * needed as we poll on the MII status. 250 */ 251 }; 252 253 static const struct usb_ether_methods muge_ue_methods = { 254 .ue_attach_post = muge_attach_post, 255 .ue_attach_post_sub = muge_attach_post_sub, 256 .ue_start = muge_start, 257 .ue_ioctl = muge_ioctl, 258 .ue_init = muge_init, 259 .ue_stop = muge_stop, 260 .ue_tick = muge_tick, 261 .ue_setmulti = muge_setmulti, 262 .ue_setpromisc = muge_setpromisc, 263 .ue_mii_upd = muge_ifmedia_upd, 264 .ue_mii_sts = muge_ifmedia_sts, 265 }; 266 267 /** 268 * lan78xx_read_reg - Read a 32-bit register on the device 269 * @sc: driver soft context 270 * @off: offset of the register 271 * @data: pointer a value that will be populated with the register value 272 * 273 * LOCKING: 274 * The device lock must be held before calling this function. 275 * 276 * RETURNS: 277 * 0 on success, a USB_ERR_?? error code on failure. 278 */ 279 static int 280 lan78xx_read_reg(struct muge_softc *sc, uint32_t off, uint32_t *data) 281 { 282 struct usb_device_request req; 283 uint32_t buf; 284 usb_error_t err; 285 286 MUGE_LOCK_ASSERT(sc, MA_OWNED); 287 288 req.bmRequestType = UT_READ_VENDOR_DEVICE; 289 req.bRequest = UVR_READ_REG; 290 USETW(req.wValue, 0); 291 USETW(req.wIndex, off); 292 USETW(req.wLength, 4); 293 294 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 295 if (err != 0) 296 muge_warn_printf(sc, "Failed to read register 0x%0x\n", off); 297 *data = le32toh(buf); 298 return (err); 299 } 300 301 /** 302 * lan78xx_write_reg - Write a 32-bit register on the device 303 * @sc: driver soft context 304 * @off: offset of the register 305 * @data: the 32-bit value to write into the register 306 * 307 * LOCKING: 308 * The device lock must be held before calling this function. 309 * 310 * RETURNS: 311 * 0 on success, a USB_ERR_?? error code on failure. 312 */ 313 static int 314 lan78xx_write_reg(struct muge_softc *sc, uint32_t off, uint32_t data) 315 { 316 struct usb_device_request req; 317 uint32_t buf; 318 usb_error_t err; 319 320 MUGE_LOCK_ASSERT(sc, MA_OWNED); 321 322 buf = htole32(data); 323 324 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 325 req.bRequest = UVR_WRITE_REG; 326 USETW(req.wValue, 0); 327 USETW(req.wIndex, off); 328 USETW(req.wLength, 4); 329 330 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 331 if (err != 0) 332 muge_warn_printf(sc, "Failed to write register 0x%0x\n", off); 333 return (err); 334 } 335 336 /** 337 * lan78xx_wait_for_bits - Poll on a register value until bits are cleared 338 * @sc: soft context 339 * @reg: offset of the register 340 * @bits: if the bits are clear the function returns 341 * 342 * LOCKING: 343 * The device lock must be held before calling this function. 344 * 345 * RETURNS: 346 * 0 on success, or a USB_ERR_?? error code on failure. 347 */ 348 static int 349 lan78xx_wait_for_bits(struct muge_softc *sc, uint32_t reg, uint32_t bits) 350 { 351 usb_ticks_t start_ticks; 352 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 353 uint32_t val; 354 int err; 355 356 MUGE_LOCK_ASSERT(sc, MA_OWNED); 357 358 start_ticks = (usb_ticks_t)ticks; 359 do { 360 if ((err = lan78xx_read_reg(sc, reg, &val)) != 0) 361 return (err); 362 if (!(val & bits)) 363 return (0); 364 uether_pause(&sc->sc_ue, hz / 100); 365 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 366 367 return (USB_ERR_TIMEOUT); 368 } 369 370 /** 371 * lan78xx_eeprom_read_raw - Read the attached EEPROM 372 * @sc: soft context 373 * @off: the eeprom address offset 374 * @buf: stores the bytes 375 * @buflen: the number of bytes to read 376 * 377 * Simply reads bytes from an attached eeprom. 378 * 379 * LOCKING: 380 * The function takes and releases the device lock if not already held. 381 * 382 * RETURNS: 383 * 0 on success, or a USB_ERR_?? error code on failure. 384 */ 385 static int 386 lan78xx_eeprom_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 387 uint16_t buflen) 388 { 389 usb_ticks_t start_ticks; 390 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 391 int err; 392 uint32_t val, saved; 393 uint16_t i; 394 bool locked; 395 396 locked = mtx_owned(&sc->sc_mtx); /* XXX */ 397 if (!locked) 398 MUGE_LOCK(sc); 399 400 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 401 /* EEDO/EECLK muxed with LED0/LED1 on LAN7800. */ 402 err = lan78xx_read_reg(sc, ETH_HW_CFG, &val); 403 saved = val; 404 405 val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_); 406 err = lan78xx_write_reg(sc, ETH_HW_CFG, val); 407 } 408 409 err = lan78xx_wait_for_bits(sc, ETH_E2P_CMD, ETH_E2P_CMD_BUSY_); 410 if (err != 0) { 411 muge_warn_printf(sc, "eeprom busy, failed to read data\n"); 412 goto done; 413 } 414 415 /* Start reading the bytes, one at a time. */ 416 for (i = 0; i < buflen; i++) { 417 val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_; 418 val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i)); 419 if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0) 420 goto done; 421 422 start_ticks = (usb_ticks_t)ticks; 423 do { 424 if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) != 425 0) 426 goto done; 427 if (!(val & ETH_E2P_CMD_BUSY_) || 428 (val & ETH_E2P_CMD_TIMEOUT_)) 429 break; 430 431 uether_pause(&sc->sc_ue, hz / 100); 432 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 433 434 if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) { 435 muge_warn_printf(sc, "eeprom command failed\n"); 436 err = USB_ERR_IOERROR; 437 break; 438 } 439 440 if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0) 441 goto done; 442 443 buf[i] = (val & 0xff); 444 } 445 446 done: 447 if (!locked) 448 MUGE_UNLOCK(sc); 449 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 450 /* Restore saved LED configuration. */ 451 lan78xx_write_reg(sc, ETH_HW_CFG, saved); 452 } 453 return (err); 454 } 455 456 static bool 457 lan78xx_eeprom_present(struct muge_softc *sc) 458 { 459 int ret; 460 uint8_t sig; 461 462 ret = lan78xx_eeprom_read_raw(sc, ETH_E2P_INDICATOR_OFFSET, &sig, 1); 463 return (ret == 0 && sig == ETH_E2P_INDICATOR); 464 } 465 466 /** 467 * lan78xx_otp_read_raw 468 * @sc: soft context 469 * @off: the otp address offset 470 * @buf: stores the bytes 471 * @buflen: the number of bytes to read 472 * 473 * Simply reads bytes from the OTP. 474 * 475 * LOCKING: 476 * The function takes and releases the device lock if not already held. 477 * 478 * RETURNS: 479 * 0 on success, or a USB_ERR_?? error code on failure. 480 * 481 */ 482 static int 483 lan78xx_otp_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 484 uint16_t buflen) 485 { 486 int err; 487 uint32_t val; 488 uint16_t i; 489 bool locked; 490 locked = mtx_owned(&sc->sc_mtx); 491 if (!locked) 492 MUGE_LOCK(sc); 493 494 err = lan78xx_read_reg(sc, OTP_PWR_DN, &val); 495 496 /* Checking if bit is set. */ 497 if (val & OTP_PWR_DN_PWRDN_N) { 498 /* Clear it, then wait for it to be cleared. */ 499 lan78xx_write_reg(sc, OTP_PWR_DN, 0); 500 err = lan78xx_wait_for_bits(sc, OTP_PWR_DN, OTP_PWR_DN_PWRDN_N); 501 if (err != 0) { 502 muge_warn_printf(sc, "OTP off? failed to read data\n"); 503 goto done; 504 } 505 } 506 /* Start reading the bytes, one at a time. */ 507 for (i = 0; i < buflen; i++) { 508 err = lan78xx_write_reg(sc, OTP_ADDR1, 509 ((off + i) >> 8) & OTP_ADDR1_15_11); 510 err = lan78xx_write_reg(sc, OTP_ADDR2, 511 ((off + i) & OTP_ADDR2_10_3)); 512 err = lan78xx_write_reg(sc, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 513 err = lan78xx_write_reg(sc, OTP_CMD_GO, OTP_CMD_GO_GO_); 514 515 err = lan78xx_wait_for_bits(sc, OTP_STATUS, OTP_STATUS_BUSY_); 516 if (err != 0) { 517 muge_warn_printf(sc, "OTP busy failed to read data\n"); 518 goto done; 519 } 520 521 if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0) 522 goto done; 523 524 buf[i] = (uint8_t)(val & 0xff); 525 } 526 527 done: 528 if (!locked) 529 MUGE_UNLOCK(sc); 530 return (err); 531 } 532 533 /** 534 * lan78xx_otp_read 535 * @sc: soft context 536 * @off: the otp address offset 537 * @buf: stores the bytes 538 * @buflen: the number of bytes to read 539 * 540 * Simply reads bytes from the otp. 541 * 542 * LOCKING: 543 * The function takes and releases device lock if it is not already held. 544 * 545 * RETURNS: 546 * 0 on success, or a USB_ERR_?? error code on failure. 547 */ 548 static int 549 lan78xx_otp_read(struct muge_softc *sc, uint16_t off, uint8_t *buf, 550 uint16_t buflen) 551 { 552 uint8_t sig; 553 int err; 554 555 err = lan78xx_otp_read_raw(sc, OTP_INDICATOR_OFFSET, &sig, 1); 556 if (err == 0) { 557 if (sig == OTP_INDICATOR_1) { 558 } else if (sig == OTP_INDICATOR_2) { 559 off += 0x100; /* XXX */ 560 } else { 561 err = -EINVAL; 562 } 563 if (!err) 564 err = lan78xx_otp_read_raw(sc, off, buf, buflen); 565 } 566 return (err); 567 } 568 569 /** 570 * lan78xx_setmacaddress - Set the mac address in the device 571 * @sc: driver soft context 572 * @addr: pointer to array contain at least 6 bytes of the mac 573 * 574 * LOCKING: 575 * Should be called with the MUGE lock held. 576 * 577 * RETURNS: 578 * Returns 0 on success or a negative error code. 579 */ 580 static int 581 lan78xx_setmacaddress(struct muge_softc *sc, const uint8_t *addr) 582 { 583 int err; 584 uint32_t val; 585 586 muge_dbg_printf(sc, 587 "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 588 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 589 590 MUGE_LOCK_ASSERT(sc, MA_OWNED); 591 592 val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; 593 if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0) 594 goto done; 595 596 val = (addr[5] << 8) | addr[4]; 597 err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val); 598 599 done: 600 return (err); 601 } 602 603 /** 604 * lan78xx_set_rx_max_frame_length 605 * @sc: driver soft context 606 * @size: pointer to array contain at least 6 bytes of the mac 607 * 608 * Sets the maximum frame length to be received. Frames bigger than 609 * this size are aborted. 610 * 611 * RETURNS: 612 * Returns 0 on success or a negative error code. 613 */ 614 static int 615 lan78xx_set_rx_max_frame_length(struct muge_softc *sc, int size) 616 { 617 uint32_t buf; 618 bool rxenabled; 619 620 /* First we have to disable rx before changing the length. */ 621 lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 622 rxenabled = ((buf & ETH_MAC_RX_EN_) != 0); 623 624 if (rxenabled) { 625 buf &= ~ETH_MAC_RX_EN_; 626 lan78xx_write_reg(sc, ETH_MAC_RX, buf); 627 } 628 629 /* Setting max frame length. */ 630 buf &= ~ETH_MAC_RX_MAX_FR_SIZE_MASK_; 631 buf |= (((size + 4) << ETH_MAC_RX_MAX_FR_SIZE_SHIFT_) & 632 ETH_MAC_RX_MAX_FR_SIZE_MASK_); 633 lan78xx_write_reg(sc, ETH_MAC_RX, buf); 634 635 /* If it were enabled before, we enable it back. */ 636 637 if (rxenabled) { 638 buf |= ETH_MAC_RX_EN_; 639 lan78xx_write_reg(sc, ETH_MAC_RX, buf); 640 } 641 642 return (0); 643 } 644 645 /** 646 * lan78xx_miibus_readreg - Read a MII/MDIO register 647 * @dev: usb ether device 648 * @phy: the number of phy reading from 649 * @reg: the register address 650 * 651 * LOCKING: 652 * Takes and releases the device mutex lock if not already held. 653 * 654 * RETURNS: 655 * Returns the 16-bits read from the MII register, if this function fails 656 * 0 is returned. 657 */ 658 static int 659 lan78xx_miibus_readreg(device_t dev, int phy, int reg) 660 { 661 struct muge_softc *sc = device_get_softc(dev); 662 uint32_t addr, val; 663 bool locked; 664 665 val = 0; 666 locked = mtx_owned(&sc->sc_mtx); 667 if (!locked) 668 MUGE_LOCK(sc); 669 670 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 671 0) { 672 muge_warn_printf(sc, "MII is busy\n"); 673 goto done; 674 } 675 676 addr = (phy << 11) | (reg << 6) | 677 ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_; 678 lan78xx_write_reg(sc, ETH_MII_ACC, addr); 679 680 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 681 0) { 682 muge_warn_printf(sc, "MII read timeout\n"); 683 goto done; 684 } 685 686 lan78xx_read_reg(sc, ETH_MII_DATA, &val); 687 val = le32toh(val); 688 689 done: 690 if (!locked) 691 MUGE_UNLOCK(sc); 692 693 return (val & 0xFFFF); 694 } 695 696 /** 697 * lan78xx_miibus_writereg - Writes a MII/MDIO register 698 * @dev: usb ether device 699 * @phy: the number of phy writing to 700 * @reg: the register address 701 * @val: the value to write 702 * 703 * Attempts to write a PHY register through the usb controller registers. 704 * 705 * LOCKING: 706 * Takes and releases the device mutex lock if not already held. 707 * 708 * RETURNS: 709 * Always returns 0 regardless of success or failure. 710 */ 711 static int 712 lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val) 713 { 714 struct muge_softc *sc = device_get_softc(dev); 715 uint32_t addr; 716 bool locked; 717 718 if (sc->sc_phyno != phy) 719 return (0); 720 721 locked = mtx_owned(&sc->sc_mtx); 722 if (!locked) 723 MUGE_LOCK(sc); 724 725 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 726 0) { 727 muge_warn_printf(sc, "MII is busy\n"); 728 goto done; 729 } 730 731 val = htole32(val); 732 lan78xx_write_reg(sc, ETH_MII_DATA, val); 733 734 addr = (phy << 11) | (reg << 6) | 735 ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_; 736 lan78xx_write_reg(sc, ETH_MII_ACC, addr); 737 738 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0) 739 muge_warn_printf(sc, "MII write timeout\n"); 740 741 done: 742 if (!locked) 743 MUGE_UNLOCK(sc); 744 return (0); 745 } 746 747 /* 748 * lan78xx_miibus_statchg - Called to detect phy status change 749 * @dev: usb ether device 750 * 751 * This function is called periodically by the system to poll for status 752 * changes of the link. 753 * 754 * LOCKING: 755 * Takes and releases the device mutex lock if not already held. 756 */ 757 static void 758 lan78xx_miibus_statchg(device_t dev) 759 { 760 struct muge_softc *sc = device_get_softc(dev); 761 struct mii_data *mii = uether_getmii(&sc->sc_ue); 762 struct ifnet *ifp; 763 int err; 764 uint32_t flow = 0; 765 uint32_t fct_flow = 0; 766 bool locked; 767 768 locked = mtx_owned(&sc->sc_mtx); 769 if (!locked) 770 MUGE_LOCK(sc); 771 772 ifp = uether_getifp(&sc->sc_ue); 773 if (mii == NULL || ifp == NULL || 774 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 775 goto done; 776 777 /* Use the MII status to determine link status */ 778 sc->sc_flags &= ~MUGE_FLAG_LINK; 779 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 780 (IFM_ACTIVE | IFM_AVALID)) { 781 muge_dbg_printf(sc, "media is active\n"); 782 switch (IFM_SUBTYPE(mii->mii_media_active)) { 783 case IFM_10_T: 784 case IFM_100_TX: 785 sc->sc_flags |= MUGE_FLAG_LINK; 786 muge_dbg_printf(sc, "10/100 ethernet\n"); 787 break; 788 case IFM_1000_T: 789 sc->sc_flags |= MUGE_FLAG_LINK; 790 muge_dbg_printf(sc, "Gigabit ethernet\n"); 791 break; 792 default: 793 break; 794 } 795 } 796 /* Lost link, do nothing. */ 797 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 798 muge_dbg_printf(sc, "link flag not set\n"); 799 goto done; 800 } 801 802 err = lan78xx_read_reg(sc, ETH_FCT_FLOW, &fct_flow); 803 if (err) { 804 muge_warn_printf(sc, 805 "failed to read initial flow control thresholds, error %d\n", 806 err); 807 goto done; 808 } 809 810 /* Enable/disable full duplex operation and TX/RX pause. */ 811 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 812 muge_dbg_printf(sc, "full duplex operation\n"); 813 814 /* Enable transmit MAC flow control function. */ 815 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0) 816 flow |= ETH_FLOW_CR_TX_FCEN_ | 0xFFFF; 817 818 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0) 819 flow |= ETH_FLOW_CR_RX_FCEN_; 820 } 821 822 /* XXX Flow control settings obtained from Microchip's driver. */ 823 switch(usbd_get_speed(sc->sc_ue.ue_udev)) { 824 case USB_SPEED_SUPER: 825 fct_flow = 0x817; 826 break; 827 case USB_SPEED_HIGH: 828 fct_flow = 0x211; 829 break; 830 default: 831 break; 832 } 833 834 err += lan78xx_write_reg(sc, ETH_FLOW, flow); 835 err += lan78xx_write_reg(sc, ETH_FCT_FLOW, fct_flow); 836 if (err) 837 muge_warn_printf(sc, "media change failed, error %d\n", err); 838 839 done: 840 if (!locked) 841 MUGE_UNLOCK(sc); 842 } 843 844 /* 845 * lan78xx_set_mdix_auto - Configure the device to enable automatic 846 * crossover and polarity detection. LAN7800 provides HP Auto-MDIX 847 * functionality for seamless crossover and polarity detection. 848 * 849 * @sc: driver soft context 850 * 851 * LOCKING: 852 * Takes and releases the device mutex lock if not already held. 853 */ 854 static void 855 lan78xx_set_mdix_auto(struct muge_softc *sc) 856 { 857 uint32_t buf, err; 858 859 err = lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 860 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_1); 861 862 buf = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 863 MUGE_EXT_MODE_CTRL); 864 buf &= ~MUGE_EXT_MODE_CTRL_MDIX_MASK_; 865 buf |= MUGE_EXT_MODE_CTRL_AUTO_MDIX_; 866 867 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 868 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 869 MUGE_EXT_MODE_CTRL, buf); 870 871 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 872 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_0); 873 874 if (err != 0) 875 muge_warn_printf(sc, "error setting PHY's MDIX status\n"); 876 877 sc->sc_mdix_ctl = buf; 878 } 879 880 /** 881 * lan78xx_phy_init - Initialises the in-built MUGE phy 882 * @sc: driver soft context 883 * 884 * Resets the PHY part of the chip and then initialises it to default 885 * values. The 'link down' and 'auto-negotiation complete' interrupts 886 * from the PHY are also enabled, however we don't monitor the interrupt 887 * endpoints for the moment. 888 * 889 * RETURNS: 890 * Returns 0 on success or EIO if failed to reset the PHY. 891 */ 892 static int 893 lan78xx_phy_init(struct muge_softc *sc) 894 { 895 muge_dbg_printf(sc, "Initializing PHY.\n"); 896 uint16_t bmcr, lmsr; 897 usb_ticks_t start_ticks; 898 uint32_t hw_reg; 899 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 900 901 MUGE_LOCK_ASSERT(sc, MA_OWNED); 902 903 /* Reset phy and wait for reset to complete. */ 904 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, 905 BMCR_RESET); 906 907 start_ticks = ticks; 908 do { 909 uether_pause(&sc->sc_ue, hz / 100); 910 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 911 MII_BMCR); 912 } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks)); 913 914 if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) { 915 muge_err_printf(sc, "PHY reset timed-out\n"); 916 return (EIO); 917 } 918 919 /* Setup phy to interrupt upon link down or autoneg completion. */ 920 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 921 MUGE_PHY_INTR_STAT); 922 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 923 MUGE_PHY_INTR_MASK, 924 (MUGE_PHY_INTR_ANEG_COMP | MUGE_PHY_INTR_LINK_CHANGE)); 925 926 /* Enable Auto-MDIX for crossover and polarity detection. */ 927 lan78xx_set_mdix_auto(sc); 928 929 /* Enable all modes. */ 930 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR, 931 ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD | 932 ANAR_CSMA | ANAR_FC | ANAR_PAUSE_ASYM); 933 934 /* Restart auto-negotiation. */ 935 bmcr |= BMCR_STARTNEG; 936 bmcr |= BMCR_AUTOEN; 937 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr); 938 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 939 940 /* Configure LED Modes. */ 941 if (sc->sc_led_modes_mask != 0) { 942 lmsr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 943 MUGE_PHY_LED_MODE); 944 lmsr &= ~sc->sc_led_modes_mask; 945 lmsr |= sc->sc_led_modes; 946 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 947 MUGE_PHY_LED_MODE, lmsr); 948 } 949 950 /* Enable appropriate LEDs. */ 951 if (sc->sc_leds != 0 && 952 lan78xx_read_reg(sc, ETH_HW_CFG, &hw_reg) == 0) { 953 hw_reg &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_ | 954 ETH_HW_CFG_LED2_EN_ | ETH_HW_CFG_LED3_EN_ ); 955 hw_reg |= sc->sc_leds; 956 lan78xx_write_reg(sc, ETH_HW_CFG, hw_reg); 957 } 958 return (0); 959 } 960 961 /** 962 * lan78xx_chip_init - Initialises the chip after power on 963 * @sc: driver soft context 964 * 965 * This initialisation sequence is modelled on the procedure in the Linux 966 * driver. 967 * 968 * RETURNS: 969 * Returns 0 on success or an error code on failure. 970 */ 971 static int 972 lan78xx_chip_init(struct muge_softc *sc) 973 { 974 int err; 975 uint32_t buf; 976 uint32_t burst_cap; 977 978 MUGE_LOCK_ASSERT(sc, MA_OWNED); 979 980 /* Enter H/W config mode. */ 981 lan78xx_write_reg(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_); 982 983 if ((err = lan78xx_wait_for_bits(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_)) != 984 0) { 985 muge_warn_printf(sc, 986 "timed-out waiting for lite reset to complete\n"); 987 goto init_failed; 988 } 989 990 /* Set the mac address. */ 991 if ((err = lan78xx_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) { 992 muge_warn_printf(sc, "failed to set the MAC address\n"); 993 goto init_failed; 994 } 995 996 /* Read and display the revision register. */ 997 if ((err = lan78xx_read_reg(sc, ETH_ID_REV, &buf)) < 0) { 998 muge_warn_printf(sc, "failed to read ETH_ID_REV (err = %d)\n", 999 err); 1000 goto init_failed; 1001 } 1002 sc->chipid = (buf & ETH_ID_REV_CHIP_ID_MASK_) >> 16; 1003 sc->chiprev = buf & ETH_ID_REV_CHIP_REV_MASK_; 1004 switch (sc->chipid) { 1005 case ETH_ID_REV_CHIP_ID_7800_: 1006 case ETH_ID_REV_CHIP_ID_7850_: 1007 break; 1008 default: 1009 muge_warn_printf(sc, "Chip ID 0x%04x not yet supported\n", 1010 sc->chipid); 1011 goto init_failed; 1012 } 1013 device_printf(sc->sc_ue.ue_dev, "Chip ID 0x%04x rev %04x\n", sc->chipid, 1014 sc->chiprev); 1015 1016 /* Respond to BULK-IN tokens with a NAK when RX FIFO is empty. */ 1017 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) != 0) { 1018 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", err); 1019 goto init_failed; 1020 } 1021 buf |= ETH_USB_CFG_BIR_; 1022 lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1023 1024 /* 1025 * XXX LTM support will go here. 1026 */ 1027 1028 /* Configuring the burst cap. */ 1029 switch (usbd_get_speed(sc->sc_ue.ue_udev)) { 1030 case USB_SPEED_SUPER: 1031 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_SS_USB_PKT_SIZE; 1032 break; 1033 case USB_SPEED_HIGH: 1034 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_HS_USB_PKT_SIZE; 1035 break; 1036 default: 1037 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_FS_USB_PKT_SIZE; 1038 } 1039 1040 lan78xx_write_reg(sc, ETH_BURST_CAP, burst_cap); 1041 1042 /* Set the default bulk in delay (same value from Linux driver). */ 1043 lan78xx_write_reg(sc, ETH_BULK_IN_DLY, MUGE_DEFAULT_BULK_IN_DELAY); 1044 1045 /* Multiple ethernet frames per USB packets. */ 1046 err = lan78xx_read_reg(sc, ETH_HW_CFG, &buf); 1047 buf |= ETH_HW_CFG_MEF_; 1048 err = lan78xx_write_reg(sc, ETH_HW_CFG, buf); 1049 1050 /* Enable burst cap. */ 1051 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) < 0) { 1052 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", 1053 err); 1054 goto init_failed; 1055 } 1056 buf |= ETH_USB_CFG_BCE_; 1057 err = lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1058 1059 /* 1060 * Set FCL's RX and TX FIFO sizes: according to data sheet this is 1061 * already the default value. But we initialize it to the same value 1062 * anyways, as that's what the Linux driver does. 1063 * 1064 */ 1065 buf = (MUGE_MAX_RX_FIFO_SIZE - 512) / 512; 1066 err = lan78xx_write_reg(sc, ETH_FCT_RX_FIFO_END, buf); 1067 1068 buf = (MUGE_MAX_TX_FIFO_SIZE - 512) / 512; 1069 err = lan78xx_write_reg(sc, ETH_FCT_TX_FIFO_END, buf); 1070 1071 /* Enabling interrupts. (Not using them for now) */ 1072 err = lan78xx_write_reg(sc, ETH_INT_STS, ETH_INT_STS_CLEAR_ALL_); 1073 1074 /* 1075 * Initializing flow control registers to 0. These registers are 1076 * properly set is handled in link-reset function in the Linux driver. 1077 */ 1078 err = lan78xx_write_reg(sc, ETH_FLOW, 0); 1079 err = lan78xx_write_reg(sc, ETH_FCT_FLOW, 0); 1080 1081 /* 1082 * Settings for the RFE, we enable broadcast and destination address 1083 * perfect filtering. 1084 */ 1085 err = lan78xx_read_reg(sc, ETH_RFE_CTL, &buf); 1086 buf |= ETH_RFE_CTL_BCAST_EN_ | ETH_RFE_CTL_DA_PERFECT_; 1087 err = lan78xx_write_reg(sc, ETH_RFE_CTL, buf); 1088 1089 /* 1090 * At this point the Linux driver writes multicast tables, and enables 1091 * checksum engines. But in FreeBSD that gets done in muge_init, 1092 * which gets called when the interface is brought up. 1093 */ 1094 1095 /* Reset the PHY. */ 1096 lan78xx_write_reg(sc, ETH_PMT_CTL, ETH_PMT_CTL_PHY_RST_); 1097 if ((err = lan78xx_wait_for_bits(sc, ETH_PMT_CTL, 1098 ETH_PMT_CTL_PHY_RST_)) != 0) { 1099 muge_warn_printf(sc, 1100 "timed-out waiting for phy reset to complete\n"); 1101 goto init_failed; 1102 } 1103 1104 err = lan78xx_read_reg(sc, ETH_MAC_CR, &buf); 1105 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_ && 1106 !lan78xx_eeprom_present(sc)) { 1107 /* Set automatic duplex and speed on LAN7800 without EEPROM. */ 1108 buf |= ETH_MAC_CR_AUTO_DUPLEX_ | ETH_MAC_CR_AUTO_SPEED_; 1109 } 1110 err = lan78xx_write_reg(sc, ETH_MAC_CR, buf); 1111 1112 /* 1113 * Enable PHY interrupts (Not really getting used for now) 1114 * ETH_INT_EP_CTL: interrupt endpoint control register 1115 * phy events cause interrupts to be issued 1116 */ 1117 err = lan78xx_read_reg(sc, ETH_INT_EP_CTL, &buf); 1118 buf |= ETH_INT_ENP_PHY_INT; 1119 err = lan78xx_write_reg(sc, ETH_INT_EP_CTL, buf); 1120 1121 /* 1122 * Enables mac's transmitter. It will transmit frames from the buffer 1123 * onto the cable. 1124 */ 1125 err = lan78xx_read_reg(sc, ETH_MAC_TX, &buf); 1126 buf |= ETH_MAC_TX_TXEN_; 1127 err = lan78xx_write_reg(sc, ETH_MAC_TX, buf); 1128 1129 /* FIFO is capable of transmitting frames to MAC. */ 1130 err = lan78xx_read_reg(sc, ETH_FCT_TX_CTL, &buf); 1131 buf |= ETH_FCT_TX_CTL_EN_; 1132 err = lan78xx_write_reg(sc, ETH_FCT_TX_CTL, buf); 1133 1134 /* 1135 * Set max frame length. In linux this is dev->mtu (which by default 1136 * is 1500) + VLAN_ETH_HLEN = 1518. 1137 */ 1138 err = lan78xx_set_rx_max_frame_length(sc, ETHER_MAX_LEN); 1139 1140 /* Initialise the PHY. */ 1141 if ((err = lan78xx_phy_init(sc)) != 0) 1142 goto init_failed; 1143 1144 /* Enable MAC RX. */ 1145 err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 1146 buf |= ETH_MAC_RX_EN_; 1147 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 1148 1149 /* Enable FIFO controller RX. */ 1150 err = lan78xx_read_reg(sc, ETH_FCT_RX_CTL, &buf); 1151 buf |= ETH_FCT_TX_CTL_EN_; 1152 err = lan78xx_write_reg(sc, ETH_FCT_RX_CTL, buf); 1153 1154 sc->sc_flags |= MUGE_FLAG_INIT_DONE; 1155 return (0); 1156 1157 init_failed: 1158 muge_err_printf(sc, "lan78xx_chip_init failed (err=%d)\n", err); 1159 return (err); 1160 } 1161 1162 static void 1163 muge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 1164 { 1165 struct muge_softc *sc = usbd_xfer_softc(xfer); 1166 struct usb_ether *ue = &sc->sc_ue; 1167 struct ifnet *ifp = uether_getifp(ue); 1168 struct mbuf *m; 1169 struct usb_page_cache *pc; 1170 uint32_t rx_cmd_a, rx_cmd_b; 1171 uint16_t rx_cmd_c; 1172 int pktlen; 1173 int off; 1174 int actlen; 1175 1176 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 1177 muge_dbg_printf(sc, "rx : actlen %d\n", actlen); 1178 1179 switch (USB_GET_STATE(xfer)) { 1180 case USB_ST_TRANSFERRED: 1181 /* 1182 * There is always a zero length frame after bringing the 1183 * interface up. 1184 */ 1185 if (actlen < (sizeof(rx_cmd_a) + ETHER_CRC_LEN)) 1186 goto tr_setup; 1187 1188 /* 1189 * There may be multiple packets in the USB frame. Each will 1190 * have a header and each needs to have its own mbuf allocated 1191 * and populated for it. 1192 */ 1193 pc = usbd_xfer_get_frame(xfer, 0); 1194 off = 0; 1195 1196 while (off < actlen) { 1197 /* The frame header is aligned on a 4 byte boundary. */ 1198 off = ((off + 0x3) & ~0x3); 1199 1200 /* Extract RX CMD A. */ 1201 if (off + sizeof(rx_cmd_a) > actlen) 1202 goto tr_setup; 1203 usbd_copy_out(pc, off, &rx_cmd_a, sizeof(rx_cmd_a)); 1204 off += (sizeof(rx_cmd_a)); 1205 rx_cmd_a = le32toh(rx_cmd_a); 1206 1207 /* Extract RX CMD B. */ 1208 if (off + sizeof(rx_cmd_b) > actlen) 1209 goto tr_setup; 1210 usbd_copy_out(pc, off, &rx_cmd_b, sizeof(rx_cmd_b)); 1211 off += (sizeof(rx_cmd_b)); 1212 rx_cmd_b = le32toh(rx_cmd_b); 1213 1214 /* Extract RX CMD C. */ 1215 if (off + sizeof(rx_cmd_c) > actlen) 1216 goto tr_setup; 1217 usbd_copy_out(pc, off, &rx_cmd_c, sizeof(rx_cmd_c)); 1218 off += (sizeof(rx_cmd_c)); 1219 rx_cmd_c = le16toh(rx_cmd_c); 1220 1221 if (off > actlen) 1222 goto tr_setup; 1223 1224 pktlen = (rx_cmd_a & RX_CMD_A_LEN_MASK_); 1225 1226 muge_dbg_printf(sc, 1227 "rx_cmd_a 0x%08x rx_cmd_b 0x%08x rx_cmd_c 0x%04x " 1228 " pktlen %d actlen %d off %d\n", 1229 rx_cmd_a, rx_cmd_b, rx_cmd_c, pktlen, actlen, off); 1230 1231 if (rx_cmd_a & RX_CMD_A_RED_) { 1232 muge_dbg_printf(sc, 1233 "rx error (hdr 0x%08x)\n", rx_cmd_a); 1234 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1235 } else { 1236 /* Ethernet frame too big or too small? */ 1237 if ((pktlen < ETHER_HDR_LEN) || 1238 (pktlen > (actlen - off))) 1239 goto tr_setup; 1240 1241 /* Create a new mbuf to store the packet. */ 1242 m = uether_newbuf(); 1243 if (m == NULL) { 1244 muge_warn_printf(sc, 1245 "failed to create new mbuf\n"); 1246 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1247 1); 1248 goto tr_setup; 1249 } 1250 if (pktlen > m->m_len) { 1251 muge_dbg_printf(sc, 1252 "buffer too small %d vs %d bytes", 1253 pktlen, m->m_len); 1254 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1); 1255 m_freem(m); 1256 goto tr_setup; 1257 } 1258 usbd_copy_out(pc, off, mtod(m, uint8_t *), 1259 pktlen); 1260 1261 /* 1262 * Check if RX checksums are computed, and 1263 * offload them 1264 */ 1265 if ((ifp->if_capenable & IFCAP_RXCSUM) && 1266 !(rx_cmd_a & RX_CMD_A_ICSM_)) { 1267 /* 1268 * Remove the extra 2 bytes of the csum 1269 * 1270 * The checksum appears to be 1271 * simplistically calculated over the 1272 * protocol headers up to the end of the 1273 * eth frame. Which means if the eth 1274 * frame is padded the csum calculation 1275 * is incorrectly performed over the 1276 * padding bytes as well. Therefore to 1277 * be safe we ignore the H/W csum on 1278 * frames less than or equal to 1279 * 64 bytes. 1280 * 1281 * Protocols checksummed: 1282 * TCP, UDP, ICMP, IGMP, IP 1283 */ 1284 if (pktlen > ETHER_MIN_LEN) { 1285 m->m_pkthdr.csum_flags |= 1286 CSUM_DATA_VALID | 1287 CSUM_PSEUDO_HDR; 1288 1289 /* 1290 * Copy the checksum from the 1291 * last 2 bytes of the transfer 1292 * and put in the csum_data 1293 * field. 1294 */ 1295 usbd_copy_out(pc, 1296 (off + pktlen), 1297 &m->m_pkthdr.csum_data, 2); 1298 1299 /* 1300 * The data is copied in network 1301 * order, but the csum algorithm 1302 * in the kernel expects it to 1303 * be in host network order. 1304 */ 1305 m->m_pkthdr.csum_data = 1306 ntohs(0xffff); 1307 1308 muge_dbg_printf(sc, 1309 "RX checksum offloaded (0x%04x)\n", 1310 m->m_pkthdr.csum_data); 1311 } 1312 } 1313 1314 /* Enqueue the mbuf on the receive queue. */ 1315 if (pktlen < (4 + ETHER_HDR_LEN)) { 1316 m_freem(m); 1317 goto tr_setup; 1318 } 1319 /* Remove 4 trailing bytes */ 1320 uether_rxmbuf(ue, m, pktlen - 4); 1321 } 1322 1323 /* 1324 * Update the offset to move to the next potential 1325 * packet. 1326 */ 1327 off += pktlen; 1328 } 1329 /* FALLTHROUGH */ 1330 case USB_ST_SETUP: 1331 tr_setup: 1332 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1333 usbd_transfer_submit(xfer); 1334 uether_rxflush(ue); 1335 return; 1336 default: 1337 if (error != USB_ERR_CANCELLED) { 1338 muge_warn_printf(sc, "bulk read error, %s\n", 1339 usbd_errstr(error)); 1340 usbd_xfer_set_stall(xfer); 1341 goto tr_setup; 1342 } 1343 return; 1344 } 1345 } 1346 1347 /** 1348 * muge_bulk_write_callback - Write callback used to send ethernet frame(s) 1349 * @xfer: the USB transfer 1350 * @error: error code if the transfers is in an errored state 1351 * 1352 * The main write function that pulls ethernet frames off the queue and 1353 * sends them out. 1354 * 1355 */ 1356 static void 1357 muge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1358 { 1359 struct muge_softc *sc = usbd_xfer_softc(xfer); 1360 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1361 struct usb_page_cache *pc; 1362 struct mbuf *m; 1363 int nframes; 1364 uint32_t frm_len = 0, tx_cmd_a = 0, tx_cmd_b = 0; 1365 1366 switch (USB_GET_STATE(xfer)) { 1367 case USB_ST_TRANSFERRED: 1368 muge_dbg_printf(sc, 1369 "USB TRANSFER status: USB_ST_TRANSFERRED\n"); 1370 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1371 /* FALLTHROUGH */ 1372 case USB_ST_SETUP: 1373 muge_dbg_printf(sc, "USB TRANSFER status: USB_ST_SETUP\n"); 1374 tr_setup: 1375 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0 || 1376 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1377 muge_dbg_printf(sc, 1378 "sc->sc_flags & MUGE_FLAG_LINK: %d\n", 1379 (sc->sc_flags & MUGE_FLAG_LINK)); 1380 muge_dbg_printf(sc, 1381 "ifp->if_drv_flags & IFF_DRV_OACTIVE: %d\n", 1382 (ifp->if_drv_flags & IFF_DRV_OACTIVE)); 1383 muge_dbg_printf(sc, 1384 "USB TRANSFER not sending: no link or controller is busy \n"); 1385 /* 1386 * Don't send anything if there is no link or 1387 * controller is busy. 1388 */ 1389 return; 1390 } 1391 for (nframes = 0; 1392 nframes < 16 && !IFQ_DRV_IS_EMPTY(&ifp->if_snd); 1393 nframes++) { 1394 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1395 if (m == NULL) 1396 break; 1397 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1398 nframes); 1399 frm_len = 0; 1400 pc = usbd_xfer_get_frame(xfer, nframes); 1401 1402 /* 1403 * Each frame is prefixed with two 32-bit values 1404 * describing the length of the packet and buffer. 1405 */ 1406 tx_cmd_a = (m->m_pkthdr.len & TX_CMD_A_LEN_MASK_) | 1407 TX_CMD_A_FCS_; 1408 tx_cmd_a = htole32(tx_cmd_a); 1409 usbd_copy_in(pc, 0, &tx_cmd_a, sizeof(tx_cmd_a)); 1410 1411 tx_cmd_b = 0; 1412 1413 /* TCP LSO Support will probably be implemented here. */ 1414 tx_cmd_b = htole32(tx_cmd_b); 1415 usbd_copy_in(pc, 4, &tx_cmd_b, sizeof(tx_cmd_b)); 1416 1417 frm_len += 8; 1418 1419 /* Next copy in the actual packet */ 1420 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len); 1421 frm_len += m->m_pkthdr.len; 1422 1423 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1424 1425 /* 1426 * If there's a BPF listener, bounce a copy of this 1427 * frame to it. 1428 */ 1429 BPF_MTAP(ifp, m); 1430 m_freem(m); 1431 1432 /* Set frame length. */ 1433 usbd_xfer_set_frame_len(xfer, nframes, frm_len); 1434 } 1435 1436 muge_dbg_printf(sc, "USB TRANSFER nframes: %d\n", nframes); 1437 if (nframes != 0) { 1438 muge_dbg_printf(sc, "USB TRANSFER submit attempt\n"); 1439 usbd_xfer_set_frames(xfer, nframes); 1440 usbd_transfer_submit(xfer); 1441 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1442 } 1443 return; 1444 1445 default: 1446 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1447 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1448 1449 if (error != USB_ERR_CANCELLED) { 1450 muge_err_printf(sc, 1451 "usb error on tx: %s\n", usbd_errstr(error)); 1452 usbd_xfer_set_stall(xfer); 1453 goto tr_setup; 1454 } 1455 return; 1456 } 1457 } 1458 1459 /** 1460 * muge_set_mac_addr - Initiailizes NIC MAC address 1461 * @ue: the USB ethernet device 1462 * 1463 * Tries to obtain MAC address from number of sources: registers, 1464 * EEPROM, DTB blob. If all sources fail - generates random MAC. 1465 */ 1466 static void 1467 muge_set_mac_addr(struct usb_ether *ue) 1468 { 1469 struct muge_softc *sc = uether_getsc(ue); 1470 uint32_t mac_h, mac_l; 1471 1472 memset(ue->ue_eaddr, 0xff, ETHER_ADDR_LEN); 1473 1474 uint32_t val; 1475 lan78xx_read_reg(sc, 0, &val); 1476 1477 /* Read current MAC address from RX_ADDRx registers. */ 1478 if ((lan78xx_read_reg(sc, ETH_RX_ADDRL, &mac_l) == 0) && 1479 (lan78xx_read_reg(sc, ETH_RX_ADDRH, &mac_h) == 0)) { 1480 ue->ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff); 1481 ue->ue_eaddr[4] = (uint8_t)((mac_h) & 0xff); 1482 ue->ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff); 1483 ue->ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff); 1484 ue->ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff); 1485 ue->ue_eaddr[0] = (uint8_t)((mac_l) & 0xff); 1486 } 1487 1488 /* 1489 * If RX_ADDRx did not provide a valid MAC address, try EEPROM. If that 1490 * doesn't work, try OTP. Whether any of these methods work or not, try 1491 * FDT data, because it is allowed to override the EEPROM/OTP values. 1492 */ 1493 if (ETHER_IS_VALID(ue->ue_eaddr)) { 1494 muge_dbg_printf(sc, "MAC assigned from registers\n"); 1495 } else if (lan78xx_eeprom_present(sc) && lan78xx_eeprom_read_raw(sc, 1496 ETH_E2P_MAC_OFFSET, ue->ue_eaddr, ETHER_ADDR_LEN) == 0 && 1497 ETHER_IS_VALID(ue->ue_eaddr)) { 1498 muge_dbg_printf(sc, "MAC assigned from EEPROM\n"); 1499 } else if (lan78xx_otp_read(sc, OTP_MAC_OFFSET, ue->ue_eaddr, 1500 ETHER_ADDR_LEN) == 0 && ETHER_IS_VALID(ue->ue_eaddr)) { 1501 muge_dbg_printf(sc, "MAC assigned from OTP\n"); 1502 } 1503 1504 #ifdef FDT 1505 /* ue->ue_eaddr modified only if config exists for this dev instance. */ 1506 usb_fdt_get_mac_addr(ue->ue_dev, ue); 1507 if (ETHER_IS_VALID(ue->ue_eaddr)) { 1508 muge_dbg_printf(sc, "MAC assigned from FDT data\n"); 1509 } 1510 #endif 1511 1512 if (!ETHER_IS_VALID(ue->ue_eaddr)) { 1513 muge_dbg_printf(sc, "MAC assigned randomly\n"); 1514 arc4rand(ue->ue_eaddr, ETHER_ADDR_LEN, 0); 1515 ue->ue_eaddr[0] &= ~0x01; /* unicast */ 1516 ue->ue_eaddr[0] |= 0x02; /* locally administered */ 1517 } 1518 } 1519 1520 /** 1521 * muge_set_leds - Initializes NIC LEDs pattern 1522 * @ue: the USB ethernet device 1523 * 1524 * Tries to store the LED modes. 1525 * Supports only DTB blob like the Linux driver does. 1526 */ 1527 static void 1528 muge_set_leds(struct usb_ether *ue) 1529 { 1530 #ifdef FDT 1531 struct muge_softc *sc = uether_getsc(ue); 1532 phandle_t node; 1533 pcell_t modes[4]; /* 4 LEDs are possible */ 1534 ssize_t proplen; 1535 uint32_t count; 1536 1537 if ((node = usb_fdt_get_node(ue->ue_dev, ue->ue_udev)) != -1 && 1538 (proplen = OF_getencprop(node, "microchip,led-modes", modes, 1539 sizeof(modes))) > 0) { 1540 count = proplen / sizeof( uint32_t ); 1541 sc->sc_leds = (count > 0) * ETH_HW_CFG_LEDO_EN_ | 1542 (count > 1) * ETH_HW_CFG_LED1_EN_ | 1543 (count > 2) * ETH_HW_CFG_LED2_EN_ | 1544 (count > 3) * ETH_HW_CFG_LED3_EN_; 1545 while (count-- > 0) { 1546 sc->sc_led_modes |= (modes[count] & 0xf) << (4 * count); 1547 sc->sc_led_modes_mask |= 0xf << (4 * count); 1548 } 1549 muge_dbg_printf(sc, "LED modes set from FDT data\n"); 1550 } 1551 #endif 1552 } 1553 1554 /** 1555 * muge_attach_post - Called after the driver attached to the USB interface 1556 * @ue: the USB ethernet device 1557 * 1558 * This is where the chip is intialised for the first time. This is 1559 * different from the muge_init() function in that that one is designed to 1560 * setup the H/W to match the UE settings and can be called after a reset. 1561 * 1562 */ 1563 static void 1564 muge_attach_post(struct usb_ether *ue) 1565 { 1566 struct muge_softc *sc = uether_getsc(ue); 1567 1568 muge_dbg_printf(sc, "Calling muge_attach_post.\n"); 1569 1570 /* Setup some of the basics */ 1571 sc->sc_phyno = 1; 1572 1573 muge_set_mac_addr(ue); 1574 muge_set_leds(ue); 1575 1576 /* Initialise the chip for the first time */ 1577 lan78xx_chip_init(sc); 1578 } 1579 1580 /** 1581 * muge_attach_post_sub - Called after attach to the USB interface 1582 * @ue: the USB ethernet device 1583 * 1584 * Most of this is boilerplate code and copied from the base USB ethernet 1585 * driver. It has been overridden so that we can indicate to the system 1586 * that the chip supports H/W checksumming. 1587 * 1588 * RETURNS: 1589 * Returns 0 on success or a negative error code. 1590 */ 1591 static int 1592 muge_attach_post_sub(struct usb_ether *ue) 1593 { 1594 struct muge_softc *sc; 1595 struct ifnet *ifp; 1596 1597 sc = uether_getsc(ue); 1598 muge_dbg_printf(sc, "Calling muge_attach_post_sub.\n"); 1599 ifp = ue->ue_ifp; 1600 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1601 ifp->if_start = uether_start; 1602 ifp->if_ioctl = muge_ioctl; 1603 ifp->if_init = uether_init; 1604 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 1605 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 1606 IFQ_SET_READY(&ifp->if_snd); 1607 1608 /* 1609 * The chip supports TCP/UDP checksum offloading on TX and RX paths, 1610 * however currently only RX checksum is supported in the driver 1611 * (see top of file). 1612 */ 1613 ifp->if_capabilities |= IFCAP_VLAN_MTU; 1614 ifp->if_hwassist = 0; 1615 ifp->if_capabilities |= IFCAP_RXCSUM; 1616 1617 if (MUGE_DEFAULT_TX_CSUM_ENABLE) 1618 ifp->if_capabilities |= IFCAP_TXCSUM; 1619 1620 /* 1621 * In the Linux driver they also enable scatter/gather (NETIF_F_SG) 1622 * here, that's something related to socket buffers used in Linux. 1623 * FreeBSD doesn't have that as an interface feature. 1624 */ 1625 if (MUGE_DEFAULT_TSO_ENABLE) 1626 ifp->if_capabilities |= IFCAP_TSO4 | IFCAP_TSO6; 1627 1628 #if 0 1629 /* TX checksuming is disabled since not yet implemented. */ 1630 ifp->if_capabilities |= IFCAP_TXCSUM; 1631 ifp->if_capenable |= IFCAP_TXCSUM; 1632 ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 1633 #endif 1634 1635 ifp->if_capenable = ifp->if_capabilities; 1636 1637 bus_topo_lock(); 1638 mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, uether_ifmedia_upd, 1639 ue->ue_methods->ue_mii_sts, BMSR_DEFCAPMASK, sc->sc_phyno, 1640 MII_OFFSET_ANY, 0); 1641 bus_topo_unlock(); 1642 1643 return (0); 1644 } 1645 1646 /** 1647 * muge_start - Starts communication with the LAN78xx chip 1648 * @ue: USB ether interface 1649 */ 1650 static void 1651 muge_start(struct usb_ether *ue) 1652 { 1653 struct muge_softc *sc = uether_getsc(ue); 1654 1655 /* 1656 * Start the USB transfers, if not already started. 1657 */ 1658 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_RD]); 1659 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_WR]); 1660 } 1661 1662 /** 1663 * muge_ioctl - ioctl function for the device 1664 * @ifp: interface pointer 1665 * @cmd: the ioctl command 1666 * @data: data passed in the ioctl call, typically a pointer to struct 1667 * ifreq. 1668 * 1669 * The ioctl routine is overridden to detect change requests for the H/W 1670 * checksum capabilities. 1671 * 1672 * RETURNS: 1673 * 0 on success and an error code on failure. 1674 */ 1675 static int 1676 muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1677 { 1678 struct usb_ether *ue = ifp->if_softc; 1679 struct muge_softc *sc; 1680 struct ifreq *ifr; 1681 int rc; 1682 int mask; 1683 int reinit; 1684 1685 if (cmd == SIOCSIFCAP) { 1686 sc = uether_getsc(ue); 1687 ifr = (struct ifreq *)data; 1688 1689 MUGE_LOCK(sc); 1690 1691 rc = 0; 1692 reinit = 0; 1693 1694 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1695 1696 /* Modify the RX CSUM enable bits. */ 1697 if ((mask & IFCAP_RXCSUM) != 0 && 1698 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1699 ifp->if_capenable ^= IFCAP_RXCSUM; 1700 1701 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1702 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1703 reinit = 1; 1704 } 1705 } 1706 1707 MUGE_UNLOCK(sc); 1708 if (reinit) 1709 uether_init(ue); 1710 } else { 1711 rc = uether_ioctl(ifp, cmd, data); 1712 } 1713 1714 return (rc); 1715 } 1716 1717 /** 1718 * muge_reset - Reset the SMSC chip 1719 * @sc: device soft context 1720 * 1721 * LOCKING: 1722 * Should be called with the SMSC lock held. 1723 */ 1724 static void 1725 muge_reset(struct muge_softc *sc) 1726 { 1727 struct usb_config_descriptor *cd; 1728 usb_error_t err; 1729 1730 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 1731 1732 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 1733 cd->bConfigurationValue); 1734 if (err) 1735 muge_warn_printf(sc, "reset failed (ignored)\n"); 1736 1737 /* Wait a little while for the chip to get its brains in order. */ 1738 uether_pause(&sc->sc_ue, hz / 100); 1739 1740 /* Reinitialize controller to achieve full reset. */ 1741 lan78xx_chip_init(sc); 1742 } 1743 1744 /** 1745 * muge_set_addr_filter 1746 * 1747 * @sc: device soft context 1748 * @index: index of the entry to the perfect address table 1749 * @addr: address to be written 1750 * 1751 */ 1752 static void 1753 muge_set_addr_filter(struct muge_softc *sc, int index, 1754 uint8_t addr[ETHER_ADDR_LEN]) 1755 { 1756 uint32_t tmp; 1757 1758 if ((sc) && (index > 0) && (index < MUGE_NUM_PFILTER_ADDRS_)) { 1759 tmp = addr[3]; 1760 tmp |= addr[2] | (tmp << 8); 1761 tmp |= addr[1] | (tmp << 8); 1762 tmp |= addr[0] | (tmp << 8); 1763 sc->sc_pfilter_table[index][1] = tmp; 1764 tmp = addr[5]; 1765 tmp |= addr[4] | (tmp << 8); 1766 tmp |= ETH_MAF_HI_VALID_ | ETH_MAF_HI_TYPE_DST_; 1767 sc->sc_pfilter_table[index][0] = tmp; 1768 } 1769 } 1770 1771 /** 1772 * lan78xx_dataport_write - write to the selected RAM 1773 * @sc: The device soft context. 1774 * @ram_select: Select which RAM to access. 1775 * @addr: Starting address to write to. 1776 * @buf: word-sized buffer to write to RAM, starting at @addr. 1777 * @length: length of @buf 1778 * 1779 * 1780 * RETURNS: 1781 * 0 if write successful. 1782 */ 1783 static int 1784 lan78xx_dataport_write(struct muge_softc *sc, uint32_t ram_select, 1785 uint32_t addr, uint32_t length, uint32_t *buf) 1786 { 1787 uint32_t dp_sel; 1788 int i, ret; 1789 1790 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1791 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1792 if (ret < 0) 1793 goto done; 1794 1795 ret = lan78xx_read_reg(sc, ETH_DP_SEL, &dp_sel); 1796 1797 dp_sel &= ~ETH_DP_SEL_RSEL_MASK_; 1798 dp_sel |= ram_select; 1799 1800 ret = lan78xx_write_reg(sc, ETH_DP_SEL, dp_sel); 1801 1802 for (i = 0; i < length; i++) { 1803 ret = lan78xx_write_reg(sc, ETH_DP_ADDR, addr + i); 1804 ret = lan78xx_write_reg(sc, ETH_DP_DATA, buf[i]); 1805 ret = lan78xx_write_reg(sc, ETH_DP_CMD, ETH_DP_CMD_WRITE_); 1806 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1807 if (ret != 0) 1808 goto done; 1809 } 1810 1811 done: 1812 return (ret); 1813 } 1814 1815 /** 1816 * muge_multicast_write 1817 * @sc: device's soft context 1818 * 1819 * Writes perfect addres filters and hash address filters to their 1820 * corresponding registers and RAMs. 1821 * 1822 */ 1823 static void 1824 muge_multicast_write(struct muge_softc *sc) 1825 { 1826 int i; 1827 lan78xx_dataport_write(sc, ETH_DP_SEL_RSEL_VLAN_DA_, 1828 ETH_DP_SEL_VHF_VLAN_LEN, ETH_DP_SEL_VHF_HASH_LEN, 1829 sc->sc_mchash_table); 1830 1831 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1832 lan78xx_write_reg(sc, PFILTER_HI(i), 0); 1833 lan78xx_write_reg(sc, PFILTER_LO(i), 1834 sc->sc_pfilter_table[i][1]); 1835 lan78xx_write_reg(sc, PFILTER_HI(i), 1836 sc->sc_pfilter_table[i][0]); 1837 } 1838 } 1839 1840 /** 1841 * muge_hash - Calculate the hash of a mac address 1842 * @addr: The mac address to calculate the hash on 1843 * 1844 * This function is used when configuring a range of multicast mac 1845 * addresses to filter on. The hash of the mac address is put in the 1846 * device's mac hash table. 1847 * 1848 * RETURNS: 1849 * Returns a value from 0-63 value which is the hash of the mac address. 1850 */ 1851 static inline uint32_t 1852 muge_hash(uint8_t addr[ETHER_ADDR_LEN]) 1853 { 1854 return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 23) & 0x1ff; 1855 } 1856 1857 static u_int 1858 muge_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) 1859 { 1860 struct muge_softc *sc = arg; 1861 uint32_t bitnum; 1862 1863 /* First fill up the perfect address table. */ 1864 if (cnt < 32 /* XXX */) 1865 muge_set_addr_filter(sc, cnt + 1, LLADDR(sdl)); 1866 else { 1867 bitnum = muge_hash(LLADDR(sdl)); 1868 sc->sc_mchash_table[bitnum / 32] |= (1 << (bitnum % 32)); 1869 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_HASH_; 1870 } 1871 1872 return (1); 1873 } 1874 1875 /** 1876 * muge_setmulti - Setup multicast 1877 * @ue: usb ethernet device context 1878 * 1879 * Tells the device to either accept frames with a multicast mac address, 1880 * a select group of m'cast mac addresses or just the devices mac address. 1881 * 1882 * LOCKING: 1883 * Should be called with the MUGE lock held. 1884 */ 1885 static void 1886 muge_setmulti(struct usb_ether *ue) 1887 { 1888 struct muge_softc *sc = uether_getsc(ue); 1889 struct ifnet *ifp = uether_getifp(ue); 1890 uint8_t i; 1891 1892 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1893 1894 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_UCAST_EN_ | ETH_RFE_CTL_MCAST_EN_ | 1895 ETH_RFE_CTL_DA_PERFECT_ | ETH_RFE_CTL_MCAST_HASH_); 1896 1897 /* Initialize hash filter table. */ 1898 for (i = 0; i < ETH_DP_SEL_VHF_HASH_LEN; i++) 1899 sc->sc_mchash_table[i] = 0; 1900 1901 /* Initialize perfect filter table. */ 1902 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1903 sc->sc_pfilter_table[i][0] = sc->sc_pfilter_table[i][1] = 0; 1904 } 1905 1906 sc->sc_rfe_ctl |= ETH_RFE_CTL_BCAST_EN_; 1907 1908 if (ifp->if_flags & IFF_PROMISC) { 1909 muge_dbg_printf(sc, "promiscuous mode enabled\n"); 1910 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1911 } else if (ifp->if_flags & IFF_ALLMULTI) { 1912 muge_dbg_printf(sc, "receive all multicast enabled\n"); 1913 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_; 1914 } else { 1915 if_foreach_llmaddr(ifp, muge_hash_maddr, sc); 1916 muge_multicast_write(sc); 1917 } 1918 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1919 } 1920 1921 /** 1922 * muge_setpromisc - Enables/disables promiscuous mode 1923 * @ue: usb ethernet device context 1924 * 1925 * LOCKING: 1926 * Should be called with the MUGE lock held. 1927 */ 1928 static void 1929 muge_setpromisc(struct usb_ether *ue) 1930 { 1931 struct muge_softc *sc = uether_getsc(ue); 1932 struct ifnet *ifp = uether_getifp(ue); 1933 1934 muge_dbg_printf(sc, "promiscuous mode %sabled\n", 1935 (ifp->if_flags & IFF_PROMISC) ? "en" : "dis"); 1936 1937 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1938 1939 if (ifp->if_flags & IFF_PROMISC) 1940 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1941 else 1942 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_MCAST_EN_); 1943 1944 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1945 } 1946 1947 /** 1948 * muge_sethwcsum - Enable or disable H/W UDP and TCP checksumming 1949 * @sc: driver soft context 1950 * 1951 * LOCKING: 1952 * Should be called with the MUGE lock held. 1953 * 1954 * RETURNS: 1955 * Returns 0 on success or a negative error code. 1956 */ 1957 static int 1958 muge_sethwcsum(struct muge_softc *sc) 1959 { 1960 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1961 int err; 1962 1963 if (!ifp) 1964 return (-EIO); 1965 1966 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1967 1968 if (ifp->if_capenable & IFCAP_RXCSUM) { 1969 sc->sc_rfe_ctl |= ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_; 1970 sc->sc_rfe_ctl |= ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_; 1971 } else { 1972 sc->sc_rfe_ctl &= 1973 ~(ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_); 1974 sc->sc_rfe_ctl &= 1975 ~(ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_); 1976 } 1977 1978 sc->sc_rfe_ctl &= ~ETH_RFE_CTL_VLAN_FILTER_; 1979 1980 err = lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1981 1982 if (err != 0) { 1983 muge_warn_printf(sc, "failed to write ETH_RFE_CTL (err=%d)\n", 1984 err); 1985 return (err); 1986 } 1987 1988 return (0); 1989 } 1990 1991 /** 1992 * muge_ifmedia_upd - Set media options 1993 * @ifp: interface pointer 1994 * 1995 * Basically boilerplate code that simply calls the mii functions to set 1996 * the media options. 1997 * 1998 * LOCKING: 1999 * The device lock must be held before this function is called. 2000 * 2001 * RETURNS: 2002 * Returns 0 on success or a negative error code. 2003 */ 2004 static int 2005 muge_ifmedia_upd(struct ifnet *ifp) 2006 { 2007 struct muge_softc *sc = ifp->if_softc; 2008 muge_dbg_printf(sc, "Calling muge_ifmedia_upd.\n"); 2009 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2010 struct mii_softc *miisc; 2011 int err; 2012 2013 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2014 2015 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 2016 PHY_RESET(miisc); 2017 err = mii_mediachg(mii); 2018 return (err); 2019 } 2020 2021 /** 2022 * muge_init - Initialises the LAN95xx chip 2023 * @ue: USB ether interface 2024 * 2025 * Called when the interface is brought up (i.e. ifconfig ue0 up), this 2026 * initialise the interface and the rx/tx pipes. 2027 * 2028 * LOCKING: 2029 * Should be called with the MUGE lock held. 2030 */ 2031 static void 2032 muge_init(struct usb_ether *ue) 2033 { 2034 struct muge_softc *sc = uether_getsc(ue); 2035 muge_dbg_printf(sc, "Calling muge_init.\n"); 2036 struct ifnet *ifp = uether_getifp(ue); 2037 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2038 2039 if (lan78xx_setmacaddress(sc, IF_LLADDR(ifp))) 2040 muge_dbg_printf(sc, "setting MAC address failed\n"); 2041 2042 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 2043 return; 2044 2045 /* Cancel pending I/O. */ 2046 muge_stop(ue); 2047 2048 /* Reset the ethernet interface. */ 2049 muge_reset(sc); 2050 2051 /* Load the multicast filter. */ 2052 muge_setmulti(ue); 2053 2054 /* TCP/UDP checksum offload engines. */ 2055 muge_sethwcsum(sc); 2056 2057 usbd_xfer_set_stall(sc->sc_xfer[MUGE_BULK_DT_WR]); 2058 2059 /* Indicate we are up and running. */ 2060 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2061 2062 /* Switch to selected media. */ 2063 muge_ifmedia_upd(ifp); 2064 muge_start(ue); 2065 } 2066 2067 /** 2068 * muge_stop - Stops communication with the LAN78xx chip 2069 * @ue: USB ether interface 2070 */ 2071 static void 2072 muge_stop(struct usb_ether *ue) 2073 { 2074 struct muge_softc *sc = uether_getsc(ue); 2075 struct ifnet *ifp = uether_getifp(ue); 2076 2077 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2078 2079 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2080 sc->sc_flags &= ~MUGE_FLAG_LINK; 2081 2082 /* 2083 * Stop all the transfers, if not already stopped. 2084 */ 2085 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_WR]); 2086 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_RD]); 2087 } 2088 2089 /** 2090 * muge_tick - Called periodically to monitor the state of the LAN95xx chip 2091 * @ue: USB ether interface 2092 * 2093 * Simply calls the mii status functions to check the state of the link. 2094 * 2095 * LOCKING: 2096 * Should be called with the MUGE lock held. 2097 */ 2098 static void 2099 muge_tick(struct usb_ether *ue) 2100 { 2101 2102 struct muge_softc *sc = uether_getsc(ue); 2103 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2104 2105 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2106 2107 mii_tick(mii); 2108 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 2109 lan78xx_miibus_statchg(ue->ue_dev); 2110 if ((sc->sc_flags & MUGE_FLAG_LINK) != 0) 2111 muge_start(ue); 2112 } 2113 } 2114 2115 /** 2116 * muge_ifmedia_sts - Report current media status 2117 * @ifp: inet interface pointer 2118 * @ifmr: interface media request 2119 * 2120 * Call the mii functions to get the media status. 2121 * 2122 * LOCKING: 2123 * Internally takes and releases the device lock. 2124 */ 2125 static void 2126 muge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2127 { 2128 struct muge_softc *sc = ifp->if_softc; 2129 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2130 2131 MUGE_LOCK(sc); 2132 mii_pollstat(mii); 2133 ifmr->ifm_active = mii->mii_media_active; 2134 ifmr->ifm_status = mii->mii_media_status; 2135 MUGE_UNLOCK(sc); 2136 } 2137 2138 /** 2139 * muge_probe - Probe the interface. 2140 * @dev: muge device handle 2141 * 2142 * Checks if the device is a match for this driver. 2143 * 2144 * RETURNS: 2145 * Returns 0 on success or an error code on failure. 2146 */ 2147 static int 2148 muge_probe(device_t dev) 2149 { 2150 struct usb_attach_arg *uaa = device_get_ivars(dev); 2151 2152 if (uaa->usb_mode != USB_MODE_HOST) 2153 return (ENXIO); 2154 if (uaa->info.bConfigIndex != MUGE_CONFIG_INDEX) 2155 return (ENXIO); 2156 if (uaa->info.bIfaceIndex != MUGE_IFACE_IDX) 2157 return (ENXIO); 2158 return (usbd_lookup_id_by_uaa(lan78xx_devs, sizeof(lan78xx_devs), uaa)); 2159 } 2160 2161 /** 2162 * muge_attach - Attach the interface. 2163 * @dev: muge device handle 2164 * 2165 * Allocate softc structures, do ifmedia setup and ethernet/BPF attach. 2166 * 2167 * RETURNS: 2168 * Returns 0 on success or a negative error code. 2169 */ 2170 static int 2171 muge_attach(device_t dev) 2172 { 2173 struct usb_attach_arg *uaa = device_get_ivars(dev); 2174 struct muge_softc *sc = device_get_softc(dev); 2175 struct usb_ether *ue = &sc->sc_ue; 2176 uint8_t iface_index; 2177 int err; 2178 2179 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 2180 2181 device_set_usb_desc(dev); 2182 2183 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 2184 2185 /* Setup the endpoints for the Microchip LAN78xx device. */ 2186 iface_index = MUGE_IFACE_IDX; 2187 err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 2188 muge_config, MUGE_N_TRANSFER, sc, &sc->sc_mtx); 2189 if (err) { 2190 device_printf(dev, "error: allocating USB transfers failed\n"); 2191 goto err; 2192 } 2193 2194 ue->ue_sc = sc; 2195 ue->ue_dev = dev; 2196 ue->ue_udev = uaa->device; 2197 ue->ue_mtx = &sc->sc_mtx; 2198 ue->ue_methods = &muge_ue_methods; 2199 2200 err = uether_ifattach(ue); 2201 if (err) { 2202 device_printf(dev, "error: could not attach interface\n"); 2203 goto err_usbd; 2204 } 2205 2206 /* Wait for lan78xx_chip_init from post-attach callback to complete. */ 2207 uether_ifattach_wait(ue); 2208 if (!(sc->sc_flags & MUGE_FLAG_INIT_DONE)) 2209 goto err_attached; 2210 2211 return (0); 2212 2213 err_attached: 2214 uether_ifdetach(ue); 2215 err_usbd: 2216 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 2217 err: 2218 mtx_destroy(&sc->sc_mtx); 2219 return (ENXIO); 2220 } 2221 2222 /** 2223 * muge_detach - Detach the interface. 2224 * @dev: muge device handle 2225 * 2226 * RETURNS: 2227 * Returns 0. 2228 */ 2229 static int 2230 muge_detach(device_t dev) 2231 { 2232 2233 struct muge_softc *sc = device_get_softc(dev); 2234 struct usb_ether *ue = &sc->sc_ue; 2235 2236 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 2237 uether_ifdetach(ue); 2238 mtx_destroy(&sc->sc_mtx); 2239 2240 return (0); 2241 } 2242 2243 static device_method_t muge_methods[] = { 2244 /* Device interface */ 2245 DEVMETHOD(device_probe, muge_probe), 2246 DEVMETHOD(device_attach, muge_attach), 2247 DEVMETHOD(device_detach, muge_detach), 2248 2249 /* Bus interface */ 2250 DEVMETHOD(bus_print_child, bus_generic_print_child), 2251 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 2252 2253 /* MII interface */ 2254 DEVMETHOD(miibus_readreg, lan78xx_miibus_readreg), 2255 DEVMETHOD(miibus_writereg, lan78xx_miibus_writereg), 2256 DEVMETHOD(miibus_statchg, lan78xx_miibus_statchg), 2257 2258 DEVMETHOD_END 2259 }; 2260 2261 static driver_t muge_driver = { 2262 .name = "muge", 2263 .methods = muge_methods, 2264 .size = sizeof(struct muge_softc), 2265 }; 2266 2267 DRIVER_MODULE(muge, uhub, muge_driver, NULL, NULL); 2268 DRIVER_MODULE(miibus, muge, miibus_driver, NULL, NULL); 2269 MODULE_DEPEND(muge, uether, 1, 1, 1); 2270 MODULE_DEPEND(muge, usb, 1, 1, 1); 2271 MODULE_DEPEND(muge, ether, 1, 1, 1); 2272 MODULE_DEPEND(muge, miibus, 1, 1, 1); 2273 MODULE_VERSION(muge, 1); 2274 USB_PNP_HOST_INFO(lan78xx_devs); 2275