1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2012 Ben Gray <bgray@freebsd.org>. 5 * Copyright (C) 2018 The FreeBSD Foundation. 6 * 7 * This software was developed by Arshan Khanifar <arshankhanifar@gmail.com> 8 * under sponsorship from the FreeBSD Foundation. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * $FreeBSD$ 32 */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 /* 38 * USB-To-Ethernet adapter driver for Microchip's LAN78XX and related families. 39 * 40 * USB 3.1 to 10/100/1000 Mbps Ethernet 41 * LAN7800 http://www.microchip.com/wwwproducts/en/LAN7800 42 * 43 * USB 2.0 to 10/100/1000 Mbps Ethernet 44 * LAN7850 http://www.microchip.com/wwwproducts/en/LAN7850 45 * 46 * USB 2 to 10/100/1000 Mbps Ethernet with built-in USB hub 47 * LAN7515 (no datasheet available, but probes and functions as LAN7800) 48 * 49 * This driver is based on the if_smsc driver, with lan78xx-specific 50 * functionality modelled on Microchip's Linux lan78xx driver. 51 * 52 * UNIMPLEMENTED FEATURES 53 * ------------------ 54 * A number of features supported by the lan78xx are not yet implemented in 55 * this driver: 56 * 57 * - TX checksum offloading: Nothing has been implemented yet. 58 * - Direct address translation filtering: Implemented but untested. 59 * - VLAN tag removal. 60 * - Support for USB interrupt endpoints. 61 * - Latency Tolerance Messaging (LTM) support. 62 * - TCP LSO support. 63 * 64 */ 65 66 #include <sys/param.h> 67 #include <sys/bus.h> 68 #include <sys/callout.h> 69 #include <sys/condvar.h> 70 #include <sys/kernel.h> 71 #include <sys/lock.h> 72 #include <sys/malloc.h> 73 #include <sys/module.h> 74 #include <sys/mutex.h> 75 #include <sys/priv.h> 76 #include <sys/queue.h> 77 #include <sys/random.h> 78 #include <sys/socket.h> 79 #include <sys/stddef.h> 80 #include <sys/stdint.h> 81 #include <sys/sx.h> 82 #include <sys/sysctl.h> 83 #include <sys/systm.h> 84 #include <sys/unistd.h> 85 86 #include <net/if.h> 87 #include <net/if_var.h> 88 #include <net/if_media.h> 89 90 #include <dev/mii/mii.h> 91 #include <dev/mii/miivar.h> 92 93 #include <netinet/in.h> 94 #include <netinet/ip.h> 95 96 #include "opt_platform.h" 97 98 #ifdef FDT 99 #include <dev/fdt/fdt_common.h> 100 #include <dev/ofw/ofw_bus.h> 101 #include <dev/ofw/ofw_bus_subr.h> 102 #include <dev/usb/usb_fdt_support.h> 103 #endif 104 105 #include <dev/usb/usb.h> 106 #include <dev/usb/usbdi.h> 107 #include <dev/usb/usbdi_util.h> 108 #include "usbdevs.h" 109 110 #define USB_DEBUG_VAR lan78xx_debug 111 #include <dev/usb/usb_debug.h> 112 #include <dev/usb/usb_process.h> 113 114 #include <dev/usb/net/usb_ethernet.h> 115 116 #include <dev/usb/net/if_mugereg.h> 117 118 #include "miibus_if.h" 119 120 #ifdef USB_DEBUG 121 static int muge_debug = 0; 122 123 SYSCTL_NODE(_hw_usb, OID_AUTO, muge, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 124 "Microchip LAN78xx USB-GigE"); 125 SYSCTL_INT(_hw_usb_muge, OID_AUTO, debug, CTLFLAG_RWTUN, &muge_debug, 0, 126 "Debug level"); 127 #endif 128 129 #define MUGE_DEFAULT_TX_CSUM_ENABLE (false) 130 #define MUGE_DEFAULT_TSO_ENABLE (false) 131 132 /* Supported Vendor and Product IDs. */ 133 static const struct usb_device_id lan78xx_devs[] = { 134 #define MUGE_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) } 135 MUGE_DEV(LAN7800_ETH, 0), 136 MUGE_DEV(LAN7801_ETH, 0), 137 MUGE_DEV(LAN7850_ETH, 0), 138 #undef MUGE_DEV 139 }; 140 141 #ifdef USB_DEBUG 142 #define muge_dbg_printf(sc, fmt, args...) \ 143 do { \ 144 if (muge_debug > 0) \ 145 device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \ 146 } while(0) 147 #else 148 #define muge_dbg_printf(sc, fmt, args...) do { } while (0) 149 #endif 150 151 #define muge_warn_printf(sc, fmt, args...) \ 152 device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args) 153 154 #define muge_err_printf(sc, fmt, args...) \ 155 device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args) 156 157 #define ETHER_IS_VALID(addr) \ 158 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 159 160 /* USB endpoints. */ 161 162 enum { 163 MUGE_BULK_DT_RD, 164 MUGE_BULK_DT_WR, 165 #if 0 /* Ignore interrupt endpoints for now as we poll on MII status. */ 166 MUGE_INTR_DT_WR, 167 MUGE_INTR_DT_RD, 168 #endif 169 MUGE_N_TRANSFER, 170 }; 171 172 struct muge_softc { 173 struct usb_ether sc_ue; 174 struct mtx sc_mtx; 175 struct usb_xfer *sc_xfer[MUGE_N_TRANSFER]; 176 int sc_phyno; 177 uint32_t sc_leds; 178 uint16_t sc_led_modes; 179 uint16_t sc_led_modes_mask; 180 181 /* Settings for the mac control (MAC_CSR) register. */ 182 uint32_t sc_rfe_ctl; 183 uint32_t sc_mdix_ctl; 184 uint16_t chipid; 185 uint16_t chiprev; 186 uint32_t sc_mchash_table[ETH_DP_SEL_VHF_HASH_LEN]; 187 uint32_t sc_pfilter_table[MUGE_NUM_PFILTER_ADDRS_][2]; 188 189 uint32_t sc_flags; 190 #define MUGE_FLAG_LINK 0x0001 191 #define MUGE_FLAG_INIT_DONE 0x0002 192 }; 193 194 #define MUGE_IFACE_IDX 0 195 196 #define MUGE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 197 #define MUGE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 198 #define MUGE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) 199 200 static device_probe_t muge_probe; 201 static device_attach_t muge_attach; 202 static device_detach_t muge_detach; 203 204 static usb_callback_t muge_bulk_read_callback; 205 static usb_callback_t muge_bulk_write_callback; 206 207 static miibus_readreg_t lan78xx_miibus_readreg; 208 static miibus_writereg_t lan78xx_miibus_writereg; 209 static miibus_statchg_t lan78xx_miibus_statchg; 210 211 static int muge_attach_post_sub(struct usb_ether *ue); 212 static uether_fn_t muge_attach_post; 213 static uether_fn_t muge_init; 214 static uether_fn_t muge_stop; 215 static uether_fn_t muge_start; 216 static uether_fn_t muge_tick; 217 static uether_fn_t muge_setmulti; 218 static uether_fn_t muge_setpromisc; 219 220 static int muge_ifmedia_upd(struct ifnet *); 221 static void muge_ifmedia_sts(struct ifnet *, struct ifmediareq *); 222 223 static int lan78xx_chip_init(struct muge_softc *sc); 224 static int muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 225 226 static const struct usb_config muge_config[MUGE_N_TRANSFER] = { 227 228 [MUGE_BULK_DT_WR] = { 229 .type = UE_BULK, 230 .endpoint = UE_ADDR_ANY, 231 .direction = UE_DIR_OUT, 232 .frames = 16, 233 .bufsize = 16 * (MCLBYTES + 16), 234 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 235 .callback = muge_bulk_write_callback, 236 .timeout = 10000, /* 10 seconds */ 237 }, 238 239 [MUGE_BULK_DT_RD] = { 240 .type = UE_BULK, 241 .endpoint = UE_ADDR_ANY, 242 .direction = UE_DIR_IN, 243 .bufsize = 20480, /* bytes */ 244 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 245 .callback = muge_bulk_read_callback, 246 .timeout = 0, /* no timeout */ 247 }, 248 /* 249 * The chip supports interrupt endpoints, however they aren't 250 * needed as we poll on the MII status. 251 */ 252 }; 253 254 static const struct usb_ether_methods muge_ue_methods = { 255 .ue_attach_post = muge_attach_post, 256 .ue_attach_post_sub = muge_attach_post_sub, 257 .ue_start = muge_start, 258 .ue_ioctl = muge_ioctl, 259 .ue_init = muge_init, 260 .ue_stop = muge_stop, 261 .ue_tick = muge_tick, 262 .ue_setmulti = muge_setmulti, 263 .ue_setpromisc = muge_setpromisc, 264 .ue_mii_upd = muge_ifmedia_upd, 265 .ue_mii_sts = muge_ifmedia_sts, 266 }; 267 268 /** 269 * lan78xx_read_reg - Read a 32-bit register on the device 270 * @sc: driver soft context 271 * @off: offset of the register 272 * @data: pointer a value that will be populated with the register value 273 * 274 * LOCKING: 275 * The device lock must be held before calling this function. 276 * 277 * RETURNS: 278 * 0 on success, a USB_ERR_?? error code on failure. 279 */ 280 static int 281 lan78xx_read_reg(struct muge_softc *sc, uint32_t off, uint32_t *data) 282 { 283 struct usb_device_request req; 284 uint32_t buf; 285 usb_error_t err; 286 287 MUGE_LOCK_ASSERT(sc, MA_OWNED); 288 289 req.bmRequestType = UT_READ_VENDOR_DEVICE; 290 req.bRequest = UVR_READ_REG; 291 USETW(req.wValue, 0); 292 USETW(req.wIndex, off); 293 USETW(req.wLength, 4); 294 295 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 296 if (err != 0) 297 muge_warn_printf(sc, "Failed to read register 0x%0x\n", off); 298 *data = le32toh(buf); 299 return (err); 300 } 301 302 /** 303 * lan78xx_write_reg - Write a 32-bit register on the device 304 * @sc: driver soft context 305 * @off: offset of the register 306 * @data: the 32-bit value to write into the register 307 * 308 * LOCKING: 309 * The device lock must be held before calling this function. 310 * 311 * RETURNS: 312 * 0 on success, a USB_ERR_?? error code on failure. 313 */ 314 static int 315 lan78xx_write_reg(struct muge_softc *sc, uint32_t off, uint32_t data) 316 { 317 struct usb_device_request req; 318 uint32_t buf; 319 usb_error_t err; 320 321 MUGE_LOCK_ASSERT(sc, MA_OWNED); 322 323 buf = htole32(data); 324 325 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 326 req.bRequest = UVR_WRITE_REG; 327 USETW(req.wValue, 0); 328 USETW(req.wIndex, off); 329 USETW(req.wLength, 4); 330 331 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 332 if (err != 0) 333 muge_warn_printf(sc, "Failed to write register 0x%0x\n", off); 334 return (err); 335 } 336 337 /** 338 * lan78xx_wait_for_bits - Poll on a register value until bits are cleared 339 * @sc: soft context 340 * @reg: offset of the register 341 * @bits: if the bits are clear the function returns 342 * 343 * LOCKING: 344 * The device lock must be held before calling this function. 345 * 346 * RETURNS: 347 * 0 on success, or a USB_ERR_?? error code on failure. 348 */ 349 static int 350 lan78xx_wait_for_bits(struct muge_softc *sc, uint32_t reg, uint32_t bits) 351 { 352 usb_ticks_t start_ticks; 353 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 354 uint32_t val; 355 int err; 356 357 MUGE_LOCK_ASSERT(sc, MA_OWNED); 358 359 start_ticks = (usb_ticks_t)ticks; 360 do { 361 if ((err = lan78xx_read_reg(sc, reg, &val)) != 0) 362 return (err); 363 if (!(val & bits)) 364 return (0); 365 uether_pause(&sc->sc_ue, hz / 100); 366 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 367 368 return (USB_ERR_TIMEOUT); 369 } 370 371 /** 372 * lan78xx_eeprom_read_raw - Read the attached EEPROM 373 * @sc: soft context 374 * @off: the eeprom address offset 375 * @buf: stores the bytes 376 * @buflen: the number of bytes to read 377 * 378 * Simply reads bytes from an attached eeprom. 379 * 380 * LOCKING: 381 * The function takes and releases the device lock if not already held. 382 * 383 * RETURNS: 384 * 0 on success, or a USB_ERR_?? error code on failure. 385 */ 386 static int 387 lan78xx_eeprom_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 388 uint16_t buflen) 389 { 390 usb_ticks_t start_ticks; 391 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 392 int err; 393 uint32_t val, saved; 394 uint16_t i; 395 bool locked; 396 397 locked = mtx_owned(&sc->sc_mtx); /* XXX */ 398 if (!locked) 399 MUGE_LOCK(sc); 400 401 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 402 /* EEDO/EECLK muxed with LED0/LED1 on LAN7800. */ 403 err = lan78xx_read_reg(sc, ETH_HW_CFG, &val); 404 saved = val; 405 406 val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_); 407 err = lan78xx_write_reg(sc, ETH_HW_CFG, val); 408 } 409 410 err = lan78xx_wait_for_bits(sc, ETH_E2P_CMD, ETH_E2P_CMD_BUSY_); 411 if (err != 0) { 412 muge_warn_printf(sc, "eeprom busy, failed to read data\n"); 413 goto done; 414 } 415 416 /* Start reading the bytes, one at a time. */ 417 for (i = 0; i < buflen; i++) { 418 val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_; 419 val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i)); 420 if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0) 421 goto done; 422 423 start_ticks = (usb_ticks_t)ticks; 424 do { 425 if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) != 426 0) 427 goto done; 428 if (!(val & ETH_E2P_CMD_BUSY_) || 429 (val & ETH_E2P_CMD_TIMEOUT_)) 430 break; 431 432 uether_pause(&sc->sc_ue, hz / 100); 433 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 434 435 if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) { 436 muge_warn_printf(sc, "eeprom command failed\n"); 437 err = USB_ERR_IOERROR; 438 break; 439 } 440 441 if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0) 442 goto done; 443 444 buf[i] = (val & 0xff); 445 } 446 447 done: 448 if (!locked) 449 MUGE_UNLOCK(sc); 450 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 451 /* Restore saved LED configuration. */ 452 lan78xx_write_reg(sc, ETH_HW_CFG, saved); 453 } 454 return (err); 455 } 456 457 static bool 458 lan78xx_eeprom_present(struct muge_softc *sc) 459 { 460 int ret; 461 uint8_t sig; 462 463 ret = lan78xx_eeprom_read_raw(sc, ETH_E2P_INDICATOR_OFFSET, &sig, 1); 464 return (ret == 0 && sig == ETH_E2P_INDICATOR); 465 } 466 467 /** 468 * lan78xx_otp_read_raw 469 * @sc: soft context 470 * @off: the otp address offset 471 * @buf: stores the bytes 472 * @buflen: the number of bytes to read 473 * 474 * Simply reads bytes from the OTP. 475 * 476 * LOCKING: 477 * The function takes and releases the device lock if not already held. 478 * 479 * RETURNS: 480 * 0 on success, or a USB_ERR_?? error code on failure. 481 * 482 */ 483 static int 484 lan78xx_otp_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 485 uint16_t buflen) 486 { 487 int err; 488 uint32_t val; 489 uint16_t i; 490 bool locked; 491 locked = mtx_owned(&sc->sc_mtx); 492 if (!locked) 493 MUGE_LOCK(sc); 494 495 err = lan78xx_read_reg(sc, OTP_PWR_DN, &val); 496 497 /* Checking if bit is set. */ 498 if (val & OTP_PWR_DN_PWRDN_N) { 499 /* Clear it, then wait for it to be cleared. */ 500 lan78xx_write_reg(sc, OTP_PWR_DN, 0); 501 err = lan78xx_wait_for_bits(sc, OTP_PWR_DN, OTP_PWR_DN_PWRDN_N); 502 if (err != 0) { 503 muge_warn_printf(sc, "OTP off? failed to read data\n"); 504 goto done; 505 } 506 } 507 /* Start reading the bytes, one at a time. */ 508 for (i = 0; i < buflen; i++) { 509 err = lan78xx_write_reg(sc, OTP_ADDR1, 510 ((off + i) >> 8) & OTP_ADDR1_15_11); 511 err = lan78xx_write_reg(sc, OTP_ADDR2, 512 ((off + i) & OTP_ADDR2_10_3)); 513 err = lan78xx_write_reg(sc, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 514 err = lan78xx_write_reg(sc, OTP_CMD_GO, OTP_CMD_GO_GO_); 515 516 err = lan78xx_wait_for_bits(sc, OTP_STATUS, OTP_STATUS_BUSY_); 517 if (err != 0) { 518 muge_warn_printf(sc, "OTP busy failed to read data\n"); 519 goto done; 520 } 521 522 if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0) 523 goto done; 524 525 buf[i] = (uint8_t)(val & 0xff); 526 } 527 528 done: 529 if (!locked) 530 MUGE_UNLOCK(sc); 531 return (err); 532 } 533 534 /** 535 * lan78xx_otp_read 536 * @sc: soft context 537 * @off: the otp address offset 538 * @buf: stores the bytes 539 * @buflen: the number of bytes to read 540 * 541 * Simply reads bytes from the otp. 542 * 543 * LOCKING: 544 * The function takes and releases device lock if it is not already held. 545 * 546 * RETURNS: 547 * 0 on success, or a USB_ERR_?? error code on failure. 548 */ 549 static int 550 lan78xx_otp_read(struct muge_softc *sc, uint16_t off, uint8_t *buf, 551 uint16_t buflen) 552 { 553 uint8_t sig; 554 int err; 555 556 err = lan78xx_otp_read_raw(sc, OTP_INDICATOR_OFFSET, &sig, 1); 557 if (err == 0) { 558 if (sig == OTP_INDICATOR_1) { 559 } else if (sig == OTP_INDICATOR_2) { 560 off += 0x100; /* XXX */ 561 } else { 562 err = -EINVAL; 563 } 564 if (!err) 565 err = lan78xx_otp_read_raw(sc, off, buf, buflen); 566 } 567 return (err); 568 } 569 570 /** 571 * lan78xx_setmacaddress - Set the mac address in the device 572 * @sc: driver soft context 573 * @addr: pointer to array contain at least 6 bytes of the mac 574 * 575 * LOCKING: 576 * Should be called with the MUGE lock held. 577 * 578 * RETURNS: 579 * Returns 0 on success or a negative error code. 580 */ 581 static int 582 lan78xx_setmacaddress(struct muge_softc *sc, const uint8_t *addr) 583 { 584 int err; 585 uint32_t val; 586 587 muge_dbg_printf(sc, 588 "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 589 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 590 591 MUGE_LOCK_ASSERT(sc, MA_OWNED); 592 593 val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; 594 if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0) 595 goto done; 596 597 val = (addr[5] << 8) | addr[4]; 598 err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val); 599 600 done: 601 return (err); 602 } 603 604 /** 605 * lan78xx_set_rx_max_frame_length 606 * @sc: driver soft context 607 * @size: pointer to array contain at least 6 bytes of the mac 608 * 609 * Sets the maximum frame length to be received. Frames bigger than 610 * this size are aborted. 611 * 612 * RETURNS: 613 * Returns 0 on success or a negative error code. 614 */ 615 static int 616 lan78xx_set_rx_max_frame_length(struct muge_softc *sc, int size) 617 { 618 int err = 0; 619 uint32_t buf; 620 bool rxenabled; 621 622 /* First we have to disable rx before changing the length. */ 623 err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 624 rxenabled = ((buf & ETH_MAC_RX_EN_) != 0); 625 626 if (rxenabled) { 627 buf &= ~ETH_MAC_RX_EN_; 628 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 629 } 630 631 /* Setting max frame length. */ 632 buf &= ~ETH_MAC_RX_MAX_FR_SIZE_MASK_; 633 buf |= (((size + 4) << ETH_MAC_RX_MAX_FR_SIZE_SHIFT_) & 634 ETH_MAC_RX_MAX_FR_SIZE_MASK_); 635 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 636 637 /* If it were enabled before, we enable it back. */ 638 639 if (rxenabled) { 640 buf |= ETH_MAC_RX_EN_; 641 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 642 } 643 644 return (0); 645 } 646 647 /** 648 * lan78xx_miibus_readreg - Read a MII/MDIO register 649 * @dev: usb ether device 650 * @phy: the number of phy reading from 651 * @reg: the register address 652 * 653 * LOCKING: 654 * Takes and releases the device mutex lock if not already held. 655 * 656 * RETURNS: 657 * Returns the 16-bits read from the MII register, if this function fails 658 * 0 is returned. 659 */ 660 static int 661 lan78xx_miibus_readreg(device_t dev, int phy, int reg) 662 { 663 struct muge_softc *sc = device_get_softc(dev); 664 uint32_t addr, val; 665 bool locked; 666 667 val = 0; 668 locked = mtx_owned(&sc->sc_mtx); 669 if (!locked) 670 MUGE_LOCK(sc); 671 672 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 673 0) { 674 muge_warn_printf(sc, "MII is busy\n"); 675 goto done; 676 } 677 678 addr = (phy << 11) | (reg << 6) | 679 ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_; 680 lan78xx_write_reg(sc, ETH_MII_ACC, addr); 681 682 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 683 0) { 684 muge_warn_printf(sc, "MII read timeout\n"); 685 goto done; 686 } 687 688 lan78xx_read_reg(sc, ETH_MII_DATA, &val); 689 val = le32toh(val); 690 691 done: 692 if (!locked) 693 MUGE_UNLOCK(sc); 694 695 return (val & 0xFFFF); 696 } 697 698 /** 699 * lan78xx_miibus_writereg - Writes a MII/MDIO register 700 * @dev: usb ether device 701 * @phy: the number of phy writing to 702 * @reg: the register address 703 * @val: the value to write 704 * 705 * Attempts to write a PHY register through the usb controller registers. 706 * 707 * LOCKING: 708 * Takes and releases the device mutex lock if not already held. 709 * 710 * RETURNS: 711 * Always returns 0 regardless of success or failure. 712 */ 713 static int 714 lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val) 715 { 716 struct muge_softc *sc = device_get_softc(dev); 717 uint32_t addr; 718 bool locked; 719 720 if (sc->sc_phyno != phy) 721 return (0); 722 723 locked = mtx_owned(&sc->sc_mtx); 724 if (!locked) 725 MUGE_LOCK(sc); 726 727 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 728 0) { 729 muge_warn_printf(sc, "MII is busy\n"); 730 goto done; 731 } 732 733 val = htole32(val); 734 lan78xx_write_reg(sc, ETH_MII_DATA, val); 735 736 addr = (phy << 11) | (reg << 6) | 737 ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_; 738 lan78xx_write_reg(sc, ETH_MII_ACC, addr); 739 740 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0) 741 muge_warn_printf(sc, "MII write timeout\n"); 742 743 done: 744 if (!locked) 745 MUGE_UNLOCK(sc); 746 return (0); 747 } 748 749 /* 750 * lan78xx_miibus_statchg - Called to detect phy status change 751 * @dev: usb ether device 752 * 753 * This function is called periodically by the system to poll for status 754 * changes of the link. 755 * 756 * LOCKING: 757 * Takes and releases the device mutex lock if not already held. 758 */ 759 static void 760 lan78xx_miibus_statchg(device_t dev) 761 { 762 struct muge_softc *sc = device_get_softc(dev); 763 struct mii_data *mii = uether_getmii(&sc->sc_ue); 764 struct ifnet *ifp; 765 int err; 766 uint32_t flow = 0; 767 uint32_t fct_flow = 0; 768 bool locked; 769 770 locked = mtx_owned(&sc->sc_mtx); 771 if (!locked) 772 MUGE_LOCK(sc); 773 774 ifp = uether_getifp(&sc->sc_ue); 775 if (mii == NULL || ifp == NULL || 776 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 777 goto done; 778 779 /* Use the MII status to determine link status */ 780 sc->sc_flags &= ~MUGE_FLAG_LINK; 781 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 782 (IFM_ACTIVE | IFM_AVALID)) { 783 muge_dbg_printf(sc, "media is active\n"); 784 switch (IFM_SUBTYPE(mii->mii_media_active)) { 785 case IFM_10_T: 786 case IFM_100_TX: 787 sc->sc_flags |= MUGE_FLAG_LINK; 788 muge_dbg_printf(sc, "10/100 ethernet\n"); 789 break; 790 case IFM_1000_T: 791 sc->sc_flags |= MUGE_FLAG_LINK; 792 muge_dbg_printf(sc, "Gigabit ethernet\n"); 793 break; 794 default: 795 break; 796 } 797 } 798 /* Lost link, do nothing. */ 799 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 800 muge_dbg_printf(sc, "link flag not set\n"); 801 goto done; 802 } 803 804 err = lan78xx_read_reg(sc, ETH_FCT_FLOW, &fct_flow); 805 if (err) { 806 muge_warn_printf(sc, 807 "failed to read initial flow control thresholds, error %d\n", 808 err); 809 goto done; 810 } 811 812 /* Enable/disable full duplex operation and TX/RX pause. */ 813 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 814 muge_dbg_printf(sc, "full duplex operation\n"); 815 816 /* Enable transmit MAC flow control function. */ 817 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0) 818 flow |= ETH_FLOW_CR_TX_FCEN_ | 0xFFFF; 819 820 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0) 821 flow |= ETH_FLOW_CR_RX_FCEN_; 822 } 823 824 /* XXX Flow control settings obtained from Microchip's driver. */ 825 switch(usbd_get_speed(sc->sc_ue.ue_udev)) { 826 case USB_SPEED_SUPER: 827 fct_flow = 0x817; 828 break; 829 case USB_SPEED_HIGH: 830 fct_flow = 0x211; 831 break; 832 default: 833 break; 834 } 835 836 err += lan78xx_write_reg(sc, ETH_FLOW, flow); 837 err += lan78xx_write_reg(sc, ETH_FCT_FLOW, fct_flow); 838 if (err) 839 muge_warn_printf(sc, "media change failed, error %d\n", err); 840 841 done: 842 if (!locked) 843 MUGE_UNLOCK(sc); 844 } 845 846 /* 847 * lan78xx_set_mdix_auto - Configure the device to enable automatic 848 * crossover and polarity detection. LAN7800 provides HP Auto-MDIX 849 * functionality for seamless crossover and polarity detection. 850 * 851 * @sc: driver soft context 852 * 853 * LOCKING: 854 * Takes and releases the device mutex lock if not already held. 855 */ 856 static void 857 lan78xx_set_mdix_auto(struct muge_softc *sc) 858 { 859 uint32_t buf, err; 860 861 err = lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 862 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_1); 863 864 buf = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 865 MUGE_EXT_MODE_CTRL); 866 buf &= ~MUGE_EXT_MODE_CTRL_MDIX_MASK_; 867 buf |= MUGE_EXT_MODE_CTRL_AUTO_MDIX_; 868 869 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 870 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 871 MUGE_EXT_MODE_CTRL, buf); 872 873 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 874 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_0); 875 876 if (err != 0) 877 muge_warn_printf(sc, "error setting PHY's MDIX status\n"); 878 879 sc->sc_mdix_ctl = buf; 880 } 881 882 /** 883 * lan78xx_phy_init - Initialises the in-built MUGE phy 884 * @sc: driver soft context 885 * 886 * Resets the PHY part of the chip and then initialises it to default 887 * values. The 'link down' and 'auto-negotiation complete' interrupts 888 * from the PHY are also enabled, however we don't monitor the interrupt 889 * endpoints for the moment. 890 * 891 * RETURNS: 892 * Returns 0 on success or EIO if failed to reset the PHY. 893 */ 894 static int 895 lan78xx_phy_init(struct muge_softc *sc) 896 { 897 muge_dbg_printf(sc, "Initializing PHY.\n"); 898 uint16_t bmcr, lmsr; 899 usb_ticks_t start_ticks; 900 uint32_t hw_reg; 901 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 902 903 MUGE_LOCK_ASSERT(sc, MA_OWNED); 904 905 /* Reset phy and wait for reset to complete. */ 906 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, 907 BMCR_RESET); 908 909 start_ticks = ticks; 910 do { 911 uether_pause(&sc->sc_ue, hz / 100); 912 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 913 MII_BMCR); 914 } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks)); 915 916 if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) { 917 muge_err_printf(sc, "PHY reset timed-out\n"); 918 return (EIO); 919 } 920 921 /* Setup phy to interrupt upon link down or autoneg completion. */ 922 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 923 MUGE_PHY_INTR_STAT); 924 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 925 MUGE_PHY_INTR_MASK, 926 (MUGE_PHY_INTR_ANEG_COMP | MUGE_PHY_INTR_LINK_CHANGE)); 927 928 /* Enable Auto-MDIX for crossover and polarity detection. */ 929 lan78xx_set_mdix_auto(sc); 930 931 /* Enable all modes. */ 932 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR, 933 ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD | 934 ANAR_CSMA | ANAR_FC | ANAR_PAUSE_ASYM); 935 936 /* Restart auto-negotation. */ 937 bmcr |= BMCR_STARTNEG; 938 bmcr |= BMCR_AUTOEN; 939 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr); 940 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 941 942 /* Configure LED Modes. */ 943 if (sc->sc_led_modes_mask != 0) { 944 lmsr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 945 MUGE_PHY_LED_MODE); 946 lmsr &= ~sc->sc_led_modes_mask; 947 lmsr |= sc->sc_led_modes; 948 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 949 MUGE_PHY_LED_MODE, lmsr); 950 } 951 952 /* Enable appropriate LEDs. */ 953 if (sc->sc_leds != 0 && 954 lan78xx_read_reg(sc, ETH_HW_CFG, &hw_reg) == 0) { 955 hw_reg &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_ | 956 ETH_HW_CFG_LED2_EN_ | ETH_HW_CFG_LED3_EN_ ); 957 hw_reg |= sc->sc_leds; 958 lan78xx_write_reg(sc, ETH_HW_CFG, hw_reg); 959 } 960 return (0); 961 } 962 963 /** 964 * lan78xx_chip_init - Initialises the chip after power on 965 * @sc: driver soft context 966 * 967 * This initialisation sequence is modelled on the procedure in the Linux 968 * driver. 969 * 970 * RETURNS: 971 * Returns 0 on success or an error code on failure. 972 */ 973 static int 974 lan78xx_chip_init(struct muge_softc *sc) 975 { 976 int err; 977 uint32_t buf; 978 uint32_t burst_cap; 979 980 MUGE_LOCK_ASSERT(sc, MA_OWNED); 981 982 /* Enter H/W config mode. */ 983 lan78xx_write_reg(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_); 984 985 if ((err = lan78xx_wait_for_bits(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_)) != 986 0) { 987 muge_warn_printf(sc, 988 "timed-out waiting for lite reset to complete\n"); 989 goto init_failed; 990 } 991 992 /* Set the mac address. */ 993 if ((err = lan78xx_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) { 994 muge_warn_printf(sc, "failed to set the MAC address\n"); 995 goto init_failed; 996 } 997 998 /* Read and display the revision register. */ 999 if ((err = lan78xx_read_reg(sc, ETH_ID_REV, &buf)) < 0) { 1000 muge_warn_printf(sc, "failed to read ETH_ID_REV (err = %d)\n", 1001 err); 1002 goto init_failed; 1003 } 1004 sc->chipid = (buf & ETH_ID_REV_CHIP_ID_MASK_) >> 16; 1005 sc->chiprev = buf & ETH_ID_REV_CHIP_REV_MASK_; 1006 switch (sc->chipid) { 1007 case ETH_ID_REV_CHIP_ID_7800_: 1008 case ETH_ID_REV_CHIP_ID_7850_: 1009 break; 1010 default: 1011 muge_warn_printf(sc, "Chip ID 0x%04x not yet supported\n", 1012 sc->chipid); 1013 goto init_failed; 1014 } 1015 device_printf(sc->sc_ue.ue_dev, "Chip ID 0x%04x rev %04x\n", sc->chipid, 1016 sc->chiprev); 1017 1018 /* Respond to BULK-IN tokens with a NAK when RX FIFO is empty. */ 1019 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) != 0) { 1020 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", err); 1021 goto init_failed; 1022 } 1023 buf |= ETH_USB_CFG_BIR_; 1024 lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1025 1026 /* 1027 * XXX LTM support will go here. 1028 */ 1029 1030 /* Configuring the burst cap. */ 1031 switch (usbd_get_speed(sc->sc_ue.ue_udev)) { 1032 case USB_SPEED_SUPER: 1033 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_SS_USB_PKT_SIZE; 1034 break; 1035 case USB_SPEED_HIGH: 1036 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_HS_USB_PKT_SIZE; 1037 break; 1038 default: 1039 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_FS_USB_PKT_SIZE; 1040 } 1041 1042 lan78xx_write_reg(sc, ETH_BURST_CAP, burst_cap); 1043 1044 /* Set the default bulk in delay (same value from Linux driver). */ 1045 lan78xx_write_reg(sc, ETH_BULK_IN_DLY, MUGE_DEFAULT_BULK_IN_DELAY); 1046 1047 /* Multiple ethernet frames per USB packets. */ 1048 err = lan78xx_read_reg(sc, ETH_HW_CFG, &buf); 1049 buf |= ETH_HW_CFG_MEF_; 1050 err = lan78xx_write_reg(sc, ETH_HW_CFG, buf); 1051 1052 /* Enable burst cap. */ 1053 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) < 0) { 1054 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", 1055 err); 1056 goto init_failed; 1057 } 1058 buf |= ETH_USB_CFG_BCE_; 1059 err = lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1060 1061 /* 1062 * Set FCL's RX and TX FIFO sizes: according to data sheet this is 1063 * already the default value. But we initialize it to the same value 1064 * anyways, as that's what the Linux driver does. 1065 * 1066 */ 1067 buf = (MUGE_MAX_RX_FIFO_SIZE - 512) / 512; 1068 err = lan78xx_write_reg(sc, ETH_FCT_RX_FIFO_END, buf); 1069 1070 buf = (MUGE_MAX_TX_FIFO_SIZE - 512) / 512; 1071 err = lan78xx_write_reg(sc, ETH_FCT_TX_FIFO_END, buf); 1072 1073 /* Enabling interrupts. (Not using them for now) */ 1074 err = lan78xx_write_reg(sc, ETH_INT_STS, ETH_INT_STS_CLEAR_ALL_); 1075 1076 /* 1077 * Initializing flow control registers to 0. These registers are 1078 * properly set is handled in link-reset function in the Linux driver. 1079 */ 1080 err = lan78xx_write_reg(sc, ETH_FLOW, 0); 1081 err = lan78xx_write_reg(sc, ETH_FCT_FLOW, 0); 1082 1083 /* 1084 * Settings for the RFE, we enable broadcast and destination address 1085 * perfect filtering. 1086 */ 1087 err = lan78xx_read_reg(sc, ETH_RFE_CTL, &buf); 1088 buf |= ETH_RFE_CTL_BCAST_EN_ | ETH_RFE_CTL_DA_PERFECT_; 1089 err = lan78xx_write_reg(sc, ETH_RFE_CTL, buf); 1090 1091 /* 1092 * At this point the Linux driver writes multicast tables, and enables 1093 * checksum engines. But in FreeBSD that gets done in muge_init, 1094 * which gets called when the interface is brought up. 1095 */ 1096 1097 /* Reset the PHY. */ 1098 lan78xx_write_reg(sc, ETH_PMT_CTL, ETH_PMT_CTL_PHY_RST_); 1099 if ((err = lan78xx_wait_for_bits(sc, ETH_PMT_CTL, 1100 ETH_PMT_CTL_PHY_RST_)) != 0) { 1101 muge_warn_printf(sc, 1102 "timed-out waiting for phy reset to complete\n"); 1103 goto init_failed; 1104 } 1105 1106 err = lan78xx_read_reg(sc, ETH_MAC_CR, &buf); 1107 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_ && 1108 !lan78xx_eeprom_present(sc)) { 1109 /* Set automatic duplex and speed on LAN7800 without EEPROM. */ 1110 buf |= ETH_MAC_CR_AUTO_DUPLEX_ | ETH_MAC_CR_AUTO_SPEED_; 1111 } 1112 err = lan78xx_write_reg(sc, ETH_MAC_CR, buf); 1113 1114 /* 1115 * Enable PHY interrupts (Not really getting used for now) 1116 * ETH_INT_EP_CTL: interrupt endpoint control register 1117 * phy events cause interrupts to be issued 1118 */ 1119 err = lan78xx_read_reg(sc, ETH_INT_EP_CTL, &buf); 1120 buf |= ETH_INT_ENP_PHY_INT; 1121 err = lan78xx_write_reg(sc, ETH_INT_EP_CTL, buf); 1122 1123 /* 1124 * Enables mac's transmitter. It will transmit frames from the buffer 1125 * onto the cable. 1126 */ 1127 err = lan78xx_read_reg(sc, ETH_MAC_TX, &buf); 1128 buf |= ETH_MAC_TX_TXEN_; 1129 err = lan78xx_write_reg(sc, ETH_MAC_TX, buf); 1130 1131 /* FIFO is capable of transmitting frames to MAC. */ 1132 err = lan78xx_read_reg(sc, ETH_FCT_TX_CTL, &buf); 1133 buf |= ETH_FCT_TX_CTL_EN_; 1134 err = lan78xx_write_reg(sc, ETH_FCT_TX_CTL, buf); 1135 1136 /* 1137 * Set max frame length. In linux this is dev->mtu (which by default 1138 * is 1500) + VLAN_ETH_HLEN = 1518. 1139 */ 1140 err = lan78xx_set_rx_max_frame_length(sc, ETHER_MAX_LEN); 1141 1142 /* Initialise the PHY. */ 1143 if ((err = lan78xx_phy_init(sc)) != 0) 1144 goto init_failed; 1145 1146 /* Enable MAC RX. */ 1147 err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 1148 buf |= ETH_MAC_RX_EN_; 1149 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 1150 1151 /* Enable FIFO controller RX. */ 1152 err = lan78xx_read_reg(sc, ETH_FCT_RX_CTL, &buf); 1153 buf |= ETH_FCT_TX_CTL_EN_; 1154 err = lan78xx_write_reg(sc, ETH_FCT_RX_CTL, buf); 1155 1156 sc->sc_flags |= MUGE_FLAG_INIT_DONE; 1157 return (0); 1158 1159 init_failed: 1160 muge_err_printf(sc, "lan78xx_chip_init failed (err=%d)\n", err); 1161 return (err); 1162 } 1163 1164 static void 1165 muge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 1166 { 1167 struct muge_softc *sc = usbd_xfer_softc(xfer); 1168 struct usb_ether *ue = &sc->sc_ue; 1169 struct ifnet *ifp = uether_getifp(ue); 1170 struct mbuf *m; 1171 struct usb_page_cache *pc; 1172 uint32_t rx_cmd_a, rx_cmd_b; 1173 uint16_t rx_cmd_c; 1174 int pktlen; 1175 int off; 1176 int actlen; 1177 1178 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 1179 muge_dbg_printf(sc, "rx : actlen %d\n", actlen); 1180 1181 switch (USB_GET_STATE(xfer)) { 1182 case USB_ST_TRANSFERRED: 1183 /* 1184 * There is always a zero length frame after bringing the 1185 * interface up. 1186 */ 1187 if (actlen < (sizeof(rx_cmd_a) + ETHER_CRC_LEN)) 1188 goto tr_setup; 1189 1190 /* 1191 * There may be multiple packets in the USB frame. Each will 1192 * have a header and each needs to have its own mbuf allocated 1193 * and populated for it. 1194 */ 1195 pc = usbd_xfer_get_frame(xfer, 0); 1196 off = 0; 1197 1198 while (off < actlen) { 1199 /* The frame header is aligned on a 4 byte boundary. */ 1200 off = ((off + 0x3) & ~0x3); 1201 1202 /* Extract RX CMD A. */ 1203 if (off + sizeof(rx_cmd_a) > actlen) 1204 goto tr_setup; 1205 usbd_copy_out(pc, off, &rx_cmd_a, sizeof(rx_cmd_a)); 1206 off += (sizeof(rx_cmd_a)); 1207 rx_cmd_a = le32toh(rx_cmd_a); 1208 1209 /* Extract RX CMD B. */ 1210 if (off + sizeof(rx_cmd_b) > actlen) 1211 goto tr_setup; 1212 usbd_copy_out(pc, off, &rx_cmd_b, sizeof(rx_cmd_b)); 1213 off += (sizeof(rx_cmd_b)); 1214 rx_cmd_b = le32toh(rx_cmd_b); 1215 1216 /* Extract RX CMD C. */ 1217 if (off + sizeof(rx_cmd_c) > actlen) 1218 goto tr_setup; 1219 usbd_copy_out(pc, off, &rx_cmd_c, sizeof(rx_cmd_c)); 1220 off += (sizeof(rx_cmd_c)); 1221 rx_cmd_c = le16toh(rx_cmd_c); 1222 1223 if (off > actlen) 1224 goto tr_setup; 1225 1226 pktlen = (rx_cmd_a & RX_CMD_A_LEN_MASK_); 1227 1228 muge_dbg_printf(sc, 1229 "rx_cmd_a 0x%08x rx_cmd_b 0x%08x rx_cmd_c 0x%04x " 1230 " pktlen %d actlen %d off %d\n", 1231 rx_cmd_a, rx_cmd_b, rx_cmd_c, pktlen, actlen, off); 1232 1233 if (rx_cmd_a & RX_CMD_A_RED_) { 1234 muge_dbg_printf(sc, 1235 "rx error (hdr 0x%08x)\n", rx_cmd_a); 1236 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1237 } else { 1238 /* Ethernet frame too big or too small? */ 1239 if ((pktlen < ETHER_HDR_LEN) || 1240 (pktlen > (actlen - off))) 1241 goto tr_setup; 1242 1243 /* Create a new mbuf to store the packet. */ 1244 m = uether_newbuf(); 1245 if (m == NULL) { 1246 muge_warn_printf(sc, 1247 "failed to create new mbuf\n"); 1248 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1249 1); 1250 goto tr_setup; 1251 } 1252 if (pktlen > m->m_len) { 1253 muge_dbg_printf(sc, 1254 "buffer too small %d vs %d bytes", 1255 pktlen, m->m_len); 1256 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1); 1257 m_freem(m); 1258 goto tr_setup; 1259 } 1260 usbd_copy_out(pc, off, mtod(m, uint8_t *), 1261 pktlen); 1262 1263 /* 1264 * Check if RX checksums are computed, and 1265 * offload them 1266 */ 1267 if ((ifp->if_capenable & IFCAP_RXCSUM) && 1268 !(rx_cmd_a & RX_CMD_A_ICSM_)) { 1269 struct ether_header *eh; 1270 eh = mtod(m, struct ether_header *); 1271 /* 1272 * Remove the extra 2 bytes of the csum 1273 * 1274 * The checksum appears to be 1275 * simplistically calculated over the 1276 * protocol headers up to the end of the 1277 * eth frame. Which means if the eth 1278 * frame is padded the csum calculation 1279 * is incorrectly performed over the 1280 * padding bytes as well. Therefore to 1281 * be safe we ignore the H/W csum on 1282 * frames less than or equal to 1283 * 64 bytes. 1284 * 1285 * Protocols checksummed: 1286 * TCP, UDP, ICMP, IGMP, IP 1287 */ 1288 if (pktlen > ETHER_MIN_LEN) { 1289 m->m_pkthdr.csum_flags |= 1290 CSUM_DATA_VALID | 1291 CSUM_PSEUDO_HDR; 1292 1293 /* 1294 * Copy the checksum from the 1295 * last 2 bytes of the transfer 1296 * and put in the csum_data 1297 * field. 1298 */ 1299 usbd_copy_out(pc, 1300 (off + pktlen), 1301 &m->m_pkthdr.csum_data, 2); 1302 1303 /* 1304 * The data is copied in network 1305 * order, but the csum algorithm 1306 * in the kernel expects it to 1307 * be in host network order. 1308 */ 1309 m->m_pkthdr.csum_data = 1310 ntohs(0xffff); 1311 1312 muge_dbg_printf(sc, 1313 "RX checksum offloaded (0x%04x)\n", 1314 m->m_pkthdr.csum_data); 1315 } 1316 } 1317 1318 /* Enqueue the mbuf on the receive queue. */ 1319 if (pktlen < (4 + ETHER_HDR_LEN)) { 1320 m_freem(m); 1321 goto tr_setup; 1322 } 1323 /* Remove 4 trailing bytes */ 1324 uether_rxmbuf(ue, m, pktlen - 4); 1325 } 1326 1327 /* 1328 * Update the offset to move to the next potential 1329 * packet. 1330 */ 1331 off += pktlen; 1332 } 1333 /* FALLTHROUGH */ 1334 case USB_ST_SETUP: 1335 tr_setup: 1336 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1337 usbd_transfer_submit(xfer); 1338 uether_rxflush(ue); 1339 return; 1340 default: 1341 if (error != USB_ERR_CANCELLED) { 1342 muge_warn_printf(sc, "bulk read error, %s\n", 1343 usbd_errstr(error)); 1344 usbd_xfer_set_stall(xfer); 1345 goto tr_setup; 1346 } 1347 return; 1348 } 1349 } 1350 1351 /** 1352 * muge_bulk_write_callback - Write callback used to send ethernet frame(s) 1353 * @xfer: the USB transfer 1354 * @error: error code if the transfers is in an errored state 1355 * 1356 * The main write function that pulls ethernet frames off the queue and 1357 * sends them out. 1358 * 1359 */ 1360 static void 1361 muge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1362 { 1363 struct muge_softc *sc = usbd_xfer_softc(xfer); 1364 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1365 struct usb_page_cache *pc; 1366 struct mbuf *m; 1367 int nframes; 1368 uint32_t frm_len = 0, tx_cmd_a = 0, tx_cmd_b = 0; 1369 1370 switch (USB_GET_STATE(xfer)) { 1371 case USB_ST_TRANSFERRED: 1372 muge_dbg_printf(sc, 1373 "USB TRANSFER status: USB_ST_TRANSFERRED\n"); 1374 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1375 /* FALLTHROUGH */ 1376 case USB_ST_SETUP: 1377 muge_dbg_printf(sc, "USB TRANSFER status: USB_ST_SETUP\n"); 1378 tr_setup: 1379 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0 || 1380 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1381 muge_dbg_printf(sc, 1382 "sc->sc_flags & MUGE_FLAG_LINK: %d\n", 1383 (sc->sc_flags & MUGE_FLAG_LINK)); 1384 muge_dbg_printf(sc, 1385 "ifp->if_drv_flags & IFF_DRV_OACTIVE: %d\n", 1386 (ifp->if_drv_flags & IFF_DRV_OACTIVE)); 1387 muge_dbg_printf(sc, 1388 "USB TRANSFER not sending: no link or controller is busy \n"); 1389 /* 1390 * Don't send anything if there is no link or 1391 * controller is busy. 1392 */ 1393 return; 1394 } 1395 for (nframes = 0; 1396 nframes < 16 && !IFQ_DRV_IS_EMPTY(&ifp->if_snd); 1397 nframes++) { 1398 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1399 if (m == NULL) 1400 break; 1401 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1402 nframes); 1403 frm_len = 0; 1404 pc = usbd_xfer_get_frame(xfer, nframes); 1405 1406 /* 1407 * Each frame is prefixed with two 32-bit values 1408 * describing the length of the packet and buffer. 1409 */ 1410 tx_cmd_a = (m->m_pkthdr.len & TX_CMD_A_LEN_MASK_) | 1411 TX_CMD_A_FCS_; 1412 tx_cmd_a = htole32(tx_cmd_a); 1413 usbd_copy_in(pc, 0, &tx_cmd_a, sizeof(tx_cmd_a)); 1414 1415 tx_cmd_b = 0; 1416 1417 /* TCP LSO Support will probably be implemented here. */ 1418 tx_cmd_b = htole32(tx_cmd_b); 1419 usbd_copy_in(pc, 4, &tx_cmd_b, sizeof(tx_cmd_b)); 1420 1421 frm_len += 8; 1422 1423 /* Next copy in the actual packet */ 1424 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len); 1425 frm_len += m->m_pkthdr.len; 1426 1427 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1428 1429 /* 1430 * If there's a BPF listener, bounce a copy of this 1431 * frame to it. 1432 */ 1433 BPF_MTAP(ifp, m); 1434 m_freem(m); 1435 1436 /* Set frame length. */ 1437 usbd_xfer_set_frame_len(xfer, nframes, frm_len); 1438 } 1439 1440 muge_dbg_printf(sc, "USB TRANSFER nframes: %d\n", nframes); 1441 if (nframes != 0) { 1442 muge_dbg_printf(sc, "USB TRANSFER submit attempt\n"); 1443 usbd_xfer_set_frames(xfer, nframes); 1444 usbd_transfer_submit(xfer); 1445 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1446 } 1447 return; 1448 1449 default: 1450 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1451 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1452 1453 if (error != USB_ERR_CANCELLED) { 1454 muge_err_printf(sc, 1455 "usb error on tx: %s\n", usbd_errstr(error)); 1456 usbd_xfer_set_stall(xfer); 1457 goto tr_setup; 1458 } 1459 return; 1460 } 1461 } 1462 1463 /** 1464 * muge_set_mac_addr - Initiailizes NIC MAC address 1465 * @ue: the USB ethernet device 1466 * 1467 * Tries to obtain MAC address from number of sources: registers, 1468 * EEPROM, DTB blob. If all sources fail - generates random MAC. 1469 */ 1470 static void 1471 muge_set_mac_addr(struct usb_ether *ue) 1472 { 1473 struct muge_softc *sc = uether_getsc(ue); 1474 uint32_t mac_h, mac_l; 1475 1476 memset(ue->ue_eaddr, 0xff, ETHER_ADDR_LEN); 1477 1478 uint32_t val; 1479 lan78xx_read_reg(sc, 0, &val); 1480 1481 /* Read current MAC address from RX_ADDRx registers. */ 1482 if ((lan78xx_read_reg(sc, ETH_RX_ADDRL, &mac_l) == 0) && 1483 (lan78xx_read_reg(sc, ETH_RX_ADDRH, &mac_h) == 0)) { 1484 ue->ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff); 1485 ue->ue_eaddr[4] = (uint8_t)((mac_h) & 0xff); 1486 ue->ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff); 1487 ue->ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff); 1488 ue->ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff); 1489 ue->ue_eaddr[0] = (uint8_t)((mac_l) & 0xff); 1490 } 1491 1492 /* 1493 * If RX_ADDRx did not provide a valid MAC address, try EEPROM. If that 1494 * doesn't work, try OTP. Whether any of these methods work or not, try 1495 * FDT data, because it is allowed to override the EEPROM/OTP values. 1496 */ 1497 if (ETHER_IS_VALID(ue->ue_eaddr)) { 1498 muge_dbg_printf(sc, "MAC assigned from registers\n"); 1499 } else if (lan78xx_eeprom_present(sc) && lan78xx_eeprom_read_raw(sc, 1500 ETH_E2P_MAC_OFFSET, ue->ue_eaddr, ETHER_ADDR_LEN) == 0 && 1501 ETHER_IS_VALID(ue->ue_eaddr)) { 1502 muge_dbg_printf(sc, "MAC assigned from EEPROM\n"); 1503 } else if (lan78xx_otp_read(sc, OTP_MAC_OFFSET, ue->ue_eaddr, 1504 ETHER_ADDR_LEN) == 0 && ETHER_IS_VALID(ue->ue_eaddr)) { 1505 muge_dbg_printf(sc, "MAC assigned from OTP\n"); 1506 } 1507 1508 #ifdef FDT 1509 /* ue->ue_eaddr modified only if config exists for this dev instance. */ 1510 usb_fdt_get_mac_addr(ue->ue_dev, ue); 1511 if (ETHER_IS_VALID(ue->ue_eaddr)) { 1512 muge_dbg_printf(sc, "MAC assigned from FDT data\n"); 1513 } 1514 #endif 1515 1516 if (!ETHER_IS_VALID(ue->ue_eaddr)) { 1517 muge_dbg_printf(sc, "MAC assigned randomly\n"); 1518 arc4rand(ue->ue_eaddr, ETHER_ADDR_LEN, 0); 1519 ue->ue_eaddr[0] &= ~0x01; /* unicast */ 1520 ue->ue_eaddr[0] |= 0x02; /* locally administered */ 1521 } 1522 } 1523 1524 /** 1525 * muge_set_leds - Initializes NIC LEDs pattern 1526 * @ue: the USB ethernet device 1527 * 1528 * Tries to store the LED modes. 1529 * Supports only DTB blob like the Linux driver does. 1530 */ 1531 static void 1532 muge_set_leds(struct usb_ether *ue) 1533 { 1534 #ifdef FDT 1535 struct muge_softc *sc = uether_getsc(ue); 1536 phandle_t node; 1537 pcell_t modes[4]; /* 4 LEDs are possible */ 1538 ssize_t proplen; 1539 uint32_t count; 1540 1541 if ((node = usb_fdt_get_node(ue->ue_dev, ue->ue_udev)) != -1 && 1542 (proplen = OF_getencprop(node, "microchip,led-modes", modes, 1543 sizeof(modes))) > 0) { 1544 count = proplen / sizeof( uint32_t ); 1545 sc->sc_leds = (count > 0) * ETH_HW_CFG_LEDO_EN_ | 1546 (count > 1) * ETH_HW_CFG_LED1_EN_ | 1547 (count > 2) * ETH_HW_CFG_LED2_EN_ | 1548 (count > 3) * ETH_HW_CFG_LED3_EN_; 1549 while (count-- > 0) { 1550 sc->sc_led_modes |= (modes[count] & 0xf) << (4 * count); 1551 sc->sc_led_modes_mask |= 0xf << (4 * count); 1552 } 1553 muge_dbg_printf(sc, "LED modes set from FDT data\n"); 1554 } 1555 #endif 1556 } 1557 1558 /** 1559 * muge_attach_post - Called after the driver attached to the USB interface 1560 * @ue: the USB ethernet device 1561 * 1562 * This is where the chip is intialised for the first time. This is 1563 * different from the muge_init() function in that that one is designed to 1564 * setup the H/W to match the UE settings and can be called after a reset. 1565 * 1566 */ 1567 static void 1568 muge_attach_post(struct usb_ether *ue) 1569 { 1570 struct muge_softc *sc = uether_getsc(ue); 1571 1572 muge_dbg_printf(sc, "Calling muge_attach_post.\n"); 1573 1574 /* Setup some of the basics */ 1575 sc->sc_phyno = 1; 1576 1577 muge_set_mac_addr(ue); 1578 muge_set_leds(ue); 1579 1580 /* Initialise the chip for the first time */ 1581 lan78xx_chip_init(sc); 1582 } 1583 1584 /** 1585 * muge_attach_post_sub - Called after attach to the USB interface 1586 * @ue: the USB ethernet device 1587 * 1588 * Most of this is boilerplate code and copied from the base USB ethernet 1589 * driver. It has been overriden so that we can indicate to the system 1590 * that the chip supports H/W checksumming. 1591 * 1592 * RETURNS: 1593 * Returns 0 on success or a negative error code. 1594 */ 1595 static int 1596 muge_attach_post_sub(struct usb_ether *ue) 1597 { 1598 struct muge_softc *sc; 1599 struct ifnet *ifp; 1600 int error; 1601 1602 sc = uether_getsc(ue); 1603 muge_dbg_printf(sc, "Calling muge_attach_post_sub.\n"); 1604 ifp = ue->ue_ifp; 1605 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1606 ifp->if_start = uether_start; 1607 ifp->if_ioctl = muge_ioctl; 1608 ifp->if_init = uether_init; 1609 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 1610 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 1611 IFQ_SET_READY(&ifp->if_snd); 1612 1613 /* 1614 * The chip supports TCP/UDP checksum offloading on TX and RX paths, 1615 * however currently only RX checksum is supported in the driver 1616 * (see top of file). 1617 */ 1618 ifp->if_capabilities |= IFCAP_VLAN_MTU; 1619 ifp->if_hwassist = 0; 1620 ifp->if_capabilities |= IFCAP_RXCSUM; 1621 1622 if (MUGE_DEFAULT_TX_CSUM_ENABLE) 1623 ifp->if_capabilities |= IFCAP_TXCSUM; 1624 1625 /* 1626 * In the Linux driver they also enable scatter/gather (NETIF_F_SG) 1627 * here, that's something related to socket buffers used in Linux. 1628 * FreeBSD doesn't have that as an interface feature. 1629 */ 1630 if (MUGE_DEFAULT_TSO_ENABLE) 1631 ifp->if_capabilities |= IFCAP_TSO4 | IFCAP_TSO6; 1632 1633 #if 0 1634 /* TX checksuming is disabled since not yet implemented. */ 1635 ifp->if_capabilities |= IFCAP_TXCSUM; 1636 ifp->if_capenable |= IFCAP_TXCSUM; 1637 ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 1638 #endif 1639 1640 ifp->if_capenable = ifp->if_capabilities; 1641 1642 mtx_lock(&Giant); 1643 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, uether_ifmedia_upd, 1644 ue->ue_methods->ue_mii_sts, BMSR_DEFCAPMASK, sc->sc_phyno, 1645 MII_OFFSET_ANY, 0); 1646 mtx_unlock(&Giant); 1647 1648 return (0); 1649 } 1650 1651 /** 1652 * muge_start - Starts communication with the LAN78xx chip 1653 * @ue: USB ether interface 1654 */ 1655 static void 1656 muge_start(struct usb_ether *ue) 1657 { 1658 struct muge_softc *sc = uether_getsc(ue); 1659 1660 /* 1661 * Start the USB transfers, if not already started. 1662 */ 1663 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_RD]); 1664 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_WR]); 1665 } 1666 1667 /** 1668 * muge_ioctl - ioctl function for the device 1669 * @ifp: interface pointer 1670 * @cmd: the ioctl command 1671 * @data: data passed in the ioctl call, typically a pointer to struct 1672 * ifreq. 1673 * 1674 * The ioctl routine is overridden to detect change requests for the H/W 1675 * checksum capabilities. 1676 * 1677 * RETURNS: 1678 * 0 on success and an error code on failure. 1679 */ 1680 static int 1681 muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1682 { 1683 struct usb_ether *ue = ifp->if_softc; 1684 struct muge_softc *sc; 1685 struct ifreq *ifr; 1686 int rc; 1687 int mask; 1688 int reinit; 1689 1690 if (cmd == SIOCSIFCAP) { 1691 sc = uether_getsc(ue); 1692 ifr = (struct ifreq *)data; 1693 1694 MUGE_LOCK(sc); 1695 1696 rc = 0; 1697 reinit = 0; 1698 1699 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1700 1701 /* Modify the RX CSUM enable bits. */ 1702 if ((mask & IFCAP_RXCSUM) != 0 && 1703 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1704 ifp->if_capenable ^= IFCAP_RXCSUM; 1705 1706 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1707 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1708 reinit = 1; 1709 } 1710 } 1711 1712 MUGE_UNLOCK(sc); 1713 if (reinit) 1714 uether_init(ue); 1715 } else { 1716 rc = uether_ioctl(ifp, cmd, data); 1717 } 1718 1719 return (rc); 1720 } 1721 1722 /** 1723 * muge_reset - Reset the SMSC chip 1724 * @sc: device soft context 1725 * 1726 * LOCKING: 1727 * Should be called with the SMSC lock held. 1728 */ 1729 static void 1730 muge_reset(struct muge_softc *sc) 1731 { 1732 struct usb_config_descriptor *cd; 1733 usb_error_t err; 1734 1735 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 1736 1737 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 1738 cd->bConfigurationValue); 1739 if (err) 1740 muge_warn_printf(sc, "reset failed (ignored)\n"); 1741 1742 /* Wait a little while for the chip to get its brains in order. */ 1743 uether_pause(&sc->sc_ue, hz / 100); 1744 1745 /* Reinitialize controller to achieve full reset. */ 1746 lan78xx_chip_init(sc); 1747 } 1748 1749 /** 1750 * muge_set_addr_filter 1751 * 1752 * @sc: device soft context 1753 * @index: index of the entry to the perfect address table 1754 * @addr: address to be written 1755 * 1756 */ 1757 static void 1758 muge_set_addr_filter(struct muge_softc *sc, int index, 1759 uint8_t addr[ETHER_ADDR_LEN]) 1760 { 1761 uint32_t tmp; 1762 1763 if ((sc) && (index > 0) && (index < MUGE_NUM_PFILTER_ADDRS_)) { 1764 tmp = addr[3]; 1765 tmp |= addr[2] | (tmp << 8); 1766 tmp |= addr[1] | (tmp << 8); 1767 tmp |= addr[0] | (tmp << 8); 1768 sc->sc_pfilter_table[index][1] = tmp; 1769 tmp = addr[5]; 1770 tmp |= addr[4] | (tmp << 8); 1771 tmp |= ETH_MAF_HI_VALID_ | ETH_MAF_HI_TYPE_DST_; 1772 sc->sc_pfilter_table[index][0] = tmp; 1773 } 1774 } 1775 1776 /** 1777 * lan78xx_dataport_write - write to the selected RAM 1778 * @sc: The device soft context. 1779 * @ram_select: Select which RAM to access. 1780 * @addr: Starting address to write to. 1781 * @buf: word-sized buffer to write to RAM, starting at @addr. 1782 * @length: length of @buf 1783 * 1784 * 1785 * RETURNS: 1786 * 0 if write successful. 1787 */ 1788 static int 1789 lan78xx_dataport_write(struct muge_softc *sc, uint32_t ram_select, 1790 uint32_t addr, uint32_t length, uint32_t *buf) 1791 { 1792 uint32_t dp_sel; 1793 int i, ret; 1794 1795 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1796 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1797 if (ret < 0) 1798 goto done; 1799 1800 ret = lan78xx_read_reg(sc, ETH_DP_SEL, &dp_sel); 1801 1802 dp_sel &= ~ETH_DP_SEL_RSEL_MASK_; 1803 dp_sel |= ram_select; 1804 1805 ret = lan78xx_write_reg(sc, ETH_DP_SEL, dp_sel); 1806 1807 for (i = 0; i < length; i++) { 1808 ret = lan78xx_write_reg(sc, ETH_DP_ADDR, addr + i); 1809 ret = lan78xx_write_reg(sc, ETH_DP_DATA, buf[i]); 1810 ret = lan78xx_write_reg(sc, ETH_DP_CMD, ETH_DP_CMD_WRITE_); 1811 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1812 if (ret != 0) 1813 goto done; 1814 } 1815 1816 done: 1817 return (ret); 1818 } 1819 1820 /** 1821 * muge_multicast_write 1822 * @sc: device's soft context 1823 * 1824 * Writes perfect addres filters and hash address filters to their 1825 * corresponding registers and RAMs. 1826 * 1827 */ 1828 static void 1829 muge_multicast_write(struct muge_softc *sc) 1830 { 1831 int i, ret; 1832 lan78xx_dataport_write(sc, ETH_DP_SEL_RSEL_VLAN_DA_, 1833 ETH_DP_SEL_VHF_VLAN_LEN, ETH_DP_SEL_VHF_HASH_LEN, 1834 sc->sc_mchash_table); 1835 1836 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1837 ret = lan78xx_write_reg(sc, PFILTER_HI(i), 0); 1838 ret = lan78xx_write_reg(sc, PFILTER_LO(i), 1839 sc->sc_pfilter_table[i][1]); 1840 ret = lan78xx_write_reg(sc, PFILTER_HI(i), 1841 sc->sc_pfilter_table[i][0]); 1842 } 1843 } 1844 1845 /** 1846 * muge_hash - Calculate the hash of a mac address 1847 * @addr: The mac address to calculate the hash on 1848 * 1849 * This function is used when configuring a range of multicast mac 1850 * addresses to filter on. The hash of the mac address is put in the 1851 * device's mac hash table. 1852 * 1853 * RETURNS: 1854 * Returns a value from 0-63 value which is the hash of the mac address. 1855 */ 1856 static inline uint32_t 1857 muge_hash(uint8_t addr[ETHER_ADDR_LEN]) 1858 { 1859 return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 23) & 0x1ff; 1860 } 1861 1862 static u_int 1863 muge_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) 1864 { 1865 struct muge_softc *sc = arg; 1866 uint32_t bitnum; 1867 1868 /* First fill up the perfect address table. */ 1869 if (cnt < 32 /* XXX */) 1870 muge_set_addr_filter(sc, cnt + 1, LLADDR(sdl)); 1871 else { 1872 bitnum = muge_hash(LLADDR(sdl)); 1873 sc->sc_mchash_table[bitnum / 32] |= (1 << (bitnum % 32)); 1874 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_HASH_; 1875 } 1876 1877 return (1); 1878 } 1879 1880 /** 1881 * muge_setmulti - Setup multicast 1882 * @ue: usb ethernet device context 1883 * 1884 * Tells the device to either accept frames with a multicast mac address, 1885 * a select group of m'cast mac addresses or just the devices mac address. 1886 * 1887 * LOCKING: 1888 * Should be called with the MUGE lock held. 1889 */ 1890 static void 1891 muge_setmulti(struct usb_ether *ue) 1892 { 1893 struct muge_softc *sc = uether_getsc(ue); 1894 struct ifnet *ifp = uether_getifp(ue); 1895 uint8_t i; 1896 1897 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1898 1899 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_UCAST_EN_ | ETH_RFE_CTL_MCAST_EN_ | 1900 ETH_RFE_CTL_DA_PERFECT_ | ETH_RFE_CTL_MCAST_HASH_); 1901 1902 /* Initialize hash filter table. */ 1903 for (i = 0; i < ETH_DP_SEL_VHF_HASH_LEN; i++) 1904 sc->sc_mchash_table[i] = 0; 1905 1906 /* Initialize perfect filter table. */ 1907 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1908 sc->sc_pfilter_table[i][0] = sc->sc_pfilter_table[i][1] = 0; 1909 } 1910 1911 sc->sc_rfe_ctl |= ETH_RFE_CTL_BCAST_EN_; 1912 1913 if (ifp->if_flags & IFF_PROMISC) { 1914 muge_dbg_printf(sc, "promiscuous mode enabled\n"); 1915 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1916 } else if (ifp->if_flags & IFF_ALLMULTI) { 1917 muge_dbg_printf(sc, "receive all multicast enabled\n"); 1918 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_; 1919 } else { 1920 if_foreach_llmaddr(ifp, muge_hash_maddr, sc); 1921 muge_multicast_write(sc); 1922 } 1923 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1924 } 1925 1926 /** 1927 * muge_setpromisc - Enables/disables promiscuous mode 1928 * @ue: usb ethernet device context 1929 * 1930 * LOCKING: 1931 * Should be called with the MUGE lock held. 1932 */ 1933 static void 1934 muge_setpromisc(struct usb_ether *ue) 1935 { 1936 struct muge_softc *sc = uether_getsc(ue); 1937 struct ifnet *ifp = uether_getifp(ue); 1938 1939 muge_dbg_printf(sc, "promiscuous mode %sabled\n", 1940 (ifp->if_flags & IFF_PROMISC) ? "en" : "dis"); 1941 1942 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1943 1944 if (ifp->if_flags & IFF_PROMISC) 1945 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1946 else 1947 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_MCAST_EN_); 1948 1949 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1950 } 1951 1952 /** 1953 * muge_sethwcsum - Enable or disable H/W UDP and TCP checksumming 1954 * @sc: driver soft context 1955 * 1956 * LOCKING: 1957 * Should be called with the MUGE lock held. 1958 * 1959 * RETURNS: 1960 * Returns 0 on success or a negative error code. 1961 */ 1962 static int 1963 muge_sethwcsum(struct muge_softc *sc) 1964 { 1965 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1966 int err; 1967 1968 if (!ifp) 1969 return (-EIO); 1970 1971 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1972 1973 if (ifp->if_capenable & IFCAP_RXCSUM) { 1974 sc->sc_rfe_ctl |= ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_; 1975 sc->sc_rfe_ctl |= ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_; 1976 } else { 1977 sc->sc_rfe_ctl &= 1978 ~(ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_); 1979 sc->sc_rfe_ctl &= 1980 ~(ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_); 1981 } 1982 1983 sc->sc_rfe_ctl &= ~ETH_RFE_CTL_VLAN_FILTER_; 1984 1985 err = lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1986 1987 if (err != 0) { 1988 muge_warn_printf(sc, "failed to write ETH_RFE_CTL (err=%d)\n", 1989 err); 1990 return (err); 1991 } 1992 1993 return (0); 1994 } 1995 1996 /** 1997 * muge_ifmedia_upd - Set media options 1998 * @ifp: interface pointer 1999 * 2000 * Basically boilerplate code that simply calls the mii functions to set 2001 * the media options. 2002 * 2003 * LOCKING: 2004 * The device lock must be held before this function is called. 2005 * 2006 * RETURNS: 2007 * Returns 0 on success or a negative error code. 2008 */ 2009 static int 2010 muge_ifmedia_upd(struct ifnet *ifp) 2011 { 2012 struct muge_softc *sc = ifp->if_softc; 2013 muge_dbg_printf(sc, "Calling muge_ifmedia_upd.\n"); 2014 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2015 struct mii_softc *miisc; 2016 int err; 2017 2018 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2019 2020 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 2021 PHY_RESET(miisc); 2022 err = mii_mediachg(mii); 2023 return (err); 2024 } 2025 2026 /** 2027 * muge_init - Initialises the LAN95xx chip 2028 * @ue: USB ether interface 2029 * 2030 * Called when the interface is brought up (i.e. ifconfig ue0 up), this 2031 * initialise the interface and the rx/tx pipes. 2032 * 2033 * LOCKING: 2034 * Should be called with the MUGE lock held. 2035 */ 2036 static void 2037 muge_init(struct usb_ether *ue) 2038 { 2039 struct muge_softc *sc = uether_getsc(ue); 2040 muge_dbg_printf(sc, "Calling muge_init.\n"); 2041 struct ifnet *ifp = uether_getifp(ue); 2042 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2043 2044 if (lan78xx_setmacaddress(sc, IF_LLADDR(ifp))) 2045 muge_dbg_printf(sc, "setting MAC address failed\n"); 2046 2047 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 2048 return; 2049 2050 /* Cancel pending I/O. */ 2051 muge_stop(ue); 2052 2053 /* Reset the ethernet interface. */ 2054 muge_reset(sc); 2055 2056 /* Load the multicast filter. */ 2057 muge_setmulti(ue); 2058 2059 /* TCP/UDP checksum offload engines. */ 2060 muge_sethwcsum(sc); 2061 2062 usbd_xfer_set_stall(sc->sc_xfer[MUGE_BULK_DT_WR]); 2063 2064 /* Indicate we are up and running. */ 2065 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2066 2067 /* Switch to selected media. */ 2068 muge_ifmedia_upd(ifp); 2069 muge_start(ue); 2070 } 2071 2072 /** 2073 * muge_stop - Stops communication with the LAN78xx chip 2074 * @ue: USB ether interface 2075 */ 2076 static void 2077 muge_stop(struct usb_ether *ue) 2078 { 2079 struct muge_softc *sc = uether_getsc(ue); 2080 struct ifnet *ifp = uether_getifp(ue); 2081 2082 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2083 2084 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2085 sc->sc_flags &= ~MUGE_FLAG_LINK; 2086 2087 /* 2088 * Stop all the transfers, if not already stopped. 2089 */ 2090 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_WR]); 2091 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_RD]); 2092 } 2093 2094 /** 2095 * muge_tick - Called periodically to monitor the state of the LAN95xx chip 2096 * @ue: USB ether interface 2097 * 2098 * Simply calls the mii status functions to check the state of the link. 2099 * 2100 * LOCKING: 2101 * Should be called with the MUGE lock held. 2102 */ 2103 static void 2104 muge_tick(struct usb_ether *ue) 2105 { 2106 2107 struct muge_softc *sc = uether_getsc(ue); 2108 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2109 2110 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2111 2112 mii_tick(mii); 2113 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 2114 lan78xx_miibus_statchg(ue->ue_dev); 2115 if ((sc->sc_flags & MUGE_FLAG_LINK) != 0) 2116 muge_start(ue); 2117 } 2118 } 2119 2120 /** 2121 * muge_ifmedia_sts - Report current media status 2122 * @ifp: inet interface pointer 2123 * @ifmr: interface media request 2124 * 2125 * Call the mii functions to get the media status. 2126 * 2127 * LOCKING: 2128 * Internally takes and releases the device lock. 2129 */ 2130 static void 2131 muge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2132 { 2133 struct muge_softc *sc = ifp->if_softc; 2134 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2135 2136 MUGE_LOCK(sc); 2137 mii_pollstat(mii); 2138 ifmr->ifm_active = mii->mii_media_active; 2139 ifmr->ifm_status = mii->mii_media_status; 2140 MUGE_UNLOCK(sc); 2141 } 2142 2143 /** 2144 * muge_probe - Probe the interface. 2145 * @dev: muge device handle 2146 * 2147 * Checks if the device is a match for this driver. 2148 * 2149 * RETURNS: 2150 * Returns 0 on success or an error code on failure. 2151 */ 2152 static int 2153 muge_probe(device_t dev) 2154 { 2155 struct usb_attach_arg *uaa = device_get_ivars(dev); 2156 2157 if (uaa->usb_mode != USB_MODE_HOST) 2158 return (ENXIO); 2159 if (uaa->info.bConfigIndex != MUGE_CONFIG_INDEX) 2160 return (ENXIO); 2161 if (uaa->info.bIfaceIndex != MUGE_IFACE_IDX) 2162 return (ENXIO); 2163 return (usbd_lookup_id_by_uaa(lan78xx_devs, sizeof(lan78xx_devs), uaa)); 2164 } 2165 2166 /** 2167 * muge_attach - Attach the interface. 2168 * @dev: muge device handle 2169 * 2170 * Allocate softc structures, do ifmedia setup and ethernet/BPF attach. 2171 * 2172 * RETURNS: 2173 * Returns 0 on success or a negative error code. 2174 */ 2175 static int 2176 muge_attach(device_t dev) 2177 { 2178 struct usb_attach_arg *uaa = device_get_ivars(dev); 2179 struct muge_softc *sc = device_get_softc(dev); 2180 struct usb_ether *ue = &sc->sc_ue; 2181 uint8_t iface_index; 2182 int err; 2183 2184 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 2185 2186 device_set_usb_desc(dev); 2187 2188 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 2189 2190 /* Setup the endpoints for the Microchip LAN78xx device. */ 2191 iface_index = MUGE_IFACE_IDX; 2192 err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 2193 muge_config, MUGE_N_TRANSFER, sc, &sc->sc_mtx); 2194 if (err) { 2195 device_printf(dev, "error: allocating USB transfers failed\n"); 2196 goto err; 2197 } 2198 2199 ue->ue_sc = sc; 2200 ue->ue_dev = dev; 2201 ue->ue_udev = uaa->device; 2202 ue->ue_mtx = &sc->sc_mtx; 2203 ue->ue_methods = &muge_ue_methods; 2204 2205 err = uether_ifattach(ue); 2206 if (err) { 2207 device_printf(dev, "error: could not attach interface\n"); 2208 goto err_usbd; 2209 } 2210 2211 /* Wait for lan78xx_chip_init from post-attach callback to complete. */ 2212 uether_ifattach_wait(ue); 2213 if (!(sc->sc_flags & MUGE_FLAG_INIT_DONE)) 2214 goto err_attached; 2215 2216 return (0); 2217 2218 err_attached: 2219 uether_ifdetach(ue); 2220 err_usbd: 2221 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 2222 err: 2223 mtx_destroy(&sc->sc_mtx); 2224 return (ENXIO); 2225 } 2226 2227 /** 2228 * muge_detach - Detach the interface. 2229 * @dev: muge device handle 2230 * 2231 * RETURNS: 2232 * Returns 0. 2233 */ 2234 static int 2235 muge_detach(device_t dev) 2236 { 2237 2238 struct muge_softc *sc = device_get_softc(dev); 2239 struct usb_ether *ue = &sc->sc_ue; 2240 2241 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 2242 uether_ifdetach(ue); 2243 mtx_destroy(&sc->sc_mtx); 2244 2245 return (0); 2246 } 2247 2248 static device_method_t muge_methods[] = { 2249 /* Device interface */ 2250 DEVMETHOD(device_probe, muge_probe), 2251 DEVMETHOD(device_attach, muge_attach), 2252 DEVMETHOD(device_detach, muge_detach), 2253 2254 /* Bus interface */ 2255 DEVMETHOD(bus_print_child, bus_generic_print_child), 2256 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 2257 2258 /* MII interface */ 2259 DEVMETHOD(miibus_readreg, lan78xx_miibus_readreg), 2260 DEVMETHOD(miibus_writereg, lan78xx_miibus_writereg), 2261 DEVMETHOD(miibus_statchg, lan78xx_miibus_statchg), 2262 2263 DEVMETHOD_END 2264 }; 2265 2266 static driver_t muge_driver = { 2267 .name = "muge", 2268 .methods = muge_methods, 2269 .size = sizeof(struct muge_softc), 2270 }; 2271 2272 static devclass_t muge_devclass; 2273 2274 DRIVER_MODULE(muge, uhub, muge_driver, muge_devclass, NULL, NULL); 2275 DRIVER_MODULE(miibus, muge, miibus_driver, miibus_devclass, NULL, NULL); 2276 MODULE_DEPEND(muge, uether, 1, 1, 1); 2277 MODULE_DEPEND(muge, usb, 1, 1, 1); 2278 MODULE_DEPEND(muge, ether, 1, 1, 1); 2279 MODULE_DEPEND(muge, miibus, 1, 1, 1); 2280 MODULE_VERSION(muge, 1); 2281 USB_PNP_HOST_INFO(lan78xx_devs); 2282