xref: /freebsd/sys/dev/usb/net/if_smsc.c (revision 81b22a98)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2012
5  *	Ben Gray <bgray@freebsd.org>.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 /*
33  * SMSC LAN9xxx devices (http://www.smsc.com/)
34  *
35  * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that
36  * support USB 2.0 and 10/100 Mbps Ethernet.
37  *
38  * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter.
39  * The driver only covers the Ethernet part, the standard USB hub driver
40  * supports the hub part.
41  *
42  * This driver is closely modelled on the Linux driver written and copyrighted
43  * by SMSC.
44  *
45  *
46  *
47  *
48  * H/W TCP & UDP Checksum Offloading
49  * ---------------------------------
50  * The chip supports both tx and rx offloading of UDP & TCP checksums, this
51  * feature can be dynamically enabled/disabled.
52  *
53  * RX checksuming is performed across bytes after the IPv4 header to the end of
54  * the Ethernet frame, this means if the frame is padded with non-zero values
55  * the H/W checksum will be incorrect, however the rx code compensates for this.
56  *
57  * TX checksuming is more complicated, the device requires a special header to
58  * be prefixed onto the start of the frame which indicates the start and end
59  * positions of the UDP or TCP frame.  This requires the driver to manually
60  * go through the packet data and decode the headers prior to sending.
61  * On Linux they generally provide cues to the location of the csum and the
62  * area to calculate it over, on FreeBSD we seem to have to do it all ourselves,
63  * hence this is not as optimal and therefore h/w tX checksum is currently not
64  * implemented.
65  *
66  */
67 #include <sys/stdint.h>
68 #include <sys/stddef.h>
69 #include <sys/param.h>
70 #include <sys/queue.h>
71 #include <sys/types.h>
72 #include <sys/systm.h>
73 #include <sys/kernel.h>
74 #include <sys/bus.h>
75 #include <sys/module.h>
76 #include <sys/lock.h>
77 #include <sys/mutex.h>
78 #include <sys/condvar.h>
79 #include <sys/socket.h>
80 #include <sys/sysctl.h>
81 #include <sys/sx.h>
82 #include <sys/unistd.h>
83 #include <sys/callout.h>
84 #include <sys/malloc.h>
85 #include <sys/priv.h>
86 #include <sys/random.h>
87 
88 #include <net/if.h>
89 #include <net/if_var.h>
90 #include <net/if_media.h>
91 
92 #include <dev/mii/mii.h>
93 #include <dev/mii/miivar.h>
94 
95 #include <netinet/in.h>
96 #include <netinet/ip.h>
97 
98 #include "opt_platform.h"
99 
100 #ifdef FDT
101 #include <dev/fdt/fdt_common.h>
102 #include <dev/ofw/ofw_bus.h>
103 #include <dev/ofw/ofw_bus_subr.h>
104 #include <dev/usb/usb_fdt_support.h>
105 #endif
106 
107 #include <dev/usb/usb.h>
108 #include <dev/usb/usbdi.h>
109 #include <dev/usb/usbdi_util.h>
110 #include "usbdevs.h"
111 
112 #define	USB_DEBUG_VAR smsc_debug
113 #include <dev/usb/usb_debug.h>
114 #include <dev/usb/usb_process.h>
115 
116 #include <dev/usb/net/usb_ethernet.h>
117 
118 #include <dev/usb/net/if_smscreg.h>
119 
120 #include "miibus_if.h"
121 
122 SYSCTL_NODE(_hw_usb, OID_AUTO, smsc, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
123     "USB smsc");
124 
125 static bool smsc_rx_packet_batching = 1;
126 
127 SYSCTL_BOOL(_hw_usb_smsc, OID_AUTO, smsc_rx_packet_batching, CTLFLAG_RDTUN,
128     &smsc_rx_packet_batching, 0,
129     "If set, allows packet batching to increase throughput and latency. "
130     "Else throughput and latency is decreased.");
131 
132 #ifdef USB_DEBUG
133 static int smsc_debug = 0;
134 
135 SYSCTL_INT(_hw_usb_smsc, OID_AUTO, debug, CTLFLAG_RWTUN, &smsc_debug, 0,
136     "Debug level");
137 #endif
138 
139 /*
140  * Various supported device vendors/products.
141  */
142 static const struct usb_device_id smsc_devs[] = {
143 #define	SMSC_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) }
144 	SMSC_DEV(LAN89530_ETH, 0),
145 	SMSC_DEV(LAN9500_ETH, 0),
146 	SMSC_DEV(LAN9500_ETH_2, 0),
147 	SMSC_DEV(LAN9500A_ETH, 0),
148 	SMSC_DEV(LAN9500A_ETH_2, 0),
149 	SMSC_DEV(LAN9505_ETH, 0),
150 	SMSC_DEV(LAN9505A_ETH, 0),
151 	SMSC_DEV(LAN9514_ETH, 0),
152 	SMSC_DEV(LAN9514_ETH_2, 0),
153 	SMSC_DEV(LAN9530_ETH, 0),
154 	SMSC_DEV(LAN9730_ETH, 0),
155 	SMSC_DEV(LAN9500_SAL10, 0),
156 	SMSC_DEV(LAN9505_SAL10, 0),
157 	SMSC_DEV(LAN9500A_SAL10, 0),
158 	SMSC_DEV(LAN9505A_SAL10, 0),
159 	SMSC_DEV(LAN9514_SAL10, 0),
160 	SMSC_DEV(LAN9500A_HAL, 0),
161 	SMSC_DEV(LAN9505A_HAL, 0),
162 #undef SMSC_DEV
163 };
164 
165 #ifdef USB_DEBUG
166 #define smsc_dbg_printf(sc, fmt, args...) \
167 	do { \
168 		if (smsc_debug > 0) \
169 			device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \
170 	} while(0)
171 #else
172 #define smsc_dbg_printf(sc, fmt, args...) do { } while (0)
173 #endif
174 
175 #define smsc_warn_printf(sc, fmt, args...) \
176 	device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args)
177 
178 #define smsc_err_printf(sc, fmt, args...) \
179 	device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args)
180 
181 #define ETHER_IS_VALID(addr) \
182 	(!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
183 
184 static device_probe_t smsc_probe;
185 static device_attach_t smsc_attach;
186 static device_detach_t smsc_detach;
187 
188 static usb_callback_t smsc_bulk_read_callback;
189 static usb_callback_t smsc_bulk_write_callback;
190 
191 static miibus_readreg_t smsc_miibus_readreg;
192 static miibus_writereg_t smsc_miibus_writereg;
193 static miibus_statchg_t smsc_miibus_statchg;
194 
195 static int smsc_attach_post_sub(struct usb_ether *ue);
196 static uether_fn_t smsc_attach_post;
197 static uether_fn_t smsc_init;
198 static uether_fn_t smsc_stop;
199 static uether_fn_t smsc_start;
200 static uether_fn_t smsc_tick;
201 static uether_fn_t smsc_setmulti;
202 static uether_fn_t smsc_setpromisc;
203 
204 static int	smsc_ifmedia_upd(struct ifnet *);
205 static void	smsc_ifmedia_sts(struct ifnet *, struct ifmediareq *);
206 
207 static int smsc_chip_init(struct smsc_softc *sc);
208 static int smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
209 
210 static const struct usb_config smsc_config[SMSC_N_TRANSFER] = {
211 	[SMSC_BULK_DT_WR] = {
212 		.type = UE_BULK,
213 		.endpoint = UE_ADDR_ANY,
214 		.direction = UE_DIR_OUT,
215 		.frames = 16,
216 		.bufsize = 16 * (MCLBYTES + 16),
217 		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
218 		.callback = smsc_bulk_write_callback,
219 		.timeout = 10000,	/* 10 seconds */
220 	},
221 
222 	[SMSC_BULK_DT_RD] = {
223 		.type = UE_BULK,
224 		.endpoint = UE_ADDR_ANY,
225 		.direction = UE_DIR_IN,
226 		.bufsize = 20480,	/* bytes */
227 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
228 		.callback = smsc_bulk_read_callback,
229 		.timeout = 0,	/* no timeout */
230 	},
231 
232 	/* The SMSC chip supports an interrupt endpoints, however they aren't
233 	 * needed as we poll on the MII status.
234 	 */
235 };
236 
237 static const struct usb_ether_methods smsc_ue_methods = {
238 	.ue_attach_post = smsc_attach_post,
239 	.ue_attach_post_sub = smsc_attach_post_sub,
240 	.ue_start = smsc_start,
241 	.ue_ioctl = smsc_ioctl,
242 	.ue_init = smsc_init,
243 	.ue_stop = smsc_stop,
244 	.ue_tick = smsc_tick,
245 	.ue_setmulti = smsc_setmulti,
246 	.ue_setpromisc = smsc_setpromisc,
247 	.ue_mii_upd = smsc_ifmedia_upd,
248 	.ue_mii_sts = smsc_ifmedia_sts,
249 };
250 
251 /**
252  *	smsc_read_reg - Reads a 32-bit register on the device
253  *	@sc: driver soft context
254  *	@off: offset of the register
255  *	@data: pointer a value that will be populated with the register value
256  *
257  *	LOCKING:
258  *	The device lock must be held before calling this function.
259  *
260  *	RETURNS:
261  *	0 on success, a USB_ERR_?? error code on failure.
262  */
263 static int
264 smsc_read_reg(struct smsc_softc *sc, uint32_t off, uint32_t *data)
265 {
266 	struct usb_device_request req;
267 	uint32_t buf;
268 	usb_error_t err;
269 
270 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
271 
272 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
273 	req.bRequest = SMSC_UR_READ_REG;
274 	USETW(req.wValue, 0);
275 	USETW(req.wIndex, off);
276 	USETW(req.wLength, 4);
277 
278 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
279 	if (err != 0)
280 		smsc_warn_printf(sc, "Failed to read register 0x%0x\n", off);
281 
282 	*data = le32toh(buf);
283 
284 	return (err);
285 }
286 
287 /**
288  *	smsc_write_reg - Writes a 32-bit register on the device
289  *	@sc: driver soft context
290  *	@off: offset of the register
291  *	@data: the 32-bit value to write into the register
292  *
293  *	LOCKING:
294  *	The device lock must be held before calling this function.
295  *
296  *	RETURNS:
297  *	0 on success, a USB_ERR_?? error code on failure.
298  */
299 static int
300 smsc_write_reg(struct smsc_softc *sc, uint32_t off, uint32_t data)
301 {
302 	struct usb_device_request req;
303 	uint32_t buf;
304 	usb_error_t err;
305 
306 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
307 
308 	buf = htole32(data);
309 
310 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
311 	req.bRequest = SMSC_UR_WRITE_REG;
312 	USETW(req.wValue, 0);
313 	USETW(req.wIndex, off);
314 	USETW(req.wLength, 4);
315 
316 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
317 	if (err != 0)
318 		smsc_warn_printf(sc, "Failed to write register 0x%0x\n", off);
319 
320 	return (err);
321 }
322 
323 /**
324  *	smsc_wait_for_bits - Polls on a register value until bits are cleared
325  *	@sc: soft context
326  *	@reg: offset of the register
327  *	@bits: if the bits are clear the function returns
328  *
329  *	LOCKING:
330  *	The device lock must be held before calling this function.
331  *
332  *	RETURNS:
333  *	0 on success, or a USB_ERR_?? error code on failure.
334  */
335 static int
336 smsc_wait_for_bits(struct smsc_softc *sc, uint32_t reg, uint32_t bits)
337 {
338 	usb_ticks_t start_ticks;
339 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
340 	uint32_t val;
341 	int err;
342 
343 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
344 
345 	start_ticks = (usb_ticks_t)ticks;
346 	do {
347 		if ((err = smsc_read_reg(sc, reg, &val)) != 0)
348 			return (err);
349 		if (!(val & bits))
350 			return (0);
351 
352 		uether_pause(&sc->sc_ue, hz / 100);
353 	} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
354 
355 	return (USB_ERR_TIMEOUT);
356 }
357 
358 /**
359  *	smsc_eeprom_read - Reads the attached EEPROM
360  *	@sc: soft context
361  *	@off: the eeprom address offset
362  *	@buf: stores the bytes
363  *	@buflen: the number of bytes to read
364  *
365  *	Simply reads bytes from an attached eeprom.
366  *
367  *	LOCKING:
368  *	The function takes and releases the device lock if it is not already held.
369  *
370  *	RETURNS:
371  *	0 on success, or a USB_ERR_?? error code on failure.
372  */
373 static int
374 smsc_eeprom_read(struct smsc_softc *sc, uint16_t off, uint8_t *buf, uint16_t buflen)
375 {
376 	usb_ticks_t start_ticks;
377 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
378 	int err;
379 	int locked;
380 	uint32_t val;
381 	uint16_t i;
382 
383 	locked = mtx_owned(&sc->sc_mtx);
384 	if (!locked)
385 		SMSC_LOCK(sc);
386 
387 	err = smsc_wait_for_bits(sc, SMSC_EEPROM_CMD, SMSC_EEPROM_CMD_BUSY);
388 	if (err != 0) {
389 		smsc_warn_printf(sc, "eeprom busy, failed to read data\n");
390 		goto done;
391 	}
392 
393 	/* start reading the bytes, one at a time */
394 	for (i = 0; i < buflen; i++) {
395 		val = SMSC_EEPROM_CMD_BUSY | (SMSC_EEPROM_CMD_ADDR_MASK & (off + i));
396 		if ((err = smsc_write_reg(sc, SMSC_EEPROM_CMD, val)) != 0)
397 			goto done;
398 
399 		start_ticks = (usb_ticks_t)ticks;
400 		do {
401 			if ((err = smsc_read_reg(sc, SMSC_EEPROM_CMD, &val)) != 0)
402 				goto done;
403 			if (!(val & SMSC_EEPROM_CMD_BUSY) || (val & SMSC_EEPROM_CMD_TIMEOUT))
404 				break;
405 
406 			uether_pause(&sc->sc_ue, hz / 100);
407 		} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
408 
409 		if (val & (SMSC_EEPROM_CMD_BUSY | SMSC_EEPROM_CMD_TIMEOUT)) {
410 			smsc_warn_printf(sc, "eeprom command failed\n");
411 			err = USB_ERR_IOERROR;
412 			break;
413 		}
414 
415 		if ((err = smsc_read_reg(sc, SMSC_EEPROM_DATA, &val)) != 0)
416 			goto done;
417 
418 		buf[i] = (val & 0xff);
419 	}
420 
421 done:
422 	if (!locked)
423 		SMSC_UNLOCK(sc);
424 
425 	return (err);
426 }
427 
428 /**
429  *	smsc_miibus_readreg - Reads a MII/MDIO register
430  *	@dev: usb ether device
431  *	@phy: the number of phy reading from
432  *	@reg: the register address
433  *
434  *	Attempts to read a phy register over the MII bus.
435  *
436  *	LOCKING:
437  *	Takes and releases the device mutex lock if not already held.
438  *
439  *	RETURNS:
440  *	Returns the 16-bits read from the MII register, if this function fails 0
441  *	is returned.
442  */
443 static int
444 smsc_miibus_readreg(device_t dev, int phy, int reg)
445 {
446 	struct smsc_softc *sc = device_get_softc(dev);
447 	int locked;
448 	uint32_t addr;
449 	uint32_t val = 0;
450 
451 	locked = mtx_owned(&sc->sc_mtx);
452 	if (!locked)
453 		SMSC_LOCK(sc);
454 
455 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
456 		smsc_warn_printf(sc, "MII is busy\n");
457 		goto done;
458 	}
459 
460 	addr = (phy << 11) | (reg << 6) | SMSC_MII_READ | SMSC_MII_BUSY;
461 	smsc_write_reg(sc, SMSC_MII_ADDR, addr);
462 
463 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
464 		smsc_warn_printf(sc, "MII read timeout\n");
465 
466 	smsc_read_reg(sc, SMSC_MII_DATA, &val);
467 	val = le32toh(val);
468 
469 done:
470 	if (!locked)
471 		SMSC_UNLOCK(sc);
472 
473 	return (val & 0xFFFF);
474 }
475 
476 /**
477  *	smsc_miibus_writereg - Writes a MII/MDIO register
478  *	@dev: usb ether device
479  *	@phy: the number of phy writing to
480  *	@reg: the register address
481  *	@val: the value to write
482  *
483  *	Attempts to write a phy register over the MII bus.
484  *
485  *	LOCKING:
486  *	Takes and releases the device mutex lock if not already held.
487  *
488  *	RETURNS:
489  *	Always returns 0 regardless of success or failure.
490  */
491 static int
492 smsc_miibus_writereg(device_t dev, int phy, int reg, int val)
493 {
494 	struct smsc_softc *sc = device_get_softc(dev);
495 	int locked;
496 	uint32_t addr;
497 
498 	if (sc->sc_phyno != phy)
499 		return (0);
500 
501 	locked = mtx_owned(&sc->sc_mtx);
502 	if (!locked)
503 		SMSC_LOCK(sc);
504 
505 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
506 		smsc_warn_printf(sc, "MII is busy\n");
507 		goto done;
508 	}
509 
510 	val = htole32(val);
511 	smsc_write_reg(sc, SMSC_MII_DATA, val);
512 
513 	addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE | SMSC_MII_BUSY;
514 	smsc_write_reg(sc, SMSC_MII_ADDR, addr);
515 
516 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
517 		smsc_warn_printf(sc, "MII write timeout\n");
518 
519 done:
520 	if (!locked)
521 		SMSC_UNLOCK(sc);
522 	return (0);
523 }
524 
525 /**
526  *	smsc_miibus_statchg - Called to detect phy status change
527  *	@dev: usb ether device
528  *
529  *	This function is called periodically by the system to poll for status
530  *	changes of the link.
531  *
532  *	LOCKING:
533  *	Takes and releases the device mutex lock if not already held.
534  */
535 static void
536 smsc_miibus_statchg(device_t dev)
537 {
538 	struct smsc_softc *sc = device_get_softc(dev);
539 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
540 	struct ifnet *ifp;
541 	int locked;
542 	int err;
543 	uint32_t flow;
544 	uint32_t afc_cfg;
545 
546 	locked = mtx_owned(&sc->sc_mtx);
547 	if (!locked)
548 		SMSC_LOCK(sc);
549 
550 	ifp = uether_getifp(&sc->sc_ue);
551 	if (mii == NULL || ifp == NULL ||
552 	    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
553 		goto done;
554 
555 	/* Use the MII status to determine link status */
556 	sc->sc_flags &= ~SMSC_FLAG_LINK;
557 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
558 	    (IFM_ACTIVE | IFM_AVALID)) {
559 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
560 			case IFM_10_T:
561 			case IFM_100_TX:
562 				sc->sc_flags |= SMSC_FLAG_LINK;
563 				break;
564 			case IFM_1000_T:
565 				/* Gigabit ethernet not supported by chipset */
566 				break;
567 			default:
568 				break;
569 		}
570 	}
571 
572 	/* Lost link, do nothing. */
573 	if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
574 		smsc_dbg_printf(sc, "link flag not set\n");
575 		goto done;
576 	}
577 
578 	err = smsc_read_reg(sc, SMSC_AFC_CFG, &afc_cfg);
579 	if (err) {
580 		smsc_warn_printf(sc, "failed to read initial AFC_CFG, error %d\n", err);
581 		goto done;
582 	}
583 
584 	/* Enable/disable full duplex operation and TX/RX pause */
585 	if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
586 		smsc_dbg_printf(sc, "full duplex operation\n");
587 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN;
588 		sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX;
589 
590 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
591 			flow = 0xffff0002;
592 		else
593 			flow = 0;
594 
595 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
596 			afc_cfg |= 0xf;
597 		else
598 			afc_cfg &= ~0xf;
599 
600 	} else {
601 		smsc_dbg_printf(sc, "half duplex operation\n");
602 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX;
603 		sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN;
604 
605 		flow = 0;
606 		afc_cfg |= 0xf;
607 	}
608 
609 	err = smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
610 	err += smsc_write_reg(sc, SMSC_FLOW, flow);
611 	err += smsc_write_reg(sc, SMSC_AFC_CFG, afc_cfg);
612 	if (err)
613 		smsc_warn_printf(sc, "media change failed, error %d\n", err);
614 
615 done:
616 	if (!locked)
617 		SMSC_UNLOCK(sc);
618 }
619 
620 /**
621  *	smsc_ifmedia_upd - Set media options
622  *	@ifp: interface pointer
623  *
624  *	Basically boilerplate code that simply calls the mii functions to set the
625  *	media options.
626  *
627  *	LOCKING:
628  *	The device lock must be held before this function is called.
629  *
630  *	RETURNS:
631  *	Returns 0 on success or a negative error code.
632  */
633 static int
634 smsc_ifmedia_upd(struct ifnet *ifp)
635 {
636 	struct smsc_softc *sc = ifp->if_softc;
637 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
638 	struct mii_softc *miisc;
639 	int err;
640 
641 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
642 
643 	LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
644 		PHY_RESET(miisc);
645 	err = mii_mediachg(mii);
646 	return (err);
647 }
648 
649 /**
650  *	smsc_ifmedia_sts - Report current media status
651  *	@ifp: inet interface pointer
652  *	@ifmr: interface media request
653  *
654  *	Basically boilerplate code that simply calls the mii functions to get the
655  *	media status.
656  *
657  *	LOCKING:
658  *	Internally takes and releases the device lock.
659  */
660 static void
661 smsc_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
662 {
663 	struct smsc_softc *sc = ifp->if_softc;
664 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
665 
666 	SMSC_LOCK(sc);
667 	mii_pollstat(mii);
668 	ifmr->ifm_active = mii->mii_media_active;
669 	ifmr->ifm_status = mii->mii_media_status;
670 	SMSC_UNLOCK(sc);
671 }
672 
673 /**
674  *	smsc_hash - Calculate the hash of a mac address
675  *	@addr: The mac address to calculate the hash on
676  *
677  *	This function is used when configuring a range of m'cast mac addresses to
678  *	filter on.  The hash of the mac address is put in the device's mac hash
679  *	table.
680  *
681  *	RETURNS:
682  *	Returns a value from 0-63 value which is the hash of the mac address.
683  */
684 static inline uint32_t
685 smsc_hash(uint8_t addr[ETHER_ADDR_LEN])
686 {
687 	return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f;
688 }
689 
690 static u_int
691 smsc_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
692 {
693 	uint32_t hash, *hashtbl = arg;
694 
695 	hash = smsc_hash(LLADDR(sdl));
696 	hashtbl[hash >> 5] |= 1 << (hash & 0x1F);
697 
698 	return (1);
699 }
700 
701 /**
702  *	smsc_setmulti - Setup multicast
703  *	@ue: usb ethernet device context
704  *
705  *	Tells the device to either accept frames with a multicast mac address, a
706  *	select group of m'cast mac addresses or just the devices mac address.
707  *
708  *	LOCKING:
709  *	Should be called with the SMSC lock held.
710  */
711 static void
712 smsc_setmulti(struct usb_ether *ue)
713 {
714 	struct smsc_softc *sc = uether_getsc(ue);
715 	struct ifnet *ifp = uether_getifp(ue);
716 	uint32_t hashtbl[2] = { 0, 0 };
717 
718 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
719 
720 	if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
721 		smsc_dbg_printf(sc, "receive all multicast enabled\n");
722 		sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS;
723 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT;
724 
725 	} else {
726 		if (if_foreach_llmaddr(ifp, smsc_hash_maddr, &hashtbl) > 0) {
727 			/* We are filtering on a set of address so calculate
728 			 * hashes of each of the address and set the
729 			 * corresponding bits in the register.
730 			 */
731 			sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT;
732 			sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS);
733 		} else {
734 			/* Only receive packets with destination set to
735 			 * our mac address
736 			 */
737 			sc->sc_mac_csr &= ~(SMSC_MAC_CSR_MCPAS | SMSC_MAC_CSR_HPFILT);
738 		}
739 
740 		/* Debug */
741 		if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT)
742 			smsc_dbg_printf(sc, "receive select group of macs\n");
743 		else
744 			smsc_dbg_printf(sc, "receive own packets only\n");
745 	}
746 
747 	/* Write the hash table and mac control registers */
748 	smsc_write_reg(sc, SMSC_HASHH, hashtbl[1]);
749 	smsc_write_reg(sc, SMSC_HASHL, hashtbl[0]);
750 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
751 }
752 
753 /**
754  *	smsc_setpromisc - Enables/disables promiscuous mode
755  *	@ue: usb ethernet device context
756  *
757  *	LOCKING:
758  *	Should be called with the SMSC lock held.
759  */
760 static void
761 smsc_setpromisc(struct usb_ether *ue)
762 {
763 	struct smsc_softc *sc = uether_getsc(ue);
764 	struct ifnet *ifp = uether_getifp(ue);
765 
766 	smsc_dbg_printf(sc, "promiscuous mode %sabled\n",
767 	                (ifp->if_flags & IFF_PROMISC) ? "en" : "dis");
768 
769 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
770 
771 	if (ifp->if_flags & IFF_PROMISC)
772 		sc->sc_mac_csr |= SMSC_MAC_CSR_PRMS;
773 	else
774 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_PRMS;
775 
776 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
777 }
778 
779 /**
780  *	smsc_sethwcsum - Enable or disable H/W UDP and TCP checksumming
781  *	@sc: driver soft context
782  *
783  *	LOCKING:
784  *	Should be called with the SMSC lock held.
785  *
786  *	RETURNS:
787  *	Returns 0 on success or a negative error code.
788  */
789 static int smsc_sethwcsum(struct smsc_softc *sc)
790 {
791 	struct ifnet *ifp = uether_getifp(&sc->sc_ue);
792 	uint32_t val;
793 	int err;
794 
795 	if (!ifp)
796 		return (-EIO);
797 
798 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
799 
800 	err = smsc_read_reg(sc, SMSC_COE_CTRL, &val);
801 	if (err != 0) {
802 		smsc_warn_printf(sc, "failed to read SMSC_COE_CTRL (err=%d)\n", err);
803 		return (err);
804 	}
805 
806 	/* Enable/disable the Rx checksum */
807 	if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_RXCSUM)
808 		val |= SMSC_COE_CTRL_RX_EN;
809 	else
810 		val &= ~SMSC_COE_CTRL_RX_EN;
811 
812 	/* Enable/disable the Tx checksum (currently not supported) */
813 	if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_TXCSUM)
814 		val |= SMSC_COE_CTRL_TX_EN;
815 	else
816 		val &= ~SMSC_COE_CTRL_TX_EN;
817 
818 	err = smsc_write_reg(sc, SMSC_COE_CTRL, val);
819 	if (err != 0) {
820 		smsc_warn_printf(sc, "failed to write SMSC_COE_CTRL (err=%d)\n", err);
821 		return (err);
822 	}
823 
824 	return (0);
825 }
826 
827 /**
828  *	smsc_setmacaddress - Sets the mac address in the device
829  *	@sc: driver soft context
830  *	@addr: pointer to array contain at least 6 bytes of the mac
831  *
832  *	Writes the MAC address into the device, usually the MAC is programmed with
833  *	values from the EEPROM.
834  *
835  *	LOCKING:
836  *	Should be called with the SMSC lock held.
837  *
838  *	RETURNS:
839  *	Returns 0 on success or a negative error code.
840  */
841 static int
842 smsc_setmacaddress(struct smsc_softc *sc, const uint8_t *addr)
843 {
844 	int err;
845 	uint32_t val;
846 
847 	smsc_dbg_printf(sc, "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n",
848 	                addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
849 
850 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
851 
852 	val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
853 	if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0)
854 		goto done;
855 
856 	val = (addr[5] << 8) | addr[4];
857 	err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val);
858 
859 done:
860 	return (err);
861 }
862 
863 /**
864  *	smsc_reset - Reset the SMSC chip
865  *	@sc: device soft context
866  *
867  *	LOCKING:
868  *	Should be called with the SMSC lock held.
869  */
870 static void
871 smsc_reset(struct smsc_softc *sc)
872 {
873 	struct usb_config_descriptor *cd;
874 	usb_error_t err;
875 
876 	cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
877 
878 	err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
879 	                          cd->bConfigurationValue);
880 	if (err)
881 		smsc_warn_printf(sc, "reset failed (ignored)\n");
882 
883 	/* Wait a little while for the chip to get its brains in order. */
884 	uether_pause(&sc->sc_ue, hz / 100);
885 
886 	/* Reinitialize controller to achieve full reset. */
887 	smsc_chip_init(sc);
888 }
889 
890 /**
891  *	smsc_init - Initialises the LAN95xx chip
892  *	@ue: USB ether interface
893  *
894  *	Called when the interface is brought up (i.e. ifconfig ue0 up), this
895  *	initialise the interface and the rx/tx pipes.
896  *
897  *	LOCKING:
898  *	Should be called with the SMSC lock held.
899  */
900 static void
901 smsc_init(struct usb_ether *ue)
902 {
903 	struct smsc_softc *sc = uether_getsc(ue);
904 	struct ifnet *ifp = uether_getifp(ue);
905 
906 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
907 
908 	if (smsc_setmacaddress(sc, IF_LLADDR(ifp)))
909 		smsc_dbg_printf(sc, "setting MAC address failed\n");
910 
911 	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
912 		return;
913 
914 	/* Cancel pending I/O */
915 	smsc_stop(ue);
916 
917 	/* Reset the ethernet interface. */
918 	smsc_reset(sc);
919 
920 	/* Load the multicast filter. */
921 	smsc_setmulti(ue);
922 
923 	/* TCP/UDP checksum offload engines. */
924 	smsc_sethwcsum(sc);
925 
926 	usbd_xfer_set_stall(sc->sc_xfer[SMSC_BULK_DT_WR]);
927 
928 	/* Indicate we are up and running. */
929 	ifp->if_drv_flags |= IFF_DRV_RUNNING;
930 
931 	/* Switch to selected media. */
932 	smsc_ifmedia_upd(ifp);
933 	smsc_start(ue);
934 }
935 
936 /**
937  *	smsc_bulk_read_callback - Read callback used to process the USB URB
938  *	@xfer: the USB transfer
939  *	@error:
940  *
941  *	Reads the URB data which can contain one or more ethernet frames, the
942  *	frames are copyed into a mbuf and given to the system.
943  *
944  *	LOCKING:
945  *	No locking required, doesn't access internal driver settings.
946  */
947 static void
948 smsc_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
949 {
950 	struct smsc_softc *sc = usbd_xfer_softc(xfer);
951 	struct usb_ether *ue = &sc->sc_ue;
952 	struct ifnet *ifp = uether_getifp(ue);
953 	struct mbuf *m;
954 	struct usb_page_cache *pc;
955 	uint32_t rxhdr;
956 	int pktlen;
957 	int off;
958 	int actlen;
959 
960 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
961 	smsc_dbg_printf(sc, "rx : actlen %d\n", actlen);
962 
963 	switch (USB_GET_STATE(xfer)) {
964 	case USB_ST_TRANSFERRED:
965 
966 		/* There is always a zero length frame after bringing the IF up */
967 		if (actlen < (sizeof(rxhdr) + ETHER_CRC_LEN))
968 			goto tr_setup;
969 
970 		/* There maybe multiple packets in the USB frame, each will have a
971 		 * header and each needs to have it's own mbuf allocated and populated
972 		 * for it.
973 		 */
974 		pc = usbd_xfer_get_frame(xfer, 0);
975 		off = 0;
976 
977 		while (off < actlen) {
978 
979 			/* The frame header is always aligned on a 4 byte boundary */
980 			off = ((off + 0x3) & ~0x3);
981 
982 			if ((off + sizeof(rxhdr)) > actlen)
983 				goto tr_setup;
984 
985 			usbd_copy_out(pc, off, &rxhdr, sizeof(rxhdr));
986 			off += (sizeof(rxhdr) + ETHER_ALIGN);
987 			rxhdr = le32toh(rxhdr);
988 
989 			pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr);
990 
991 			smsc_dbg_printf(sc, "rx : rxhdr 0x%08x : pktlen %d : actlen %d : "
992 			                "off %d\n", rxhdr, pktlen, actlen, off);
993 
994 
995 			if (rxhdr & SMSC_RX_STAT_ERROR) {
996 				smsc_dbg_printf(sc, "rx error (hdr 0x%08x)\n", rxhdr);
997 				if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
998 				if (rxhdr & SMSC_RX_STAT_COLLISION)
999 					if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1);
1000 			} else {
1001 				/* Check if the ethernet frame is too big or too small */
1002 				if ((pktlen < ETHER_HDR_LEN) || (pktlen > (actlen - off)))
1003 					goto tr_setup;
1004 
1005 				/* Create a new mbuf to store the packet in */
1006 				m = uether_newbuf();
1007 				if (m == NULL) {
1008 					smsc_warn_printf(sc, "failed to create new mbuf\n");
1009 					if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
1010 					goto tr_setup;
1011 				}
1012 				if (pktlen > m->m_len) {
1013 					smsc_dbg_printf(sc, "buffer too small %d vs %d bytes",
1014 					    pktlen, m->m_len);
1015 					if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
1016 					m_freem(m);
1017 					goto tr_setup;
1018 				}
1019 				usbd_copy_out(pc, off, mtod(m, uint8_t *), pktlen);
1020 
1021 				/* Check if RX TCP/UDP checksumming is being offloaded */
1022 				if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) {
1023 					struct ether_header *eh;
1024 
1025 					eh = mtod(m, struct ether_header *);
1026 
1027 					/* Remove the extra 2 bytes of the csum */
1028 					pktlen -= 2;
1029 
1030 					/* The checksum appears to be simplistically calculated
1031 					 * over the udp/tcp header and data up to the end of the
1032 					 * eth frame.  Which means if the eth frame is padded
1033 					 * the csum calculation is incorrectly performed over
1034 					 * the padding bytes as well. Therefore to be safe we
1035 					 * ignore the H/W csum on frames less than or equal to
1036 					 * 64 bytes.
1037 					 *
1038 					 * Ignore H/W csum for non-IPv4 packets.
1039 					 */
1040 					if ((be16toh(eh->ether_type) == ETHERTYPE_IP) &&
1041 					    (pktlen > ETHER_MIN_LEN)) {
1042 						struct ip *ip;
1043 
1044 						ip = (struct ip *)(eh + 1);
1045 						if ((ip->ip_v == IPVERSION) &&
1046 						    ((ip->ip_p == IPPROTO_TCP) ||
1047 						     (ip->ip_p == IPPROTO_UDP))) {
1048 							/* Indicate the UDP/TCP csum has been calculated */
1049 							m->m_pkthdr.csum_flags |= CSUM_DATA_VALID;
1050 
1051 							/* Copy the TCP/UDP checksum from the last 2 bytes
1052 							 * of the transfer and put in the csum_data field.
1053 							 */
1054 							usbd_copy_out(pc, (off + pktlen),
1055 							              &m->m_pkthdr.csum_data, 2);
1056 
1057 							/* The data is copied in network order, but the
1058 							 * csum algorithm in the kernel expects it to be
1059 							 * in host network order.
1060 							 */
1061 							m->m_pkthdr.csum_data = ntohs(m->m_pkthdr.csum_data);
1062 
1063 							smsc_dbg_printf(sc, "RX checksum offloaded (0x%04x)\n",
1064 							                m->m_pkthdr.csum_data);
1065 						}
1066 					}
1067 
1068 					/* Need to adjust the offset as well or we'll be off
1069 					 * by 2 because the csum is removed from the packet
1070 					 * length.
1071 					 */
1072 					off += 2;
1073 				}
1074 
1075 				/* Finally enqueue the mbuf on the receive queue */
1076 				/* Remove 4 trailing bytes */
1077 				if (pktlen < (4 + ETHER_HDR_LEN)) {
1078 					m_freem(m);
1079 					goto tr_setup;
1080 				}
1081 				uether_rxmbuf(ue, m, pktlen - 4);
1082 			}
1083 
1084 			/* Update the offset to move to the next potential packet */
1085 			off += pktlen;
1086 		}
1087 
1088 		/* FALLTHROUGH */
1089 
1090 	case USB_ST_SETUP:
1091 tr_setup:
1092 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
1093 		usbd_transfer_submit(xfer);
1094 		uether_rxflush(ue);
1095 		return;
1096 
1097 	default:
1098 		if (error != USB_ERR_CANCELLED) {
1099 			smsc_warn_printf(sc, "bulk read error, %s\n", usbd_errstr(error));
1100 			usbd_xfer_set_stall(xfer);
1101 			goto tr_setup;
1102 		}
1103 		return;
1104 	}
1105 }
1106 
1107 /**
1108  *	smsc_bulk_write_callback - Write callback used to send ethernet frame(s)
1109  *	@xfer: the USB transfer
1110  *	@error: error code if the transfers is in an errored state
1111  *
1112  *	The main write function that pulls ethernet frames off the queue and sends
1113  *	them out.
1114  *
1115  *	LOCKING:
1116  *
1117  */
1118 static void
1119 smsc_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
1120 {
1121 	struct smsc_softc *sc = usbd_xfer_softc(xfer);
1122 	struct ifnet *ifp = uether_getifp(&sc->sc_ue);
1123 	struct usb_page_cache *pc;
1124 	struct mbuf *m;
1125 	uint32_t txhdr;
1126 	uint32_t frm_len = 0;
1127 	int nframes;
1128 
1129 	switch (USB_GET_STATE(xfer)) {
1130 	case USB_ST_TRANSFERRED:
1131 		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1132 		/* FALLTHROUGH */
1133 
1134 	case USB_ST_SETUP:
1135 tr_setup:
1136 		if ((sc->sc_flags & SMSC_FLAG_LINK) == 0 ||
1137 			(ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
1138 			/* Don't send anything if there is no link or controller is busy. */
1139 			return;
1140 		}
1141 
1142 		for (nframes = 0; nframes < 16 &&
1143 		    !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) {
1144 			IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1145 			if (m == NULL)
1146 				break;
1147 			usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
1148 			    nframes);
1149 			frm_len = 0;
1150 			pc = usbd_xfer_get_frame(xfer, nframes);
1151 
1152 			/* Each frame is prefixed with two 32-bit values describing the
1153 			 * length of the packet and buffer.
1154 			 */
1155 			txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) |
1156 					SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG;
1157 			txhdr = htole32(txhdr);
1158 			usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr));
1159 
1160 			txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len);
1161 			txhdr = htole32(txhdr);
1162 			usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr));
1163 
1164 			frm_len += 8;
1165 
1166 			/* Next copy in the actual packet */
1167 			usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len);
1168 			frm_len += m->m_pkthdr.len;
1169 
1170 			if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1171 
1172 			/* If there's a BPF listener, bounce a copy of this frame to him */
1173 			BPF_MTAP(ifp, m);
1174 
1175 			m_freem(m);
1176 
1177 			/* Set frame length. */
1178 			usbd_xfer_set_frame_len(xfer, nframes, frm_len);
1179 		}
1180 		if (nframes != 0) {
1181 			usbd_xfer_set_frames(xfer, nframes);
1182 			usbd_transfer_submit(xfer);
1183 			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1184 		}
1185 		return;
1186 
1187 	default:
1188 		if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1189 		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1190 
1191 		if (error != USB_ERR_CANCELLED) {
1192 			smsc_err_printf(sc, "usb error on tx: %s\n", usbd_errstr(error));
1193 			usbd_xfer_set_stall(xfer);
1194 			goto tr_setup;
1195 		}
1196 		return;
1197 	}
1198 }
1199 
1200 /**
1201  *	smsc_tick - Called periodically to monitor the state of the LAN95xx chip
1202  *	@ue: USB ether interface
1203  *
1204  *	Simply calls the mii status functions to check the state of the link.
1205  *
1206  *	LOCKING:
1207  *	Should be called with the SMSC lock held.
1208  */
1209 static void
1210 smsc_tick(struct usb_ether *ue)
1211 {
1212 	struct smsc_softc *sc = uether_getsc(ue);
1213 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
1214 
1215 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
1216 
1217 	mii_tick(mii);
1218 	if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
1219 		smsc_miibus_statchg(ue->ue_dev);
1220 		if ((sc->sc_flags & SMSC_FLAG_LINK) != 0)
1221 			smsc_start(ue);
1222 	}
1223 }
1224 
1225 /**
1226  *	smsc_start - Starts communication with the LAN95xx chip
1227  *	@ue: USB ether interface
1228  *
1229  *
1230  *
1231  */
1232 static void
1233 smsc_start(struct usb_ether *ue)
1234 {
1235 	struct smsc_softc *sc = uether_getsc(ue);
1236 
1237 	/*
1238 	 * start the USB transfers, if not already started:
1239 	 */
1240 	usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_RD]);
1241 	usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_WR]);
1242 }
1243 
1244 /**
1245  *	smsc_stop - Stops communication with the LAN95xx chip
1246  *	@ue: USB ether interface
1247  *
1248  *
1249  *
1250  */
1251 static void
1252 smsc_stop(struct usb_ether *ue)
1253 {
1254 	struct smsc_softc *sc = uether_getsc(ue);
1255 	struct ifnet *ifp = uether_getifp(ue);
1256 
1257 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
1258 
1259 	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1260 	sc->sc_flags &= ~SMSC_FLAG_LINK;
1261 
1262 	/*
1263 	 * stop all the transfers, if not already stopped:
1264 	 */
1265 	usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_WR]);
1266 	usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_RD]);
1267 }
1268 
1269 /**
1270  *	smsc_phy_init - Initialises the in-built SMSC phy
1271  *	@sc: driver soft context
1272  *
1273  *	Resets the PHY part of the chip and then initialises it to default
1274  *	values.  The 'link down' and 'auto-negotiation complete' interrupts
1275  *	from the PHY are also enabled, however we don't monitor the interrupt
1276  *	endpoints for the moment.
1277  *
1278  *	RETURNS:
1279  *	Returns 0 on success or EIO if failed to reset the PHY.
1280  */
1281 static int
1282 smsc_phy_init(struct smsc_softc *sc)
1283 {
1284 	int bmcr;
1285 	usb_ticks_t start_ticks;
1286 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
1287 
1288 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
1289 
1290 	/* Reset phy and wait for reset to complete */
1291 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, BMCR_RESET);
1292 
1293 	start_ticks = ticks;
1294 	do {
1295 		uether_pause(&sc->sc_ue, hz / 100);
1296 		bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
1297 	} while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks));
1298 
1299 	if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) {
1300 		smsc_err_printf(sc, "PHY reset timed-out");
1301 		return (EIO);
1302 	}
1303 
1304 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR,
1305 	                     ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD |  /* all modes */
1306 	                     ANAR_CSMA |
1307 	                     ANAR_FC |
1308 	                     ANAR_PAUSE_ASYM);
1309 
1310 	/* Setup the phy to interrupt when the link goes down or autoneg completes */
1311 	smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_STAT);
1312 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_MASK,
1313 	                     (SMSC_PHY_INTR_ANEG_COMP | SMSC_PHY_INTR_LINK_DOWN));
1314 
1315 	/* Restart auto-negotation */
1316 	bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
1317 	bmcr |= BMCR_STARTNEG;
1318 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr);
1319 
1320 	return (0);
1321 }
1322 
1323 /**
1324  *	smsc_chip_init - Initialises the chip after power on
1325  *	@sc: driver soft context
1326  *
1327  *	This initialisation sequence is modelled on the procedure in the Linux
1328  *	driver.
1329  *
1330  *	RETURNS:
1331  *	Returns 0 on success or an error code on failure.
1332  */
1333 static int
1334 smsc_chip_init(struct smsc_softc *sc)
1335 {
1336 	int err;
1337 	int locked;
1338 	uint32_t reg_val;
1339 	int burst_cap;
1340 
1341 	locked = mtx_owned(&sc->sc_mtx);
1342 	if (!locked)
1343 		SMSC_LOCK(sc);
1344 
1345 	/* Enter H/W config mode */
1346 	smsc_write_reg(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST);
1347 
1348 	if ((err = smsc_wait_for_bits(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST)) != 0) {
1349 		smsc_warn_printf(sc, "timed-out waiting for reset to complete\n");
1350 		goto init_failed;
1351 	}
1352 
1353 	/* Reset the PHY */
1354 	smsc_write_reg(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST);
1355 
1356 	if ((err = smsc_wait_for_bits(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST)) != 0) {
1357 		smsc_warn_printf(sc, "timed-out waiting for phy reset to complete\n");
1358 		goto init_failed;
1359 	}
1360 
1361 	/* Set the mac address */
1362 	if ((err = smsc_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) {
1363 		smsc_warn_printf(sc, "failed to set the MAC address\n");
1364 		goto init_failed;
1365 	}
1366 
1367 	/* Don't know what the HW_CFG_BIR bit is, but following the reset sequence
1368 	 * as used in the Linux driver.
1369 	 */
1370 	if ((err = smsc_read_reg(sc, SMSC_HW_CFG, &reg_val)) != 0) {
1371 		smsc_warn_printf(sc, "failed to read HW_CFG: %d\n", err);
1372 		goto init_failed;
1373 	}
1374 	reg_val |= SMSC_HW_CFG_BIR;
1375 	smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
1376 
1377 	/* There is a so called 'turbo mode' that the linux driver supports, it
1378 	 * seems to allow you to jam multiple frames per Rx transaction.  By default
1379 	 * this driver supports that and therefore allows multiple frames per URB.
1380 	 *
1381 	 * The xfer buffer size needs to reflect this as well, therefore based on
1382 	 * the calculations in the Linux driver the RX bufsize is set to 18944,
1383 	 *     bufsz = (16 * 1024 + 5 * 512)
1384 	 *
1385 	 * Burst capability is the number of URBs that can be in a burst of data/
1386 	 * ethernet frames.
1387 	 */
1388 	if (!smsc_rx_packet_batching)
1389 		burst_cap = 0;
1390 	else if (usbd_get_speed(sc->sc_ue.ue_udev) == USB_SPEED_HIGH)
1391 		burst_cap = 37;
1392 	else
1393 		burst_cap = 128;
1394 
1395 	smsc_write_reg(sc, SMSC_BURST_CAP, burst_cap);
1396 
1397 	/* Set the default bulk in delay (magic value from Linux driver) */
1398 	smsc_write_reg(sc, SMSC_BULK_IN_DLY, 0x00002000);
1399 
1400 	/*
1401 	 * Initialise the RX interface
1402 	 */
1403 	if ((err = smsc_read_reg(sc, SMSC_HW_CFG, &reg_val)) < 0) {
1404 		smsc_warn_printf(sc, "failed to read HW_CFG: (err = %d)\n", err);
1405 		goto init_failed;
1406 	}
1407 
1408 	/* Adjust the packet offset in the buffer (designed to try and align IP
1409 	 * header on 4 byte boundary)
1410 	 */
1411 	reg_val &= ~SMSC_HW_CFG_RXDOFF;
1412 	reg_val |= (ETHER_ALIGN << 9) & SMSC_HW_CFG_RXDOFF;
1413 
1414 	/* The following settings are used for 'turbo mode', a.k.a multiple frames
1415 	 * per Rx transaction (again info taken form Linux driver).
1416 	 */
1417 	if (smsc_rx_packet_batching)
1418 		reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE);
1419 
1420 	smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
1421 
1422 	/* Clear the status register ? */
1423 	smsc_write_reg(sc, SMSC_INTR_STATUS, 0xffffffff);
1424 
1425 	/* Read and display the revision register */
1426 	if ((err = smsc_read_reg(sc, SMSC_ID_REV, &sc->sc_rev_id)) < 0) {
1427 		smsc_warn_printf(sc, "failed to read ID_REV (err = %d)\n", err);
1428 		goto init_failed;
1429 	}
1430 
1431 	device_printf(sc->sc_ue.ue_dev, "chip 0x%04lx, rev. %04lx\n",
1432 	    (sc->sc_rev_id & SMSC_ID_REV_CHIP_ID_MASK) >> 16,
1433 	    (sc->sc_rev_id & SMSC_ID_REV_CHIP_REV_MASK));
1434 
1435 	/* GPIO/LED setup */
1436 	reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED |
1437 	          SMSC_LED_GPIO_CFG_FDX_LED;
1438 	smsc_write_reg(sc, SMSC_LED_GPIO_CFG, reg_val);
1439 
1440 	/*
1441 	 * Initialise the TX interface
1442 	 */
1443 	smsc_write_reg(sc, SMSC_FLOW, 0);
1444 
1445 	smsc_write_reg(sc, SMSC_AFC_CFG, AFC_CFG_DEFAULT);
1446 
1447 	/* Read the current MAC configuration */
1448 	if ((err = smsc_read_reg(sc, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) {
1449 		smsc_warn_printf(sc, "failed to read MAC_CSR (err=%d)\n", err);
1450 		goto init_failed;
1451 	}
1452 
1453 	/* Vlan */
1454 	smsc_write_reg(sc, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN);
1455 
1456 	/*
1457 	 * Initialise the PHY
1458 	 */
1459 	if ((err = smsc_phy_init(sc)) != 0)
1460 		goto init_failed;
1461 
1462 	/*
1463 	 * Start TX
1464 	 */
1465 	sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN;
1466 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
1467 	smsc_write_reg(sc, SMSC_TX_CFG, SMSC_TX_CFG_ON);
1468 
1469 	/*
1470 	 * Start RX
1471 	 */
1472 	sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN;
1473 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
1474 
1475 	if (!locked)
1476 		SMSC_UNLOCK(sc);
1477 
1478 	return (0);
1479 
1480 init_failed:
1481 	if (!locked)
1482 		SMSC_UNLOCK(sc);
1483 
1484 	smsc_err_printf(sc, "smsc_chip_init failed (err=%d)\n", err);
1485 	return (err);
1486 }
1487 
1488 /**
1489  *	smsc_ioctl - ioctl function for the device
1490  *	@ifp: interface pointer
1491  *	@cmd: the ioctl command
1492  *	@data: data passed in the ioctl call, typically a pointer to struct ifreq.
1493  *
1494  *	The ioctl routine is overridden to detect change requests for the H/W
1495  *	checksum capabilities.
1496  *
1497  *	RETURNS:
1498  *	0 on success and an error code on failure.
1499  */
1500 static int
1501 smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1502 {
1503 	struct usb_ether *ue = ifp->if_softc;
1504 	struct smsc_softc *sc;
1505 	struct ifreq *ifr;
1506 	int rc;
1507 	int mask;
1508 	int reinit;
1509 
1510 	if (cmd == SIOCSIFCAP) {
1511 		sc = uether_getsc(ue);
1512 		ifr = (struct ifreq *)data;
1513 
1514 		SMSC_LOCK(sc);
1515 
1516 		rc = 0;
1517 		reinit = 0;
1518 
1519 		mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1520 
1521 		/* Modify the RX CSUM enable bits */
1522 		if ((mask & IFCAP_RXCSUM) != 0 &&
1523 		    (ifp->if_capabilities & IFCAP_RXCSUM) != 0) {
1524 			ifp->if_capenable ^= IFCAP_RXCSUM;
1525 
1526 			if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1527 				ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1528 				reinit = 1;
1529 			}
1530 		}
1531 
1532 		SMSC_UNLOCK(sc);
1533 		if (reinit)
1534 			uether_init(ue);
1535 
1536 	} else {
1537 		rc = uether_ioctl(ifp, cmd, data);
1538 	}
1539 
1540 	return (rc);
1541 }
1542 
1543 /**
1544  *	smsc_attach_post - Called after the driver attached to the USB interface
1545  *	@ue: the USB ethernet device
1546  *
1547  *	This is where the chip is intialised for the first time.  This is different
1548  *	from the smsc_init() function in that that one is designed to setup the
1549  *	H/W to match the UE settings and can be called after a reset.
1550  *
1551  *
1552  */
1553 static void
1554 smsc_attach_post(struct usb_ether *ue)
1555 {
1556 	struct smsc_softc *sc = uether_getsc(ue);
1557 	uint32_t mac_h, mac_l;
1558 	int err;
1559 
1560 	smsc_dbg_printf(sc, "smsc_attach_post\n");
1561 
1562 	/* Setup some of the basics */
1563 	sc->sc_phyno = 1;
1564 
1565 	/* Attempt to get the mac address, if an EEPROM is not attached this
1566 	 * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC
1567 	 * address based on urandom.
1568 	 */
1569 	memset(sc->sc_ue.ue_eaddr, 0xff, ETHER_ADDR_LEN);
1570 
1571 	/* Check if there is already a MAC address in the register */
1572 	if ((smsc_read_reg(sc, SMSC_MAC_ADDRL, &mac_l) == 0) &&
1573 	    (smsc_read_reg(sc, SMSC_MAC_ADDRH, &mac_h) == 0)) {
1574 		sc->sc_ue.ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
1575 		sc->sc_ue.ue_eaddr[4] = (uint8_t)((mac_h) & 0xff);
1576 		sc->sc_ue.ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
1577 		sc->sc_ue.ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
1578 		sc->sc_ue.ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
1579 		sc->sc_ue.ue_eaddr[0] = (uint8_t)((mac_l) & 0xff);
1580 	}
1581 
1582 	/* MAC address is not set so try to read from EEPROM, if that fails generate
1583 	 * a random MAC address.
1584 	 */
1585 	if (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) {
1586 		err = smsc_eeprom_read(sc, 0x01, sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN);
1587 #ifdef FDT
1588 		if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)))
1589 			err = usb_fdt_get_mac_addr(sc->sc_ue.ue_dev, &sc->sc_ue);
1590 #endif
1591 		if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) {
1592 			read_random(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN);
1593 			sc->sc_ue.ue_eaddr[0] &= ~0x01;     /* unicast */
1594 			sc->sc_ue.ue_eaddr[0] |=  0x02;     /* locally administered */
1595 		}
1596 	}
1597 
1598 	/* Initialise the chip for the first time */
1599 	smsc_chip_init(sc);
1600 }
1601 
1602 /**
1603  *	smsc_attach_post_sub - Called after the driver attached to the USB interface
1604  *	@ue: the USB ethernet device
1605  *
1606  *	Most of this is boilerplate code and copied from the base USB ethernet
1607  *	driver.  It has been overriden so that we can indicate to the system that
1608  *	the chip supports H/W checksumming.
1609  *
1610  *	RETURNS:
1611  *	Returns 0 on success or a negative error code.
1612  */
1613 static int
1614 smsc_attach_post_sub(struct usb_ether *ue)
1615 {
1616 	struct smsc_softc *sc;
1617 	struct ifnet *ifp;
1618 	int error;
1619 
1620 	sc = uether_getsc(ue);
1621 	ifp = ue->ue_ifp;
1622 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1623 	ifp->if_start = uether_start;
1624 	ifp->if_ioctl = smsc_ioctl;
1625 	ifp->if_init = uether_init;
1626 	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
1627 	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
1628 	IFQ_SET_READY(&ifp->if_snd);
1629 
1630 	/* The chip supports TCP/UDP checksum offloading on TX and RX paths, however
1631 	 * currently only RX checksum is supported in the driver (see top of file).
1632 	 */
1633 	ifp->if_capabilities |= IFCAP_RXCSUM | IFCAP_VLAN_MTU;
1634 	ifp->if_hwassist = 0;
1635 
1636 	/* TX checksuming is disabled (for now?)
1637 	ifp->if_capabilities |= IFCAP_TXCSUM;
1638 	ifp->if_capenable |= IFCAP_TXCSUM;
1639 	ifp->if_hwassist = CSUM_TCP | CSUM_UDP;
1640 	*/
1641 
1642 	ifp->if_capenable = ifp->if_capabilities;
1643 
1644 	mtx_lock(&Giant);
1645 	error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp,
1646 	    uether_ifmedia_upd, ue->ue_methods->ue_mii_sts,
1647 	    BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0);
1648 	mtx_unlock(&Giant);
1649 
1650 	return (error);
1651 }
1652 
1653 /**
1654  *	smsc_probe - Probe the interface.
1655  *	@dev: smsc device handle
1656  *
1657  *	Checks if the device is a match for this driver.
1658  *
1659  *	RETURNS:
1660  *	Returns 0 on success or an error code on failure.
1661  */
1662 static int
1663 smsc_probe(device_t dev)
1664 {
1665 	struct usb_attach_arg *uaa = device_get_ivars(dev);
1666 
1667 	if (uaa->usb_mode != USB_MODE_HOST)
1668 		return (ENXIO);
1669 	if (uaa->info.bConfigIndex != SMSC_CONFIG_INDEX)
1670 		return (ENXIO);
1671 	if (uaa->info.bIfaceIndex != SMSC_IFACE_IDX)
1672 		return (ENXIO);
1673 
1674 	return (usbd_lookup_id_by_uaa(smsc_devs, sizeof(smsc_devs), uaa));
1675 }
1676 
1677 /**
1678  *	smsc_attach - Attach the interface.
1679  *	@dev: smsc device handle
1680  *
1681  *	Allocate softc structures, do ifmedia setup and ethernet/BPF attach.
1682  *
1683  *	RETURNS:
1684  *	Returns 0 on success or a negative error code.
1685  */
1686 static int
1687 smsc_attach(device_t dev)
1688 {
1689 	struct usb_attach_arg *uaa = device_get_ivars(dev);
1690 	struct smsc_softc *sc = device_get_softc(dev);
1691 	struct usb_ether *ue = &sc->sc_ue;
1692 	uint8_t iface_index;
1693 	int err;
1694 
1695 	sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
1696 
1697 	device_set_usb_desc(dev);
1698 
1699 	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
1700 
1701 	/* Setup the endpoints for the SMSC LAN95xx device(s) */
1702 	iface_index = SMSC_IFACE_IDX;
1703 	err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
1704 	                          smsc_config, SMSC_N_TRANSFER, sc, &sc->sc_mtx);
1705 	if (err) {
1706 		device_printf(dev, "error: allocating USB transfers failed\n");
1707 		goto detach;
1708 	}
1709 
1710 	ue->ue_sc = sc;
1711 	ue->ue_dev = dev;
1712 	ue->ue_udev = uaa->device;
1713 	ue->ue_mtx = &sc->sc_mtx;
1714 	ue->ue_methods = &smsc_ue_methods;
1715 
1716 	err = uether_ifattach(ue);
1717 	if (err) {
1718 		device_printf(dev, "error: could not attach interface\n");
1719 		goto detach;
1720 	}
1721 	return (0);			/* success */
1722 
1723 detach:
1724 	smsc_detach(dev);
1725 	return (ENXIO);		/* failure */
1726 }
1727 
1728 /**
1729  *	smsc_detach - Detach the interface.
1730  *	@dev: smsc device handle
1731  *
1732  *	RETURNS:
1733  *	Returns 0.
1734  */
1735 static int
1736 smsc_detach(device_t dev)
1737 {
1738 	struct smsc_softc *sc = device_get_softc(dev);
1739 	struct usb_ether *ue = &sc->sc_ue;
1740 
1741 	usbd_transfer_unsetup(sc->sc_xfer, SMSC_N_TRANSFER);
1742 	uether_ifdetach(ue);
1743 	mtx_destroy(&sc->sc_mtx);
1744 
1745 	return (0);
1746 }
1747 
1748 static device_method_t smsc_methods[] = {
1749 	/* Device interface */
1750 	DEVMETHOD(device_probe, smsc_probe),
1751 	DEVMETHOD(device_attach, smsc_attach),
1752 	DEVMETHOD(device_detach, smsc_detach),
1753 
1754 	/* bus interface */
1755 	DEVMETHOD(bus_print_child, bus_generic_print_child),
1756 	DEVMETHOD(bus_driver_added, bus_generic_driver_added),
1757 
1758 	/* MII interface */
1759 	DEVMETHOD(miibus_readreg, smsc_miibus_readreg),
1760 	DEVMETHOD(miibus_writereg, smsc_miibus_writereg),
1761 	DEVMETHOD(miibus_statchg, smsc_miibus_statchg),
1762 
1763 	DEVMETHOD_END
1764 };
1765 
1766 static driver_t smsc_driver = {
1767 	.name = "smsc",
1768 	.methods = smsc_methods,
1769 	.size = sizeof(struct smsc_softc),
1770 };
1771 
1772 static devclass_t smsc_devclass;
1773 
1774 DRIVER_MODULE(smsc, uhub, smsc_driver, smsc_devclass, NULL, 0);
1775 DRIVER_MODULE(miibus, smsc, miibus_driver, miibus_devclass, 0, 0);
1776 MODULE_DEPEND(smsc, uether, 1, 1, 1);
1777 MODULE_DEPEND(smsc, usb, 1, 1, 1);
1778 MODULE_DEPEND(smsc, ether, 1, 1, 1);
1779 MODULE_DEPEND(smsc, miibus, 1, 1, 1);
1780 MODULE_VERSION(smsc, 1);
1781 USB_PNP_HOST_INFO(smsc_devs);
1782