1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2012 5 * Ben Gray <bgray@freebsd.org>. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 /* 31 * SMSC LAN9xxx devices (http://www.smsc.com/) 32 * 33 * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that 34 * support USB 2.0 and 10/100 Mbps Ethernet. 35 * 36 * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter. 37 * The driver only covers the Ethernet part, the standard USB hub driver 38 * supports the hub part. 39 * 40 * This driver is closely modelled on the Linux driver written and copyrighted 41 * by SMSC. 42 * 43 * 44 * 45 * 46 * H/W TCP & UDP Checksum Offloading 47 * --------------------------------- 48 * The chip supports both tx and rx offloading of UDP & TCP checksums, this 49 * feature can be dynamically enabled/disabled. 50 * 51 * RX checksuming is performed across bytes after the IPv4 header to the end of 52 * the Ethernet frame, this means if the frame is padded with non-zero values 53 * the H/W checksum will be incorrect, however the rx code compensates for this. 54 * 55 * TX checksuming is more complicated, the device requires a special header to 56 * be prefixed onto the start of the frame which indicates the start and end 57 * positions of the UDP or TCP frame. This requires the driver to manually 58 * go through the packet data and decode the headers prior to sending. 59 * On Linux they generally provide cues to the location of the csum and the 60 * area to calculate it over, on FreeBSD we seem to have to do it all ourselves, 61 * hence this is not as optimal and therefore h/w tX checksum is currently not 62 * implemented. 63 * 64 */ 65 #include <sys/stdint.h> 66 #include <sys/stddef.h> 67 #include <sys/param.h> 68 #include <sys/queue.h> 69 #include <sys/types.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/bus.h> 73 #include <sys/module.h> 74 #include <sys/lock.h> 75 #include <sys/mutex.h> 76 #include <sys/condvar.h> 77 #include <sys/socket.h> 78 #include <sys/sysctl.h> 79 #include <sys/sx.h> 80 #include <sys/unistd.h> 81 #include <sys/callout.h> 82 #include <sys/malloc.h> 83 #include <sys/priv.h> 84 #include <sys/random.h> 85 86 #include <net/if.h> 87 #include <net/if_var.h> 88 #include <net/if_media.h> 89 90 #include <dev/mii/mii.h> 91 #include <dev/mii/miivar.h> 92 93 #include <netinet/in.h> 94 #include <netinet/ip.h> 95 96 #include "opt_platform.h" 97 98 #ifdef FDT 99 #include <dev/fdt/fdt_common.h> 100 #include <dev/ofw/ofw_bus.h> 101 #include <dev/ofw/ofw_bus_subr.h> 102 #include <dev/usb/usb_fdt_support.h> 103 #endif 104 105 #include <dev/usb/usb.h> 106 #include <dev/usb/usbdi.h> 107 #include <dev/usb/usbdi_util.h> 108 #include "usbdevs.h" 109 110 #define USB_DEBUG_VAR smsc_debug 111 #include <dev/usb/usb_debug.h> 112 #include <dev/usb/usb_process.h> 113 114 #include <dev/usb/net/usb_ethernet.h> 115 116 #include <dev/usb/net/if_smscreg.h> 117 118 #include "miibus_if.h" 119 120 SYSCTL_NODE(_hw_usb, OID_AUTO, smsc, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 121 "USB smsc"); 122 123 static bool smsc_rx_packet_batching = 1; 124 125 SYSCTL_BOOL(_hw_usb_smsc, OID_AUTO, smsc_rx_packet_batching, CTLFLAG_RDTUN, 126 &smsc_rx_packet_batching, 0, 127 "If set, allows packet batching to increase throughput and latency. " 128 "Else throughput and latency is decreased."); 129 130 #ifdef USB_DEBUG 131 static int smsc_debug = 0; 132 133 SYSCTL_INT(_hw_usb_smsc, OID_AUTO, debug, CTLFLAG_RWTUN, &smsc_debug, 0, 134 "Debug level"); 135 #endif 136 137 /* 138 * Various supported device vendors/products. 139 */ 140 static const struct usb_device_id smsc_devs[] = { 141 #define SMSC_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) } 142 SMSC_DEV(LAN89530_ETH, 0), 143 SMSC_DEV(LAN9500_ETH, 0), 144 SMSC_DEV(LAN9500_ETH_2, 0), 145 SMSC_DEV(LAN9500A_ETH, 0), 146 SMSC_DEV(LAN9500A_ETH_2, 0), 147 SMSC_DEV(LAN9505_ETH, 0), 148 SMSC_DEV(LAN9505A_ETH, 0), 149 SMSC_DEV(LAN9514_ETH, 0), 150 SMSC_DEV(LAN9514_ETH_2, 0), 151 SMSC_DEV(LAN9530_ETH, 0), 152 SMSC_DEV(LAN9730_ETH, 0), 153 SMSC_DEV(LAN9500_SAL10, 0), 154 SMSC_DEV(LAN9505_SAL10, 0), 155 SMSC_DEV(LAN9500A_SAL10, 0), 156 SMSC_DEV(LAN9505A_SAL10, 0), 157 SMSC_DEV(LAN9514_SAL10, 0), 158 SMSC_DEV(LAN9500A_HAL, 0), 159 SMSC_DEV(LAN9505A_HAL, 0), 160 #undef SMSC_DEV 161 }; 162 163 #ifdef USB_DEBUG 164 #define smsc_dbg_printf(sc, fmt, args...) \ 165 do { \ 166 if (smsc_debug > 0) \ 167 device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \ 168 } while(0) 169 #else 170 #define smsc_dbg_printf(sc, fmt, args...) do { } while (0) 171 #endif 172 173 #define smsc_warn_printf(sc, fmt, args...) \ 174 device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args) 175 176 #define smsc_err_printf(sc, fmt, args...) \ 177 device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args) 178 179 #define ETHER_IS_VALID(addr) \ 180 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 181 182 static device_probe_t smsc_probe; 183 static device_attach_t smsc_attach; 184 static device_detach_t smsc_detach; 185 186 static usb_callback_t smsc_bulk_read_callback; 187 static usb_callback_t smsc_bulk_write_callback; 188 189 static miibus_readreg_t smsc_miibus_readreg; 190 static miibus_writereg_t smsc_miibus_writereg; 191 static miibus_statchg_t smsc_miibus_statchg; 192 193 static int smsc_attach_post_sub(struct usb_ether *ue); 194 static uether_fn_t smsc_attach_post; 195 static uether_fn_t smsc_init; 196 static uether_fn_t smsc_stop; 197 static uether_fn_t smsc_start; 198 static uether_fn_t smsc_tick; 199 static uether_fn_t smsc_setmulti; 200 static uether_fn_t smsc_setpromisc; 201 202 static int smsc_ifmedia_upd(if_t); 203 static void smsc_ifmedia_sts(if_t, struct ifmediareq *); 204 205 static int smsc_chip_init(struct smsc_softc *sc); 206 static int smsc_ioctl(if_t ifp, u_long cmd, caddr_t data); 207 208 static const struct usb_config smsc_config[SMSC_N_TRANSFER] = { 209 [SMSC_BULK_DT_WR] = { 210 .type = UE_BULK, 211 .endpoint = UE_ADDR_ANY, 212 .direction = UE_DIR_OUT, 213 .frames = 16, 214 .bufsize = 16 * (MCLBYTES + 16), 215 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 216 .callback = smsc_bulk_write_callback, 217 .timeout = 10000, /* 10 seconds */ 218 }, 219 220 [SMSC_BULK_DT_RD] = { 221 .type = UE_BULK, 222 .endpoint = UE_ADDR_ANY, 223 .direction = UE_DIR_IN, 224 .bufsize = 20480, /* bytes */ 225 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 226 .callback = smsc_bulk_read_callback, 227 .timeout = 0, /* no timeout */ 228 }, 229 230 /* The SMSC chip supports an interrupt endpoints, however they aren't 231 * needed as we poll on the MII status. 232 */ 233 }; 234 235 static const struct usb_ether_methods smsc_ue_methods = { 236 .ue_attach_post = smsc_attach_post, 237 .ue_attach_post_sub = smsc_attach_post_sub, 238 .ue_start = smsc_start, 239 .ue_ioctl = smsc_ioctl, 240 .ue_init = smsc_init, 241 .ue_stop = smsc_stop, 242 .ue_tick = smsc_tick, 243 .ue_setmulti = smsc_setmulti, 244 .ue_setpromisc = smsc_setpromisc, 245 .ue_mii_upd = smsc_ifmedia_upd, 246 .ue_mii_sts = smsc_ifmedia_sts, 247 }; 248 249 /** 250 * smsc_read_reg - Reads a 32-bit register on the device 251 * @sc: driver soft context 252 * @off: offset of the register 253 * @data: pointer a value that will be populated with the register value 254 * 255 * LOCKING: 256 * The device lock must be held before calling this function. 257 * 258 * RETURNS: 259 * 0 on success, a USB_ERR_?? error code on failure. 260 */ 261 static int 262 smsc_read_reg(struct smsc_softc *sc, uint32_t off, uint32_t *data) 263 { 264 struct usb_device_request req; 265 uint32_t buf; 266 usb_error_t err; 267 268 SMSC_LOCK_ASSERT(sc, MA_OWNED); 269 270 req.bmRequestType = UT_READ_VENDOR_DEVICE; 271 req.bRequest = SMSC_UR_READ_REG; 272 USETW(req.wValue, 0); 273 USETW(req.wIndex, off); 274 USETW(req.wLength, 4); 275 276 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 277 if (err != 0) 278 smsc_warn_printf(sc, "Failed to read register 0x%0x\n", off); 279 280 *data = le32toh(buf); 281 282 return (err); 283 } 284 285 /** 286 * smsc_write_reg - Writes a 32-bit register on the device 287 * @sc: driver soft context 288 * @off: offset of the register 289 * @data: the 32-bit value to write into the register 290 * 291 * LOCKING: 292 * The device lock must be held before calling this function. 293 * 294 * RETURNS: 295 * 0 on success, a USB_ERR_?? error code on failure. 296 */ 297 static int 298 smsc_write_reg(struct smsc_softc *sc, uint32_t off, uint32_t data) 299 { 300 struct usb_device_request req; 301 uint32_t buf; 302 usb_error_t err; 303 304 SMSC_LOCK_ASSERT(sc, MA_OWNED); 305 306 buf = htole32(data); 307 308 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 309 req.bRequest = SMSC_UR_WRITE_REG; 310 USETW(req.wValue, 0); 311 USETW(req.wIndex, off); 312 USETW(req.wLength, 4); 313 314 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 315 if (err != 0) 316 smsc_warn_printf(sc, "Failed to write register 0x%0x\n", off); 317 318 return (err); 319 } 320 321 /** 322 * smsc_wait_for_bits - Polls on a register value until bits are cleared 323 * @sc: soft context 324 * @reg: offset of the register 325 * @bits: if the bits are clear the function returns 326 * 327 * LOCKING: 328 * The device lock must be held before calling this function. 329 * 330 * RETURNS: 331 * 0 on success, or a USB_ERR_?? error code on failure. 332 */ 333 static int 334 smsc_wait_for_bits(struct smsc_softc *sc, uint32_t reg, uint32_t bits) 335 { 336 usb_ticks_t start_ticks; 337 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 338 uint32_t val; 339 int err; 340 341 SMSC_LOCK_ASSERT(sc, MA_OWNED); 342 343 start_ticks = (usb_ticks_t)ticks; 344 do { 345 if ((err = smsc_read_reg(sc, reg, &val)) != 0) 346 return (err); 347 if (!(val & bits)) 348 return (0); 349 350 uether_pause(&sc->sc_ue, hz / 100); 351 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 352 353 return (USB_ERR_TIMEOUT); 354 } 355 356 /** 357 * smsc_eeprom_read - Reads the attached EEPROM 358 * @sc: soft context 359 * @off: the eeprom address offset 360 * @buf: stores the bytes 361 * @buflen: the number of bytes to read 362 * 363 * Simply reads bytes from an attached eeprom. 364 * 365 * LOCKING: 366 * The function takes and releases the device lock if it is not already held. 367 * 368 * RETURNS: 369 * 0 on success, or a USB_ERR_?? error code on failure. 370 */ 371 static int 372 smsc_eeprom_read(struct smsc_softc *sc, uint16_t off, uint8_t *buf, uint16_t buflen) 373 { 374 usb_ticks_t start_ticks; 375 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 376 int err; 377 int locked; 378 uint32_t val; 379 uint16_t i; 380 381 locked = mtx_owned(&sc->sc_mtx); 382 if (!locked) 383 SMSC_LOCK(sc); 384 385 err = smsc_wait_for_bits(sc, SMSC_EEPROM_CMD, SMSC_EEPROM_CMD_BUSY); 386 if (err != 0) { 387 smsc_warn_printf(sc, "eeprom busy, failed to read data\n"); 388 goto done; 389 } 390 391 /* start reading the bytes, one at a time */ 392 for (i = 0; i < buflen; i++) { 393 val = SMSC_EEPROM_CMD_BUSY | (SMSC_EEPROM_CMD_ADDR_MASK & (off + i)); 394 if ((err = smsc_write_reg(sc, SMSC_EEPROM_CMD, val)) != 0) 395 goto done; 396 397 start_ticks = (usb_ticks_t)ticks; 398 do { 399 if ((err = smsc_read_reg(sc, SMSC_EEPROM_CMD, &val)) != 0) 400 goto done; 401 if (!(val & SMSC_EEPROM_CMD_BUSY) || (val & SMSC_EEPROM_CMD_TIMEOUT)) 402 break; 403 404 uether_pause(&sc->sc_ue, hz / 100); 405 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 406 407 if (val & (SMSC_EEPROM_CMD_BUSY | SMSC_EEPROM_CMD_TIMEOUT)) { 408 smsc_warn_printf(sc, "eeprom command failed\n"); 409 err = USB_ERR_IOERROR; 410 break; 411 } 412 413 if ((err = smsc_read_reg(sc, SMSC_EEPROM_DATA, &val)) != 0) 414 goto done; 415 416 buf[i] = (val & 0xff); 417 } 418 419 done: 420 if (!locked) 421 SMSC_UNLOCK(sc); 422 423 return (err); 424 } 425 426 /** 427 * smsc_miibus_readreg - Reads a MII/MDIO register 428 * @dev: usb ether device 429 * @phy: the number of phy reading from 430 * @reg: the register address 431 * 432 * Attempts to read a phy register over the MII bus. 433 * 434 * LOCKING: 435 * Takes and releases the device mutex lock if not already held. 436 * 437 * RETURNS: 438 * Returns the 16-bits read from the MII register, if this function fails 0 439 * is returned. 440 */ 441 static int 442 smsc_miibus_readreg(device_t dev, int phy, int reg) 443 { 444 struct smsc_softc *sc = device_get_softc(dev); 445 int locked; 446 uint32_t addr; 447 uint32_t val = 0; 448 449 locked = mtx_owned(&sc->sc_mtx); 450 if (!locked) 451 SMSC_LOCK(sc); 452 453 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) { 454 smsc_warn_printf(sc, "MII is busy\n"); 455 goto done; 456 } 457 458 addr = (phy << 11) | (reg << 6) | SMSC_MII_READ | SMSC_MII_BUSY; 459 smsc_write_reg(sc, SMSC_MII_ADDR, addr); 460 461 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) 462 smsc_warn_printf(sc, "MII read timeout\n"); 463 464 smsc_read_reg(sc, SMSC_MII_DATA, &val); 465 val = le32toh(val); 466 467 done: 468 if (!locked) 469 SMSC_UNLOCK(sc); 470 471 return (val & 0xFFFF); 472 } 473 474 /** 475 * smsc_miibus_writereg - Writes a MII/MDIO register 476 * @dev: usb ether device 477 * @phy: the number of phy writing to 478 * @reg: the register address 479 * @val: the value to write 480 * 481 * Attempts to write a phy register over the MII bus. 482 * 483 * LOCKING: 484 * Takes and releases the device mutex lock if not already held. 485 * 486 * RETURNS: 487 * Always returns 0 regardless of success or failure. 488 */ 489 static int 490 smsc_miibus_writereg(device_t dev, int phy, int reg, int val) 491 { 492 struct smsc_softc *sc = device_get_softc(dev); 493 int locked; 494 uint32_t addr; 495 496 if (sc->sc_phyno != phy) 497 return (0); 498 499 locked = mtx_owned(&sc->sc_mtx); 500 if (!locked) 501 SMSC_LOCK(sc); 502 503 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) { 504 smsc_warn_printf(sc, "MII is busy\n"); 505 goto done; 506 } 507 508 val = htole32(val); 509 smsc_write_reg(sc, SMSC_MII_DATA, val); 510 511 addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE | SMSC_MII_BUSY; 512 smsc_write_reg(sc, SMSC_MII_ADDR, addr); 513 514 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) 515 smsc_warn_printf(sc, "MII write timeout\n"); 516 517 done: 518 if (!locked) 519 SMSC_UNLOCK(sc); 520 return (0); 521 } 522 523 /** 524 * smsc_miibus_statchg - Called to detect phy status change 525 * @dev: usb ether device 526 * 527 * This function is called periodically by the system to poll for status 528 * changes of the link. 529 * 530 * LOCKING: 531 * Takes and releases the device mutex lock if not already held. 532 */ 533 static void 534 smsc_miibus_statchg(device_t dev) 535 { 536 struct smsc_softc *sc = device_get_softc(dev); 537 struct mii_data *mii = uether_getmii(&sc->sc_ue); 538 if_t ifp; 539 int locked; 540 int err; 541 uint32_t flow; 542 uint32_t afc_cfg; 543 544 locked = mtx_owned(&sc->sc_mtx); 545 if (!locked) 546 SMSC_LOCK(sc); 547 548 ifp = uether_getifp(&sc->sc_ue); 549 if (mii == NULL || ifp == NULL || 550 (if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) 551 goto done; 552 553 /* Use the MII status to determine link status */ 554 sc->sc_flags &= ~SMSC_FLAG_LINK; 555 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 556 (IFM_ACTIVE | IFM_AVALID)) { 557 switch (IFM_SUBTYPE(mii->mii_media_active)) { 558 case IFM_10_T: 559 case IFM_100_TX: 560 sc->sc_flags |= SMSC_FLAG_LINK; 561 break; 562 case IFM_1000_T: 563 /* Gigabit ethernet not supported by chipset */ 564 break; 565 default: 566 break; 567 } 568 } 569 570 /* Lost link, do nothing. */ 571 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) { 572 smsc_dbg_printf(sc, "link flag not set\n"); 573 goto done; 574 } 575 576 err = smsc_read_reg(sc, SMSC_AFC_CFG, &afc_cfg); 577 if (err) { 578 smsc_warn_printf(sc, "failed to read initial AFC_CFG, error %d\n", err); 579 goto done; 580 } 581 582 /* Enable/disable full duplex operation and TX/RX pause */ 583 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 584 smsc_dbg_printf(sc, "full duplex operation\n"); 585 sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN; 586 sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX; 587 588 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0) 589 flow = 0xffff0002; 590 else 591 flow = 0; 592 593 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0) 594 afc_cfg |= 0xf; 595 else 596 afc_cfg &= ~0xf; 597 598 } else { 599 smsc_dbg_printf(sc, "half duplex operation\n"); 600 sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX; 601 sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN; 602 603 flow = 0; 604 afc_cfg |= 0xf; 605 } 606 607 err = smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 608 err += smsc_write_reg(sc, SMSC_FLOW, flow); 609 err += smsc_write_reg(sc, SMSC_AFC_CFG, afc_cfg); 610 if (err) 611 smsc_warn_printf(sc, "media change failed, error %d\n", err); 612 613 done: 614 if (!locked) 615 SMSC_UNLOCK(sc); 616 } 617 618 /** 619 * smsc_ifmedia_upd - Set media options 620 * @ifp: interface pointer 621 * 622 * Basically boilerplate code that simply calls the mii functions to set the 623 * media options. 624 * 625 * LOCKING: 626 * The device lock must be held before this function is called. 627 * 628 * RETURNS: 629 * Returns 0 on success or a negative error code. 630 */ 631 static int 632 smsc_ifmedia_upd(if_t ifp) 633 { 634 struct smsc_softc *sc = if_getsoftc(ifp); 635 struct mii_data *mii = uether_getmii(&sc->sc_ue); 636 struct mii_softc *miisc; 637 int err; 638 639 SMSC_LOCK_ASSERT(sc, MA_OWNED); 640 641 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 642 PHY_RESET(miisc); 643 err = mii_mediachg(mii); 644 return (err); 645 } 646 647 /** 648 * smsc_ifmedia_sts - Report current media status 649 * @ifp: inet interface pointer 650 * @ifmr: interface media request 651 * 652 * Basically boilerplate code that simply calls the mii functions to get the 653 * media status. 654 * 655 * LOCKING: 656 * Internally takes and releases the device lock. 657 */ 658 static void 659 smsc_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr) 660 { 661 struct smsc_softc *sc = if_getsoftc(ifp); 662 struct mii_data *mii = uether_getmii(&sc->sc_ue); 663 664 SMSC_LOCK(sc); 665 mii_pollstat(mii); 666 ifmr->ifm_active = mii->mii_media_active; 667 ifmr->ifm_status = mii->mii_media_status; 668 SMSC_UNLOCK(sc); 669 } 670 671 /** 672 * smsc_hash - Calculate the hash of a mac address 673 * @addr: The mac address to calculate the hash on 674 * 675 * This function is used when configuring a range of m'cast mac addresses to 676 * filter on. The hash of the mac address is put in the device's mac hash 677 * table. 678 * 679 * RETURNS: 680 * Returns a value from 0-63 value which is the hash of the mac address. 681 */ 682 static inline uint32_t 683 smsc_hash(uint8_t addr[ETHER_ADDR_LEN]) 684 { 685 return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f; 686 } 687 688 static u_int 689 smsc_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) 690 { 691 uint32_t hash, *hashtbl = arg; 692 693 hash = smsc_hash(LLADDR(sdl)); 694 hashtbl[hash >> 5] |= 1 << (hash & 0x1F); 695 696 return (1); 697 } 698 699 /** 700 * smsc_setmulti - Setup multicast 701 * @ue: usb ethernet device context 702 * 703 * Tells the device to either accept frames with a multicast mac address, a 704 * select group of m'cast mac addresses or just the devices mac address. 705 * 706 * LOCKING: 707 * Should be called with the SMSC lock held. 708 */ 709 static void 710 smsc_setmulti(struct usb_ether *ue) 711 { 712 struct smsc_softc *sc = uether_getsc(ue); 713 if_t ifp = uether_getifp(ue); 714 uint32_t hashtbl[2] = { 0, 0 }; 715 716 SMSC_LOCK_ASSERT(sc, MA_OWNED); 717 718 if (if_getflags(ifp) & (IFF_ALLMULTI | IFF_PROMISC)) { 719 smsc_dbg_printf(sc, "receive all multicast enabled\n"); 720 sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS; 721 sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT; 722 723 } else { 724 if (if_foreach_llmaddr(ifp, smsc_hash_maddr, &hashtbl) > 0) { 725 /* We are filtering on a set of address so calculate 726 * hashes of each of the address and set the 727 * corresponding bits in the register. 728 */ 729 sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT; 730 sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS); 731 } else { 732 /* Only receive packets with destination set to 733 * our mac address 734 */ 735 sc->sc_mac_csr &= ~(SMSC_MAC_CSR_MCPAS | SMSC_MAC_CSR_HPFILT); 736 } 737 738 /* Debug */ 739 if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT) 740 smsc_dbg_printf(sc, "receive select group of macs\n"); 741 else 742 smsc_dbg_printf(sc, "receive own packets only\n"); 743 } 744 745 /* Write the hash table and mac control registers */ 746 smsc_write_reg(sc, SMSC_HASHH, hashtbl[1]); 747 smsc_write_reg(sc, SMSC_HASHL, hashtbl[0]); 748 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 749 } 750 751 /** 752 * smsc_setpromisc - Enables/disables promiscuous mode 753 * @ue: usb ethernet device context 754 * 755 * LOCKING: 756 * Should be called with the SMSC lock held. 757 */ 758 static void 759 smsc_setpromisc(struct usb_ether *ue) 760 { 761 struct smsc_softc *sc = uether_getsc(ue); 762 if_t ifp = uether_getifp(ue); 763 764 smsc_dbg_printf(sc, "promiscuous mode %sabled\n", 765 (if_getflags(ifp) & IFF_PROMISC) ? "en" : "dis"); 766 767 SMSC_LOCK_ASSERT(sc, MA_OWNED); 768 769 if (if_getflags(ifp) & IFF_PROMISC) 770 sc->sc_mac_csr |= SMSC_MAC_CSR_PRMS; 771 else 772 sc->sc_mac_csr &= ~SMSC_MAC_CSR_PRMS; 773 774 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 775 } 776 777 /** 778 * smsc_sethwcsum - Enable or disable H/W UDP and TCP checksumming 779 * @sc: driver soft context 780 * 781 * LOCKING: 782 * Should be called with the SMSC lock held. 783 * 784 * RETURNS: 785 * Returns 0 on success or a negative error code. 786 */ 787 static int smsc_sethwcsum(struct smsc_softc *sc) 788 { 789 if_t ifp = uether_getifp(&sc->sc_ue); 790 uint32_t val; 791 int err; 792 793 if (!ifp) 794 return (-EIO); 795 796 SMSC_LOCK_ASSERT(sc, MA_OWNED); 797 798 err = smsc_read_reg(sc, SMSC_COE_CTRL, &val); 799 if (err != 0) { 800 smsc_warn_printf(sc, "failed to read SMSC_COE_CTRL (err=%d)\n", err); 801 return (err); 802 } 803 804 /* Enable/disable the Rx checksum */ 805 if ((if_getcapabilities(ifp) & if_getcapenable(ifp)) & IFCAP_RXCSUM) 806 val |= SMSC_COE_CTRL_RX_EN; 807 else 808 val &= ~SMSC_COE_CTRL_RX_EN; 809 810 /* Enable/disable the Tx checksum (currently not supported) */ 811 if ((if_getcapabilities(ifp) & if_getcapenable(ifp)) & IFCAP_TXCSUM) 812 val |= SMSC_COE_CTRL_TX_EN; 813 else 814 val &= ~SMSC_COE_CTRL_TX_EN; 815 816 err = smsc_write_reg(sc, SMSC_COE_CTRL, val); 817 if (err != 0) { 818 smsc_warn_printf(sc, "failed to write SMSC_COE_CTRL (err=%d)\n", err); 819 return (err); 820 } 821 822 return (0); 823 } 824 825 /** 826 * smsc_setmacaddress - Sets the mac address in the device 827 * @sc: driver soft context 828 * @addr: pointer to array contain at least 6 bytes of the mac 829 * 830 * Writes the MAC address into the device, usually the MAC is programmed with 831 * values from the EEPROM. 832 * 833 * LOCKING: 834 * Should be called with the SMSC lock held. 835 * 836 * RETURNS: 837 * Returns 0 on success or a negative error code. 838 */ 839 static int 840 smsc_setmacaddress(struct smsc_softc *sc, const uint8_t *addr) 841 { 842 int err; 843 uint32_t val; 844 845 smsc_dbg_printf(sc, "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 846 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 847 848 SMSC_LOCK_ASSERT(sc, MA_OWNED); 849 850 val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; 851 if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0) 852 goto done; 853 854 val = (addr[5] << 8) | addr[4]; 855 err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val); 856 857 done: 858 return (err); 859 } 860 861 /** 862 * smsc_reset - Reset the SMSC chip 863 * @sc: device soft context 864 * 865 * LOCKING: 866 * Should be called with the SMSC lock held. 867 */ 868 static void 869 smsc_reset(struct smsc_softc *sc) 870 { 871 struct usb_config_descriptor *cd; 872 usb_error_t err; 873 874 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 875 876 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 877 cd->bConfigurationValue); 878 if (err) 879 smsc_warn_printf(sc, "reset failed (ignored)\n"); 880 881 /* Wait a little while for the chip to get its brains in order. */ 882 uether_pause(&sc->sc_ue, hz / 100); 883 884 /* Reinitialize controller to achieve full reset. */ 885 smsc_chip_init(sc); 886 } 887 888 /** 889 * smsc_init - Initialises the LAN95xx chip 890 * @ue: USB ether interface 891 * 892 * Called when the interface is brought up (i.e. ifconfig ue0 up), this 893 * initialise the interface and the rx/tx pipes. 894 * 895 * LOCKING: 896 * Should be called with the SMSC lock held. 897 */ 898 static void 899 smsc_init(struct usb_ether *ue) 900 { 901 struct smsc_softc *sc = uether_getsc(ue); 902 if_t ifp = uether_getifp(ue); 903 904 SMSC_LOCK_ASSERT(sc, MA_OWNED); 905 906 if (smsc_setmacaddress(sc, if_getlladdr(ifp))) 907 smsc_dbg_printf(sc, "setting MAC address failed\n"); 908 909 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) 910 return; 911 912 /* Cancel pending I/O */ 913 smsc_stop(ue); 914 915 /* Reset the ethernet interface. */ 916 smsc_reset(sc); 917 918 /* Load the multicast filter. */ 919 smsc_setmulti(ue); 920 921 /* TCP/UDP checksum offload engines. */ 922 smsc_sethwcsum(sc); 923 924 usbd_xfer_set_stall(sc->sc_xfer[SMSC_BULK_DT_WR]); 925 926 /* Indicate we are up and running. */ 927 if_setdrvflagbits(ifp, IFF_DRV_RUNNING, 0); 928 929 /* Switch to selected media. */ 930 smsc_ifmedia_upd(ifp); 931 smsc_start(ue); 932 } 933 934 /** 935 * smsc_bulk_read_callback - Read callback used to process the USB URB 936 * @xfer: the USB transfer 937 * @error: 938 * 939 * Reads the URB data which can contain one or more ethernet frames, the 940 * frames are copyed into a mbuf and given to the system. 941 * 942 * LOCKING: 943 * No locking required, doesn't access internal driver settings. 944 */ 945 static void 946 smsc_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 947 { 948 struct smsc_softc *sc = usbd_xfer_softc(xfer); 949 struct usb_ether *ue = &sc->sc_ue; 950 if_t ifp = uether_getifp(ue); 951 struct mbuf *m; 952 struct usb_page_cache *pc; 953 uint32_t rxhdr; 954 int pktlen; 955 int off; 956 int actlen; 957 958 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 959 smsc_dbg_printf(sc, "rx : actlen %d\n", actlen); 960 961 switch (USB_GET_STATE(xfer)) { 962 case USB_ST_TRANSFERRED: 963 964 /* There is always a zero length frame after bringing the IF up */ 965 if (actlen < (sizeof(rxhdr) + ETHER_CRC_LEN)) 966 goto tr_setup; 967 968 /* There maybe multiple packets in the USB frame, each will have a 969 * header and each needs to have it's own mbuf allocated and populated 970 * for it. 971 */ 972 pc = usbd_xfer_get_frame(xfer, 0); 973 off = 0; 974 975 while (off < actlen) { 976 977 /* The frame header is always aligned on a 4 byte boundary */ 978 off = ((off + 0x3) & ~0x3); 979 980 if ((off + sizeof(rxhdr)) > actlen) 981 goto tr_setup; 982 983 usbd_copy_out(pc, off, &rxhdr, sizeof(rxhdr)); 984 off += (sizeof(rxhdr) + ETHER_ALIGN); 985 rxhdr = le32toh(rxhdr); 986 987 pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr); 988 989 smsc_dbg_printf(sc, "rx : rxhdr 0x%08x : pktlen %d : actlen %d : " 990 "off %d\n", rxhdr, pktlen, actlen, off); 991 992 993 if (rxhdr & SMSC_RX_STAT_ERROR) { 994 smsc_dbg_printf(sc, "rx error (hdr 0x%08x)\n", rxhdr); 995 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 996 if (rxhdr & SMSC_RX_STAT_COLLISION) 997 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1); 998 } else { 999 /* Check if the ethernet frame is too big or too small */ 1000 if ((pktlen < ETHER_HDR_LEN) || (pktlen > (actlen - off))) 1001 goto tr_setup; 1002 1003 /* Create a new mbuf to store the packet in */ 1004 m = uether_newbuf(); 1005 if (m == NULL) { 1006 smsc_warn_printf(sc, "failed to create new mbuf\n"); 1007 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1); 1008 goto tr_setup; 1009 } 1010 if (pktlen > m->m_len) { 1011 smsc_dbg_printf(sc, "buffer too small %d vs %d bytes", 1012 pktlen, m->m_len); 1013 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1); 1014 m_freem(m); 1015 goto tr_setup; 1016 } 1017 usbd_copy_out(pc, off, mtod(m, uint8_t *), pktlen); 1018 1019 /* Check if RX TCP/UDP checksumming is being offloaded */ 1020 if ((if_getcapenable(ifp) & IFCAP_RXCSUM) != 0) { 1021 struct ether_header *eh; 1022 1023 eh = mtod(m, struct ether_header *); 1024 1025 /* Remove the extra 2 bytes of the csum */ 1026 pktlen -= 2; 1027 1028 /* The checksum appears to be simplistically calculated 1029 * over the udp/tcp header and data up to the end of the 1030 * eth frame. Which means if the eth frame is padded 1031 * the csum calculation is incorrectly performed over 1032 * the padding bytes as well. Therefore to be safe we 1033 * ignore the H/W csum on frames less than or equal to 1034 * 64 bytes. 1035 * 1036 * Ignore H/W csum for non-IPv4 packets. 1037 */ 1038 if ((be16toh(eh->ether_type) == ETHERTYPE_IP) && 1039 (pktlen > ETHER_MIN_LEN)) { 1040 struct ip *ip; 1041 1042 ip = (struct ip *)(eh + 1); 1043 if ((ip->ip_v == IPVERSION) && 1044 ((ip->ip_p == IPPROTO_TCP) || 1045 (ip->ip_p == IPPROTO_UDP))) { 1046 /* Indicate the UDP/TCP csum has been calculated */ 1047 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1048 1049 /* Copy the TCP/UDP checksum from the last 2 bytes 1050 * of the transfer and put in the csum_data field. 1051 */ 1052 usbd_copy_out(pc, (off + pktlen), 1053 &m->m_pkthdr.csum_data, 2); 1054 1055 /* The data is copied in network order, but the 1056 * csum algorithm in the kernel expects it to be 1057 * in host network order. 1058 */ 1059 m->m_pkthdr.csum_data = ntohs(m->m_pkthdr.csum_data); 1060 1061 smsc_dbg_printf(sc, "RX checksum offloaded (0x%04x)\n", 1062 m->m_pkthdr.csum_data); 1063 } 1064 } 1065 1066 /* Need to adjust the offset as well or we'll be off 1067 * by 2 because the csum is removed from the packet 1068 * length. 1069 */ 1070 off += 2; 1071 } 1072 1073 /* Finally enqueue the mbuf on the receive queue */ 1074 /* Remove 4 trailing bytes */ 1075 if (pktlen < (4 + ETHER_HDR_LEN)) { 1076 m_freem(m); 1077 goto tr_setup; 1078 } 1079 uether_rxmbuf(ue, m, pktlen - 4); 1080 } 1081 1082 /* Update the offset to move to the next potential packet */ 1083 off += pktlen; 1084 } 1085 1086 /* FALLTHROUGH */ 1087 1088 case USB_ST_SETUP: 1089 tr_setup: 1090 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1091 usbd_transfer_submit(xfer); 1092 uether_rxflush(ue); 1093 return; 1094 1095 default: 1096 if (error != USB_ERR_CANCELLED) { 1097 smsc_warn_printf(sc, "bulk read error, %s\n", usbd_errstr(error)); 1098 usbd_xfer_set_stall(xfer); 1099 goto tr_setup; 1100 } 1101 return; 1102 } 1103 } 1104 1105 /** 1106 * smsc_bulk_write_callback - Write callback used to send ethernet frame(s) 1107 * @xfer: the USB transfer 1108 * @error: error code if the transfers is in an errored state 1109 * 1110 * The main write function that pulls ethernet frames off the queue and sends 1111 * them out. 1112 * 1113 * LOCKING: 1114 * 1115 */ 1116 static void 1117 smsc_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1118 { 1119 struct smsc_softc *sc = usbd_xfer_softc(xfer); 1120 if_t ifp = uether_getifp(&sc->sc_ue); 1121 struct usb_page_cache *pc; 1122 struct mbuf *m; 1123 uint32_t txhdr; 1124 uint32_t frm_len = 0; 1125 int nframes; 1126 1127 switch (USB_GET_STATE(xfer)) { 1128 case USB_ST_TRANSFERRED: 1129 if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE); 1130 /* FALLTHROUGH */ 1131 1132 case USB_ST_SETUP: 1133 tr_setup: 1134 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0 || 1135 (if_getdrvflags(ifp) & IFF_DRV_OACTIVE) != 0) { 1136 /* Don't send anything if there is no link or controller is busy. */ 1137 return; 1138 } 1139 1140 for (nframes = 0; nframes < 16 && 1141 !if_sendq_empty(ifp); nframes++) { 1142 m = if_dequeue(ifp); 1143 if (m == NULL) 1144 break; 1145 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1146 nframes); 1147 frm_len = 0; 1148 pc = usbd_xfer_get_frame(xfer, nframes); 1149 1150 /* Each frame is prefixed with two 32-bit values describing the 1151 * length of the packet and buffer. 1152 */ 1153 txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) | 1154 SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG; 1155 txhdr = htole32(txhdr); 1156 usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr)); 1157 1158 txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len); 1159 txhdr = htole32(txhdr); 1160 usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr)); 1161 1162 frm_len += 8; 1163 1164 /* Next copy in the actual packet */ 1165 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len); 1166 frm_len += m->m_pkthdr.len; 1167 1168 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1169 1170 /* If there's a BPF listener, bounce a copy of this frame to him */ 1171 BPF_MTAP(ifp, m); 1172 1173 m_freem(m); 1174 1175 /* Set frame length. */ 1176 usbd_xfer_set_frame_len(xfer, nframes, frm_len); 1177 } 1178 if (nframes != 0) { 1179 usbd_xfer_set_frames(xfer, nframes); 1180 usbd_transfer_submit(xfer); 1181 if_setdrvflagbits(ifp, IFF_DRV_OACTIVE, 0); 1182 } 1183 return; 1184 1185 default: 1186 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1187 if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE); 1188 1189 if (error != USB_ERR_CANCELLED) { 1190 smsc_err_printf(sc, "usb error on tx: %s\n", usbd_errstr(error)); 1191 usbd_xfer_set_stall(xfer); 1192 goto tr_setup; 1193 } 1194 return; 1195 } 1196 } 1197 1198 /** 1199 * smsc_tick - Called periodically to monitor the state of the LAN95xx chip 1200 * @ue: USB ether interface 1201 * 1202 * Simply calls the mii status functions to check the state of the link. 1203 * 1204 * LOCKING: 1205 * Should be called with the SMSC lock held. 1206 */ 1207 static void 1208 smsc_tick(struct usb_ether *ue) 1209 { 1210 struct smsc_softc *sc = uether_getsc(ue); 1211 struct mii_data *mii = uether_getmii(&sc->sc_ue); 1212 1213 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1214 1215 mii_tick(mii); 1216 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) { 1217 smsc_miibus_statchg(ue->ue_dev); 1218 if ((sc->sc_flags & SMSC_FLAG_LINK) != 0) 1219 smsc_start(ue); 1220 } 1221 } 1222 1223 /** 1224 * smsc_start - Starts communication with the LAN95xx chip 1225 * @ue: USB ether interface 1226 * 1227 * 1228 * 1229 */ 1230 static void 1231 smsc_start(struct usb_ether *ue) 1232 { 1233 struct smsc_softc *sc = uether_getsc(ue); 1234 1235 /* 1236 * start the USB transfers, if not already started: 1237 */ 1238 usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_RD]); 1239 usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_WR]); 1240 } 1241 1242 /** 1243 * smsc_stop - Stops communication with the LAN95xx chip 1244 * @ue: USB ether interface 1245 * 1246 * 1247 * 1248 */ 1249 static void 1250 smsc_stop(struct usb_ether *ue) 1251 { 1252 struct smsc_softc *sc = uether_getsc(ue); 1253 if_t ifp = uether_getifp(ue); 1254 1255 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1256 1257 if_setdrvflagbits(ifp, 0, (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)); 1258 sc->sc_flags &= ~SMSC_FLAG_LINK; 1259 1260 /* 1261 * stop all the transfers, if not already stopped: 1262 */ 1263 usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_WR]); 1264 usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_RD]); 1265 } 1266 1267 /** 1268 * smsc_phy_init - Initialises the in-built SMSC phy 1269 * @sc: driver soft context 1270 * 1271 * Resets the PHY part of the chip and then initialises it to default 1272 * values. The 'link down' and 'auto-negotiation complete' interrupts 1273 * from the PHY are also enabled, however we don't monitor the interrupt 1274 * endpoints for the moment. 1275 * 1276 * RETURNS: 1277 * Returns 0 on success or EIO if failed to reset the PHY. 1278 */ 1279 static int 1280 smsc_phy_init(struct smsc_softc *sc) 1281 { 1282 int bmcr; 1283 usb_ticks_t start_ticks; 1284 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 1285 1286 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1287 1288 /* Reset phy and wait for reset to complete */ 1289 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, BMCR_RESET); 1290 1291 start_ticks = ticks; 1292 do { 1293 uether_pause(&sc->sc_ue, hz / 100); 1294 bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 1295 } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks)); 1296 1297 if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) { 1298 smsc_err_printf(sc, "PHY reset timed-out"); 1299 return (EIO); 1300 } 1301 1302 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR, 1303 ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD | /* all modes */ 1304 ANAR_CSMA | 1305 ANAR_FC | 1306 ANAR_PAUSE_ASYM); 1307 1308 /* Setup the phy to interrupt when the link goes down or autoneg completes */ 1309 smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_STAT); 1310 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_MASK, 1311 (SMSC_PHY_INTR_ANEG_COMP | SMSC_PHY_INTR_LINK_DOWN)); 1312 1313 /* Restart auto-negotiation */ 1314 bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 1315 bmcr |= BMCR_STARTNEG; 1316 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr); 1317 1318 return (0); 1319 } 1320 1321 /** 1322 * smsc_chip_init - Initialises the chip after power on 1323 * @sc: driver soft context 1324 * 1325 * This initialisation sequence is modelled on the procedure in the Linux 1326 * driver. 1327 * 1328 * RETURNS: 1329 * Returns 0 on success or an error code on failure. 1330 */ 1331 static int 1332 smsc_chip_init(struct smsc_softc *sc) 1333 { 1334 int err; 1335 int locked; 1336 uint32_t reg_val; 1337 int burst_cap; 1338 1339 locked = mtx_owned(&sc->sc_mtx); 1340 if (!locked) 1341 SMSC_LOCK(sc); 1342 1343 /* Enter H/W config mode */ 1344 smsc_write_reg(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST); 1345 1346 if ((err = smsc_wait_for_bits(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST)) != 0) { 1347 smsc_warn_printf(sc, "timed-out waiting for reset to complete\n"); 1348 goto init_failed; 1349 } 1350 1351 /* Reset the PHY */ 1352 smsc_write_reg(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST); 1353 1354 if ((err = smsc_wait_for_bits(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST)) != 0) { 1355 smsc_warn_printf(sc, "timed-out waiting for phy reset to complete\n"); 1356 goto init_failed; 1357 } 1358 1359 /* Set the mac address */ 1360 if ((err = smsc_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) { 1361 smsc_warn_printf(sc, "failed to set the MAC address\n"); 1362 goto init_failed; 1363 } 1364 1365 /* Don't know what the HW_CFG_BIR bit is, but following the reset sequence 1366 * as used in the Linux driver. 1367 */ 1368 if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) != 0) { 1369 smsc_warn_printf(sc, "failed to read HW_CFG: %d\n", err); 1370 goto init_failed; 1371 } 1372 reg_val |= SMSC_HW_CFG_BIR; 1373 smsc_write_reg(sc, SMSC_HW_CFG, reg_val); 1374 1375 /* There is a so called 'turbo mode' that the linux driver supports, it 1376 * seems to allow you to jam multiple frames per Rx transaction. By default 1377 * this driver supports that and therefore allows multiple frames per URB. 1378 * 1379 * The xfer buffer size needs to reflect this as well, therefore based on 1380 * the calculations in the Linux driver the RX bufsize is set to 18944, 1381 * bufsz = (16 * 1024 + 5 * 512) 1382 * 1383 * Burst capability is the number of URBs that can be in a burst of data/ 1384 * ethernet frames. 1385 */ 1386 if (!smsc_rx_packet_batching) 1387 burst_cap = 0; 1388 else if (usbd_get_speed(sc->sc_ue.ue_udev) == USB_SPEED_HIGH) 1389 burst_cap = 37; 1390 else 1391 burst_cap = 128; 1392 1393 smsc_write_reg(sc, SMSC_BURST_CAP, burst_cap); 1394 1395 /* Set the default bulk in delay (magic value from Linux driver) */ 1396 smsc_write_reg(sc, SMSC_BULK_IN_DLY, 0x00002000); 1397 1398 /* 1399 * Initialise the RX interface 1400 */ 1401 if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) < 0) { 1402 smsc_warn_printf(sc, "failed to read HW_CFG: (err = %d)\n", err); 1403 goto init_failed; 1404 } 1405 1406 /* Adjust the packet offset in the buffer (designed to try and align IP 1407 * header on 4 byte boundary) 1408 */ 1409 reg_val &= ~SMSC_HW_CFG_RXDOFF; 1410 reg_val |= (ETHER_ALIGN << 9) & SMSC_HW_CFG_RXDOFF; 1411 1412 /* The following settings are used for 'turbo mode', a.k.a multiple frames 1413 * per Rx transaction (again info taken form Linux driver). 1414 */ 1415 if (smsc_rx_packet_batching) 1416 reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE); 1417 1418 smsc_write_reg(sc, SMSC_HW_CFG, reg_val); 1419 1420 /* Clear the status register ? */ 1421 smsc_write_reg(sc, SMSC_INTR_STATUS, 0xffffffff); 1422 1423 /* Read and display the revision register */ 1424 if ((err = smsc_read_reg(sc, SMSC_ID_REV, &sc->sc_rev_id)) < 0) { 1425 smsc_warn_printf(sc, "failed to read ID_REV (err = %d)\n", err); 1426 goto init_failed; 1427 } 1428 1429 device_printf(sc->sc_ue.ue_dev, "chip 0x%04lx, rev. %04lx\n", 1430 (sc->sc_rev_id & SMSC_ID_REV_CHIP_ID_MASK) >> 16, 1431 (sc->sc_rev_id & SMSC_ID_REV_CHIP_REV_MASK)); 1432 1433 /* GPIO/LED setup */ 1434 reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED | 1435 SMSC_LED_GPIO_CFG_FDX_LED; 1436 smsc_write_reg(sc, SMSC_LED_GPIO_CFG, reg_val); 1437 1438 /* 1439 * Initialise the TX interface 1440 */ 1441 smsc_write_reg(sc, SMSC_FLOW, 0); 1442 1443 smsc_write_reg(sc, SMSC_AFC_CFG, AFC_CFG_DEFAULT); 1444 1445 /* Read the current MAC configuration */ 1446 if ((err = smsc_read_reg(sc, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) { 1447 smsc_warn_printf(sc, "failed to read MAC_CSR (err=%d)\n", err); 1448 goto init_failed; 1449 } 1450 1451 /* Vlan */ 1452 smsc_write_reg(sc, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN); 1453 1454 /* 1455 * Initialise the PHY 1456 */ 1457 if ((err = smsc_phy_init(sc)) != 0) 1458 goto init_failed; 1459 1460 /* 1461 * Start TX 1462 */ 1463 sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN; 1464 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 1465 smsc_write_reg(sc, SMSC_TX_CFG, SMSC_TX_CFG_ON); 1466 1467 /* 1468 * Start RX 1469 */ 1470 sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN; 1471 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 1472 1473 if (!locked) 1474 SMSC_UNLOCK(sc); 1475 1476 return (0); 1477 1478 init_failed: 1479 if (!locked) 1480 SMSC_UNLOCK(sc); 1481 1482 smsc_err_printf(sc, "smsc_chip_init failed (err=%d)\n", err); 1483 return (err); 1484 } 1485 1486 /** 1487 * smsc_ioctl - ioctl function for the device 1488 * @ifp: interface pointer 1489 * @cmd: the ioctl command 1490 * @data: data passed in the ioctl call, typically a pointer to struct ifreq. 1491 * 1492 * The ioctl routine is overridden to detect change requests for the H/W 1493 * checksum capabilities. 1494 * 1495 * RETURNS: 1496 * 0 on success and an error code on failure. 1497 */ 1498 static int 1499 smsc_ioctl(if_t ifp, u_long cmd, caddr_t data) 1500 { 1501 struct usb_ether *ue = if_getsoftc(ifp); 1502 struct smsc_softc *sc; 1503 struct ifreq *ifr; 1504 int rc; 1505 int mask; 1506 int reinit; 1507 1508 if (cmd == SIOCSIFCAP) { 1509 sc = uether_getsc(ue); 1510 ifr = (struct ifreq *)data; 1511 1512 SMSC_LOCK(sc); 1513 1514 rc = 0; 1515 reinit = 0; 1516 1517 mask = ifr->ifr_reqcap ^ if_getcapenable(ifp); 1518 1519 /* Modify the RX CSUM enable bits */ 1520 if ((mask & IFCAP_RXCSUM) != 0 && 1521 (if_getcapabilities(ifp) & IFCAP_RXCSUM) != 0) { 1522 if_togglecapenable(ifp, IFCAP_RXCSUM); 1523 1524 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) { 1525 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); 1526 reinit = 1; 1527 } 1528 } 1529 1530 SMSC_UNLOCK(sc); 1531 if (reinit) 1532 uether_init(ue); 1533 1534 } else { 1535 rc = uether_ioctl(ifp, cmd, data); 1536 } 1537 1538 return (rc); 1539 } 1540 1541 /** 1542 * smsc_attach_post - Called after the driver attached to the USB interface 1543 * @ue: the USB ethernet device 1544 * 1545 * This is where the chip is intialised for the first time. This is different 1546 * from the smsc_init() function in that that one is designed to setup the 1547 * H/W to match the UE settings and can be called after a reset. 1548 * 1549 * 1550 */ 1551 static void 1552 smsc_attach_post(struct usb_ether *ue) 1553 { 1554 struct smsc_softc *sc = uether_getsc(ue); 1555 uint32_t mac_h, mac_l; 1556 int err; 1557 1558 smsc_dbg_printf(sc, "smsc_attach_post\n"); 1559 1560 /* Setup some of the basics */ 1561 sc->sc_phyno = 1; 1562 1563 /* Attempt to get the mac address, if an EEPROM is not attached this 1564 * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC 1565 * address based on urandom. 1566 */ 1567 memset(sc->sc_ue.ue_eaddr, 0xff, ETHER_ADDR_LEN); 1568 1569 /* Check if there is already a MAC address in the register */ 1570 if ((smsc_read_reg(sc, SMSC_MAC_ADDRL, &mac_l) == 0) && 1571 (smsc_read_reg(sc, SMSC_MAC_ADDRH, &mac_h) == 0)) { 1572 sc->sc_ue.ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff); 1573 sc->sc_ue.ue_eaddr[4] = (uint8_t)((mac_h) & 0xff); 1574 sc->sc_ue.ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff); 1575 sc->sc_ue.ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff); 1576 sc->sc_ue.ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff); 1577 sc->sc_ue.ue_eaddr[0] = (uint8_t)((mac_l) & 0xff); 1578 } 1579 1580 /* MAC address is not set so try to read from EEPROM, if that fails generate 1581 * a random MAC address. 1582 */ 1583 if (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) { 1584 err = smsc_eeprom_read(sc, 0x01, sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN); 1585 #ifdef FDT 1586 if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) 1587 err = usb_fdt_get_mac_addr(sc->sc_ue.ue_dev, &sc->sc_ue); 1588 #endif 1589 if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) { 1590 read_random(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN); 1591 sc->sc_ue.ue_eaddr[0] &= ~0x01; /* unicast */ 1592 sc->sc_ue.ue_eaddr[0] |= 0x02; /* locally administered */ 1593 } 1594 } 1595 1596 /* Initialise the chip for the first time */ 1597 smsc_chip_init(sc); 1598 } 1599 1600 /** 1601 * smsc_attach_post_sub - Called after the driver attached to the USB interface 1602 * @ue: the USB ethernet device 1603 * 1604 * Most of this is boilerplate code and copied from the base USB ethernet 1605 * driver. It has been overridden so that we can indicate to the system that 1606 * the chip supports H/W checksumming. 1607 * 1608 * RETURNS: 1609 * Returns 0 on success or a negative error code. 1610 */ 1611 static int 1612 smsc_attach_post_sub(struct usb_ether *ue) 1613 { 1614 struct smsc_softc *sc; 1615 if_t ifp; 1616 int error; 1617 1618 sc = uether_getsc(ue); 1619 ifp = ue->ue_ifp; 1620 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST); 1621 if_setstartfn(ifp, uether_start); 1622 if_setioctlfn(ifp, smsc_ioctl); 1623 if_setinitfn(ifp, uether_init); 1624 if_setsendqlen(ifp, ifqmaxlen); 1625 if_setsendqready(ifp); 1626 1627 /* The chip supports TCP/UDP checksum offloading on TX and RX paths, however 1628 * currently only RX checksum is supported in the driver (see top of file). 1629 */ 1630 if_setcapabilitiesbit(ifp, IFCAP_RXCSUM | IFCAP_VLAN_MTU, 0); 1631 if_sethwassist(ifp, 0); 1632 1633 /* TX checksuming is disabled (for now?) 1634 if_setcapabilitiesbit(ifp, IFCAP_TXCSUM, 0); 1635 if_setcapenablebit(ifp, IFCAP_TXCSUM, 0); 1636 if_sethwassist(ifp, CSUM_TCP | CSUM_UDP); 1637 */ 1638 1639 if_setcapenable(ifp, if_getcapabilities(ifp)); 1640 1641 bus_topo_lock(); 1642 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, 1643 uether_ifmedia_upd, ue->ue_methods->ue_mii_sts, 1644 BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0); 1645 bus_topo_unlock(); 1646 1647 return (error); 1648 } 1649 1650 /** 1651 * smsc_probe - Probe the interface. 1652 * @dev: smsc device handle 1653 * 1654 * Checks if the device is a match for this driver. 1655 * 1656 * RETURNS: 1657 * Returns 0 on success or an error code on failure. 1658 */ 1659 static int 1660 smsc_probe(device_t dev) 1661 { 1662 struct usb_attach_arg *uaa = device_get_ivars(dev); 1663 1664 if (uaa->usb_mode != USB_MODE_HOST) 1665 return (ENXIO); 1666 if (uaa->info.bConfigIndex != SMSC_CONFIG_INDEX) 1667 return (ENXIO); 1668 if (uaa->info.bIfaceIndex != SMSC_IFACE_IDX) 1669 return (ENXIO); 1670 1671 return (usbd_lookup_id_by_uaa(smsc_devs, sizeof(smsc_devs), uaa)); 1672 } 1673 1674 /** 1675 * smsc_attach - Attach the interface. 1676 * @dev: smsc device handle 1677 * 1678 * Allocate softc structures, do ifmedia setup and ethernet/BPF attach. 1679 * 1680 * RETURNS: 1681 * Returns 0 on success or a negative error code. 1682 */ 1683 static int 1684 smsc_attach(device_t dev) 1685 { 1686 struct usb_attach_arg *uaa = device_get_ivars(dev); 1687 struct smsc_softc *sc = device_get_softc(dev); 1688 struct usb_ether *ue = &sc->sc_ue; 1689 uint8_t iface_index; 1690 int err; 1691 1692 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 1693 1694 device_set_usb_desc(dev); 1695 1696 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1697 1698 /* Setup the endpoints for the SMSC LAN95xx device(s) */ 1699 iface_index = SMSC_IFACE_IDX; 1700 err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 1701 smsc_config, SMSC_N_TRANSFER, sc, &sc->sc_mtx); 1702 if (err) { 1703 device_printf(dev, "error: allocating USB transfers failed\n"); 1704 goto detach; 1705 } 1706 1707 ue->ue_sc = sc; 1708 ue->ue_dev = dev; 1709 ue->ue_udev = uaa->device; 1710 ue->ue_mtx = &sc->sc_mtx; 1711 ue->ue_methods = &smsc_ue_methods; 1712 1713 err = uether_ifattach(ue); 1714 if (err) { 1715 device_printf(dev, "error: could not attach interface\n"); 1716 goto detach; 1717 } 1718 return (0); /* success */ 1719 1720 detach: 1721 smsc_detach(dev); 1722 return (ENXIO); /* failure */ 1723 } 1724 1725 /** 1726 * smsc_detach - Detach the interface. 1727 * @dev: smsc device handle 1728 * 1729 * RETURNS: 1730 * Returns 0. 1731 */ 1732 static int 1733 smsc_detach(device_t dev) 1734 { 1735 struct smsc_softc *sc = device_get_softc(dev); 1736 struct usb_ether *ue = &sc->sc_ue; 1737 1738 usbd_transfer_unsetup(sc->sc_xfer, SMSC_N_TRANSFER); 1739 uether_ifdetach(ue); 1740 mtx_destroy(&sc->sc_mtx); 1741 1742 return (0); 1743 } 1744 1745 static device_method_t smsc_methods[] = { 1746 /* Device interface */ 1747 DEVMETHOD(device_probe, smsc_probe), 1748 DEVMETHOD(device_attach, smsc_attach), 1749 DEVMETHOD(device_detach, smsc_detach), 1750 1751 /* bus interface */ 1752 DEVMETHOD(bus_print_child, bus_generic_print_child), 1753 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 1754 1755 /* MII interface */ 1756 DEVMETHOD(miibus_readreg, smsc_miibus_readreg), 1757 DEVMETHOD(miibus_writereg, smsc_miibus_writereg), 1758 DEVMETHOD(miibus_statchg, smsc_miibus_statchg), 1759 1760 DEVMETHOD_END 1761 }; 1762 1763 static driver_t smsc_driver = { 1764 .name = "smsc", 1765 .methods = smsc_methods, 1766 .size = sizeof(struct smsc_softc), 1767 }; 1768 1769 DRIVER_MODULE(smsc, uhub, smsc_driver, NULL, NULL); 1770 DRIVER_MODULE(miibus, smsc, miibus_driver, 0, 0); 1771 MODULE_DEPEND(smsc, uether, 1, 1, 1); 1772 MODULE_DEPEND(smsc, usb, 1, 1, 1); 1773 MODULE_DEPEND(smsc, ether, 1, 1, 1); 1774 MODULE_DEPEND(smsc, miibus, 1, 1, 1); 1775 MODULE_VERSION(smsc, 1); 1776 USB_PNP_HOST_INFO(smsc_devs); 1777