1 /* 2 3 Broadcom B43 wireless driver 4 5 N-PHY core code. 6 7 Copyright (c) 2008 Michael Buesch <m@bues.ch> 8 Copyright (c) 2010 Rafał Miłecki <zajec5@gmail.com> 9 Copyright (c) 2016 Adrian Chadd <adrian@FreeBSD.org> 10 11 This program is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 2 of the License, or 14 (at your option) any later version. 15 16 This program is distributed in the hope that it will be useful, 17 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 GNU General Public License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; see the file COPYING. If not, write to 23 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, 24 Boston, MA 02110-1301, USA. 25 26 */ 27 28 /* 29 * $FreeBSD$ 30 */ 31 32 #ifndef __IF_BWN_PHY_N_CORE_H__ 33 #define __IF_BWN_PHY_N_CORE_H__ 34 35 struct bwn_mac; 36 37 enum b43_nphy_spur_avoid { 38 BWN_SPUR_AVOID_DISABLE, 39 BWN_SPUR_AVOID_AUTO, 40 BWN_SPUR_AVOID_FORCE, 41 }; 42 43 /* 44 * TODO: determine whether center_freq is the primary 45 * channel centre frequency or the actual centre centre 46 * frequency (eg radio tuning.) It /looks/ like it's 47 * actual channel centre. 48 */ 49 struct bwn_chanspec { 50 uint16_t center_freq; 51 /* This is HT40U, HT40D, HT20, no-HT 20, etc */ 52 bwn_chan_type_t channel_type; 53 }; 54 55 struct bwn_phy_n_iq_comp { 56 int16_t a0; 57 int16_t b0; 58 int16_t a1; 59 int16_t b1; 60 }; 61 62 struct bwn_phy_n_rssical_cache { 63 uint16_t rssical_radio_regs_2G[2]; 64 uint16_t rssical_phy_regs_2G[12]; 65 66 uint16_t rssical_radio_regs_5G[2]; 67 uint16_t rssical_phy_regs_5G[12]; 68 }; 69 70 struct bwn_phy_n_cal_cache { 71 uint16_t txcal_radio_regs_2G[8]; 72 uint16_t txcal_coeffs_2G[8]; 73 struct bwn_phy_n_iq_comp rxcal_coeffs_2G; 74 75 uint16_t txcal_radio_regs_5G[8]; 76 uint16_t txcal_coeffs_5G[8]; 77 struct bwn_phy_n_iq_comp rxcal_coeffs_5G; 78 }; 79 80 struct bwn_phy_n_txpwrindex { 81 int8_t index; 82 int8_t index_internal; 83 int8_t index_internal_save; 84 uint16_t AfectrlOverride; 85 uint16_t AfeCtrlDacGain; 86 uint16_t rad_gain; 87 uint8_t bbmult; 88 uint16_t iqcomp_a; 89 uint16_t iqcomp_b; 90 uint16_t locomp; 91 }; 92 93 struct bwn_phy_n_pwr_ctl_info { 94 uint8_t idle_tssi_2g; 95 uint8_t idle_tssi_5g; 96 }; 97 98 struct bwn_phy_n { 99 uint8_t antsel_type; 100 uint8_t cal_orig_pwr_idx[2]; 101 uint8_t measure_hold; 102 uint8_t phyrxchain; 103 uint8_t hw_phyrxchain; 104 uint8_t hw_phytxchain; 105 uint8_t perical; 106 uint32_t deaf_count; 107 uint32_t rxcalparams; 108 bool hang_avoid; 109 bool mute; 110 uint16_t papd_epsilon_offset[2]; 111 int32_t preamble_override; 112 uint32_t bb_mult_save; 113 114 bool gain_boost; 115 bool elna_gain_config; 116 bool band5g_pwrgain; 117 bool use_int_tx_iq_lo_cal; 118 bool lpf_bw_overrode_for_sample_play; 119 120 uint8_t mphase_cal_phase_id; 121 uint16_t mphase_txcal_cmdidx; 122 uint16_t mphase_txcal_numcmds; 123 uint16_t mphase_txcal_bestcoeffs[11]; 124 125 bool txpwrctrl; 126 bool pwg_gain_5ghz; 127 uint8_t tx_pwr_idx[2]; 128 int8_t tx_power_offset[101]; 129 uint16_t adj_pwr_tbl[84]; 130 uint16_t txcal_bbmult; 131 uint16_t txiqlocal_bestc[11]; 132 bool txiqlocal_coeffsvalid; 133 struct bwn_phy_n_txpwrindex txpwrindex[2]; 134 struct bwn_phy_n_pwr_ctl_info pwr_ctl_info[2]; 135 struct bwn_chanspec txiqlocal_chanspec; 136 struct bwn_ppr tx_pwr_max_ppr; 137 uint16_t tx_pwr_last_recalc_freq; 138 int tx_pwr_last_recalc_limit; 139 uint8_t tsspos_2g; 140 141 uint8_t txrx_chain; 142 uint16_t tx_rx_cal_phy_saveregs[11]; 143 uint16_t tx_rx_cal_radio_saveregs[22]; 144 145 uint16_t rfctrl_intc1_save; 146 uint16_t rfctrl_intc2_save; 147 148 uint16_t classifier_state; 149 uint16_t clip_state[2]; 150 151 enum b43_nphy_spur_avoid spur_avoid; 152 bool aband_spurwar_en; 153 bool gband_spurwar_en; 154 155 bool ipa2g_on; 156 struct bwn_chanspec iqcal_chanspec_2G; 157 struct bwn_chanspec rssical_chanspec_2G; 158 159 bool ipa5g_on; 160 struct bwn_chanspec iqcal_chanspec_5G; 161 struct bwn_chanspec rssical_chanspec_5G; 162 163 struct bwn_phy_n_rssical_cache rssical_cache; 164 struct bwn_phy_n_cal_cache cal_cache; 165 bool crsminpwr_adjusted; 166 bool noisevars_adjusted; 167 }; 168 169 extern bwn_txpwr_result_t bwn_nphy_op_recalc_txpower(struct bwn_mac *mac, bool ignore_tssi); 170 extern int bwn_nphy_op_allocate(struct bwn_mac *mac); 171 extern int bwn_nphy_op_prepare_structs(struct bwn_mac *mac); 172 extern void bwn_nphy_op_free(struct bwn_mac *mac); 173 extern int bwn_nphy_op_init(struct bwn_mac *mac); 174 extern void bwn_nphy_op_maskset(struct bwn_mac *mac, uint16_t reg, uint16_t mask, uint16_t set); 175 extern uint16_t bwn_nphy_op_radio_read(struct bwn_mac *mac, uint16_t reg); 176 extern void bwn_nphy_op_radio_write(struct bwn_mac *mac, uint16_t reg, uint16_t value); 177 extern void bwn_nphy_op_software_rfkill(struct bwn_mac *mac, bool blocked); 178 extern void bwn_nphy_op_switch_analog(struct bwn_mac *mac, bool on); 179 extern int bwn_nphy_op_switch_channel(struct bwn_mac *mac, unsigned int new_channel); 180 extern unsigned int bwn_nphy_op_get_default_chan(struct bwn_mac *mac); 181 182 #endif /* __IF_BWN_PHY_N_CORE_H__ */ 183