1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 2018 The FreeBSD Foundation 5 * Copyright (c) 1992 Terrence R. Lambert. 6 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to Berkeley by 10 * William Jolitz. 11 * 12 * Portions of this software were developed by A. Joseph Koshy under 13 * sponsorship from the FreeBSD Foundation and Google, Inc. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 44 */ 45 46 #include <sys/cdefs.h> 47 __FBSDID("$FreeBSD$"); 48 49 #include "opt_apic.h" 50 #include "opt_atpic.h" 51 #include "opt_cpu.h" 52 #include "opt_ddb.h" 53 #include "opt_inet.h" 54 #include "opt_isa.h" 55 #include "opt_kstack_pages.h" 56 #include "opt_maxmem.h" 57 #include "opt_perfmon.h" 58 #include "opt_platform.h" 59 60 #include <sys/param.h> 61 #include <sys/proc.h> 62 #include <sys/systm.h> 63 #include <sys/bio.h> 64 #include <sys/buf.h> 65 #include <sys/bus.h> 66 #include <sys/callout.h> 67 #include <sys/cons.h> 68 #include <sys/cpu.h> 69 #include <sys/eventhandler.h> 70 #include <sys/exec.h> 71 #include <sys/imgact.h> 72 #include <sys/kdb.h> 73 #include <sys/kernel.h> 74 #include <sys/ktr.h> 75 #include <sys/linker.h> 76 #include <sys/lock.h> 77 #include <sys/malloc.h> 78 #include <sys/memrange.h> 79 #include <sys/msgbuf.h> 80 #include <sys/mutex.h> 81 #include <sys/pcpu.h> 82 #include <sys/ptrace.h> 83 #include <sys/reboot.h> 84 #include <sys/reg.h> 85 #include <sys/rwlock.h> 86 #include <sys/sched.h> 87 #include <sys/signalvar.h> 88 #include <sys/smp.h> 89 #include <sys/syscallsubr.h> 90 #include <sys/sysctl.h> 91 #include <sys/sysent.h> 92 #include <sys/sysproto.h> 93 #include <sys/ucontext.h> 94 #include <sys/vmmeter.h> 95 96 #include <vm/vm.h> 97 #include <vm/vm_param.h> 98 #include <vm/vm_extern.h> 99 #include <vm/vm_kern.h> 100 #include <vm/vm_page.h> 101 #include <vm/vm_map.h> 102 #include <vm/vm_object.h> 103 #include <vm/vm_pager.h> 104 #include <vm/vm_phys.h> 105 #include <vm/vm_dumpset.h> 106 107 #ifdef DDB 108 #ifndef KDB 109 #error KDB must be enabled in order for DDB to work! 110 #endif 111 #include <ddb/ddb.h> 112 #include <ddb/db_sym.h> 113 #endif 114 115 #include <isa/rtc.h> 116 117 #include <net/netisr.h> 118 119 #include <dev/smbios/smbios.h> 120 121 #include <machine/bootinfo.h> 122 #include <machine/clock.h> 123 #include <machine/cpu.h> 124 #include <machine/cputypes.h> 125 #include <machine/intr_machdep.h> 126 #include <x86/mca.h> 127 #include <machine/md_var.h> 128 #include <machine/metadata.h> 129 #include <machine/pc/bios.h> 130 #include <machine/pcb.h> 131 #include <machine/pcb_ext.h> 132 #include <machine/proc.h> 133 #include <machine/sigframe.h> 134 #include <machine/specialreg.h> 135 #include <machine/sysarch.h> 136 #include <machine/trap.h> 137 #include <x86/ucode.h> 138 #include <machine/vm86.h> 139 #include <x86/init.h> 140 #ifdef PERFMON 141 #include <machine/perfmon.h> 142 #endif 143 #ifdef SMP 144 #include <machine/smp.h> 145 #endif 146 #ifdef FDT 147 #include <x86/fdt.h> 148 #endif 149 150 #ifdef DEV_APIC 151 #include <x86/apicvar.h> 152 #endif 153 154 #ifdef DEV_ISA 155 #include <x86/isa/icu.h> 156 #endif 157 158 /* Sanity check for __curthread() */ 159 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 160 161 register_t init386(int first); 162 void dblfault_handler(void); 163 void identify_cpu(void); 164 165 static void cpu_startup(void *); 166 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 167 168 /* Intel ICH registers */ 169 #define ICH_PMBASE 0x400 170 #define ICH_SMI_EN ICH_PMBASE + 0x30 171 172 int _udatasel, _ucodesel; 173 u_int basemem; 174 static int above4g_allow = 1; 175 static int above24g_allow = 0; 176 177 int cold = 1; 178 179 long Maxmem = 0; 180 long realmem = 0; 181 int late_console = 1; 182 183 #ifdef PAE 184 FEATURE(pae, "Physical Address Extensions"); 185 #endif 186 187 struct kva_md_info kmi; 188 189 static struct trapframe proc0_tf; 190 struct pcpu __pcpu[MAXCPU]; 191 192 static void i386_clock_source_init(void); 193 194 struct mtx icu_lock; 195 196 struct mem_range_softc mem_range_softc; 197 198 extern char start_exceptions[], end_exceptions[]; 199 200 extern struct sysentvec elf32_freebsd_sysvec; 201 202 /* Default init_ops implementation. */ 203 struct init_ops init_ops = { 204 .early_clock_source_init = i386_clock_source_init, 205 .early_delay = i8254_delay, 206 }; 207 208 static void 209 i386_clock_source_init(void) 210 { 211 i8254_init(); 212 } 213 214 static void 215 cpu_startup(void *dummy) 216 { 217 uintmax_t memsize; 218 char *sysenv; 219 220 /* 221 * On MacBooks, we need to disallow the legacy USB circuit to 222 * generate an SMI# because this can cause several problems, 223 * namely: incorrect CPU frequency detection and failure to 224 * start the APs. 225 * We do this by disabling a bit in the SMI_EN (SMI Control and 226 * Enable register) of the Intel ICH LPC Interface Bridge. 227 */ 228 sysenv = kern_getenv("smbios.system.product"); 229 if (sysenv != NULL) { 230 if (strncmp(sysenv, "MacBook1,1", 10) == 0 || 231 strncmp(sysenv, "MacBook3,1", 10) == 0 || 232 strncmp(sysenv, "MacBook4,1", 10) == 0 || 233 strncmp(sysenv, "MacBookPro1,1", 13) == 0 || 234 strncmp(sysenv, "MacBookPro1,2", 13) == 0 || 235 strncmp(sysenv, "MacBookPro3,1", 13) == 0 || 236 strncmp(sysenv, "MacBookPro4,1", 13) == 0 || 237 strncmp(sysenv, "Macmini1,1", 10) == 0) { 238 if (bootverbose) 239 printf("Disabling LEGACY_USB_EN bit on " 240 "Intel ICH.\n"); 241 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8); 242 } 243 freeenv(sysenv); 244 } 245 246 /* 247 * Good {morning,afternoon,evening,night}. 248 */ 249 startrtclock(); 250 printcpuinfo(); 251 panicifcpuunsupported(); 252 #ifdef PERFMON 253 perfmon_init(); 254 #endif 255 256 /* 257 * Display physical memory if SMBIOS reports reasonable amount. 258 */ 259 memsize = 0; 260 sysenv = kern_getenv("smbios.memory.enabled"); 261 if (sysenv != NULL) { 262 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10; 263 freeenv(sysenv); 264 } 265 if (memsize < ptoa((uintmax_t)vm_free_count())) 266 memsize = ptoa((uintmax_t)Maxmem); 267 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20); 268 realmem = atop(memsize); 269 270 /* 271 * Display any holes after the first chunk of extended memory. 272 */ 273 if (bootverbose) { 274 int indx; 275 276 printf("Physical memory chunk(s):\n"); 277 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 278 vm_paddr_t size; 279 280 size = phys_avail[indx + 1] - phys_avail[indx]; 281 printf( 282 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 283 (uintmax_t)phys_avail[indx], 284 (uintmax_t)phys_avail[indx + 1] - 1, 285 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 286 } 287 } 288 289 vm_ksubmap_init(&kmi); 290 291 printf("avail memory = %ju (%ju MB)\n", 292 ptoa((uintmax_t)vm_free_count()), 293 ptoa((uintmax_t)vm_free_count()) / 1048576); 294 295 /* 296 * Set up buffers, so they can be used to read disk labels. 297 */ 298 bufinit(); 299 vm_pager_bufferinit(); 300 cpu_setregs(); 301 } 302 303 void 304 cpu_setregs(void) 305 { 306 unsigned int cr0; 307 308 cr0 = rcr0(); 309 310 /* 311 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support: 312 * 313 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 314 * instructions. We must set the CR0_MP bit and use the CR0_TS 315 * bit to control the trap, because setting the CR0_EM bit does 316 * not cause WAIT instructions to trap. It's important to trap 317 * WAIT instructions - otherwise the "wait" variants of no-wait 318 * control instructions would degenerate to the "no-wait" variants 319 * after FP context switches but work correctly otherwise. It's 320 * particularly important to trap WAITs when there is no NPX - 321 * otherwise the "wait" variants would always degenerate. 322 * 323 * Try setting CR0_NE to get correct error reporting on 486DX's. 324 * Setting it should fail or do nothing on lesser processors. 325 */ 326 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 327 load_cr0(cr0); 328 load_gs(_udatasel); 329 } 330 331 u_long bootdev; /* not a struct cdev *- encoding is different */ 332 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 333 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)"); 334 335 /* 336 * Initialize 386 and configure to run kernel 337 */ 338 339 /* 340 * Initialize segments & interrupt table 341 */ 342 343 int _default_ldt; 344 345 struct mtx dt_lock; /* lock for GDT and LDT */ 346 347 union descriptor gdt0[NGDT]; /* initial global descriptor table */ 348 union descriptor *gdt = gdt0; /* global descriptor table */ 349 350 union descriptor *ldt; /* local descriptor table */ 351 352 static struct gate_descriptor idt0[NIDT]; 353 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 354 355 static struct i386tss *dblfault_tss; 356 static char *dblfault_stack; 357 358 static struct i386tss common_tss0; 359 360 vm_offset_t proc0kstack; 361 362 /* 363 * software prototypes -- in more palatable form. 364 * 365 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret 366 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it) 367 */ 368 struct soft_segment_descriptor gdt_segs[] = { 369 /* GNULL_SEL 0 Null Descriptor */ 370 { .ssd_base = 0x0, 371 .ssd_limit = 0x0, 372 .ssd_type = 0, 373 .ssd_dpl = SEL_KPL, 374 .ssd_p = 0, 375 .ssd_xx = 0, .ssd_xx1 = 0, 376 .ssd_def32 = 0, 377 .ssd_gran = 0 }, 378 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */ 379 { .ssd_base = 0x0, 380 .ssd_limit = 0xfffff, 381 .ssd_type = SDT_MEMRWA, 382 .ssd_dpl = SEL_KPL, 383 .ssd_p = 1, 384 .ssd_xx = 0, .ssd_xx1 = 0, 385 .ssd_def32 = 1, 386 .ssd_gran = 1 }, 387 /* GUFS_SEL 2 %fs Descriptor for user */ 388 { .ssd_base = 0x0, 389 .ssd_limit = 0xfffff, 390 .ssd_type = SDT_MEMRWA, 391 .ssd_dpl = SEL_UPL, 392 .ssd_p = 1, 393 .ssd_xx = 0, .ssd_xx1 = 0, 394 .ssd_def32 = 1, 395 .ssd_gran = 1 }, 396 /* GUGS_SEL 3 %gs Descriptor for user */ 397 { .ssd_base = 0x0, 398 .ssd_limit = 0xfffff, 399 .ssd_type = SDT_MEMRWA, 400 .ssd_dpl = SEL_UPL, 401 .ssd_p = 1, 402 .ssd_xx = 0, .ssd_xx1 = 0, 403 .ssd_def32 = 1, 404 .ssd_gran = 1 }, 405 /* GCODE_SEL 4 Code Descriptor for kernel */ 406 { .ssd_base = 0x0, 407 .ssd_limit = 0xfffff, 408 .ssd_type = SDT_MEMERA, 409 .ssd_dpl = SEL_KPL, 410 .ssd_p = 1, 411 .ssd_xx = 0, .ssd_xx1 = 0, 412 .ssd_def32 = 1, 413 .ssd_gran = 1 }, 414 /* GDATA_SEL 5 Data Descriptor for kernel */ 415 { .ssd_base = 0x0, 416 .ssd_limit = 0xfffff, 417 .ssd_type = SDT_MEMRWA, 418 .ssd_dpl = SEL_KPL, 419 .ssd_p = 1, 420 .ssd_xx = 0, .ssd_xx1 = 0, 421 .ssd_def32 = 1, 422 .ssd_gran = 1 }, 423 /* GUCODE_SEL 6 Code Descriptor for user */ 424 { .ssd_base = 0x0, 425 .ssd_limit = 0xfffff, 426 .ssd_type = SDT_MEMERA, 427 .ssd_dpl = SEL_UPL, 428 .ssd_p = 1, 429 .ssd_xx = 0, .ssd_xx1 = 0, 430 .ssd_def32 = 1, 431 .ssd_gran = 1 }, 432 /* GUDATA_SEL 7 Data Descriptor for user */ 433 { .ssd_base = 0x0, 434 .ssd_limit = 0xfffff, 435 .ssd_type = SDT_MEMRWA, 436 .ssd_dpl = SEL_UPL, 437 .ssd_p = 1, 438 .ssd_xx = 0, .ssd_xx1 = 0, 439 .ssd_def32 = 1, 440 .ssd_gran = 1 }, 441 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 442 { .ssd_base = 0x400, 443 .ssd_limit = 0xfffff, 444 .ssd_type = SDT_MEMRWA, 445 .ssd_dpl = SEL_KPL, 446 .ssd_p = 1, 447 .ssd_xx = 0, .ssd_xx1 = 0, 448 .ssd_def32 = 1, 449 .ssd_gran = 1 }, 450 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 451 { 452 .ssd_base = 0x0, 453 .ssd_limit = sizeof(struct i386tss)-1, 454 .ssd_type = SDT_SYS386TSS, 455 .ssd_dpl = 0, 456 .ssd_p = 1, 457 .ssd_xx = 0, .ssd_xx1 = 0, 458 .ssd_def32 = 0, 459 .ssd_gran = 0 }, 460 /* GLDT_SEL 10 LDT Descriptor */ 461 { .ssd_base = 0, 462 .ssd_limit = sizeof(union descriptor) * NLDT - 1, 463 .ssd_type = SDT_SYSLDT, 464 .ssd_dpl = SEL_UPL, 465 .ssd_p = 1, 466 .ssd_xx = 0, .ssd_xx1 = 0, 467 .ssd_def32 = 0, 468 .ssd_gran = 0 }, 469 /* GUSERLDT_SEL 11 User LDT Descriptor per process */ 470 { .ssd_base = 0, 471 .ssd_limit = (512 * sizeof(union descriptor)-1), 472 .ssd_type = SDT_SYSLDT, 473 .ssd_dpl = 0, 474 .ssd_p = 1, 475 .ssd_xx = 0, .ssd_xx1 = 0, 476 .ssd_def32 = 0, 477 .ssd_gran = 0 }, 478 /* GPANIC_SEL 12 Panic Tss Descriptor */ 479 { .ssd_base = 0, 480 .ssd_limit = sizeof(struct i386tss)-1, 481 .ssd_type = SDT_SYS386TSS, 482 .ssd_dpl = 0, 483 .ssd_p = 1, 484 .ssd_xx = 0, .ssd_xx1 = 0, 485 .ssd_def32 = 0, 486 .ssd_gran = 0 }, 487 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */ 488 { .ssd_base = 0, 489 .ssd_limit = 0xfffff, 490 .ssd_type = SDT_MEMERA, 491 .ssd_dpl = 0, 492 .ssd_p = 1, 493 .ssd_xx = 0, .ssd_xx1 = 0, 494 .ssd_def32 = 0, 495 .ssd_gran = 1 }, 496 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */ 497 { .ssd_base = 0, 498 .ssd_limit = 0xfffff, 499 .ssd_type = SDT_MEMERA, 500 .ssd_dpl = 0, 501 .ssd_p = 1, 502 .ssd_xx = 0, .ssd_xx1 = 0, 503 .ssd_def32 = 0, 504 .ssd_gran = 1 }, 505 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */ 506 { .ssd_base = 0, 507 .ssd_limit = 0xfffff, 508 .ssd_type = SDT_MEMRWA, 509 .ssd_dpl = 0, 510 .ssd_p = 1, 511 .ssd_xx = 0, .ssd_xx1 = 0, 512 .ssd_def32 = 1, 513 .ssd_gran = 1 }, 514 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */ 515 { .ssd_base = 0, 516 .ssd_limit = 0xfffff, 517 .ssd_type = SDT_MEMRWA, 518 .ssd_dpl = 0, 519 .ssd_p = 1, 520 .ssd_xx = 0, .ssd_xx1 = 0, 521 .ssd_def32 = 0, 522 .ssd_gran = 1 }, 523 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */ 524 { .ssd_base = 0, 525 .ssd_limit = 0xfffff, 526 .ssd_type = SDT_MEMRWA, 527 .ssd_dpl = 0, 528 .ssd_p = 1, 529 .ssd_xx = 0, .ssd_xx1 = 0, 530 .ssd_def32 = 0, 531 .ssd_gran = 1 }, 532 /* GNDIS_SEL 18 NDIS Descriptor */ 533 { .ssd_base = 0x0, 534 .ssd_limit = 0x0, 535 .ssd_type = 0, 536 .ssd_dpl = 0, 537 .ssd_p = 0, 538 .ssd_xx = 0, .ssd_xx1 = 0, 539 .ssd_def32 = 0, 540 .ssd_gran = 0 }, 541 }; 542 543 static struct soft_segment_descriptor ldt_segs[] = { 544 /* Null Descriptor - overwritten by call gate */ 545 { .ssd_base = 0x0, 546 .ssd_limit = 0x0, 547 .ssd_type = 0, 548 .ssd_dpl = 0, 549 .ssd_p = 0, 550 .ssd_xx = 0, .ssd_xx1 = 0, 551 .ssd_def32 = 0, 552 .ssd_gran = 0 }, 553 /* Null Descriptor - overwritten by call gate */ 554 { .ssd_base = 0x0, 555 .ssd_limit = 0x0, 556 .ssd_type = 0, 557 .ssd_dpl = 0, 558 .ssd_p = 0, 559 .ssd_xx = 0, .ssd_xx1 = 0, 560 .ssd_def32 = 0, 561 .ssd_gran = 0 }, 562 /* Null Descriptor - overwritten by call gate */ 563 { .ssd_base = 0x0, 564 .ssd_limit = 0x0, 565 .ssd_type = 0, 566 .ssd_dpl = 0, 567 .ssd_p = 0, 568 .ssd_xx = 0, .ssd_xx1 = 0, 569 .ssd_def32 = 0, 570 .ssd_gran = 0 }, 571 /* Code Descriptor for user */ 572 { .ssd_base = 0x0, 573 .ssd_limit = 0xfffff, 574 .ssd_type = SDT_MEMERA, 575 .ssd_dpl = SEL_UPL, 576 .ssd_p = 1, 577 .ssd_xx = 0, .ssd_xx1 = 0, 578 .ssd_def32 = 1, 579 .ssd_gran = 1 }, 580 /* Null Descriptor - overwritten by call gate */ 581 { .ssd_base = 0x0, 582 .ssd_limit = 0x0, 583 .ssd_type = 0, 584 .ssd_dpl = 0, 585 .ssd_p = 0, 586 .ssd_xx = 0, .ssd_xx1 = 0, 587 .ssd_def32 = 0, 588 .ssd_gran = 0 }, 589 /* Data Descriptor for user */ 590 { .ssd_base = 0x0, 591 .ssd_limit = 0xfffff, 592 .ssd_type = SDT_MEMRWA, 593 .ssd_dpl = SEL_UPL, 594 .ssd_p = 1, 595 .ssd_xx = 0, .ssd_xx1 = 0, 596 .ssd_def32 = 1, 597 .ssd_gran = 1 }, 598 }; 599 600 size_t setidt_disp; 601 602 void 603 setidt(int idx, inthand_t *func, int typ, int dpl, int selec) 604 { 605 uintptr_t off; 606 607 off = func != NULL ? (uintptr_t)func + setidt_disp : 0; 608 setidt_nodisp(idx, off, typ, dpl, selec); 609 } 610 611 void 612 setidt_nodisp(int idx, uintptr_t off, int typ, int dpl, int selec) 613 { 614 struct gate_descriptor *ip; 615 616 ip = idt + idx; 617 ip->gd_looffset = off; 618 ip->gd_selector = selec; 619 ip->gd_stkcpy = 0; 620 ip->gd_xx = 0; 621 ip->gd_type = typ; 622 ip->gd_dpl = dpl; 623 ip->gd_p = 1; 624 ip->gd_hioffset = ((u_int)off) >> 16 ; 625 } 626 627 extern inthand_t 628 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 629 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 630 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 631 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 632 IDTVEC(xmm), 633 #ifdef KDTRACE_HOOKS 634 IDTVEC(dtrace_ret), 635 #endif 636 #ifdef XENHVM 637 IDTVEC(xen_intr_upcall), 638 #endif 639 IDTVEC(int0x80_syscall); 640 641 #ifdef DDB 642 /* 643 * Display the index and function name of any IDT entries that don't use 644 * the default 'rsvd' entry point. 645 */ 646 DB_SHOW_COMMAND_FLAGS(idt, db_show_idt, DB_CMD_MEMSAFE) 647 { 648 struct gate_descriptor *ip; 649 int idx; 650 uintptr_t func, func_trm; 651 bool trm; 652 653 ip = idt; 654 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 655 if (ip->gd_type == SDT_SYSTASKGT) { 656 db_printf("%3d\t<TASK>\n", idx); 657 } else { 658 func = (ip->gd_hioffset << 16 | ip->gd_looffset); 659 if (func >= PMAP_TRM_MIN_ADDRESS) { 660 func_trm = func; 661 func -= setidt_disp; 662 trm = true; 663 } else 664 trm = false; 665 if (func != (uintptr_t)&IDTVEC(rsvd)) { 666 db_printf("%3d\t", idx); 667 db_printsym(func, DB_STGY_PROC); 668 if (trm) 669 db_printf(" (trampoline %#x)", 670 func_trm); 671 db_printf("\n"); 672 } 673 } 674 ip++; 675 } 676 } 677 678 /* Show privileged registers. */ 679 DB_SHOW_COMMAND_FLAGS(sysregs, db_show_sysregs, DB_CMD_MEMSAFE) 680 { 681 uint64_t idtr, gdtr; 682 683 idtr = ridt(); 684 db_printf("idtr\t0x%08x/%04x\n", 685 (u_int)(idtr >> 16), (u_int)idtr & 0xffff); 686 gdtr = rgdt(); 687 db_printf("gdtr\t0x%08x/%04x\n", 688 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff); 689 db_printf("ldtr\t0x%04x\n", rldt()); 690 db_printf("tr\t0x%04x\n", rtr()); 691 db_printf("cr0\t0x%08x\n", rcr0()); 692 db_printf("cr2\t0x%08x\n", rcr2()); 693 db_printf("cr3\t0x%08x\n", rcr3()); 694 db_printf("cr4\t0x%08x\n", rcr4()); 695 if (rcr4() & CR4_XSAVE) 696 db_printf("xcr0\t0x%016llx\n", rxcr(0)); 697 if (amd_feature & (AMDID_NX | AMDID_LM)) 698 db_printf("EFER\t0x%016llx\n", rdmsr(MSR_EFER)); 699 if (cpu_feature2 & (CPUID2_VMX | CPUID2_SMX)) 700 db_printf("FEATURES_CTL\t0x%016llx\n", 701 rdmsr(MSR_IA32_FEATURE_CONTROL)); 702 if (((cpu_vendor_id == CPU_VENDOR_INTEL || 703 cpu_vendor_id == CPU_VENDOR_AMD) && CPUID_TO_FAMILY(cpu_id) >= 6) || 704 cpu_vendor_id == CPU_VENDOR_HYGON) 705 db_printf("DEBUG_CTL\t0x%016llx\n", rdmsr(MSR_DEBUGCTLMSR)); 706 if (cpu_feature & CPUID_PAT) 707 db_printf("PAT\t0x%016llx\n", rdmsr(MSR_PAT)); 708 } 709 710 DB_SHOW_COMMAND_FLAGS(dbregs, db_show_dbregs, DB_CMD_MEMSAFE) 711 { 712 713 db_printf("dr0\t0x%08x\n", rdr0()); 714 db_printf("dr1\t0x%08x\n", rdr1()); 715 db_printf("dr2\t0x%08x\n", rdr2()); 716 db_printf("dr3\t0x%08x\n", rdr3()); 717 db_printf("dr6\t0x%08x\n", rdr6()); 718 db_printf("dr7\t0x%08x\n", rdr7()); 719 } 720 721 DB_SHOW_COMMAND(frame, db_show_frame) 722 { 723 struct trapframe *frame; 724 725 frame = have_addr ? (struct trapframe *)addr : curthread->td_frame; 726 printf("ss %#x esp %#x efl %#x cs %#x eip %#x\n", 727 frame->tf_ss, frame->tf_esp, frame->tf_eflags, frame->tf_cs, 728 frame->tf_eip); 729 printf("err %#x trapno %d\n", frame->tf_err, frame->tf_trapno); 730 printf("ds %#x es %#x fs %#x\n", 731 frame->tf_ds, frame->tf_es, frame->tf_fs); 732 printf("eax %#x ecx %#x edx %#x ebx %#x\n", 733 frame->tf_eax, frame->tf_ecx, frame->tf_edx, frame->tf_ebx); 734 printf("ebp %#x esi %#x edi %#x\n", 735 frame->tf_ebp, frame->tf_esi, frame->tf_edi); 736 737 } 738 #endif 739 740 void 741 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd) 742 { 743 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 744 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 745 ssd->ssd_type = sd->sd_type; 746 ssd->ssd_dpl = sd->sd_dpl; 747 ssd->ssd_p = sd->sd_p; 748 ssd->ssd_def32 = sd->sd_def32; 749 ssd->ssd_gran = sd->sd_gran; 750 } 751 752 static int 753 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap, 754 int *physmap_idxp) 755 { 756 uint64_t lim, ign; 757 int i, insert_idx, physmap_idx; 758 759 physmap_idx = *physmap_idxp; 760 761 if (length == 0) 762 return (1); 763 764 lim = 0x100000000; /* 4G */ 765 if (pae_mode && above4g_allow) 766 lim = above24g_allow ? -1ULL : 0x600000000; /* 24G */ 767 if (base >= lim) { 768 printf("%uK of memory above %uGB ignored, pae %d " 769 "above4g_allow %d above24g_allow %d\n", 770 (u_int)(length / 1024), (u_int)(lim >> 30), pae_mode, 771 above4g_allow, above24g_allow); 772 return (1); 773 } 774 if (base + length >= lim) { 775 ign = base + length - lim; 776 length -= ign; 777 printf("%uK of memory above %uGB ignored, pae %d " 778 "above4g_allow %d above24g_allow %d\n", 779 (u_int)(ign / 1024), (u_int)(lim >> 30), pae_mode, 780 above4g_allow, above24g_allow); 781 } 782 783 /* 784 * Find insertion point while checking for overlap. Start off by 785 * assuming the new entry will be added to the end. 786 */ 787 insert_idx = physmap_idx + 2; 788 for (i = 0; i <= physmap_idx; i += 2) { 789 if (base < physmap[i + 1]) { 790 if (base + length <= physmap[i]) { 791 insert_idx = i; 792 break; 793 } 794 if (boothowto & RB_VERBOSE) 795 printf( 796 "Overlapping memory regions, ignoring second region\n"); 797 return (1); 798 } 799 } 800 801 /* See if we can prepend to the next entry. */ 802 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) { 803 physmap[insert_idx] = base; 804 return (1); 805 } 806 807 /* See if we can append to the previous entry. */ 808 if (insert_idx > 0 && base == physmap[insert_idx - 1]) { 809 physmap[insert_idx - 1] += length; 810 return (1); 811 } 812 813 physmap_idx += 2; 814 *physmap_idxp = physmap_idx; 815 if (physmap_idx == PHYS_AVAIL_ENTRIES) { 816 printf( 817 "Too many segments in the physical address map, giving up\n"); 818 return (0); 819 } 820 821 /* 822 * Move the last 'N' entries down to make room for the new 823 * entry if needed. 824 */ 825 for (i = physmap_idx; i > insert_idx; i -= 2) { 826 physmap[i] = physmap[i - 2]; 827 physmap[i + 1] = physmap[i - 1]; 828 } 829 830 /* Insert the new entry. */ 831 physmap[insert_idx] = base; 832 physmap[insert_idx + 1] = base + length; 833 return (1); 834 } 835 836 static int 837 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp) 838 { 839 if (boothowto & RB_VERBOSE) 840 printf("SMAP type=%02x base=%016llx len=%016llx\n", 841 smap->type, smap->base, smap->length); 842 843 if (smap->type != SMAP_TYPE_MEMORY) 844 return (1); 845 846 return (add_physmap_entry(smap->base, smap->length, physmap, 847 physmap_idxp)); 848 } 849 850 static void 851 add_smap_entries(struct bios_smap *smapbase, vm_paddr_t *physmap, 852 int *physmap_idxp) 853 { 854 struct bios_smap *smap, *smapend; 855 u_int32_t smapsize; 856 /* 857 * Memory map from INT 15:E820. 858 * 859 * subr_module.c says: 860 * "Consumer may safely assume that size value precedes data." 861 * ie: an int32_t immediately precedes SMAP. 862 */ 863 smapsize = *((u_int32_t *)smapbase - 1); 864 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 865 866 for (smap = smapbase; smap < smapend; smap++) 867 if (!add_smap_entry(smap, physmap, physmap_idxp)) 868 break; 869 } 870 871 static void 872 basemem_setup(void) 873 { 874 875 if (basemem > 640) { 876 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 877 basemem); 878 basemem = 640; 879 } 880 881 pmap_basemem_setup(basemem); 882 } 883 884 /* 885 * Populate the (physmap) array with base/bound pairs describing the 886 * available physical memory in the system, then test this memory and 887 * build the phys_avail array describing the actually-available memory. 888 * 889 * If we cannot accurately determine the physical memory map, then use 890 * value from the 0xE801 call, and failing that, the RTC. 891 * 892 * Total memory size may be set by the kernel environment variable 893 * hw.physmem or the compile-time define MAXMEM. 894 * 895 * XXX first should be vm_paddr_t. 896 */ 897 static void 898 getmemsize(int first) 899 { 900 int has_smap, off, physmap_idx, pa_indx, da_indx; 901 u_long memtest; 902 vm_paddr_t physmap[PHYS_AVAIL_ENTRIES]; 903 quad_t dcons_addr, dcons_size, physmem_tunable; 904 int hasbrokenint12, i, res __diagused; 905 u_int extmem; 906 struct vm86frame vmf; 907 struct vm86context vmc; 908 vm_paddr_t pa; 909 struct bios_smap *smap, *smapbase; 910 caddr_t kmdp; 911 912 has_smap = 0; 913 bzero(&vmf, sizeof(vmf)); 914 bzero(physmap, sizeof(physmap)); 915 basemem = 0; 916 917 /* 918 * Tell the physical memory allocator about pages used to store 919 * the kernel and preloaded data. See kmem_bootstrap_free(). 920 */ 921 vm_phys_early_add_seg((vm_paddr_t)KERNLOAD, trunc_page(first)); 922 923 TUNABLE_INT_FETCH("hw.above4g_allow", &above4g_allow); 924 TUNABLE_INT_FETCH("hw.above24g_allow", &above24g_allow); 925 926 /* 927 * Check if the loader supplied an SMAP memory map. If so, 928 * use that and do not make any VM86 calls. 929 */ 930 physmap_idx = 0; 931 kmdp = preload_search_by_type("elf kernel"); 932 if (kmdp == NULL) 933 kmdp = preload_search_by_type("elf32 kernel"); 934 smapbase = (struct bios_smap *)preload_search_info(kmdp, 935 MODINFO_METADATA | MODINFOMD_SMAP); 936 if (smapbase != NULL) { 937 add_smap_entries(smapbase, physmap, &physmap_idx); 938 has_smap = 1; 939 goto have_smap; 940 } 941 942 /* 943 * Some newer BIOSes have a broken INT 12H implementation 944 * which causes a kernel panic immediately. In this case, we 945 * need use the SMAP to determine the base memory size. 946 */ 947 hasbrokenint12 = 0; 948 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12); 949 if (hasbrokenint12 == 0) { 950 /* Use INT12 to determine base memory size. */ 951 vm86_intcall(0x12, &vmf); 952 basemem = vmf.vmf_ax; 953 basemem_setup(); 954 } 955 956 /* 957 * Fetch the memory map with INT 15:E820. Map page 1 R/W into 958 * the kernel page table so we can use it as a buffer. The 959 * kernel will unmap this page later. 960 */ 961 vmc.npages = 0; 962 smap = (void *)vm86_addpage(&vmc, 1, PMAP_MAP_LOW + ptoa(1)); 963 res = vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di); 964 KASSERT(res != 0, ("vm86_getptr() failed: address not found")); 965 966 vmf.vmf_ebx = 0; 967 do { 968 vmf.vmf_eax = 0xE820; 969 vmf.vmf_edx = SMAP_SIG; 970 vmf.vmf_ecx = sizeof(struct bios_smap); 971 i = vm86_datacall(0x15, &vmf, &vmc); 972 if (i || vmf.vmf_eax != SMAP_SIG) 973 break; 974 has_smap = 1; 975 if (!add_smap_entry(smap, physmap, &physmap_idx)) 976 break; 977 } while (vmf.vmf_ebx != 0); 978 979 have_smap: 980 /* 981 * If we didn't fetch the "base memory" size from INT12, 982 * figure it out from the SMAP (or just guess). 983 */ 984 if (basemem == 0) { 985 for (i = 0; i <= physmap_idx; i += 2) { 986 if (physmap[i] == 0x00000000) { 987 basemem = physmap[i + 1] / 1024; 988 break; 989 } 990 } 991 992 /* XXX: If we couldn't find basemem from SMAP, just guess. */ 993 if (basemem == 0) 994 basemem = 640; 995 basemem_setup(); 996 } 997 998 if (physmap[1] != 0) 999 goto physmap_done; 1000 1001 /* 1002 * If we failed to find an SMAP, figure out the extended 1003 * memory size. We will then build a simple memory map with 1004 * two segments, one for "base memory" and the second for 1005 * "extended memory". Note that "extended memory" starts at a 1006 * physical address of 1MB and that both basemem and extmem 1007 * are in units of 1KB. 1008 * 1009 * First, try to fetch the extended memory size via INT 15:E801. 1010 */ 1011 vmf.vmf_ax = 0xE801; 1012 if (vm86_intcall(0x15, &vmf) == 0) { 1013 extmem = vmf.vmf_cx + vmf.vmf_dx * 64; 1014 } else { 1015 /* 1016 * If INT15:E801 fails, this is our last ditch effort 1017 * to determine the extended memory size. Currently 1018 * we prefer the RTC value over INT15:88. 1019 */ 1020 #if 0 1021 vmf.vmf_ah = 0x88; 1022 vm86_intcall(0x15, &vmf); 1023 extmem = vmf.vmf_ax; 1024 #else 1025 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8); 1026 #endif 1027 } 1028 1029 /* 1030 * Special hack for chipsets that still remap the 384k hole when 1031 * there's 16MB of memory - this really confuses people that 1032 * are trying to use bus mastering ISA controllers with the 1033 * "16MB limit"; they only have 16MB, but the remapping puts 1034 * them beyond the limit. 1035 * 1036 * If extended memory is between 15-16MB (16-17MB phys address range), 1037 * chop it to 15MB. 1038 */ 1039 if ((extmem > 15 * 1024) && (extmem < 16 * 1024)) 1040 extmem = 15 * 1024; 1041 1042 physmap[0] = 0; 1043 physmap[1] = basemem * 1024; 1044 physmap_idx = 2; 1045 physmap[physmap_idx] = 0x100000; 1046 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1047 1048 physmap_done: 1049 /* 1050 * Now, physmap contains a map of physical memory. 1051 */ 1052 1053 #ifdef SMP 1054 /* make hole for AP bootstrap code */ 1055 alloc_ap_trampoline(physmap, &physmap_idx); 1056 #endif 1057 1058 /* 1059 * Maxmem isn't the "maximum memory", it's one larger than the 1060 * highest page of the physical address space. It should be 1061 * called something like "Maxphyspage". We may adjust this 1062 * based on ``hw.physmem'' and the results of the memory test. 1063 * 1064 * This is especially confusing when it is much larger than the 1065 * memory size and is displayed as "realmem". 1066 */ 1067 Maxmem = atop(physmap[physmap_idx + 1]); 1068 1069 #ifdef MAXMEM 1070 Maxmem = MAXMEM / 4; 1071 #endif 1072 1073 if (TUNABLE_QUAD_FETCH("hw.physmem", &physmem_tunable)) 1074 Maxmem = atop(physmem_tunable); 1075 1076 /* 1077 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend 1078 * the amount of memory in the system. 1079 */ 1080 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1])) 1081 Maxmem = atop(physmap[physmap_idx + 1]); 1082 1083 /* 1084 * The boot memory test is disabled by default, as it takes a 1085 * significant amount of time on large-memory systems, and is 1086 * unfriendly to virtual machines as it unnecessarily touches all 1087 * pages. 1088 * 1089 * A general name is used as the code may be extended to support 1090 * additional tests beyond the current "page present" test. 1091 */ 1092 memtest = 0; 1093 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest); 1094 1095 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1096 (boothowto & RB_VERBOSE)) 1097 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1098 1099 /* 1100 * If Maxmem has been increased beyond what the system has detected, 1101 * extend the last memory segment to the new limit. 1102 */ 1103 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1104 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 1105 1106 /* call pmap initialization to make new kernel address space */ 1107 pmap_bootstrap(first); 1108 1109 /* 1110 * Size up each available chunk of physical memory. 1111 */ 1112 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1113 pa_indx = 0; 1114 da_indx = 1; 1115 phys_avail[pa_indx++] = physmap[0]; 1116 phys_avail[pa_indx] = physmap[0]; 1117 dump_avail[da_indx] = physmap[0]; 1118 1119 /* 1120 * Get dcons buffer address 1121 */ 1122 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1123 getenv_quad("dcons.size", &dcons_size) == 0) 1124 dcons_addr = 0; 1125 1126 /* 1127 * physmap is in bytes, so when converting to page boundaries, 1128 * round up the start address and round down the end address. 1129 */ 1130 for (i = 0; i <= physmap_idx; i += 2) { 1131 vm_paddr_t end; 1132 1133 end = ptoa((vm_paddr_t)Maxmem); 1134 if (physmap[i + 1] < end) 1135 end = trunc_page(physmap[i + 1]); 1136 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1137 int tmp, page_bad, full; 1138 int *ptr; 1139 1140 full = FALSE; 1141 /* 1142 * block out kernel memory as not available. 1143 */ 1144 if (pa >= KERNLOAD && pa < first) 1145 goto do_dump_avail; 1146 1147 /* 1148 * block out dcons buffer 1149 */ 1150 if (dcons_addr > 0 1151 && pa >= trunc_page(dcons_addr) 1152 && pa < dcons_addr + dcons_size) 1153 goto do_dump_avail; 1154 1155 page_bad = FALSE; 1156 if (memtest == 0) 1157 goto skip_memtest; 1158 1159 /* 1160 * map page into kernel: valid, read/write,non-cacheable 1161 */ 1162 ptr = (int *)pmap_cmap3(pa, PG_V | PG_RW | PG_N); 1163 1164 tmp = *(int *)ptr; 1165 /* 1166 * Test for alternating 1's and 0's 1167 */ 1168 *(volatile int *)ptr = 0xaaaaaaaa; 1169 if (*(volatile int *)ptr != 0xaaaaaaaa) 1170 page_bad = TRUE; 1171 /* 1172 * Test for alternating 0's and 1's 1173 */ 1174 *(volatile int *)ptr = 0x55555555; 1175 if (*(volatile int *)ptr != 0x55555555) 1176 page_bad = TRUE; 1177 /* 1178 * Test for all 1's 1179 */ 1180 *(volatile int *)ptr = 0xffffffff; 1181 if (*(volatile int *)ptr != 0xffffffff) 1182 page_bad = TRUE; 1183 /* 1184 * Test for all 0's 1185 */ 1186 *(volatile int *)ptr = 0x0; 1187 if (*(volatile int *)ptr != 0x0) 1188 page_bad = TRUE; 1189 /* 1190 * Restore original value. 1191 */ 1192 *(int *)ptr = tmp; 1193 1194 skip_memtest: 1195 /* 1196 * Adjust array of valid/good pages. 1197 */ 1198 if (page_bad == TRUE) 1199 continue; 1200 /* 1201 * If this good page is a continuation of the 1202 * previous set of good pages, then just increase 1203 * the end pointer. Otherwise start a new chunk. 1204 * Note that "end" points one higher than end, 1205 * making the range >= start and < end. 1206 * If we're also doing a speculative memory 1207 * test and we at or past the end, bump up Maxmem 1208 * so that we keep going. The first bad page 1209 * will terminate the loop. 1210 */ 1211 if (phys_avail[pa_indx] == pa) { 1212 phys_avail[pa_indx] += PAGE_SIZE; 1213 } else { 1214 pa_indx++; 1215 if (pa_indx == PHYS_AVAIL_ENTRIES) { 1216 printf( 1217 "Too many holes in the physical address space, giving up\n"); 1218 pa_indx--; 1219 full = TRUE; 1220 goto do_dump_avail; 1221 } 1222 phys_avail[pa_indx++] = pa; /* start */ 1223 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1224 } 1225 physmem++; 1226 do_dump_avail: 1227 if (dump_avail[da_indx] == pa) { 1228 dump_avail[da_indx] += PAGE_SIZE; 1229 } else { 1230 da_indx++; 1231 if (da_indx == PHYS_AVAIL_ENTRIES) { 1232 da_indx--; 1233 goto do_next; 1234 } 1235 dump_avail[da_indx++] = pa; /* start */ 1236 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1237 } 1238 do_next: 1239 if (full) 1240 break; 1241 } 1242 } 1243 pmap_cmap3(0, 0); 1244 1245 /* 1246 * XXX 1247 * The last chunk must contain at least one page plus the message 1248 * buffer to avoid complicating other code (message buffer address 1249 * calculation, etc.). 1250 */ 1251 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1252 round_page(msgbufsize) >= phys_avail[pa_indx]) { 1253 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1254 phys_avail[pa_indx--] = 0; 1255 phys_avail[pa_indx--] = 0; 1256 } 1257 1258 Maxmem = atop(phys_avail[pa_indx]); 1259 1260 /* Trim off space for the message buffer. */ 1261 phys_avail[pa_indx] -= round_page(msgbufsize); 1262 1263 /* Map the message buffer. */ 1264 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE) 1265 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] + 1266 off); 1267 } 1268 1269 static void 1270 i386_kdb_init(void) 1271 { 1272 #ifdef DDB 1273 db_fetch_ksymtab(bootinfo.bi_symtab, bootinfo.bi_esymtab, 0); 1274 #endif 1275 kdb_init(); 1276 #ifdef KDB 1277 if (boothowto & RB_KDB) 1278 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); 1279 #endif 1280 } 1281 1282 static void 1283 fixup_idt(void) 1284 { 1285 struct gate_descriptor *ip; 1286 uintptr_t off; 1287 int x; 1288 1289 for (x = 0; x < NIDT; x++) { 1290 ip = &idt[x]; 1291 if (ip->gd_type != SDT_SYS386IGT && 1292 ip->gd_type != SDT_SYS386TGT) 1293 continue; 1294 off = ip->gd_looffset + (((u_int)ip->gd_hioffset) << 16); 1295 KASSERT(off >= (uintptr_t)start_exceptions && 1296 off < (uintptr_t)end_exceptions, 1297 ("IDT[%d] type %d off %#x", x, ip->gd_type, off)); 1298 off += setidt_disp; 1299 MPASS(off >= PMAP_TRM_MIN_ADDRESS && 1300 off < PMAP_TRM_MAX_ADDRESS); 1301 ip->gd_looffset = off; 1302 ip->gd_hioffset = off >> 16; 1303 } 1304 } 1305 1306 static void 1307 i386_setidt1(void) 1308 { 1309 int x; 1310 1311 /* exceptions */ 1312 for (x = 0; x < NIDT; x++) 1313 setidt(x, &IDTVEC(rsvd), SDT_SYS386IGT, SEL_KPL, 1314 GSEL(GCODE_SEL, SEL_KPL)); 1315 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386IGT, SEL_KPL, 1316 GSEL(GCODE_SEL, SEL_KPL)); 1317 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 1318 GSEL(GCODE_SEL, SEL_KPL)); 1319 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL, 1320 GSEL(GCODE_SEL, SEL_KPL)); 1321 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 1322 GSEL(GCODE_SEL, SEL_KPL)); 1323 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386IGT, SEL_UPL, 1324 GSEL(GCODE_SEL, SEL_KPL)); 1325 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386IGT, SEL_KPL, 1326 GSEL(GCODE_SEL, SEL_KPL)); 1327 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL, 1328 GSEL(GCODE_SEL, SEL_KPL)); 1329 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386IGT, SEL_KPL, 1330 GSEL(GCODE_SEL, SEL_KPL)); 1331 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, 1332 SEL_KPL)); 1333 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386IGT, 1334 SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1335 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386IGT, SEL_KPL, 1336 GSEL(GCODE_SEL, SEL_KPL)); 1337 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386IGT, SEL_KPL, 1338 GSEL(GCODE_SEL, SEL_KPL)); 1339 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386IGT, SEL_KPL, 1340 GSEL(GCODE_SEL, SEL_KPL)); 1341 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL, 1342 GSEL(GCODE_SEL, SEL_KPL)); 1343 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 1344 GSEL(GCODE_SEL, SEL_KPL)); 1345 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386IGT, SEL_KPL, 1346 GSEL(GCODE_SEL, SEL_KPL)); 1347 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386IGT, SEL_KPL, 1348 GSEL(GCODE_SEL, SEL_KPL)); 1349 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386IGT, SEL_KPL, 1350 GSEL(GCODE_SEL, SEL_KPL)); 1351 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386IGT, SEL_KPL, 1352 GSEL(GCODE_SEL, SEL_KPL)); 1353 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), 1354 SDT_SYS386IGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1355 #ifdef KDTRACE_HOOKS 1356 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), 1357 SDT_SYS386IGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1358 #endif 1359 #ifdef XENHVM 1360 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), 1361 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1362 #endif 1363 } 1364 1365 static void 1366 i386_setidt2(void) 1367 { 1368 1369 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL, 1370 GSEL(GCODE_SEL, SEL_KPL)); 1371 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL, 1372 GSEL(GCODE_SEL, SEL_KPL)); 1373 } 1374 1375 #if defined(DEV_ISA) && !defined(DEV_ATPIC) 1376 static void 1377 i386_setidt3(void) 1378 { 1379 1380 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), 1381 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1382 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), 1383 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1384 } 1385 #endif 1386 1387 register_t 1388 init386(int first) 1389 { 1390 struct region_descriptor r_gdt, r_idt; /* table descriptors */ 1391 int gsel_tss, metadata_missing, x, pa; 1392 struct pcpu *pc; 1393 struct xstate_hdr *xhdr; 1394 caddr_t kmdp; 1395 vm_offset_t addend; 1396 size_t ucode_len; 1397 1398 thread0.td_kstack = proc0kstack; 1399 thread0.td_kstack_pages = TD0_KSTACK_PAGES; 1400 1401 /* 1402 * This may be done better later if it gets more high level 1403 * components in it. If so just link td->td_proc here. 1404 */ 1405 proc_linkup0(&proc0, &thread0); 1406 1407 if (bootinfo.bi_modulep) { 1408 metadata_missing = 0; 1409 addend = (vm_paddr_t)bootinfo.bi_modulep < KERNBASE ? 1410 PMAP_MAP_LOW : 0; 1411 preload_metadata = (caddr_t)bootinfo.bi_modulep + addend; 1412 preload_bootstrap_relocate(addend); 1413 } else { 1414 metadata_missing = 1; 1415 } 1416 1417 if (bootinfo.bi_envp != 0) { 1418 addend = (vm_paddr_t)bootinfo.bi_envp < KERNBASE ? 1419 PMAP_MAP_LOW : 0; 1420 init_static_kenv((char *)bootinfo.bi_envp + addend, 0); 1421 } else { 1422 init_static_kenv(NULL, 0); 1423 } 1424 1425 /* 1426 * Re-evaluate CPU features if we loaded a microcode update. 1427 */ 1428 ucode_len = ucode_load_bsp(first); 1429 if (ucode_len != 0) { 1430 identify_cpu(); 1431 first = roundup2(first + ucode_len, PAGE_SIZE); 1432 } 1433 1434 identify_hypervisor(); 1435 identify_hypervisor_smbios(); 1436 1437 /* Init basic tunables, hz etc */ 1438 init_param1(); 1439 1440 /* Set bootmethod to BIOS: it's the only supported on i386. */ 1441 strlcpy(bootmethod, "BIOS", sizeof(bootmethod)); 1442 1443 /* 1444 * Make gdt memory segments. All segments cover the full 4GB 1445 * of address space and permissions are enforced at page level. 1446 */ 1447 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 1448 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 1449 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1); 1450 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1); 1451 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1); 1452 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1); 1453 1454 pc = &__pcpu[0]; 1455 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1); 1456 gdt_segs[GPRIV_SEL].ssd_base = (int)pc; 1457 gdt_segs[GPROC0_SEL].ssd_base = (int)&common_tss0; 1458 1459 for (x = 0; x < NGDT; x++) 1460 ssdtosd(&gdt_segs[x], &gdt0[x].sd); 1461 1462 r_gdt.rd_limit = NGDT * sizeof(gdt0[0]) - 1; 1463 r_gdt.rd_base = (int)gdt0; 1464 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN); 1465 lgdt(&r_gdt); 1466 1467 pcpu_init(pc, 0, sizeof(struct pcpu)); 1468 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE) 1469 pmap_kenter(pa, pa); 1470 dpcpu_init((void *)first, 0); 1471 first += DPCPU_SIZE; 1472 PCPU_SET(prvspace, pc); 1473 PCPU_SET(curthread, &thread0); 1474 /* Non-late cninit() and printf() can be moved up to here. */ 1475 1476 /* 1477 * Initialize mutexes. 1478 * 1479 * icu_lock: in order to allow an interrupt to occur in a critical 1480 * section, to set pcpu->ipending (etc...) properly, we 1481 * must be able to get the icu lock, so it can't be 1482 * under witness. 1483 */ 1484 mutex_init(); 1485 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE); 1486 1487 i386_setidt1(); 1488 1489 r_idt.rd_limit = sizeof(idt0) - 1; 1490 r_idt.rd_base = (int) idt; 1491 lidt(&r_idt); 1492 1493 finishidentcpu(); /* Final stage of CPU initialization */ 1494 1495 /* 1496 * Initialize the clock before the console so that console 1497 * initialization can use DELAY(). 1498 */ 1499 clock_init(); 1500 1501 i386_setidt2(); 1502 pmap_set_nx(); 1503 initializecpu(); /* Initialize CPU registers */ 1504 initializecpucache(); 1505 1506 /* pointer to selector slot for %fs/%gs */ 1507 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd); 1508 1509 /* Initialize the tss (except for the final esp0) early for vm86. */ 1510 common_tss0.tss_esp0 = thread0.td_kstack + thread0.td_kstack_pages * 1511 PAGE_SIZE - VM86_STACK_SPACE; 1512 common_tss0.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL); 1513 common_tss0.tss_ioopt = sizeof(struct i386tss) << 16; 1514 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1515 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 1516 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 1517 ltr(gsel_tss); 1518 1519 /* Initialize the PIC early for vm86 calls. */ 1520 #ifdef DEV_ISA 1521 #ifdef DEV_ATPIC 1522 elcr_probe(); 1523 atpic_startup(); 1524 #else 1525 /* Reset and mask the atpics and leave them shut down. */ 1526 atpic_reset(); 1527 1528 /* 1529 * Point the ICU spurious interrupt vectors at the APIC spurious 1530 * interrupt handler. 1531 */ 1532 i386_setidt3(); 1533 #endif 1534 #endif 1535 1536 /* 1537 * The console and kdb should be initialized even earlier than here, 1538 * but some console drivers don't work until after getmemsize(). 1539 * Default to late console initialization to support these drivers. 1540 * This loses mainly printf()s in getmemsize() and early debugging. 1541 */ 1542 TUNABLE_INT_FETCH("debug.late_console", &late_console); 1543 if (!late_console) { 1544 cninit(); 1545 i386_kdb_init(); 1546 } 1547 1548 kmdp = preload_search_by_type("elf kernel"); 1549 link_elf_ireloc(kmdp); 1550 1551 vm86_initialize(); 1552 getmemsize(first); 1553 init_param2(physmem); 1554 1555 /* now running on new page tables, configured,and u/iom is accessible */ 1556 1557 if (late_console) 1558 cninit(); 1559 1560 if (metadata_missing) 1561 printf("WARNING: loader(8) metadata is missing!\n"); 1562 1563 if (late_console) 1564 i386_kdb_init(); 1565 1566 msgbufinit(msgbufp, msgbufsize); 1567 npxinit(true); 1568 /* 1569 * Set up thread0 pcb after npxinit calculated pcb + fpu save 1570 * area size. Zero out the extended state header in fpu save 1571 * area. 1572 */ 1573 thread0.td_pcb = get_pcb_td(&thread0); 1574 thread0.td_pcb->pcb_save = get_pcb_user_save_td(&thread0); 1575 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size); 1576 if (use_xsave) { 1577 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) + 1578 1); 1579 xhdr->xstate_bv = xsave_mask; 1580 } 1581 PCPU_SET(curpcb, thread0.td_pcb); 1582 /* Move esp0 in the tss to its final place. */ 1583 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 1584 common_tss0.tss_esp0 = (vm_offset_t)thread0.td_pcb - VM86_STACK_SPACE; 1585 PCPU_SET(kesp0, common_tss0.tss_esp0); 1586 gdt[GPROC0_SEL].sd.sd_type = SDT_SYS386TSS; /* clear busy bit */ 1587 ltr(gsel_tss); 1588 1589 /* transfer to user mode */ 1590 1591 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1592 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1593 1594 /* setup proc 0's pcb */ 1595 thread0.td_pcb->pcb_flags = 0; 1596 thread0.td_pcb->pcb_cr3 = pmap_get_kcr3(); 1597 thread0.td_pcb->pcb_ext = 0; 1598 thread0.td_frame = &proc0_tf; 1599 1600 #ifdef FDT 1601 x86_init_fdt(); 1602 #endif 1603 1604 /* Location of kernel stack for locore */ 1605 return ((register_t)thread0.td_pcb); 1606 } 1607 1608 static void 1609 machdep_init_trampoline(void) 1610 { 1611 struct region_descriptor r_gdt, r_idt; 1612 struct i386tss *tss; 1613 char *copyout_buf, *trampoline, *tramp_stack_base; 1614 int x; 1615 1616 gdt = pmap_trm_alloc(sizeof(union descriptor) * NGDT * mp_ncpus, 1617 M_NOWAIT | M_ZERO); 1618 bcopy(gdt0, gdt, sizeof(union descriptor) * NGDT); 1619 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1620 r_gdt.rd_base = (int)gdt; 1621 lgdt(&r_gdt); 1622 1623 tss = pmap_trm_alloc(sizeof(struct i386tss) * mp_ncpus, 1624 M_NOWAIT | M_ZERO); 1625 bcopy(&common_tss0, tss, sizeof(struct i386tss)); 1626 gdt[GPROC0_SEL].sd.sd_lobase = (int)tss; 1627 gdt[GPROC0_SEL].sd.sd_hibase = (u_int)tss >> 24; 1628 gdt[GPROC0_SEL].sd.sd_type = SDT_SYS386TSS; 1629 1630 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd); 1631 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 1632 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 1633 PCPU_SET(common_tssp, tss); 1634 ltr(GSEL(GPROC0_SEL, SEL_KPL)); 1635 1636 trampoline = pmap_trm_alloc(end_exceptions - start_exceptions, 1637 M_NOWAIT); 1638 bcopy(start_exceptions, trampoline, end_exceptions - start_exceptions); 1639 tramp_stack_base = pmap_trm_alloc(TRAMP_STACK_SZ, M_NOWAIT); 1640 PCPU_SET(trampstk, (uintptr_t)tramp_stack_base + TRAMP_STACK_SZ - 1641 VM86_STACK_SPACE); 1642 tss[0].tss_esp0 = PCPU_GET(trampstk); 1643 1644 idt = pmap_trm_alloc(sizeof(idt0), M_NOWAIT | M_ZERO); 1645 bcopy(idt0, idt, sizeof(idt0)); 1646 1647 /* Re-initialize new IDT since the handlers were relocated */ 1648 setidt_disp = trampoline - start_exceptions; 1649 if (bootverbose) 1650 printf("Trampoline disposition %#zx\n", setidt_disp); 1651 fixup_idt(); 1652 1653 r_idt.rd_limit = sizeof(struct gate_descriptor) * NIDT - 1; 1654 r_idt.rd_base = (int)idt; 1655 lidt(&r_idt); 1656 1657 /* dblfault TSS */ 1658 dblfault_tss = pmap_trm_alloc(sizeof(struct i386tss), M_NOWAIT | M_ZERO); 1659 dblfault_stack = pmap_trm_alloc(PAGE_SIZE, M_NOWAIT); 1660 dblfault_tss->tss_esp = dblfault_tss->tss_esp0 = 1661 dblfault_tss->tss_esp1 = dblfault_tss->tss_esp2 = 1662 (int)dblfault_stack + PAGE_SIZE; 1663 dblfault_tss->tss_ss = dblfault_tss->tss_ss0 = dblfault_tss->tss_ss1 = 1664 dblfault_tss->tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1665 dblfault_tss->tss_cr3 = pmap_get_kcr3(); 1666 dblfault_tss->tss_eip = (int)dblfault_handler; 1667 dblfault_tss->tss_eflags = PSL_KERNEL; 1668 dblfault_tss->tss_ds = dblfault_tss->tss_es = 1669 dblfault_tss->tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1670 dblfault_tss->tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 1671 dblfault_tss->tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1672 dblfault_tss->tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1673 gdt[GPANIC_SEL].sd.sd_lobase = (int)dblfault_tss; 1674 gdt[GPANIC_SEL].sd.sd_hibase = (u_int)dblfault_tss >> 24; 1675 1676 /* make ldt memory segments */ 1677 ldt = pmap_trm_alloc(sizeof(union descriptor) * NLDT, 1678 M_NOWAIT | M_ZERO); 1679 gdt[GLDT_SEL].sd.sd_lobase = (int)ldt; 1680 gdt[GLDT_SEL].sd.sd_hibase = (u_int)ldt >> 24; 1681 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1); 1682 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1); 1683 for (x = 0; x < nitems(ldt_segs); x++) 1684 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1685 1686 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1687 lldt(_default_ldt); 1688 PCPU_SET(currentldt, _default_ldt); 1689 1690 copyout_buf = pmap_trm_alloc(TRAMP_COPYOUT_SZ, M_NOWAIT); 1691 PCPU_SET(copyout_buf, copyout_buf); 1692 copyout_init_tramp(); 1693 } 1694 SYSINIT(vm_mem, SI_SUB_VM, SI_ORDER_SECOND, machdep_init_trampoline, NULL); 1695 1696 #ifdef COMPAT_43 1697 static void 1698 i386_setup_lcall_gate(void) 1699 { 1700 struct sysentvec *sv; 1701 struct user_segment_descriptor desc; 1702 u_int lcall_addr; 1703 1704 sv = &elf32_freebsd_sysvec; 1705 lcall_addr = (uintptr_t)sv->sv_psstrings - sz_lcall_tramp; 1706 1707 bzero(&desc, sizeof(desc)); 1708 desc.sd_type = SDT_MEMERA; 1709 desc.sd_dpl = SEL_UPL; 1710 desc.sd_p = 1; 1711 desc.sd_def32 = 1; 1712 desc.sd_gran = 1; 1713 desc.sd_lolimit = 0xffff; 1714 desc.sd_hilimit = 0xf; 1715 desc.sd_lobase = lcall_addr; 1716 desc.sd_hibase = lcall_addr >> 24; 1717 bcopy(&desc, &ldt[LSYS5CALLS_SEL], sizeof(desc)); 1718 } 1719 SYSINIT(elf32, SI_SUB_EXEC, SI_ORDER_ANY, i386_setup_lcall_gate, NULL); 1720 #endif 1721 1722 void 1723 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1724 { 1725 1726 pcpu->pc_acpi_id = 0xffffffff; 1727 } 1728 1729 static int 1730 smap_sysctl_handler(SYSCTL_HANDLER_ARGS) 1731 { 1732 struct bios_smap *smapbase; 1733 struct bios_smap_xattr smap; 1734 caddr_t kmdp; 1735 uint32_t *smapattr; 1736 int count, error, i; 1737 1738 /* Retrieve the system memory map from the loader. */ 1739 kmdp = preload_search_by_type("elf kernel"); 1740 if (kmdp == NULL) 1741 kmdp = preload_search_by_type("elf32 kernel"); 1742 smapbase = (struct bios_smap *)preload_search_info(kmdp, 1743 MODINFO_METADATA | MODINFOMD_SMAP); 1744 if (smapbase == NULL) 1745 return (0); 1746 smapattr = (uint32_t *)preload_search_info(kmdp, 1747 MODINFO_METADATA | MODINFOMD_SMAP_XATTR); 1748 count = *((u_int32_t *)smapbase - 1) / sizeof(*smapbase); 1749 error = 0; 1750 for (i = 0; i < count; i++) { 1751 smap.base = smapbase[i].base; 1752 smap.length = smapbase[i].length; 1753 smap.type = smapbase[i].type; 1754 if (smapattr != NULL) 1755 smap.xattr = smapattr[i]; 1756 else 1757 smap.xattr = 0; 1758 error = SYSCTL_OUT(req, &smap, sizeof(smap)); 1759 } 1760 return (error); 1761 } 1762 SYSCTL_PROC(_machdep, OID_AUTO, smap, 1763 CTLTYPE_OPAQUE | CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, 0, 1764 smap_sysctl_handler, "S,bios_smap_xattr", 1765 "Raw BIOS SMAP data"); 1766 1767 void 1768 spinlock_enter(void) 1769 { 1770 struct thread *td; 1771 register_t flags; 1772 1773 td = curthread; 1774 if (td->td_md.md_spinlock_count == 0) { 1775 flags = intr_disable(); 1776 td->td_md.md_spinlock_count = 1; 1777 td->td_md.md_saved_flags = flags; 1778 critical_enter(); 1779 } else 1780 td->td_md.md_spinlock_count++; 1781 } 1782 1783 void 1784 spinlock_exit(void) 1785 { 1786 struct thread *td; 1787 register_t flags; 1788 1789 td = curthread; 1790 flags = td->td_md.md_saved_flags; 1791 td->td_md.md_spinlock_count--; 1792 if (td->td_md.md_spinlock_count == 0) { 1793 critical_exit(); 1794 intr_restore(flags); 1795 } 1796 } 1797 1798 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 1799 static void f00f_hack(void *unused); 1800 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 1801 1802 static void 1803 f00f_hack(void *unused) 1804 { 1805 struct region_descriptor r_idt; 1806 struct gate_descriptor *new_idt; 1807 vm_offset_t tmp; 1808 1809 if (!has_f00f_bug) 1810 return; 1811 1812 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 1813 1814 tmp = (vm_offset_t)pmap_trm_alloc(PAGE_SIZE * 3, M_NOWAIT | M_ZERO); 1815 if (tmp == 0) 1816 panic("kmem_malloc returned 0"); 1817 tmp = round_page(tmp); 1818 1819 /* Put the problematic entry (#6) at the end of the lower page. */ 1820 new_idt = (struct gate_descriptor *) 1821 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor)); 1822 bcopy(idt, new_idt, sizeof(idt0)); 1823 r_idt.rd_base = (u_int)new_idt; 1824 r_idt.rd_limit = sizeof(idt0) - 1; 1825 lidt(&r_idt); 1826 /* SMP machines do not need the F00F hack. */ 1827 idt = new_idt; 1828 pmap_protect(kernel_pmap, tmp, tmp + PAGE_SIZE, VM_PROT_READ); 1829 } 1830 #endif /* defined(I586_CPU) && !NO_F00F_HACK */ 1831 1832 /* 1833 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1834 * we want to start a backtrace from the function that caused us to enter 1835 * the debugger. We have the context in the trapframe, but base the trace 1836 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1837 * enough for a backtrace. 1838 */ 1839 void 1840 makectx(struct trapframe *tf, struct pcb *pcb) 1841 { 1842 1843 pcb->pcb_edi = tf->tf_edi; 1844 pcb->pcb_esi = tf->tf_esi; 1845 pcb->pcb_ebp = tf->tf_ebp; 1846 pcb->pcb_ebx = tf->tf_ebx; 1847 pcb->pcb_eip = tf->tf_eip; 1848 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8; 1849 pcb->pcb_gs = rgs(); 1850 } 1851 1852 #ifdef KDB 1853 1854 /* 1855 * Provide inb() and outb() as functions. They are normally only available as 1856 * inline functions, thus cannot be called from the debugger. 1857 */ 1858 1859 /* silence compiler warnings */ 1860 u_char inb_(u_short); 1861 void outb_(u_short, u_char); 1862 1863 u_char 1864 inb_(u_short port) 1865 { 1866 return inb(port); 1867 } 1868 1869 void 1870 outb_(u_short port, u_char data) 1871 { 1872 outb(port, data); 1873 } 1874 1875 #endif /* KDB */ 1876