1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (C) 1994, David Greenman 5 * Copyright (c) 1990, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the University of Utah, and William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)trap.c 7.4 (Berkeley) 5/13/91 40 */ 41 42 #include <sys/cdefs.h> 43 __FBSDID("$FreeBSD$"); 44 45 /* 46 * 386 Trap and System call handling 47 */ 48 49 #include "opt_clock.h" 50 #include "opt_compat.h" 51 #include "opt_cpu.h" 52 #include "opt_hwpmc_hooks.h" 53 #include "opt_isa.h" 54 #include "opt_kdb.h" 55 #include "opt_trap.h" 56 57 #include <sys/param.h> 58 #include <sys/bus.h> 59 #include <sys/systm.h> 60 #include <sys/proc.h> 61 #include <sys/ptrace.h> 62 #include <sys/kdb.h> 63 #include <sys/kernel.h> 64 #include <sys/ktr.h> 65 #include <sys/lock.h> 66 #include <sys/mutex.h> 67 #include <sys/resourcevar.h> 68 #include <sys/signalvar.h> 69 #include <sys/syscall.h> 70 #include <sys/sysctl.h> 71 #include <sys/sysent.h> 72 #include <sys/uio.h> 73 #include <sys/vmmeter.h> 74 #ifdef HWPMC_HOOKS 75 #include <sys/pmckern.h> 76 PMC_SOFT_DEFINE( , , page_fault, all); 77 PMC_SOFT_DEFINE( , , page_fault, read); 78 PMC_SOFT_DEFINE( , , page_fault, write); 79 #endif 80 #include <security/audit/audit.h> 81 82 #include <vm/vm.h> 83 #include <vm/vm_param.h> 84 #include <vm/pmap.h> 85 #include <vm/vm_kern.h> 86 #include <vm/vm_map.h> 87 #include <vm/vm_page.h> 88 #include <vm/vm_extern.h> 89 90 #include <machine/cpu.h> 91 #include <machine/intr_machdep.h> 92 #include <x86/mca.h> 93 #include <machine/md_var.h> 94 #include <machine/pcb.h> 95 #ifdef SMP 96 #include <machine/smp.h> 97 #endif 98 #include <machine/stack.h> 99 #include <machine/trap.h> 100 #include <machine/tss.h> 101 #include <machine/vm86.h> 102 103 #ifdef POWERFAIL_NMI 104 #include <sys/syslog.h> 105 #include <machine/clock.h> 106 #endif 107 108 #ifdef KDTRACE_HOOKS 109 #include <sys/dtrace_bsd.h> 110 #endif 111 112 void trap(struct trapframe *frame); 113 void syscall(struct trapframe *frame); 114 115 static int trap_pfault(struct trapframe *, bool, vm_offset_t, int *, int *); 116 static void trap_fatal(struct trapframe *, vm_offset_t); 117 #ifdef KDTRACE_HOOKS 118 static bool trap_user_dtrace(struct trapframe *, 119 int (**hook)(struct trapframe *)); 120 #endif 121 void dblfault_handler(void); 122 123 extern inthand_t IDTVEC(bpt), IDTVEC(dbg), IDTVEC(int0x80_syscall); 124 extern uint64_t pg_nx; 125 126 struct trap_data { 127 bool ei; 128 const char *msg; 129 }; 130 131 static const struct trap_data trap_data[] = { 132 [T_PRIVINFLT] = { .ei = true, .msg = "privileged instruction fault" }, 133 [T_BPTFLT] = { .ei = false, .msg = "breakpoint instruction fault" }, 134 [T_ARITHTRAP] = { .ei = true, .msg = "arithmetic trap" }, 135 [T_PROTFLT] = { .ei = true, .msg = "general protection fault" }, 136 [T_TRCTRAP] = { .ei = false, .msg = "debug exception" }, 137 [T_PAGEFLT] = { .ei = true, .msg = "page fault" }, 138 [T_ALIGNFLT] = { .ei = true, .msg = "alignment fault" }, 139 [T_DIVIDE] = { .ei = true, .msg = "integer divide fault" }, 140 [T_NMI] = { .ei = false, .msg = "non-maskable interrupt trap" }, 141 [T_OFLOW] = { .ei = true, .msg = "overflow trap" }, 142 [T_BOUND] = { .ei = true, .msg = "FPU bounds check fault" }, 143 [T_DNA] = { .ei = true, .msg = "FPU device not available" }, 144 [T_DOUBLEFLT] = { .ei = false, .msg = "double fault" }, 145 [T_FPOPFLT] = { .ei = true, .msg = "FPU operand fetch fault" }, 146 [T_TSSFLT] = { .ei = true, .msg = "invalid TSS fault" }, 147 [T_SEGNPFLT] = { .ei = true, .msg = "segment not present fault" }, 148 [T_STKFLT] = { .ei = true, .msg = "stack fault" }, 149 [T_MCHK] = { .ei = true, .msg = "machine check trap" }, 150 [T_XMMFLT] = { .ei = true, .msg = "SIMD floating-point exception" }, 151 [T_DTRACE_RET] ={ .ei = true, .msg = "DTrace pid return trap" }, 152 }; 153 154 static bool 155 trap_enable_intr(int trapno) 156 { 157 158 MPASS(trapno > 0); 159 if (trapno < nitems(trap_data) && trap_data[trapno].msg != NULL) 160 return (trap_data[trapno].ei); 161 return (false); 162 } 163 164 static const char * 165 trap_msg(int trapno) 166 { 167 const char *res; 168 static const char unkn[] = "UNKNOWN"; 169 170 res = NULL; 171 if (trapno < nitems(trap_data)) 172 res = trap_data[trapno].msg; 173 if (res == NULL) 174 res = unkn; 175 return (res); 176 } 177 178 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 179 int has_f00f_bug = 0; /* Initialized so that it can be patched. */ 180 #endif 181 182 static int uprintf_signal; 183 SYSCTL_INT(_machdep, OID_AUTO, uprintf_signal, CTLFLAG_RW, 184 &uprintf_signal, 0, 185 "Print debugging information on trap signal to ctty"); 186 187 188 #ifdef INVARIANTS 189 static __inline register_t 190 read_esp(void) 191 { 192 register_t res; 193 194 __asm __volatile("movl\t%%esp,%0" : "=r" (res)); 195 return (res); 196 } 197 198 void 199 trap_check_kstack(void) 200 { 201 struct thread *td; 202 vm_offset_t stk; 203 204 td = curthread; 205 stk = read_esp(); 206 if (stk >= PMAP_TRM_MIN_ADDRESS) 207 panic("td %p stack %#x in trampoline", td, stk); 208 if (!kstack_contains(td, stk, 0)) 209 panic("td %p stack %#x not in kstack VA %#x %d", 210 td, stk, td->td_kstack, td->td_kstack_pages); 211 } 212 #endif 213 214 /* 215 * Exception, fault, and trap interface to the FreeBSD kernel. 216 * This common code is called from assembly language IDT gate entry 217 * routines that prepare a suitable stack frame, and restore this 218 * frame after the exception has been processed. 219 */ 220 221 void 222 trap(struct trapframe *frame) 223 { 224 ksiginfo_t ksi; 225 struct thread *td; 226 struct proc *p; 227 int pf, signo, ucode; 228 u_int type; 229 register_t addr, dr6; 230 vm_offset_t eva; 231 #ifdef POWERFAIL_NMI 232 static int lastalert = 0; 233 #endif 234 235 td = curthread; 236 p = td->td_proc; 237 dr6 = 0; 238 239 VM_CNT_INC(v_trap); 240 type = frame->tf_trapno; 241 242 KASSERT((read_eflags() & PSL_I) == 0, 243 ("trap: interrupts enabled, type %d frame %p", type, frame)); 244 245 #ifdef SMP 246 /* Handler for NMI IPIs used for stopping CPUs. */ 247 if (type == T_NMI && ipi_nmi_handler() == 0) 248 return; 249 #endif /* SMP */ 250 251 #ifdef KDB 252 if (kdb_active) { 253 kdb_reenter(); 254 return; 255 } 256 #endif 257 trap_check_kstack(); 258 259 if (type == T_RESERVED) { 260 trap_fatal(frame, 0); 261 return; 262 } 263 264 if (type == T_NMI) { 265 #ifdef HWPMC_HOOKS 266 /* 267 * CPU PMCs interrupt using an NMI so we check for that first. 268 * If the HWPMC module is active, 'pmc_hook' will point to 269 * the function to be called. A non-zero return value from the 270 * hook means that the NMI was consumed by it and that we can 271 * return immediately. 272 */ 273 if (pmc_intr != NULL && 274 (*pmc_intr)(frame) != 0) 275 return; 276 #endif 277 } 278 279 if (type == T_MCHK) { 280 mca_intr(); 281 return; 282 } 283 284 #ifdef KDTRACE_HOOKS 285 /* 286 * A trap can occur while DTrace executes a probe. Before 287 * executing the probe, DTrace blocks re-scheduling and sets 288 * a flag in its per-cpu flags to indicate that it doesn't 289 * want to fault. On returning from the probe, the no-fault 290 * flag is cleared and finally re-scheduling is enabled. 291 */ 292 if ((type == T_PROTFLT || type == T_PAGEFLT) && 293 dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type)) 294 return; 295 #endif 296 297 /* 298 * We must not allow context switches until %cr2 is read. 299 * Also, for some Cyrix CPUs, %cr2 is clobbered by interrupts. 300 * All faults use interrupt gates, so %cr2 can be safely read 301 * now, before optional enable of the interrupts below. 302 */ 303 if (type == T_PAGEFLT) 304 eva = rcr2(); 305 306 /* 307 * Buggy application or kernel code has disabled interrupts 308 * and then trapped. Enabling interrupts now is wrong, but it 309 * is better than running with interrupts disabled until they 310 * are accidentally enabled later. 311 */ 312 if ((frame->tf_eflags & PSL_I) == 0 && TRAPF_USERMODE(frame) && 313 (curpcb->pcb_flags & PCB_VM86CALL) == 0) 314 uprintf("pid %ld (%s): usermode trap %d (%s) with " 315 "interrupts disabled\n", 316 (long)curproc->p_pid, curthread->td_name, type, 317 trap_data[type].msg); 318 319 /* 320 * Conditionally reenable interrupts. If we hold a spin lock, 321 * then we must not reenable interrupts. This might be a 322 * spurious page fault. 323 */ 324 if (trap_enable_intr(type) && td->td_md.md_spinlock_count == 0 && 325 frame->tf_eip != (int)cpu_switch_load_gs) 326 enable_intr(); 327 328 if (TRAPF_USERMODE(frame) && (curpcb->pcb_flags & PCB_VM86CALL) == 0) { 329 /* user trap */ 330 331 td->td_pticks = 0; 332 td->td_frame = frame; 333 addr = frame->tf_eip; 334 if (td->td_cowgen != atomic_load_int(&p->p_cowgen)) 335 thread_cow_update(td); 336 337 switch (type) { 338 case T_PRIVINFLT: /* privileged instruction fault */ 339 signo = SIGILL; 340 ucode = ILL_PRVOPC; 341 break; 342 343 case T_BPTFLT: /* bpt instruction fault */ 344 #ifdef KDTRACE_HOOKS 345 if (trap_user_dtrace(frame, &dtrace_pid_probe_ptr)) 346 return; 347 #else 348 enable_intr(); 349 #endif 350 signo = SIGTRAP; 351 ucode = TRAP_BRKPT; 352 break; 353 354 case T_TRCTRAP: /* debug exception */ 355 enable_intr(); 356 user_trctrap_out: 357 signo = SIGTRAP; 358 ucode = TRAP_TRACE; 359 dr6 = rdr6(); 360 if ((dr6 & DBREG_DR6_BS) != 0) { 361 PROC_LOCK(td->td_proc); 362 if ((td->td_dbgflags & TDB_STEP) != 0) { 363 td->td_frame->tf_eflags &= ~PSL_T; 364 td->td_dbgflags &= ~TDB_STEP; 365 } 366 PROC_UNLOCK(td->td_proc); 367 } 368 break; 369 370 case T_ARITHTRAP: /* arithmetic trap */ 371 ucode = npxtrap_x87(); 372 if (ucode == -1) 373 return; 374 signo = SIGFPE; 375 break; 376 377 /* 378 * The following two traps can happen in vm86 mode, 379 * and, if so, we want to handle them specially. 380 */ 381 case T_PROTFLT: /* general protection fault */ 382 case T_STKFLT: /* stack fault */ 383 if (frame->tf_eflags & PSL_VM) { 384 signo = vm86_emulate((struct vm86frame *)frame); 385 ucode = 0; /* XXXKIB: better code ? */ 386 if (signo == SIGTRAP) { 387 load_dr6(rdr6() | 0x4000); 388 goto user_trctrap_out; 389 } 390 if (signo == 0) 391 goto user; 392 break; 393 } 394 signo = SIGBUS; 395 ucode = (type == T_PROTFLT) ? BUS_OBJERR : BUS_ADRERR; 396 break; 397 case T_SEGNPFLT: /* segment not present fault */ 398 signo = SIGBUS; 399 ucode = BUS_ADRERR; 400 break; 401 case T_TSSFLT: /* invalid TSS fault */ 402 signo = SIGBUS; 403 ucode = BUS_OBJERR; 404 break; 405 case T_ALIGNFLT: 406 signo = SIGBUS; 407 ucode = BUS_ADRALN; 408 break; 409 case T_DOUBLEFLT: /* double fault */ 410 default: 411 signo = SIGBUS; 412 ucode = BUS_OBJERR; 413 break; 414 415 case T_PAGEFLT: /* page fault */ 416 addr = eva; 417 pf = trap_pfault(frame, true, eva, &signo, &ucode); 418 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 419 if (pf == -2) { 420 /* 421 * The f00f hack workaround has triggered, so 422 * treat the fault as an illegal instruction 423 * (T_PRIVINFLT) instead of a page fault. 424 */ 425 type = frame->tf_trapno = T_PRIVINFLT; 426 break; 427 } 428 #endif 429 if (pf == -1) 430 return; 431 if (pf == 0) 432 goto user; 433 break; 434 435 case T_DIVIDE: /* integer divide fault */ 436 ucode = FPE_INTDIV; 437 signo = SIGFPE; 438 break; 439 440 case T_NMI: 441 #ifdef POWERFAIL_NMI 442 #ifndef TIMER_FREQ 443 # define TIMER_FREQ 1193182 444 #endif 445 if (time_second - lastalert > 10) { 446 log(LOG_WARNING, "NMI: power fail\n"); 447 sysbeep(880, SBT_1S); 448 lastalert = time_second; 449 } 450 return; 451 #else /* !POWERFAIL_NMI */ 452 nmi_handle_intr(type, frame); 453 return; 454 #endif /* POWERFAIL_NMI */ 455 456 case T_OFLOW: /* integer overflow fault */ 457 ucode = FPE_INTOVF; 458 signo = SIGFPE; 459 break; 460 461 case T_BOUND: /* bounds check fault */ 462 ucode = FPE_FLTSUB; 463 signo = SIGFPE; 464 break; 465 466 case T_DNA: 467 KASSERT(PCB_USER_FPU(td->td_pcb), 468 ("kernel FPU ctx has leaked")); 469 /* transparent fault (due to context switch "late") */ 470 if (npxdna()) 471 return; 472 uprintf("pid %d killed due to lack of floating point\n", 473 p->p_pid); 474 signo = SIGKILL; 475 ucode = 0; 476 break; 477 478 case T_FPOPFLT: /* FPU operand fetch fault */ 479 ucode = ILL_COPROC; 480 signo = SIGILL; 481 break; 482 483 case T_XMMFLT: /* SIMD floating-point exception */ 484 ucode = npxtrap_sse(); 485 if (ucode == -1) 486 return; 487 signo = SIGFPE; 488 break; 489 #ifdef KDTRACE_HOOKS 490 case T_DTRACE_RET: 491 (void)trap_user_dtrace(frame, &dtrace_return_probe_ptr); 492 return; 493 #endif 494 } 495 } else { 496 /* kernel trap */ 497 498 KASSERT(cold || td->td_ucred != NULL, 499 ("kernel trap doesn't have ucred")); 500 switch (type) { 501 case T_PAGEFLT: /* page fault */ 502 (void)trap_pfault(frame, false, eva, NULL, NULL); 503 return; 504 505 case T_DNA: 506 if (PCB_USER_FPU(td->td_pcb)) 507 panic("Unregistered use of FPU in kernel"); 508 if (npxdna()) 509 return; 510 break; 511 512 case T_ARITHTRAP: /* arithmetic trap */ 513 case T_XMMFLT: /* SIMD floating-point exception */ 514 case T_FPOPFLT: /* FPU operand fetch fault */ 515 /* 516 * XXXKIB for now disable any FPU traps in kernel 517 * handler registration seems to be overkill 518 */ 519 trap_fatal(frame, 0); 520 return; 521 522 /* 523 * The following two traps can happen in 524 * vm86 mode, and, if so, we want to handle 525 * them specially. 526 */ 527 case T_PROTFLT: /* general protection fault */ 528 case T_STKFLT: /* stack fault */ 529 if (frame->tf_eflags & PSL_VM) { 530 signo = vm86_emulate((struct vm86frame *)frame); 531 if (signo == SIGTRAP) { 532 type = T_TRCTRAP; 533 load_dr6(rdr6() | 0x4000); 534 goto kernel_trctrap; 535 } 536 if (signo != 0) 537 /* 538 * returns to original process 539 */ 540 vm86_trap((struct vm86frame *)frame); 541 return; 542 } 543 /* FALL THROUGH */ 544 case T_SEGNPFLT: /* segment not present fault */ 545 if (curpcb->pcb_flags & PCB_VM86CALL) 546 break; 547 548 /* 549 * Invalid %fs's and %gs's can be created using 550 * procfs or PT_SETREGS or by invalidating the 551 * underlying LDT entry. This causes a fault 552 * in kernel mode when the kernel attempts to 553 * switch contexts. Lose the bad context 554 * (XXX) so that we can continue, and generate 555 * a signal. 556 */ 557 if (frame->tf_eip == (int)cpu_switch_load_gs) { 558 curpcb->pcb_gs = 0; 559 #if 0 560 PROC_LOCK(p); 561 kern_psignal(p, SIGBUS); 562 PROC_UNLOCK(p); 563 #endif 564 return; 565 } 566 567 if (td->td_intr_nesting_level != 0) 568 break; 569 570 /* 571 * Invalid segment selectors and out of bounds 572 * %eip's and %esp's can be set up in user mode. 573 * This causes a fault in kernel mode when the 574 * kernel tries to return to user mode. We want 575 * to get this fault so that we can fix the 576 * problem here and not have to check all the 577 * selectors and pointers when the user changes 578 * them. 579 * 580 * N.B. Comparing to long mode, 32-bit mode 581 * does not push %esp on the trap frame, 582 * because iretl faulted while in ring 0. As 583 * the consequence, there is no need to fixup 584 * the stack pointer for doreti_iret_fault, 585 * the fixup and the complimentary trap() call 586 * are executed on the main thread stack, not 587 * on the trampoline stack. 588 */ 589 if (frame->tf_eip == (int)doreti_iret + setidt_disp) { 590 frame->tf_eip = (int)doreti_iret_fault + 591 setidt_disp; 592 return; 593 } 594 if (type == T_STKFLT) 595 break; 596 597 if (frame->tf_eip == (int)doreti_popl_ds + 598 setidt_disp) { 599 frame->tf_eip = (int)doreti_popl_ds_fault + 600 setidt_disp; 601 return; 602 } 603 if (frame->tf_eip == (int)doreti_popl_es + 604 setidt_disp) { 605 frame->tf_eip = (int)doreti_popl_es_fault + 606 setidt_disp; 607 return; 608 } 609 if (frame->tf_eip == (int)doreti_popl_fs + 610 setidt_disp) { 611 frame->tf_eip = (int)doreti_popl_fs_fault + 612 setidt_disp; 613 return; 614 } 615 if (curpcb->pcb_onfault != NULL) { 616 frame->tf_eip = (int)curpcb->pcb_onfault; 617 return; 618 } 619 break; 620 621 case T_TSSFLT: 622 /* 623 * PSL_NT can be set in user mode and isn't cleared 624 * automatically when the kernel is entered. This 625 * causes a TSS fault when the kernel attempts to 626 * `iret' because the TSS link is uninitialized. We 627 * want to get this fault so that we can fix the 628 * problem here and not every time the kernel is 629 * entered. 630 */ 631 if (frame->tf_eflags & PSL_NT) { 632 frame->tf_eflags &= ~PSL_NT; 633 return; 634 } 635 break; 636 637 case T_TRCTRAP: /* debug exception */ 638 kernel_trctrap: 639 /* Clear any pending debug events. */ 640 dr6 = rdr6(); 641 load_dr6(0); 642 643 /* 644 * Ignore debug register exceptions due to 645 * accesses in the user's address space, which 646 * can happen under several conditions such as 647 * if a user sets a watchpoint on a buffer and 648 * then passes that buffer to a system call. 649 * We still want to get TRCTRAPS for addresses 650 * in kernel space because that is useful when 651 * debugging the kernel. 652 */ 653 if (user_dbreg_trap(dr6) && 654 !(curpcb->pcb_flags & PCB_VM86CALL)) 655 return; 656 657 /* 658 * Malicious user code can configure a debug 659 * register watchpoint to trap on data access 660 * to the top of stack and then execute 'pop 661 * %ss; int 3'. Due to exception deferral for 662 * 'pop %ss', the CPU will not interrupt 'int 663 * 3' to raise the DB# exception for the debug 664 * register but will postpone the DB# until 665 * execution of the first instruction of the 666 * BP# handler (in kernel mode). Normally the 667 * previous check would ignore DB# exceptions 668 * for watchpoints on user addresses raised in 669 * kernel mode. However, some CPU errata 670 * include cases where DB# exceptions do not 671 * properly set bits in %dr6, e.g. Haswell 672 * HSD23 and Skylake-X SKZ24. 673 * 674 * A deferred DB# can also be raised on the 675 * first instructions of system call entry 676 * points or single-step traps via similar use 677 * of 'pop %ss' or 'mov xxx, %ss'. 678 */ 679 if (frame->tf_eip == 680 (uintptr_t)IDTVEC(int0x80_syscall) + setidt_disp || 681 frame->tf_eip == (uintptr_t)IDTVEC(bpt) + 682 setidt_disp || 683 frame->tf_eip == (uintptr_t)IDTVEC(dbg) + 684 setidt_disp) 685 return; 686 /* 687 * FALLTHROUGH (TRCTRAP kernel mode, kernel address) 688 */ 689 case T_BPTFLT: 690 /* 691 * If KDB is enabled, let it handle the debugger trap. 692 * Otherwise, debugger traps "can't happen". 693 */ 694 #ifdef KDB 695 if (kdb_trap(type, dr6, frame)) 696 return; 697 #endif 698 break; 699 700 case T_NMI: 701 #ifdef POWERFAIL_NMI 702 if (time_second - lastalert > 10) { 703 log(LOG_WARNING, "NMI: power fail\n"); 704 sysbeep(880, SBT_1S); 705 lastalert = time_second; 706 } 707 return; 708 #else /* !POWERFAIL_NMI */ 709 nmi_handle_intr(type, frame); 710 return; 711 #endif /* POWERFAIL_NMI */ 712 } 713 714 trap_fatal(frame, eva); 715 return; 716 } 717 718 ksiginfo_init_trap(&ksi); 719 ksi.ksi_signo = signo; 720 ksi.ksi_code = ucode; 721 ksi.ksi_addr = (void *)addr; 722 ksi.ksi_trapno = type; 723 if (uprintf_signal) { 724 uprintf("pid %d comm %s: signal %d err %#x code %d type %d " 725 "addr %#x ss %#04x esp %#08x cs %#04x eip %#08x eax %#08x" 726 "<%02x %02x %02x %02x %02x %02x %02x %02x>\n", 727 p->p_pid, p->p_comm, signo, frame->tf_err, ucode, type, 728 addr, frame->tf_ss, frame->tf_esp, frame->tf_cs, 729 frame->tf_eip, frame->tf_eax, 730 fubyte((void *)(frame->tf_eip + 0)), 731 fubyte((void *)(frame->tf_eip + 1)), 732 fubyte((void *)(frame->tf_eip + 2)), 733 fubyte((void *)(frame->tf_eip + 3)), 734 fubyte((void *)(frame->tf_eip + 4)), 735 fubyte((void *)(frame->tf_eip + 5)), 736 fubyte((void *)(frame->tf_eip + 6)), 737 fubyte((void *)(frame->tf_eip + 7))); 738 } 739 KASSERT((read_eflags() & PSL_I) != 0, ("interrupts disabled")); 740 trapsignal(td, &ksi); 741 742 user: 743 userret(td, frame); 744 KASSERT(PCB_USER_FPU(td->td_pcb), 745 ("Return from trap with kernel FPU ctx leaked")); 746 } 747 748 /* 749 * Handle all details of a page fault. 750 * Returns: 751 * -2 if the fault was caused by triggered workaround for Intel Pentium 752 * 0xf00f bug. 753 * -1 if this fault was fatal, typically from kernel mode 754 * (cannot happen, but we need to return something). 755 * 0 if this fault was handled by updating either the user or kernel 756 * page table, execution can continue. 757 * 1 if this fault was from usermode and it was not handled, a synchronous 758 * signal should be delivered to the thread. *signo returns the signal 759 * number, *ucode gives si_code. 760 */ 761 static int 762 trap_pfault(struct trapframe *frame, bool usermode, vm_offset_t eva, 763 int *signo, int *ucode) 764 { 765 struct thread *td; 766 struct proc *p; 767 vm_map_t map; 768 int rv; 769 vm_prot_t ftype; 770 771 MPASS(!usermode || (signo != NULL && ucode != NULL)); 772 773 td = curthread; 774 p = td->td_proc; 775 776 if (__predict_false((td->td_pflags & TDP_NOFAULTING) != 0)) { 777 /* 778 * Due to both processor errata and lazy TLB invalidation when 779 * access restrictions are removed from virtual pages, memory 780 * accesses that are allowed by the physical mapping layer may 781 * nonetheless cause one spurious page fault per virtual page. 782 * When the thread is executing a "no faulting" section that 783 * is bracketed by vm_fault_{disable,enable}_pagefaults(), 784 * every page fault is treated as a spurious page fault, 785 * unless it accesses the same virtual address as the most 786 * recent page fault within the same "no faulting" section. 787 */ 788 if (td->td_md.md_spurflt_addr != eva || 789 (td->td_pflags & TDP_RESETSPUR) != 0) { 790 /* 791 * Do nothing to the TLB. A stale TLB entry is 792 * flushed automatically by a page fault. 793 */ 794 td->td_md.md_spurflt_addr = eva; 795 td->td_pflags &= ~TDP_RESETSPUR; 796 return (0); 797 } 798 } else { 799 /* 800 * If we get a page fault while in a critical section, then 801 * it is most likely a fatal kernel page fault. The kernel 802 * is already going to panic trying to get a sleep lock to 803 * do the VM lookup, so just consider it a fatal trap so the 804 * kernel can print out a useful trap message and even get 805 * to the debugger. 806 * 807 * If we get a page fault while holding a non-sleepable 808 * lock, then it is most likely a fatal kernel page fault. 809 * If WITNESS is enabled, then it's going to whine about 810 * bogus LORs with various VM locks, so just skip to the 811 * fatal trap handling directly. 812 */ 813 if (td->td_critnest != 0 || 814 WITNESS_CHECK(WARN_SLEEPOK | WARN_GIANTOK, NULL, 815 "Kernel page fault") != 0) { 816 trap_fatal(frame, eva); 817 return (-1); 818 } 819 } 820 if (eva >= PMAP_TRM_MIN_ADDRESS) { 821 /* 822 * Don't allow user-mode faults in kernel address space. 823 * An exception: if the faulting address is the invalid 824 * instruction entry in the IDT, then the Intel Pentium 825 * F00F bug workaround was triggered, and we need to 826 * treat it is as an illegal instruction, and not a page 827 * fault. 828 */ 829 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 830 if ((eva == (unsigned int)&idt[6]) && has_f00f_bug) { 831 *ucode = ILL_PRVOPC; 832 *signo = SIGILL; 833 return (-2); 834 } 835 #endif 836 if (usermode) { 837 *signo = SIGSEGV; 838 *ucode = SEGV_MAPERR; 839 return (1); 840 } 841 trap_fatal(frame, eva); 842 return (-1); 843 } else { 844 map = usermode ? &p->p_vmspace->vm_map : kernel_map; 845 846 /* 847 * Kernel cannot access a user-space address directly 848 * because user pages are not mapped. Also, page 849 * faults must not be caused during the interrupts. 850 */ 851 if (!usermode && td->td_intr_nesting_level != 0) { 852 trap_fatal(frame, eva); 853 return (-1); 854 } 855 } 856 857 /* 858 * If the trap was caused by errant bits in the PTE then panic. 859 */ 860 if (frame->tf_err & PGEX_RSV) { 861 trap_fatal(frame, eva); 862 return (-1); 863 } 864 865 /* 866 * PGEX_I is defined only if the execute disable bit capability is 867 * supported and enabled. 868 */ 869 if (frame->tf_err & PGEX_W) 870 ftype = VM_PROT_WRITE; 871 else if ((frame->tf_err & PGEX_I) && pg_nx != 0) 872 ftype = VM_PROT_EXECUTE; 873 else 874 ftype = VM_PROT_READ; 875 876 /* Fault in the page. */ 877 rv = vm_fault_trap(map, eva, ftype, VM_FAULT_NORMAL, signo, ucode); 878 if (rv == KERN_SUCCESS) { 879 #ifdef HWPMC_HOOKS 880 if (ftype == VM_PROT_READ || ftype == VM_PROT_WRITE) { 881 PMC_SOFT_CALL_TF( , , page_fault, all, frame); 882 if (ftype == VM_PROT_READ) 883 PMC_SOFT_CALL_TF( , , page_fault, read, 884 frame); 885 else 886 PMC_SOFT_CALL_TF( , , page_fault, write, 887 frame); 888 } 889 #endif 890 return (0); 891 } 892 if (usermode) 893 return (1); 894 if (td->td_intr_nesting_level == 0 && 895 curpcb->pcb_onfault != NULL) { 896 frame->tf_eip = (int)curpcb->pcb_onfault; 897 return (0); 898 } 899 trap_fatal(frame, eva); 900 return (-1); 901 } 902 903 static void 904 trap_fatal(struct trapframe *frame, vm_offset_t eva) 905 { 906 int code, ss, esp; 907 u_int type; 908 struct soft_segment_descriptor softseg; 909 #ifdef KDB 910 bool handled; 911 #endif 912 913 code = frame->tf_err; 914 type = frame->tf_trapno; 915 sdtossd(&gdt[IDXSEL(frame->tf_cs & 0xffff)].sd, &softseg); 916 917 printf("\n\nFatal trap %d: %s while in %s mode\n", type, trap_msg(type), 918 frame->tf_eflags & PSL_VM ? "vm86" : 919 ISPL(frame->tf_cs) == SEL_UPL ? "user" : "kernel"); 920 #ifdef SMP 921 /* two separate prints in case of a trap on an unmapped page */ 922 printf("cpuid = %d; ", PCPU_GET(cpuid)); 923 printf("apic id = %02x\n", PCPU_GET(apic_id)); 924 #endif 925 if (type == T_PAGEFLT) { 926 printf("fault virtual address = 0x%x\n", eva); 927 printf("fault code = %s %s%s, %s\n", 928 code & PGEX_U ? "user" : "supervisor", 929 code & PGEX_W ? "write" : "read", 930 pg_nx != 0 ? 931 (code & PGEX_I ? " instruction" : " data") : 932 "", 933 code & PGEX_RSV ? "reserved bits in PTE" : 934 code & PGEX_P ? "protection violation" : "page not present"); 935 } else { 936 printf("error code = %#x\n", code); 937 } 938 printf("instruction pointer = 0x%x:0x%x\n", 939 frame->tf_cs & 0xffff, frame->tf_eip); 940 if (TF_HAS_STACKREGS(frame)) { 941 ss = frame->tf_ss & 0xffff; 942 esp = frame->tf_esp; 943 } else { 944 ss = GSEL(GDATA_SEL, SEL_KPL); 945 esp = (int)&frame->tf_esp; 946 } 947 printf("stack pointer = 0x%x:0x%x\n", ss, esp); 948 printf("frame pointer = 0x%x:0x%x\n", ss, frame->tf_ebp); 949 printf("code segment = base 0x%x, limit 0x%x, type 0x%x\n", 950 softseg.ssd_base, softseg.ssd_limit, softseg.ssd_type); 951 printf(" = DPL %d, pres %d, def32 %d, gran %d\n", 952 softseg.ssd_dpl, softseg.ssd_p, softseg.ssd_def32, 953 softseg.ssd_gran); 954 printf("processor eflags = "); 955 if (frame->tf_eflags & PSL_T) 956 printf("trace trap, "); 957 if (frame->tf_eflags & PSL_I) 958 printf("interrupt enabled, "); 959 if (frame->tf_eflags & PSL_NT) 960 printf("nested task, "); 961 if (frame->tf_eflags & PSL_RF) 962 printf("resume, "); 963 if (frame->tf_eflags & PSL_VM) 964 printf("vm86, "); 965 printf("IOPL = %d\n", (frame->tf_eflags & PSL_IOPL) >> 12); 966 printf("current process = %d (%s)\n", 967 curproc->p_pid, curthread->td_name); 968 969 #ifdef KDB 970 if (debugger_on_trap) { 971 kdb_why = KDB_WHY_TRAP; 972 frame->tf_err = eva; /* smuggle fault address to ddb */ 973 handled = kdb_trap(type, 0, frame); 974 frame->tf_err = code; /* restore error code */ 975 kdb_why = KDB_WHY_UNSET; 976 if (handled) 977 return; 978 } 979 #endif 980 printf("trap number = %d\n", type); 981 if (trap_msg(type) != NULL) 982 panic("%s", trap_msg(type)); 983 else 984 panic("unknown/reserved trap"); 985 } 986 987 #ifdef KDTRACE_HOOKS 988 /* 989 * Invoke a userspace DTrace hook. The hook pointer is cleared when no 990 * userspace probes are enabled, so we must synchronize with DTrace to ensure 991 * that a trapping thread is able to call the hook before it is cleared. 992 */ 993 static bool 994 trap_user_dtrace(struct trapframe *frame, int (**hookp)(struct trapframe *)) 995 { 996 int (*hook)(struct trapframe *); 997 998 hook = atomic_load_ptr(hookp); 999 enable_intr(); 1000 if (hook != NULL) 1001 return ((hook)(frame) == 0); 1002 return (false); 1003 } 1004 #endif 1005 1006 /* 1007 * Double fault handler. Called when a fault occurs while writing 1008 * a frame for a trap/exception onto the stack. This usually occurs 1009 * when the stack overflows (such is the case with infinite recursion, 1010 * for example). 1011 * 1012 * XXX Note that the current PTD gets replaced by IdlePTD when the 1013 * task switch occurs. This means that the stack that was active at 1014 * the time of the double fault is not available at <kstack> unless 1015 * the machine was idle when the double fault occurred. The downside 1016 * of this is that "trace <ebp>" in ddb won't work. 1017 */ 1018 void 1019 dblfault_handler(void) 1020 { 1021 struct i386tss *t; 1022 1023 #ifdef KDTRACE_HOOKS 1024 if (dtrace_doubletrap_func != NULL) 1025 (*dtrace_doubletrap_func)(); 1026 #endif 1027 printf("\nFatal double fault:\n"); 1028 t = PCPU_GET(common_tssp); 1029 printf( 1030 "eip = %#08x esp = %#08x ebp = %#08x eax = %#08x\n" 1031 "edx = %#08x ecx = %#08x edi = %#08x esi = %#08x\n" 1032 "ebx = %#08x\n" 1033 "psl = %#08x cs = %#08x ss = %#08x ds = %#08x\n" 1034 "es = %#08x fs = %#08x gs = %#08x cr3 = %#08x\n", 1035 t->tss_eip, t->tss_esp, t->tss_ebp, t->tss_eax, 1036 t->tss_edx, t->tss_ecx, t->tss_edi, t->tss_esi, 1037 t->tss_ebx, 1038 t->tss_eflags, t->tss_cs, t->tss_ss, t->tss_ds, 1039 t->tss_es, t->tss_fs, t->tss_gs, t->tss_cr3); 1040 #ifdef SMP 1041 printf("cpuid = %d; apic id = %02x\n", PCPU_GET(cpuid), 1042 PCPU_GET(apic_id)); 1043 #endif 1044 panic("double fault"); 1045 } 1046 1047 int 1048 cpu_fetch_syscall_args(struct thread *td) 1049 { 1050 struct proc *p; 1051 struct trapframe *frame; 1052 struct syscall_args *sa; 1053 caddr_t params; 1054 long tmp; 1055 int error; 1056 #ifdef COMPAT_43 1057 u_int32_t eip; 1058 int cs; 1059 #endif 1060 1061 p = td->td_proc; 1062 frame = td->td_frame; 1063 sa = &td->td_sa; 1064 1065 #ifdef COMPAT_43 1066 if (__predict_false(frame->tf_cs == 7 && frame->tf_eip == 2)) { 1067 /* 1068 * In lcall $7,$0 after int $0x80. Convert the user 1069 * frame to what it would be for a direct int 0x80 instead 1070 * of lcall $7,$0, by popping the lcall return address. 1071 */ 1072 error = fueword32((void *)frame->tf_esp, &eip); 1073 if (error == -1) 1074 return (EFAULT); 1075 cs = fuword16((void *)(frame->tf_esp + sizeof(u_int32_t))); 1076 if (cs == -1) 1077 return (EFAULT); 1078 1079 /* 1080 * Unwind in-kernel frame after all stack frame pieces 1081 * were successfully read. 1082 */ 1083 frame->tf_eip = eip; 1084 frame->tf_cs = cs; 1085 frame->tf_esp += 2 * sizeof(u_int32_t); 1086 frame->tf_err = 7; /* size of lcall $7,$0 */ 1087 } 1088 #endif 1089 1090 sa->code = frame->tf_eax; 1091 sa->original_code = sa->code; 1092 params = (caddr_t)frame->tf_esp + sizeof(uint32_t); 1093 1094 /* 1095 * Need to check if this is a 32 bit or 64 bit syscall. 1096 */ 1097 if (sa->code == SYS_syscall) { 1098 /* 1099 * Code is first argument, followed by actual args. 1100 */ 1101 error = fueword(params, &tmp); 1102 if (error == -1) 1103 return (EFAULT); 1104 sa->code = tmp; 1105 params += sizeof(uint32_t); 1106 } else if (sa->code == SYS___syscall) { 1107 /* 1108 * Like syscall, but code is a quad, so as to maintain 1109 * quad alignment for the rest of the arguments. 1110 */ 1111 error = fueword(params, &tmp); 1112 if (error == -1) 1113 return (EFAULT); 1114 sa->code = tmp; 1115 params += sizeof(quad_t); 1116 } 1117 1118 if (sa->code >= p->p_sysent->sv_size) 1119 sa->callp = &p->p_sysent->sv_table[0]; 1120 else 1121 sa->callp = &p->p_sysent->sv_table[sa->code]; 1122 1123 if (params != NULL && sa->callp->sy_narg != 0) 1124 error = copyin(params, (caddr_t)sa->args, 1125 (u_int)(sa->callp->sy_narg * sizeof(uint32_t))); 1126 else 1127 error = 0; 1128 1129 if (error == 0) { 1130 td->td_retval[0] = 0; 1131 td->td_retval[1] = frame->tf_edx; 1132 } 1133 1134 return (error); 1135 } 1136 1137 #include "../../kern/subr_syscall.c" 1138 1139 /* 1140 * syscall - system call request C handler. A system call is 1141 * essentially treated as a trap by reusing the frame layout. 1142 */ 1143 void 1144 syscall(struct trapframe *frame) 1145 { 1146 struct thread *td; 1147 register_t orig_tf_eflags; 1148 ksiginfo_t ksi; 1149 1150 #ifdef DIAGNOSTIC 1151 if (!(TRAPF_USERMODE(frame) && 1152 (curpcb->pcb_flags & PCB_VM86CALL) == 0)) { 1153 panic("syscall"); 1154 /* NOT REACHED */ 1155 } 1156 #endif 1157 trap_check_kstack(); 1158 orig_tf_eflags = frame->tf_eflags; 1159 1160 td = curthread; 1161 td->td_frame = frame; 1162 1163 syscallenter(td); 1164 1165 /* 1166 * Traced syscall. 1167 */ 1168 if ((orig_tf_eflags & PSL_T) && !(orig_tf_eflags & PSL_VM)) { 1169 frame->tf_eflags &= ~PSL_T; 1170 ksiginfo_init_trap(&ksi); 1171 ksi.ksi_signo = SIGTRAP; 1172 ksi.ksi_code = TRAP_TRACE; 1173 ksi.ksi_addr = (void *)frame->tf_eip; 1174 trapsignal(td, &ksi); 1175 } 1176 1177 KASSERT(PCB_USER_FPU(td->td_pcb), 1178 ("System call %s returning with kernel FPU ctx leaked", 1179 syscallname(td->td_proc, td->td_sa.code))); 1180 KASSERT(td->td_pcb->pcb_save == get_pcb_user_save_td(td), 1181 ("System call %s returning with mangled pcb_save", 1182 syscallname(td->td_proc, td->td_sa.code))); 1183 1184 syscallret(td); 1185 } 1186