1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (C) 1994, David Greenman 5 * Copyright (c) 1990, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the University of Utah, and William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)trap.c 7.4 (Berkeley) 5/13/91 40 */ 41 42 #include <sys/cdefs.h> 43 __FBSDID("$FreeBSD$"); 44 45 /* 46 * 386 Trap and System call handling 47 */ 48 49 #include "opt_clock.h" 50 #include "opt_compat.h" 51 #include "opt_cpu.h" 52 #include "opt_hwpmc_hooks.h" 53 #include "opt_isa.h" 54 #include "opt_kdb.h" 55 #include "opt_trap.h" 56 57 #include <sys/param.h> 58 #include <sys/bus.h> 59 #include <sys/systm.h> 60 #include <sys/proc.h> 61 #include <sys/pioctl.h> 62 #include <sys/ptrace.h> 63 #include <sys/kdb.h> 64 #include <sys/kernel.h> 65 #include <sys/ktr.h> 66 #include <sys/lock.h> 67 #include <sys/mutex.h> 68 #include <sys/resourcevar.h> 69 #include <sys/signalvar.h> 70 #include <sys/syscall.h> 71 #include <sys/sysctl.h> 72 #include <sys/sysent.h> 73 #include <sys/uio.h> 74 #include <sys/vmmeter.h> 75 #ifdef HWPMC_HOOKS 76 #include <sys/pmckern.h> 77 PMC_SOFT_DEFINE( , , page_fault, all); 78 PMC_SOFT_DEFINE( , , page_fault, read); 79 PMC_SOFT_DEFINE( , , page_fault, write); 80 #endif 81 #include <security/audit/audit.h> 82 83 #include <vm/vm.h> 84 #include <vm/vm_param.h> 85 #include <vm/pmap.h> 86 #include <vm/vm_kern.h> 87 #include <vm/vm_map.h> 88 #include <vm/vm_page.h> 89 #include <vm/vm_extern.h> 90 91 #include <machine/cpu.h> 92 #include <machine/intr_machdep.h> 93 #include <x86/mca.h> 94 #include <machine/md_var.h> 95 #include <machine/pcb.h> 96 #ifdef SMP 97 #include <machine/smp.h> 98 #endif 99 #include <machine/stack.h> 100 #include <machine/trap.h> 101 #include <machine/tss.h> 102 #include <machine/vm86.h> 103 104 #ifdef POWERFAIL_NMI 105 #include <sys/syslog.h> 106 #include <machine/clock.h> 107 #endif 108 109 #ifdef KDTRACE_HOOKS 110 #include <sys/dtrace_bsd.h> 111 #endif 112 113 void trap(struct trapframe *frame); 114 void syscall(struct trapframe *frame); 115 116 static int trap_pfault(struct trapframe *, bool, vm_offset_t, int *, int *); 117 static void trap_fatal(struct trapframe *, vm_offset_t); 118 #ifdef KDTRACE_HOOKS 119 static bool trap_user_dtrace(struct trapframe *, 120 int (**hook)(struct trapframe *)); 121 #endif 122 void dblfault_handler(void); 123 124 extern inthand_t IDTVEC(bpt), IDTVEC(dbg), IDTVEC(int0x80_syscall); 125 extern uint64_t pg_nx; 126 127 struct trap_data { 128 bool ei; 129 const char *msg; 130 }; 131 132 static const struct trap_data trap_data[] = { 133 [T_PRIVINFLT] = { .ei = true, .msg = "privileged instruction fault" }, 134 [T_BPTFLT] = { .ei = false, .msg = "breakpoint instruction fault" }, 135 [T_ARITHTRAP] = { .ei = true, .msg = "arithmetic trap" }, 136 [T_PROTFLT] = { .ei = true, .msg = "general protection fault" }, 137 [T_TRCTRAP] = { .ei = false, .msg = "debug exception" }, 138 [T_PAGEFLT] = { .ei = true, .msg = "page fault" }, 139 [T_ALIGNFLT] = { .ei = true, .msg = "alignment fault" }, 140 [T_DIVIDE] = { .ei = true, .msg = "integer divide fault" }, 141 [T_NMI] = { .ei = false, .msg = "non-maskable interrupt trap" }, 142 [T_OFLOW] = { .ei = true, .msg = "overflow trap" }, 143 [T_BOUND] = { .ei = true, .msg = "FPU bounds check fault" }, 144 [T_DNA] = { .ei = true, .msg = "FPU device not available" }, 145 [T_DOUBLEFLT] = { .ei = false, .msg = "double fault" }, 146 [T_FPOPFLT] = { .ei = true, .msg = "FPU operand fetch fault" }, 147 [T_TSSFLT] = { .ei = true, .msg = "invalid TSS fault" }, 148 [T_SEGNPFLT] = { .ei = true, .msg = "segment not present fault" }, 149 [T_STKFLT] = { .ei = true, .msg = "stack fault" }, 150 [T_MCHK] = { .ei = true, .msg = "machine check trap" }, 151 [T_XMMFLT] = { .ei = true, .msg = "SIMD floating-point exception" }, 152 [T_DTRACE_RET] ={ .ei = true, .msg = "DTrace pid return trap" }, 153 }; 154 155 static bool 156 trap_enable_intr(int trapno) 157 { 158 159 MPASS(trapno > 0); 160 if (trapno < nitems(trap_data) && trap_data[trapno].msg != NULL) 161 return (trap_data[trapno].ei); 162 return (false); 163 } 164 165 static const char * 166 trap_msg(int trapno) 167 { 168 const char *res; 169 static const char unkn[] = "UNKNOWN"; 170 171 res = NULL; 172 if (trapno < nitems(trap_data)) 173 res = trap_data[trapno].msg; 174 if (res == NULL) 175 res = unkn; 176 return (res); 177 } 178 179 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 180 int has_f00f_bug = 0; /* Initialized so that it can be patched. */ 181 #endif 182 183 static int uprintf_signal; 184 SYSCTL_INT(_machdep, OID_AUTO, uprintf_signal, CTLFLAG_RW, 185 &uprintf_signal, 0, 186 "Print debugging information on trap signal to ctty"); 187 188 /* 189 * Exception, fault, and trap interface to the FreeBSD kernel. 190 * This common code is called from assembly language IDT gate entry 191 * routines that prepare a suitable stack frame, and restore this 192 * frame after the exception has been processed. 193 */ 194 195 void 196 trap(struct trapframe *frame) 197 { 198 ksiginfo_t ksi; 199 struct thread *td; 200 struct proc *p; 201 int pf, signo, ucode; 202 u_int type; 203 register_t addr, dr6; 204 vm_offset_t eva; 205 #ifdef POWERFAIL_NMI 206 static int lastalert = 0; 207 #endif 208 209 td = curthread; 210 p = td->td_proc; 211 dr6 = 0; 212 213 VM_CNT_INC(v_trap); 214 type = frame->tf_trapno; 215 216 KASSERT((read_eflags() & PSL_I) == 0, 217 ("trap: interrupts enabled, type %d frame %p", type, frame)); 218 219 #ifdef SMP 220 /* Handler for NMI IPIs used for stopping CPUs. */ 221 if (type == T_NMI && ipi_nmi_handler() == 0) 222 return; 223 #endif /* SMP */ 224 225 #ifdef KDB 226 if (kdb_active) { 227 kdb_reenter(); 228 return; 229 } 230 #endif 231 232 if (type == T_RESERVED) { 233 trap_fatal(frame, 0); 234 return; 235 } 236 237 if (type == T_NMI) { 238 #ifdef HWPMC_HOOKS 239 /* 240 * CPU PMCs interrupt using an NMI so we check for that first. 241 * If the HWPMC module is active, 'pmc_hook' will point to 242 * the function to be called. A non-zero return value from the 243 * hook means that the NMI was consumed by it and that we can 244 * return immediately. 245 */ 246 if (pmc_intr != NULL && 247 (*pmc_intr)(frame) != 0) 248 return; 249 #endif 250 } 251 252 if (type == T_MCHK) { 253 mca_intr(); 254 return; 255 } 256 257 #ifdef KDTRACE_HOOKS 258 /* 259 * A trap can occur while DTrace executes a probe. Before 260 * executing the probe, DTrace blocks re-scheduling and sets 261 * a flag in its per-cpu flags to indicate that it doesn't 262 * want to fault. On returning from the probe, the no-fault 263 * flag is cleared and finally re-scheduling is enabled. 264 */ 265 if ((type == T_PROTFLT || type == T_PAGEFLT) && 266 dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type)) 267 return; 268 #endif 269 270 /* 271 * We must not allow context switches until %cr2 is read. 272 * Also, for some Cyrix CPUs, %cr2 is clobbered by interrupts. 273 * All faults use interrupt gates, so %cr2 can be safely read 274 * now, before optional enable of the interrupts below. 275 */ 276 if (type == T_PAGEFLT) 277 eva = rcr2(); 278 279 /* 280 * Buggy application or kernel code has disabled interrupts 281 * and then trapped. Enabling interrupts now is wrong, but it 282 * is better than running with interrupts disabled until they 283 * are accidentally enabled later. 284 */ 285 if ((frame->tf_eflags & PSL_I) == 0 && TRAPF_USERMODE(frame) && 286 (curpcb->pcb_flags & PCB_VM86CALL) == 0) 287 uprintf("pid %ld (%s): trap %d with interrupts disabled\n", 288 (long)curproc->p_pid, curthread->td_name, type); 289 290 /* 291 * Conditionally reenable interrupts. If we hold a spin lock, 292 * then we must not reenable interrupts. This might be a 293 * spurious page fault. 294 */ 295 if (trap_enable_intr(type) && td->td_md.md_spinlock_count == 0 && 296 frame->tf_eip != (int)cpu_switch_load_gs) 297 enable_intr(); 298 299 if (TRAPF_USERMODE(frame) && (curpcb->pcb_flags & PCB_VM86CALL) == 0) { 300 /* user trap */ 301 302 td->td_pticks = 0; 303 td->td_frame = frame; 304 addr = frame->tf_eip; 305 if (td->td_cowgen != p->p_cowgen) 306 thread_cow_update(td); 307 308 switch (type) { 309 case T_PRIVINFLT: /* privileged instruction fault */ 310 signo = SIGILL; 311 ucode = ILL_PRVOPC; 312 break; 313 314 case T_BPTFLT: /* bpt instruction fault */ 315 #ifdef KDTRACE_HOOKS 316 if (trap_user_dtrace(frame, &dtrace_pid_probe_ptr)) 317 return; 318 #else 319 enable_intr(); 320 #endif 321 signo = SIGTRAP; 322 ucode = TRAP_BRKPT; 323 break; 324 325 case T_TRCTRAP: /* debug exception */ 326 enable_intr(); 327 user_trctrap_out: 328 signo = SIGTRAP; 329 ucode = TRAP_TRACE; 330 dr6 = rdr6(); 331 if ((dr6 & DBREG_DR6_BS) != 0) { 332 PROC_LOCK(td->td_proc); 333 if ((td->td_dbgflags & TDB_STEP) != 0) { 334 td->td_frame->tf_eflags &= ~PSL_T; 335 td->td_dbgflags &= ~TDB_STEP; 336 } 337 PROC_UNLOCK(td->td_proc); 338 } 339 break; 340 341 case T_ARITHTRAP: /* arithmetic trap */ 342 ucode = npxtrap_x87(); 343 if (ucode == -1) 344 return; 345 signo = SIGFPE; 346 break; 347 348 /* 349 * The following two traps can happen in vm86 mode, 350 * and, if so, we want to handle them specially. 351 */ 352 case T_PROTFLT: /* general protection fault */ 353 case T_STKFLT: /* stack fault */ 354 if (frame->tf_eflags & PSL_VM) { 355 signo = vm86_emulate((struct vm86frame *)frame); 356 ucode = 0; /* XXXKIB: better code ? */ 357 if (signo == SIGTRAP) { 358 load_dr6(rdr6() | 0x4000); 359 goto user_trctrap_out; 360 } 361 if (signo == 0) 362 goto user; 363 break; 364 } 365 signo = SIGBUS; 366 ucode = (type == T_PROTFLT) ? BUS_OBJERR : BUS_ADRERR; 367 break; 368 case T_SEGNPFLT: /* segment not present fault */ 369 signo = SIGBUS; 370 ucode = BUS_ADRERR; 371 break; 372 case T_TSSFLT: /* invalid TSS fault */ 373 signo = SIGBUS; 374 ucode = BUS_OBJERR; 375 break; 376 case T_ALIGNFLT: 377 signo = SIGBUS; 378 ucode = BUS_ADRALN; 379 break; 380 case T_DOUBLEFLT: /* double fault */ 381 default: 382 signo = SIGBUS; 383 ucode = BUS_OBJERR; 384 break; 385 386 case T_PAGEFLT: /* page fault */ 387 addr = eva; 388 pf = trap_pfault(frame, true, eva, &signo, &ucode); 389 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 390 if (pf == -2) { 391 /* 392 * The f00f hack workaround has triggered, so 393 * treat the fault as an illegal instruction 394 * (T_PRIVINFLT) instead of a page fault. 395 */ 396 type = frame->tf_trapno = T_PRIVINFLT; 397 break; 398 } 399 #endif 400 if (pf == -1) 401 return; 402 if (pf == 0) 403 goto user; 404 break; 405 406 case T_DIVIDE: /* integer divide fault */ 407 ucode = FPE_INTDIV; 408 signo = SIGFPE; 409 break; 410 411 #ifdef DEV_ISA 412 case T_NMI: 413 #ifdef POWERFAIL_NMI 414 #ifndef TIMER_FREQ 415 # define TIMER_FREQ 1193182 416 #endif 417 if (time_second - lastalert > 10) { 418 log(LOG_WARNING, "NMI: power fail\n"); 419 sysbeep(880, hz); 420 lastalert = time_second; 421 } 422 return; 423 #else /* !POWERFAIL_NMI */ 424 nmi_handle_intr(type, frame); 425 return; 426 #endif /* POWERFAIL_NMI */ 427 #endif /* DEV_ISA */ 428 429 case T_OFLOW: /* integer overflow fault */ 430 ucode = FPE_INTOVF; 431 signo = SIGFPE; 432 break; 433 434 case T_BOUND: /* bounds check fault */ 435 ucode = FPE_FLTSUB; 436 signo = SIGFPE; 437 break; 438 439 case T_DNA: 440 KASSERT(PCB_USER_FPU(td->td_pcb), 441 ("kernel FPU ctx has leaked")); 442 /* transparent fault (due to context switch "late") */ 443 if (npxdna()) 444 return; 445 uprintf("pid %d killed due to lack of floating point\n", 446 p->p_pid); 447 signo = SIGKILL; 448 ucode = 0; 449 break; 450 451 case T_FPOPFLT: /* FPU operand fetch fault */ 452 ucode = ILL_COPROC; 453 signo = SIGILL; 454 break; 455 456 case T_XMMFLT: /* SIMD floating-point exception */ 457 ucode = npxtrap_sse(); 458 if (ucode == -1) 459 return; 460 signo = SIGFPE; 461 break; 462 #ifdef KDTRACE_HOOKS 463 case T_DTRACE_RET: 464 (void)trap_user_dtrace(frame, &dtrace_return_probe_ptr); 465 return; 466 #endif 467 } 468 } else { 469 /* kernel trap */ 470 471 KASSERT(cold || td->td_ucred != NULL, 472 ("kernel trap doesn't have ucred")); 473 switch (type) { 474 case T_PAGEFLT: /* page fault */ 475 (void)trap_pfault(frame, false, eva, NULL, NULL); 476 return; 477 478 case T_DNA: 479 if (PCB_USER_FPU(td->td_pcb)) 480 panic("Unregistered use of FPU in kernel"); 481 if (npxdna()) 482 return; 483 break; 484 485 case T_ARITHTRAP: /* arithmetic trap */ 486 case T_XMMFLT: /* SIMD floating-point exception */ 487 case T_FPOPFLT: /* FPU operand fetch fault */ 488 /* 489 * XXXKIB for now disable any FPU traps in kernel 490 * handler registration seems to be overkill 491 */ 492 trap_fatal(frame, 0); 493 return; 494 495 /* 496 * The following two traps can happen in 497 * vm86 mode, and, if so, we want to handle 498 * them specially. 499 */ 500 case T_PROTFLT: /* general protection fault */ 501 case T_STKFLT: /* stack fault */ 502 if (frame->tf_eflags & PSL_VM) { 503 signo = vm86_emulate((struct vm86frame *)frame); 504 if (signo == SIGTRAP) { 505 type = T_TRCTRAP; 506 load_dr6(rdr6() | 0x4000); 507 goto kernel_trctrap; 508 } 509 if (signo != 0) 510 /* 511 * returns to original process 512 */ 513 vm86_trap((struct vm86frame *)frame); 514 return; 515 } 516 /* FALL THROUGH */ 517 case T_SEGNPFLT: /* segment not present fault */ 518 if (curpcb->pcb_flags & PCB_VM86CALL) 519 break; 520 521 /* 522 * Invalid %fs's and %gs's can be created using 523 * procfs or PT_SETREGS or by invalidating the 524 * underlying LDT entry. This causes a fault 525 * in kernel mode when the kernel attempts to 526 * switch contexts. Lose the bad context 527 * (XXX) so that we can continue, and generate 528 * a signal. 529 */ 530 if (frame->tf_eip == (int)cpu_switch_load_gs) { 531 curpcb->pcb_gs = 0; 532 #if 0 533 PROC_LOCK(p); 534 kern_psignal(p, SIGBUS); 535 PROC_UNLOCK(p); 536 #endif 537 return; 538 } 539 540 if (td->td_intr_nesting_level != 0) 541 break; 542 543 /* 544 * Invalid segment selectors and out of bounds 545 * %eip's and %esp's can be set up in user mode. 546 * This causes a fault in kernel mode when the 547 * kernel tries to return to user mode. We want 548 * to get this fault so that we can fix the 549 * problem here and not have to check all the 550 * selectors and pointers when the user changes 551 * them. 552 * 553 * N.B. Comparing to long mode, 32-bit mode 554 * does not push %esp on the trap frame, 555 * because iretl faulted while in ring 0. As 556 * the consequence, there is no need to fixup 557 * the stack pointer for doreti_iret_fault, 558 * the fixup and the complimentary trap() call 559 * are executed on the main thread stack, not 560 * on the trampoline stack. 561 */ 562 if (frame->tf_eip == (int)doreti_iret + setidt_disp) { 563 frame->tf_eip = (int)doreti_iret_fault + 564 setidt_disp; 565 return; 566 } 567 if (type == T_STKFLT) 568 break; 569 570 if (frame->tf_eip == (int)doreti_popl_ds + 571 setidt_disp) { 572 frame->tf_eip = (int)doreti_popl_ds_fault + 573 setidt_disp; 574 return; 575 } 576 if (frame->tf_eip == (int)doreti_popl_es + 577 setidt_disp) { 578 frame->tf_eip = (int)doreti_popl_es_fault + 579 setidt_disp; 580 return; 581 } 582 if (frame->tf_eip == (int)doreti_popl_fs + 583 setidt_disp) { 584 frame->tf_eip = (int)doreti_popl_fs_fault + 585 setidt_disp; 586 return; 587 } 588 if (curpcb->pcb_onfault != NULL) { 589 frame->tf_eip = (int)curpcb->pcb_onfault; 590 return; 591 } 592 break; 593 594 case T_TSSFLT: 595 /* 596 * PSL_NT can be set in user mode and isn't cleared 597 * automatically when the kernel is entered. This 598 * causes a TSS fault when the kernel attempts to 599 * `iret' because the TSS link is uninitialized. We 600 * want to get this fault so that we can fix the 601 * problem here and not every time the kernel is 602 * entered. 603 */ 604 if (frame->tf_eflags & PSL_NT) { 605 frame->tf_eflags &= ~PSL_NT; 606 return; 607 } 608 break; 609 610 case T_TRCTRAP: /* debug exception */ 611 kernel_trctrap: 612 /* Clear any pending debug events. */ 613 dr6 = rdr6(); 614 load_dr6(0); 615 616 /* 617 * Ignore debug register exceptions due to 618 * accesses in the user's address space, which 619 * can happen under several conditions such as 620 * if a user sets a watchpoint on a buffer and 621 * then passes that buffer to a system call. 622 * We still want to get TRCTRAPS for addresses 623 * in kernel space because that is useful when 624 * debugging the kernel. 625 */ 626 if (user_dbreg_trap(dr6) && 627 !(curpcb->pcb_flags & PCB_VM86CALL)) 628 return; 629 630 /* 631 * Malicious user code can configure a debug 632 * register watchpoint to trap on data access 633 * to the top of stack and then execute 'pop 634 * %ss; int 3'. Due to exception deferral for 635 * 'pop %ss', the CPU will not interrupt 'int 636 * 3' to raise the DB# exception for the debug 637 * register but will postpone the DB# until 638 * execution of the first instruction of the 639 * BP# handler (in kernel mode). Normally the 640 * previous check would ignore DB# exceptions 641 * for watchpoints on user addresses raised in 642 * kernel mode. However, some CPU errata 643 * include cases where DB# exceptions do not 644 * properly set bits in %dr6, e.g. Haswell 645 * HSD23 and Skylake-X SKZ24. 646 * 647 * A deferred DB# can also be raised on the 648 * first instructions of system call entry 649 * points or single-step traps via similar use 650 * of 'pop %ss' or 'mov xxx, %ss'. 651 */ 652 if (frame->tf_eip == 653 (uintptr_t)IDTVEC(int0x80_syscall) + setidt_disp || 654 frame->tf_eip == (uintptr_t)IDTVEC(bpt) + 655 setidt_disp || 656 frame->tf_eip == (uintptr_t)IDTVEC(dbg) + 657 setidt_disp) 658 return; 659 /* 660 * FALLTHROUGH (TRCTRAP kernel mode, kernel address) 661 */ 662 case T_BPTFLT: 663 /* 664 * If KDB is enabled, let it handle the debugger trap. 665 * Otherwise, debugger traps "can't happen". 666 */ 667 #ifdef KDB 668 if (kdb_trap(type, dr6, frame)) 669 return; 670 #endif 671 break; 672 673 #ifdef DEV_ISA 674 case T_NMI: 675 #ifdef POWERFAIL_NMI 676 if (time_second - lastalert > 10) { 677 log(LOG_WARNING, "NMI: power fail\n"); 678 sysbeep(880, hz); 679 lastalert = time_second; 680 } 681 return; 682 #else /* !POWERFAIL_NMI */ 683 nmi_handle_intr(type, frame); 684 return; 685 #endif /* POWERFAIL_NMI */ 686 #endif /* DEV_ISA */ 687 } 688 689 trap_fatal(frame, eva); 690 return; 691 } 692 693 /* Translate fault for emulators (e.g. Linux) */ 694 if (*p->p_sysent->sv_transtrap != NULL) 695 signo = (*p->p_sysent->sv_transtrap)(signo, type); 696 697 ksiginfo_init_trap(&ksi); 698 ksi.ksi_signo = signo; 699 ksi.ksi_code = ucode; 700 ksi.ksi_addr = (void *)addr; 701 ksi.ksi_trapno = type; 702 if (uprintf_signal) { 703 uprintf("pid %d comm %s: signal %d err %x code %d type %d " 704 "addr 0x%x ss 0x%04x esp 0x%08x cs 0x%04x eip 0x%08x " 705 "<%02x %02x %02x %02x %02x %02x %02x %02x>\n", 706 p->p_pid, p->p_comm, signo, frame->tf_err, ucode, type, 707 addr, frame->tf_ss, frame->tf_esp, frame->tf_cs, 708 frame->tf_eip, 709 fubyte((void *)(frame->tf_eip + 0)), 710 fubyte((void *)(frame->tf_eip + 1)), 711 fubyte((void *)(frame->tf_eip + 2)), 712 fubyte((void *)(frame->tf_eip + 3)), 713 fubyte((void *)(frame->tf_eip + 4)), 714 fubyte((void *)(frame->tf_eip + 5)), 715 fubyte((void *)(frame->tf_eip + 6)), 716 fubyte((void *)(frame->tf_eip + 7))); 717 } 718 KASSERT((read_eflags() & PSL_I) != 0, ("interrupts disabled")); 719 trapsignal(td, &ksi); 720 721 user: 722 userret(td, frame); 723 KASSERT(PCB_USER_FPU(td->td_pcb), 724 ("Return from trap with kernel FPU ctx leaked")); 725 } 726 727 /* 728 * Handle all details of a page fault. 729 * Returns: 730 * -2 if the fault was caused by triggered workaround for Intel Pentium 731 * 0xf00f bug. 732 * -1 if this fault was fatal, typically from kernel mode 733 * (cannot happen, but we need to return something). 734 * 0 if this fault was handled by updating either the user or kernel 735 * page table, execution can continue. 736 * 1 if this fault was from usermode and it was not handled, a synchronous 737 * signal should be delivered to the thread. *signo returns the signal 738 * number, *ucode gives si_code. 739 */ 740 static int 741 trap_pfault(struct trapframe *frame, bool usermode, vm_offset_t eva, 742 int *signo, int *ucode) 743 { 744 struct thread *td; 745 struct proc *p; 746 vm_map_t map; 747 int rv; 748 vm_prot_t ftype; 749 750 MPASS(!usermode || (signo != NULL && ucode != NULL)); 751 752 td = curthread; 753 p = td->td_proc; 754 755 if (__predict_false((td->td_pflags & TDP_NOFAULTING) != 0)) { 756 /* 757 * Due to both processor errata and lazy TLB invalidation when 758 * access restrictions are removed from virtual pages, memory 759 * accesses that are allowed by the physical mapping layer may 760 * nonetheless cause one spurious page fault per virtual page. 761 * When the thread is executing a "no faulting" section that 762 * is bracketed by vm_fault_{disable,enable}_pagefaults(), 763 * every page fault is treated as a spurious page fault, 764 * unless it accesses the same virtual address as the most 765 * recent page fault within the same "no faulting" section. 766 */ 767 if (td->td_md.md_spurflt_addr != eva || 768 (td->td_pflags & TDP_RESETSPUR) != 0) { 769 /* 770 * Do nothing to the TLB. A stale TLB entry is 771 * flushed automatically by a page fault. 772 */ 773 td->td_md.md_spurflt_addr = eva; 774 td->td_pflags &= ~TDP_RESETSPUR; 775 return (0); 776 } 777 } else { 778 /* 779 * If we get a page fault while in a critical section, then 780 * it is most likely a fatal kernel page fault. The kernel 781 * is already going to panic trying to get a sleep lock to 782 * do the VM lookup, so just consider it a fatal trap so the 783 * kernel can print out a useful trap message and even get 784 * to the debugger. 785 * 786 * If we get a page fault while holding a non-sleepable 787 * lock, then it is most likely a fatal kernel page fault. 788 * If WITNESS is enabled, then it's going to whine about 789 * bogus LORs with various VM locks, so just skip to the 790 * fatal trap handling directly. 791 */ 792 if (td->td_critnest != 0 || 793 WITNESS_CHECK(WARN_SLEEPOK | WARN_GIANTOK, NULL, 794 "Kernel page fault") != 0) { 795 trap_fatal(frame, eva); 796 return (-1); 797 } 798 } 799 if (eva >= PMAP_TRM_MIN_ADDRESS) { 800 /* 801 * Don't allow user-mode faults in kernel address space. 802 * An exception: if the faulting address is the invalid 803 * instruction entry in the IDT, then the Intel Pentium 804 * F00F bug workaround was triggered, and we need to 805 * treat it is as an illegal instruction, and not a page 806 * fault. 807 */ 808 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 809 if ((eva == (unsigned int)&idt[6]) && has_f00f_bug) { 810 *ucode = ILL_PRVOPC; 811 *signo = SIGILL; 812 return (-2); 813 } 814 #endif 815 if (usermode) { 816 *signo = SIGSEGV; 817 *ucode = SEGV_MAPERR; 818 return (1); 819 } 820 trap_fatal(frame, eva); 821 return (-1); 822 } else { 823 map = usermode ? &p->p_vmspace->vm_map : kernel_map; 824 825 /* 826 * Kernel cannot access a user-space address directly 827 * because user pages are not mapped. Also, page 828 * faults must not be caused during the interrupts. 829 */ 830 if (!usermode && td->td_intr_nesting_level != 0) { 831 trap_fatal(frame, eva); 832 return (-1); 833 } 834 } 835 836 /* 837 * If the trap was caused by errant bits in the PTE then panic. 838 */ 839 if (frame->tf_err & PGEX_RSV) { 840 trap_fatal(frame, eva); 841 return (-1); 842 } 843 844 /* 845 * PGEX_I is defined only if the execute disable bit capability is 846 * supported and enabled. 847 */ 848 if (frame->tf_err & PGEX_W) 849 ftype = VM_PROT_WRITE; 850 else if ((frame->tf_err & PGEX_I) && pg_nx != 0) 851 ftype = VM_PROT_EXECUTE; 852 else 853 ftype = VM_PROT_READ; 854 855 /* Fault in the page. */ 856 rv = vm_fault_trap(map, eva, ftype, VM_FAULT_NORMAL, signo, ucode); 857 if (rv == KERN_SUCCESS) { 858 #ifdef HWPMC_HOOKS 859 if (ftype == VM_PROT_READ || ftype == VM_PROT_WRITE) { 860 PMC_SOFT_CALL_TF( , , page_fault, all, frame); 861 if (ftype == VM_PROT_READ) 862 PMC_SOFT_CALL_TF( , , page_fault, read, 863 frame); 864 else 865 PMC_SOFT_CALL_TF( , , page_fault, write, 866 frame); 867 } 868 #endif 869 return (0); 870 } 871 if (usermode) 872 return (1); 873 if (td->td_intr_nesting_level == 0 && 874 curpcb->pcb_onfault != NULL) { 875 frame->tf_eip = (int)curpcb->pcb_onfault; 876 return (0); 877 } 878 trap_fatal(frame, eva); 879 return (-1); 880 } 881 882 static void 883 trap_fatal(frame, eva) 884 struct trapframe *frame; 885 vm_offset_t eva; 886 { 887 int code, ss, esp; 888 u_int type; 889 struct soft_segment_descriptor softseg; 890 #ifdef KDB 891 bool handled; 892 #endif 893 894 code = frame->tf_err; 895 type = frame->tf_trapno; 896 sdtossd(&gdt[IDXSEL(frame->tf_cs & 0xffff)].sd, &softseg); 897 898 printf("\n\nFatal trap %d: %s while in %s mode\n", type, trap_msg(type), 899 frame->tf_eflags & PSL_VM ? "vm86" : 900 ISPL(frame->tf_cs) == SEL_UPL ? "user" : "kernel"); 901 #ifdef SMP 902 /* two separate prints in case of a trap on an unmapped page */ 903 printf("cpuid = %d; ", PCPU_GET(cpuid)); 904 printf("apic id = %02x\n", PCPU_GET(apic_id)); 905 #endif 906 if (type == T_PAGEFLT) { 907 printf("fault virtual address = 0x%x\n", eva); 908 printf("fault code = %s %s%s, %s\n", 909 code & PGEX_U ? "user" : "supervisor", 910 code & PGEX_W ? "write" : "read", 911 pg_nx != 0 ? 912 (code & PGEX_I ? " instruction" : " data") : 913 "", 914 code & PGEX_RSV ? "reserved bits in PTE" : 915 code & PGEX_P ? "protection violation" : "page not present"); 916 } else { 917 printf("error code = %#x\n", code); 918 } 919 printf("instruction pointer = 0x%x:0x%x\n", 920 frame->tf_cs & 0xffff, frame->tf_eip); 921 if (TF_HAS_STACKREGS(frame)) { 922 ss = frame->tf_ss & 0xffff; 923 esp = frame->tf_esp; 924 } else { 925 ss = GSEL(GDATA_SEL, SEL_KPL); 926 esp = (int)&frame->tf_esp; 927 } 928 printf("stack pointer = 0x%x:0x%x\n", ss, esp); 929 printf("frame pointer = 0x%x:0x%x\n", ss, frame->tf_ebp); 930 printf("code segment = base 0x%x, limit 0x%x, type 0x%x\n", 931 softseg.ssd_base, softseg.ssd_limit, softseg.ssd_type); 932 printf(" = DPL %d, pres %d, def32 %d, gran %d\n", 933 softseg.ssd_dpl, softseg.ssd_p, softseg.ssd_def32, 934 softseg.ssd_gran); 935 printf("processor eflags = "); 936 if (frame->tf_eflags & PSL_T) 937 printf("trace trap, "); 938 if (frame->tf_eflags & PSL_I) 939 printf("interrupt enabled, "); 940 if (frame->tf_eflags & PSL_NT) 941 printf("nested task, "); 942 if (frame->tf_eflags & PSL_RF) 943 printf("resume, "); 944 if (frame->tf_eflags & PSL_VM) 945 printf("vm86, "); 946 printf("IOPL = %d\n", (frame->tf_eflags & PSL_IOPL) >> 12); 947 printf("current process = %d (%s)\n", 948 curproc->p_pid, curthread->td_name); 949 950 #ifdef KDB 951 if (debugger_on_trap) { 952 kdb_why = KDB_WHY_TRAP; 953 frame->tf_err = eva; /* smuggle fault address to ddb */ 954 handled = kdb_trap(type, 0, frame); 955 frame->tf_err = code; /* restore error code */ 956 kdb_why = KDB_WHY_UNSET; 957 if (handled) 958 return; 959 } 960 #endif 961 printf("trap number = %d\n", type); 962 if (trap_msg(type) != NULL) 963 panic("%s", trap_msg(type)); 964 else 965 panic("unknown/reserved trap"); 966 } 967 968 #ifdef KDTRACE_HOOKS 969 /* 970 * Invoke a userspace DTrace hook. The hook pointer is cleared when no 971 * userspace probes are enabled, so we must synchronize with DTrace to ensure 972 * that a trapping thread is able to call the hook before it is cleared. 973 */ 974 static bool 975 trap_user_dtrace(struct trapframe *frame, int (**hookp)(struct trapframe *)) 976 { 977 int (*hook)(struct trapframe *); 978 979 hook = atomic_load_ptr(hookp); 980 enable_intr(); 981 if (hook != NULL) 982 return ((hook)(frame) == 0); 983 return (false); 984 } 985 #endif 986 987 /* 988 * Double fault handler. Called when a fault occurs while writing 989 * a frame for a trap/exception onto the stack. This usually occurs 990 * when the stack overflows (such is the case with infinite recursion, 991 * for example). 992 * 993 * XXX Note that the current PTD gets replaced by IdlePTD when the 994 * task switch occurs. This means that the stack that was active at 995 * the time of the double fault is not available at <kstack> unless 996 * the machine was idle when the double fault occurred. The downside 997 * of this is that "trace <ebp>" in ddb won't work. 998 */ 999 void 1000 dblfault_handler(void) 1001 { 1002 #ifdef KDTRACE_HOOKS 1003 if (dtrace_doubletrap_func != NULL) 1004 (*dtrace_doubletrap_func)(); 1005 #endif 1006 printf("\nFatal double fault:\n"); 1007 printf("eip = 0x%x\n", PCPU_GET(common_tssp)->tss_eip); 1008 printf("esp = 0x%x\n", PCPU_GET(common_tssp)->tss_esp); 1009 printf("ebp = 0x%x\n", PCPU_GET(common_tssp)->tss_ebp); 1010 #ifdef SMP 1011 /* two separate prints in case of a trap on an unmapped page */ 1012 printf("cpuid = %d; ", PCPU_GET(cpuid)); 1013 printf("apic id = %02x\n", PCPU_GET(apic_id)); 1014 #endif 1015 panic("double fault"); 1016 } 1017 1018 int 1019 cpu_fetch_syscall_args(struct thread *td) 1020 { 1021 struct proc *p; 1022 struct trapframe *frame; 1023 struct syscall_args *sa; 1024 caddr_t params; 1025 long tmp; 1026 int error; 1027 #ifdef COMPAT_43 1028 u_int32_t eip; 1029 int cs; 1030 #endif 1031 1032 p = td->td_proc; 1033 frame = td->td_frame; 1034 sa = &td->td_sa; 1035 1036 #ifdef COMPAT_43 1037 if (__predict_false(frame->tf_cs == 7 && frame->tf_eip == 2)) { 1038 /* 1039 * In lcall $7,$0 after int $0x80. Convert the user 1040 * frame to what it would be for a direct int 0x80 instead 1041 * of lcall $7,$0, by popping the lcall return address. 1042 */ 1043 error = fueword32((void *)frame->tf_esp, &eip); 1044 if (error == -1) 1045 return (EFAULT); 1046 cs = fuword16((void *)(frame->tf_esp + sizeof(u_int32_t))); 1047 if (cs == -1) 1048 return (EFAULT); 1049 1050 /* 1051 * Unwind in-kernel frame after all stack frame pieces 1052 * were successfully read. 1053 */ 1054 frame->tf_eip = eip; 1055 frame->tf_cs = cs; 1056 frame->tf_esp += 2 * sizeof(u_int32_t); 1057 frame->tf_err = 7; /* size of lcall $7,$0 */ 1058 } 1059 #endif 1060 1061 sa->code = frame->tf_eax; 1062 params = (caddr_t)frame->tf_esp + sizeof(uint32_t); 1063 1064 /* 1065 * Need to check if this is a 32 bit or 64 bit syscall. 1066 */ 1067 if (sa->code == SYS_syscall) { 1068 /* 1069 * Code is first argument, followed by actual args. 1070 */ 1071 error = fueword(params, &tmp); 1072 if (error == -1) 1073 return (EFAULT); 1074 sa->code = tmp; 1075 params += sizeof(uint32_t); 1076 } else if (sa->code == SYS___syscall) { 1077 /* 1078 * Like syscall, but code is a quad, so as to maintain 1079 * quad alignment for the rest of the arguments. 1080 */ 1081 error = fueword(params, &tmp); 1082 if (error == -1) 1083 return (EFAULT); 1084 sa->code = tmp; 1085 params += sizeof(quad_t); 1086 } 1087 1088 if (sa->code >= p->p_sysent->sv_size) 1089 sa->callp = &p->p_sysent->sv_table[0]; 1090 else 1091 sa->callp = &p->p_sysent->sv_table[sa->code]; 1092 sa->narg = sa->callp->sy_narg; 1093 1094 if (params != NULL && sa->narg != 0) 1095 error = copyin(params, (caddr_t)sa->args, 1096 (u_int)(sa->narg * sizeof(uint32_t))); 1097 else 1098 error = 0; 1099 1100 if (error == 0) { 1101 td->td_retval[0] = 0; 1102 td->td_retval[1] = frame->tf_edx; 1103 } 1104 1105 return (error); 1106 } 1107 1108 #include "../../kern/subr_syscall.c" 1109 1110 /* 1111 * syscall - system call request C handler. A system call is 1112 * essentially treated as a trap by reusing the frame layout. 1113 */ 1114 void 1115 syscall(struct trapframe *frame) 1116 { 1117 struct thread *td; 1118 register_t orig_tf_eflags; 1119 ksiginfo_t ksi; 1120 1121 #ifdef DIAGNOSTIC 1122 if (!(TRAPF_USERMODE(frame) && 1123 (curpcb->pcb_flags & PCB_VM86CALL) == 0)) { 1124 panic("syscall"); 1125 /* NOT REACHED */ 1126 } 1127 #endif 1128 orig_tf_eflags = frame->tf_eflags; 1129 1130 td = curthread; 1131 td->td_frame = frame; 1132 1133 syscallenter(td); 1134 1135 /* 1136 * Traced syscall. 1137 */ 1138 if ((orig_tf_eflags & PSL_T) && !(orig_tf_eflags & PSL_VM)) { 1139 frame->tf_eflags &= ~PSL_T; 1140 ksiginfo_init_trap(&ksi); 1141 ksi.ksi_signo = SIGTRAP; 1142 ksi.ksi_code = TRAP_TRACE; 1143 ksi.ksi_addr = (void *)frame->tf_eip; 1144 trapsignal(td, &ksi); 1145 } 1146 1147 KASSERT(PCB_USER_FPU(td->td_pcb), 1148 ("System call %s returning with kernel FPU ctx leaked", 1149 syscallname(td->td_proc, td->td_sa.code))); 1150 KASSERT(td->td_pcb->pcb_save == get_pcb_user_save_td(td), 1151 ("System call %s returning with mangled pcb_save", 1152 syscallname(td->td_proc, td->td_sa.code))); 1153 1154 syscallret(td); 1155 } 1156