1 /*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * the Systems Programming Group of the University of Utah Computer 7 * Science Department and William Jolitz of UUNET Technologies Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Derived from hp300 version by Mike Hibler, this version by William 34 * Jolitz uses a recursive map [a pde points to the page directory] to 35 * map the page tables using the pagetables themselves. This is done to 36 * reduce the impact on kernel virtual memory for lots of sparse address 37 * space, and to reduce the cost of memory to each process. 38 * 39 * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90 40 * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91 41 * $FreeBSD$ 42 */ 43 44 #ifndef _MACHINE_PMAP_H_ 45 #define _MACHINE_PMAP_H_ 46 47 /* 48 * Page-directory and page-table entries follow this format, with a few 49 * of the fields not present here and there, depending on a lot of things. 50 */ 51 /* ---- Intel Nomenclature ---- */ 52 #define PG_V 0x001 /* P Valid */ 53 #define PG_RW 0x002 /* R/W Read/Write */ 54 #define PG_U 0x004 /* U/S User/Supervisor */ 55 #define PG_NC_PWT 0x008 /* PWT Write through */ 56 #define PG_NC_PCD 0x010 /* PCD Cache disable */ 57 #define PG_A 0x020 /* A Accessed */ 58 #define PG_M 0x040 /* D Dirty */ 59 #define PG_PS 0x080 /* PS Page size (0=4k,1=4M) */ 60 #define PG_PTE_PAT 0x080 /* PAT PAT index */ 61 #define PG_G 0x100 /* G Global */ 62 #define PG_AVAIL1 0x200 /* / Available for system */ 63 #define PG_AVAIL2 0x400 /* < programmers use */ 64 #define PG_AVAIL3 0x800 /* \ */ 65 #define PG_PDE_PAT 0x1000 /* PAT PAT index */ 66 67 68 /* Our various interpretations of the above */ 69 #define PG_W PG_AVAIL1 /* "Wired" pseudoflag */ 70 #define PG_MANAGED PG_AVAIL2 71 #define PG_FRAME (~((vm_paddr_t)PAGE_MASK)) 72 #define PG_PROT (PG_RW|PG_U) /* all protection bits . */ 73 #define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */ 74 75 /* 76 * Page Protection Exception bits 77 */ 78 79 #define PGEX_P 0x01 /* Protection violation vs. not present */ 80 #define PGEX_W 0x02 /* during a Write cycle */ 81 #define PGEX_U 0x04 /* access from User mode (UPL) */ 82 83 /* 84 * Size of Kernel address space. This is the number of page table pages 85 * (4MB each) to use for the kernel. 256 pages == 1 Gigabyte. 86 * This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc). 87 */ 88 #ifndef KVA_PAGES 89 #ifdef PAE 90 #define KVA_PAGES 512 91 #else 92 #define KVA_PAGES 256 93 #endif 94 #endif 95 96 /* 97 * Pte related macros 98 */ 99 #define VADDR(pdi, pti) ((vm_offset_t)(((pdi)<<PDRSHIFT)|((pti)<<PAGE_SHIFT))) 100 101 /* Initial number of kernel page tables. */ 102 #ifndef NKPT 103 #ifdef PAE 104 /* 152 page tables needed to map 16G (76B "struct vm_page", 2M page tables). */ 105 #define NKPT 240 106 #else 107 /* 18 page tables needed to map 4G (72B "struct vm_page", 4M page tables). */ 108 #define NKPT 30 109 #endif 110 #endif 111 112 #ifndef NKPDE 113 #ifdef SMP 114 #define NKPDE (KVA_PAGES - 1) /* number of page tables/pde's */ 115 #else 116 #define NKPDE (KVA_PAGES) /* number of page tables/pde's */ 117 #endif 118 #endif 119 120 /* 121 * The *PTDI values control the layout of virtual memory 122 * 123 * XXX This works for now, but I am not real happy with it, I'll fix it 124 * right after I fix locore.s and the magic 28K hole 125 * 126 * SMP_PRIVPAGES: The per-cpu address space is 0xff80000 -> 0xffbfffff 127 */ 128 #ifdef SMP 129 #define MPPTDI (NPDEPTD-1) /* per cpu ptd entry */ 130 #define KPTDI (MPPTDI-NKPDE) /* start of kernel virtual pde's */ 131 #else 132 #define KPTDI (NPDEPTD-NKPDE)/* start of kernel virtual pde's */ 133 #endif /* SMP */ 134 #define PTDPTDI (KPTDI-NPGPTD) /* ptd entry that points to ptd! */ 135 136 /* 137 * XXX doesn't really belong here I guess... 138 */ 139 #define ISA_HOLE_START 0xa0000 140 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START) 141 142 #ifndef LOCORE 143 144 #include <sys/queue.h> 145 #include <sys/_lock.h> 146 #include <sys/_mutex.h> 147 148 #ifdef PAE 149 150 typedef uint64_t pdpt_entry_t; 151 typedef uint64_t pd_entry_t; 152 typedef uint64_t pt_entry_t; 153 154 #define PTESHIFT (3) 155 #define PDESHIFT (3) 156 157 #else 158 159 typedef uint32_t pd_entry_t; 160 typedef uint32_t pt_entry_t; 161 162 #define PTESHIFT (2) 163 #define PDESHIFT (2) 164 165 #endif 166 167 /* 168 * Address of current and alternate address space page table maps 169 * and directories. 170 */ 171 #ifdef _KERNEL 172 extern pt_entry_t PTmap[]; 173 extern pd_entry_t PTD[]; 174 extern pd_entry_t PTDpde[]; 175 176 #ifdef PAE 177 extern pdpt_entry_t *IdlePDPT; 178 #endif 179 extern pd_entry_t *IdlePTD; /* physical address of "Idle" state directory */ 180 #endif 181 182 #ifdef _KERNEL 183 /* 184 * virtual address to page table entry and 185 * to physical address. 186 * Note: these work recursively, thus vtopte of a pte will give 187 * the corresponding pde that in turn maps it. 188 */ 189 #define vtopte(va) (PTmap + i386_btop(va)) 190 #define vtophys(va) pmap_kextract((vm_offset_t)(va)) 191 192 /* 193 * Routine: pmap_kextract 194 * Function: 195 * Extract the physical page address associated 196 * kernel virtual address. 197 */ 198 static __inline vm_paddr_t 199 pmap_kextract(vm_offset_t va) 200 { 201 vm_paddr_t pa; 202 203 if ((pa = PTD[va >> PDRSHIFT]) & PG_PS) { 204 pa = (pa & ~(NBPDR - 1)) | (va & (NBPDR - 1)); 205 } else { 206 pa = *vtopte(va); 207 pa = (pa & PG_FRAME) | (va & PAGE_MASK); 208 } 209 return pa; 210 } 211 212 #ifdef PAE 213 214 static __inline pt_entry_t 215 pte_load(pt_entry_t *ptep) 216 { 217 pt_entry_t r; 218 219 __asm __volatile( 220 "lock; cmpxchg8b %1" 221 : "=A" (r) 222 : "m" (*ptep), "a" (0), "d" (0), "b" (0), "c" (0)); 223 return (r); 224 } 225 226 static __inline pt_entry_t 227 pte_load_store(pt_entry_t *ptep, pt_entry_t v) 228 { 229 pt_entry_t r; 230 231 r = *ptep; 232 __asm __volatile( 233 "1:\n" 234 "\tlock; cmpxchg8b %1\n" 235 "\tjnz 1b" 236 : "+A" (r) 237 : "m" (*ptep), "b" ((uint32_t)v), "c" ((uint32_t)(v >> 32))); 238 return (r); 239 } 240 241 #define pte_load_clear(ptep) pte_load_store((ptep), (pt_entry_t)0ULL) 242 243 #define pte_store(ptep, pte) pte_load_store((ptep), (pt_entry_t)pte) 244 245 #else /* PAE */ 246 247 static __inline pt_entry_t 248 pte_load(pt_entry_t *ptep) 249 { 250 pt_entry_t r; 251 252 r = *ptep; 253 return (r); 254 } 255 256 static __inline pt_entry_t 257 pte_load_store(pt_entry_t *ptep, pt_entry_t pte) 258 { 259 pt_entry_t r; 260 261 __asm __volatile( 262 "xchgl %0,%1" 263 : "=m" (*ptep), 264 "=r" (r) 265 : "1" (pte), 266 "m" (*ptep)); 267 return (r); 268 } 269 270 #define pte_load_clear(pte) atomic_readandclear_int(pte) 271 272 static __inline void 273 pte_store(pt_entry_t *ptep, pt_entry_t pte) 274 { 275 276 *ptep = pte; 277 } 278 279 #endif /* PAE */ 280 281 #define pte_clear(ptep) pte_store((ptep), (pt_entry_t)0ULL) 282 283 #define pde_store(pdep, pde) pte_store((pdep), (pde)) 284 285 #endif /* _KERNEL */ 286 287 /* 288 * Pmap stuff 289 */ 290 struct pv_entry; 291 struct pv_chunk; 292 293 struct md_page { 294 int pv_list_count; 295 TAILQ_HEAD(,pv_entry) pv_list; 296 }; 297 298 struct pmap { 299 struct mtx pm_mtx; 300 pd_entry_t *pm_pdir; /* KVA of page directory */ 301 TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */ 302 u_int pm_active; /* active on cpus */ 303 struct pmap_statistics pm_stats; /* pmap statistics */ 304 LIST_ENTRY(pmap) pm_list; /* List of all pmaps */ 305 #ifdef PAE 306 pdpt_entry_t *pm_pdpt; /* KVA of page director pointer 307 table */ 308 #endif 309 }; 310 311 typedef struct pmap *pmap_t; 312 313 #ifdef _KERNEL 314 extern struct pmap kernel_pmap_store; 315 #define kernel_pmap (&kernel_pmap_store) 316 317 #define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx) 318 #define PMAP_LOCK_ASSERT(pmap, type) \ 319 mtx_assert(&(pmap)->pm_mtx, (type)) 320 #define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx) 321 #define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \ 322 NULL, MTX_DEF | MTX_DUPOK) 323 #define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx) 324 #define PMAP_MTX(pmap) (&(pmap)->pm_mtx) 325 #define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx) 326 #define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx) 327 #endif 328 329 /* 330 * For each vm_page_t, there is a list of all currently valid virtual 331 * mappings of that page. An entry is a pv_entry_t, the list is pv_list. 332 */ 333 typedef struct pv_entry { 334 vm_offset_t pv_va; /* virtual address for mapping */ 335 TAILQ_ENTRY(pv_entry) pv_list; 336 } *pv_entry_t; 337 338 /* 339 * pv_entries are allocated in chunks per-process. This avoids the 340 * need to track per-pmap assignments. 341 */ 342 #define _NPCM 11 343 #define _NPCPV 336 344 struct pv_chunk { 345 pmap_t pc_pmap; 346 TAILQ_ENTRY(pv_chunk) pc_list; 347 uint32_t pc_map[_NPCM]; /* bitmap; 1 = free */ 348 uint32_t pc_spare[2]; 349 struct pv_entry pc_pventry[_NPCPV]; 350 }; 351 352 #ifdef _KERNEL 353 354 #define NPPROVMTRR 8 355 #define PPRO_VMTRRphysBase0 0x200 356 #define PPRO_VMTRRphysMask0 0x201 357 struct ppro_vmtrr { 358 u_int64_t base, mask; 359 }; 360 extern struct ppro_vmtrr PPro_vmtrr[NPPROVMTRR]; 361 362 extern caddr_t CADDR1; 363 extern pt_entry_t *CMAP1; 364 extern vm_paddr_t phys_avail[]; 365 extern vm_paddr_t dump_avail[]; 366 extern int pseflag; 367 extern int pgeflag; 368 extern char *ptvmmap; /* poor name! */ 369 extern vm_offset_t virtual_avail; 370 extern vm_offset_t virtual_end; 371 372 #define pmap_page_is_mapped(m) (!TAILQ_EMPTY(&(m)->md.pv_list)) 373 #define pmap_unmapbios(va, sz) pmap_unmapdev((va), (sz)) 374 375 void pmap_bootstrap(vm_paddr_t, vm_paddr_t); 376 int pmap_change_attr(vm_offset_t, vm_size_t, int); 377 void pmap_init_pat(void); 378 void pmap_kenter(vm_offset_t va, vm_paddr_t pa); 379 void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode); 380 void *pmap_kenter_temporary(vm_paddr_t pa, int i); 381 void pmap_kremove(vm_offset_t); 382 void *pmap_mapbios(vm_paddr_t, vm_size_t); 383 void *pmap_mapdev(vm_paddr_t, vm_size_t); 384 void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, int); 385 void pmap_unmapdev(vm_offset_t, vm_size_t); 386 pt_entry_t *pmap_pte(pmap_t, vm_offset_t) __pure2; 387 void pmap_set_pg(void); 388 void pmap_invalidate_page(pmap_t, vm_offset_t); 389 void pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t); 390 void pmap_invalidate_all(pmap_t); 391 void pmap_invalidate_cache(void); 392 393 #endif /* _KERNEL */ 394 395 #endif /* !LOCORE */ 396 397 #endif /* !_MACHINE_PMAP_H_ */ 398