1 /*- 2 * Copyright (c) 2003-2005,2008 Joseph Koshy 3 * Copyright (c) 2007 The FreeBSD Foundation 4 * All rights reserved. 5 * 6 * Portions of this software were developed by A. Joseph Koshy under 7 * sponsorship from the FreeBSD Foundation and Google, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef _MACHINE_PMC_MDEP_H 34 #define _MACHINE_PMC_MDEP_H 1 35 36 #ifdef _KERNEL 37 struct pmc_mdep; 38 #endif 39 40 /* 41 * On the i386 platform we support the following PMCs. 42 * 43 * TSC The timestamp counter 44 * K7 AMD Athlon XP/MP and other 32 bit processors. 45 * K8 AMD Athlon64 and Opteron PMCs in 32 bit mode. 46 * PIV Intel P4/HTT and P4/EMT64 47 * PPRO Intel Pentium Pro, Pentium-II, Pentium-III, Celeron and 48 * Pentium-M processors 49 * PENTIUM Intel Pentium MMX. 50 * IAP Intel Core/Core2/Atom programmable PMCs. 51 * IAF Intel fixed-function PMCs. 52 */ 53 54 #include <dev/hwpmc/hwpmc_amd.h> /* K7 and K8 */ 55 #include <dev/hwpmc/hwpmc_core.h> 56 #include <dev/hwpmc/hwpmc_piv.h> 57 #include <dev/hwpmc/hwpmc_ppro.h> 58 #include <dev/hwpmc/hwpmc_pentium.h> 59 #include <dev/hwpmc/hwpmc_tsc.h> 60 61 /* 62 * Intel processors implementing V2 and later of the Intel performance 63 * measurement architecture have PMCs of the following classes: TSC, 64 * IAF and IAP. 65 */ 66 #define PMC_MDEP_CLASS_INDEX_TSC 0 67 #define PMC_MDEP_CLASS_INDEX_K7 1 68 #define PMC_MDEP_CLASS_INDEX_K8 1 69 #define PMC_MDEP_CLASS_INDEX_P4 1 70 #define PMC_MDEP_CLASS_INDEX_P5 1 71 #define PMC_MDEP_CLASS_INDEX_P6 1 72 #define PMC_MDEP_CLASS_INDEX_IAP 1 73 #define PMC_MDEP_CLASS_INDEX_IAF 2 74 75 /* 76 * Architecture specific extensions to <sys/pmc.h> structures. 77 */ 78 79 union pmc_md_op_pmcallocate { 80 struct pmc_md_amd_op_pmcallocate pm_amd; 81 struct pmc_md_iaf_op_pmcallocate pm_iaf; 82 struct pmc_md_iap_op_pmcallocate pm_iap; 83 struct pmc_md_p4_op_pmcallocate pm_p4; 84 struct pmc_md_pentium_op_pmcallocate pm_pentium; 85 struct pmc_md_ppro_op_pmcallocate pm_ppro; 86 uint64_t __pad[4]; 87 }; 88 89 /* Logging */ 90 #define PMCLOG_READADDR PMCLOG_READ32 91 #define PMCLOG_EMITADDR PMCLOG_EMIT32 92 93 #ifdef _KERNEL 94 95 /* MD extension for 'struct pmc' */ 96 union pmc_md_pmc { 97 struct pmc_md_amd_pmc pm_amd; 98 struct pmc_md_iaf_pmc pm_iaf; 99 struct pmc_md_iap_pmc pm_iap; 100 struct pmc_md_p4_pmc pm_p4; 101 struct pmc_md_pentium_pmc pm_pentium; 102 struct pmc_md_ppro_pmc pm_ppro; 103 }; 104 105 struct pmc; 106 struct pmc_mdep; 107 108 #define PMC_TRAPFRAME_TO_PC(TF) ((TF)->tf_eip) 109 #define PMC_TRAPFRAME_TO_FP(TF) ((TF)->tf_ebp) 110 111 /* 112 * The layout of the stack frame on entry into the NMI handler depends on 113 * whether a privilege level change (and consequent stack switch) was 114 * required for entry. 115 * 116 * When processing an interrupt when in user mode, the processor switches 117 * stacks, and saves the user mode stack pointer on the kernel stack. The 118 * user mode stack pointer is then available to the interrupt handler 119 * at frame->tf_esp. 120 * 121 * When processing an interrupt while in kernel mode, the processor 122 * continues to use the existing (kernel) stack. Therefore we determine 123 * the stack pointer for the interrupted kernel procedure by adding an 124 * offset to the current frame pointer. 125 */ 126 127 #define PMC_TRAPFRAME_TO_USER_SP(TF) ((TF)->tf_esp) 128 #define PMC_TRAPFRAME_TO_KERNEL_SP(TF) ((uintptr_t) &((TF)->tf_esp)) 129 130 #define PMC_IN_KERNEL_STACK(S,START,END) \ 131 ((S) >= (START) && (S) < (END)) 132 #define PMC_IN_KERNEL(va) (((va) >= USRSTACK) && \ 133 ((va) < VM_MAX_KERNEL_ADDRESS)) 134 135 #define PMC_IN_USERSPACE(va) ((va) <= VM_MAXUSER_ADDRESS) 136 137 #define PMC_IN_TRAP_HANDLER(PC) \ 138 ((PC) >= (uintptr_t) start_exceptions && \ 139 (PC) < (uintptr_t) end_exceptions) 140 141 #define PMC_AT_FUNCTION_PROLOGUE_PUSH_BP(I) \ 142 (((I) & 0x00ffffff) == 0xe58955) /* pushl %ebp; movl %esp,%ebp */ 143 #define PMC_AT_FUNCTION_PROLOGUE_MOV_SP_BP(I) \ 144 (((I) & 0x0000ffff) == 0xe589) /* movl %esp,%ebp */ 145 #define PMC_AT_FUNCTION_EPILOGUE_RET(I) \ 146 (((I) & 0xFF) == 0xC3) /* ret */ 147 148 /* 149 * Prototypes 150 */ 151 152 void start_exceptions(void), end_exceptions(void); 153 void pmc_x86_lapic_enable_pmc_interrupt(void); 154 155 struct pmc_mdep *pmc_amd_initialize(void); 156 void pmc_amd_finalize(struct pmc_mdep *_md); 157 struct pmc_mdep *pmc_intel_initialize(void); 158 void pmc_intel_finalize(struct pmc_mdep *_md); 159 160 #endif /* _KERNEL */ 161 #endif /* _MACHINE_PMC_MDEP_H */ 162