1 /*
2  * Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
3  * Copyright (c) 2004 Infinicon Corporation.  All rights reserved.
4  * Copyright (c) 2004 Intel Corporation.  All rights reserved.
5  * Copyright (c) 2004 Topspin Corporation.  All rights reserved.
6  * Copyright (c) 2004 Voltaire Corporation.  All rights reserved.
7  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
8  * Copyright (c) 2005, 2006 Cisco Systems.  All rights reserved.
9  *
10  * This software is available to you under a choice of one of two
11  * licenses.  You may choose to be licensed under the terms of the GNU
12  * General Public License (GPL) Version 2, available from the file
13  * COPYING in the main directory of this source tree, or the
14  * OpenIB.org BSD license below:
15  *
16  *     Redistribution and use in source and binary forms, with or
17  *     without modification, are permitted provided that the following
18  *     conditions are met:
19  *
20  *      - Redistributions of source code must retain the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer.
23  *
24  *      - Redistributions in binary form must reproduce the above
25  *        copyright notice, this list of conditions and the following
26  *        disclaimer in the documentation and/or other materials
27  *        provided with the distribution.
28  *
29  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
33  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
34  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
35  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36  * SOFTWARE.
37  */
38 
39 #include <linux/errno.h>
40 #include <linux/err.h>
41 #include <linux/string.h>
42 #include <linux/slab.h>
43 #include <linux/in.h>
44 #include <linux/in6.h>
45 
46 #include <rdma/ib_verbs.h>
47 #include <rdma/ib_cache.h>
48 #include <rdma/ib_addr.h>
49 
50 #include <netinet/ip.h>
51 #include <netinet/ip6.h>
52 
53 #include <machine/in_cksum.h>
54 
55 #include "core_priv.h"
56 
57 static const char * const ib_events[] = {
58 	[IB_EVENT_CQ_ERR]		= "CQ error",
59 	[IB_EVENT_QP_FATAL]		= "QP fatal error",
60 	[IB_EVENT_QP_REQ_ERR]		= "QP request error",
61 	[IB_EVENT_QP_ACCESS_ERR]	= "QP access error",
62 	[IB_EVENT_COMM_EST]		= "communication established",
63 	[IB_EVENT_SQ_DRAINED]		= "send queue drained",
64 	[IB_EVENT_PATH_MIG]		= "path migration successful",
65 	[IB_EVENT_PATH_MIG_ERR]		= "path migration error",
66 	[IB_EVENT_DEVICE_FATAL]		= "device fatal error",
67 	[IB_EVENT_PORT_ACTIVE]		= "port active",
68 	[IB_EVENT_PORT_ERR]		= "port error",
69 	[IB_EVENT_LID_CHANGE]		= "LID change",
70 	[IB_EVENT_PKEY_CHANGE]		= "P_key change",
71 	[IB_EVENT_SM_CHANGE]		= "SM change",
72 	[IB_EVENT_SRQ_ERR]		= "SRQ error",
73 	[IB_EVENT_SRQ_LIMIT_REACHED]	= "SRQ limit reached",
74 	[IB_EVENT_QP_LAST_WQE_REACHED]	= "last WQE reached",
75 	[IB_EVENT_CLIENT_REREGISTER]	= "client reregister",
76 	[IB_EVENT_GID_CHANGE]		= "GID changed",
77 };
78 
79 const char *__attribute_const__ ib_event_msg(enum ib_event_type event)
80 {
81 	size_t index = event;
82 
83 	return (index < ARRAY_SIZE(ib_events) && ib_events[index]) ?
84 			ib_events[index] : "unrecognized event";
85 }
86 EXPORT_SYMBOL(ib_event_msg);
87 
88 static const char * const wc_statuses[] = {
89 	[IB_WC_SUCCESS]			= "success",
90 	[IB_WC_LOC_LEN_ERR]		= "local length error",
91 	[IB_WC_LOC_QP_OP_ERR]		= "local QP operation error",
92 	[IB_WC_LOC_EEC_OP_ERR]		= "local EE context operation error",
93 	[IB_WC_LOC_PROT_ERR]		= "local protection error",
94 	[IB_WC_WR_FLUSH_ERR]		= "WR flushed",
95 	[IB_WC_MW_BIND_ERR]		= "memory management operation error",
96 	[IB_WC_BAD_RESP_ERR]		= "bad response error",
97 	[IB_WC_LOC_ACCESS_ERR]		= "local access error",
98 	[IB_WC_REM_INV_REQ_ERR]		= "invalid request error",
99 	[IB_WC_REM_ACCESS_ERR]		= "remote access error",
100 	[IB_WC_REM_OP_ERR]		= "remote operation error",
101 	[IB_WC_RETRY_EXC_ERR]		= "transport retry counter exceeded",
102 	[IB_WC_RNR_RETRY_EXC_ERR]	= "RNR retry counter exceeded",
103 	[IB_WC_LOC_RDD_VIOL_ERR]	= "local RDD violation error",
104 	[IB_WC_REM_INV_RD_REQ_ERR]	= "remote invalid RD request",
105 	[IB_WC_REM_ABORT_ERR]		= "operation aborted",
106 	[IB_WC_INV_EECN_ERR]		= "invalid EE context number",
107 	[IB_WC_INV_EEC_STATE_ERR]	= "invalid EE context state",
108 	[IB_WC_FATAL_ERR]		= "fatal error",
109 	[IB_WC_RESP_TIMEOUT_ERR]	= "response timeout error",
110 	[IB_WC_GENERAL_ERR]		= "general error",
111 };
112 
113 const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status)
114 {
115 	size_t index = status;
116 
117 	return (index < ARRAY_SIZE(wc_statuses) && wc_statuses[index]) ?
118 			wc_statuses[index] : "unrecognized status";
119 }
120 EXPORT_SYMBOL(ib_wc_status_msg);
121 
122 __attribute_const__ int ib_rate_to_mult(enum ib_rate rate)
123 {
124 	switch (rate) {
125 	case IB_RATE_2_5_GBPS: return  1;
126 	case IB_RATE_5_GBPS:   return  2;
127 	case IB_RATE_10_GBPS:  return  4;
128 	case IB_RATE_20_GBPS:  return  8;
129 	case IB_RATE_30_GBPS:  return 12;
130 	case IB_RATE_40_GBPS:  return 16;
131 	case IB_RATE_60_GBPS:  return 24;
132 	case IB_RATE_80_GBPS:  return 32;
133 	case IB_RATE_120_GBPS: return 48;
134 	default:	       return -1;
135 	}
136 }
137 EXPORT_SYMBOL(ib_rate_to_mult);
138 
139 __attribute_const__ enum ib_rate mult_to_ib_rate(int mult)
140 {
141 	switch (mult) {
142 	case 1:  return IB_RATE_2_5_GBPS;
143 	case 2:  return IB_RATE_5_GBPS;
144 	case 4:  return IB_RATE_10_GBPS;
145 	case 8:  return IB_RATE_20_GBPS;
146 	case 12: return IB_RATE_30_GBPS;
147 	case 16: return IB_RATE_40_GBPS;
148 	case 24: return IB_RATE_60_GBPS;
149 	case 32: return IB_RATE_80_GBPS;
150 	case 48: return IB_RATE_120_GBPS;
151 	default: return IB_RATE_PORT_CURRENT;
152 	}
153 }
154 EXPORT_SYMBOL(mult_to_ib_rate);
155 
156 __attribute_const__ int ib_rate_to_mbps(enum ib_rate rate)
157 {
158 	switch (rate) {
159 	case IB_RATE_2_5_GBPS: return 2500;
160 	case IB_RATE_5_GBPS:   return 5000;
161 	case IB_RATE_10_GBPS:  return 10000;
162 	case IB_RATE_20_GBPS:  return 20000;
163 	case IB_RATE_30_GBPS:  return 30000;
164 	case IB_RATE_40_GBPS:  return 40000;
165 	case IB_RATE_60_GBPS:  return 60000;
166 	case IB_RATE_80_GBPS:  return 80000;
167 	case IB_RATE_120_GBPS: return 120000;
168 	case IB_RATE_14_GBPS:  return 14062;
169 	case IB_RATE_56_GBPS:  return 56250;
170 	case IB_RATE_112_GBPS: return 112500;
171 	case IB_RATE_168_GBPS: return 168750;
172 	case IB_RATE_25_GBPS:  return 25781;
173 	case IB_RATE_100_GBPS: return 103125;
174 	case IB_RATE_200_GBPS: return 206250;
175 	case IB_RATE_300_GBPS: return 309375;
176 	default:	       return -1;
177 	}
178 }
179 EXPORT_SYMBOL(ib_rate_to_mbps);
180 
181 __attribute_const__ enum rdma_transport_type
182 rdma_node_get_transport(enum rdma_node_type node_type)
183 {
184 	switch (node_type) {
185 	case RDMA_NODE_IB_CA:
186 	case RDMA_NODE_IB_SWITCH:
187 	case RDMA_NODE_IB_ROUTER:
188 		return RDMA_TRANSPORT_IB;
189 	case RDMA_NODE_RNIC:
190 		return RDMA_TRANSPORT_IWARP;
191 	case RDMA_NODE_USNIC:
192 		return RDMA_TRANSPORT_USNIC;
193 	case RDMA_NODE_USNIC_UDP:
194 		return RDMA_TRANSPORT_USNIC_UDP;
195 	default:
196 		BUG();
197 		return 0;
198 	}
199 }
200 EXPORT_SYMBOL(rdma_node_get_transport);
201 
202 enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, u8 port_num)
203 {
204 	if (device->get_link_layer)
205 		return device->get_link_layer(device, port_num);
206 
207 	switch (rdma_node_get_transport(device->node_type)) {
208 	case RDMA_TRANSPORT_IB:
209 		return IB_LINK_LAYER_INFINIBAND;
210 	case RDMA_TRANSPORT_IWARP:
211 	case RDMA_TRANSPORT_USNIC:
212 	case RDMA_TRANSPORT_USNIC_UDP:
213 		return IB_LINK_LAYER_ETHERNET;
214 	default:
215 		return IB_LINK_LAYER_UNSPECIFIED;
216 	}
217 }
218 EXPORT_SYMBOL(rdma_port_get_link_layer);
219 
220 /* Protection domains */
221 
222 /**
223  * ib_alloc_pd - Allocates an unused protection domain.
224  * @device: The device on which to allocate the protection domain.
225  *
226  * A protection domain object provides an association between QPs, shared
227  * receive queues, address handles, memory regions, and memory windows.
228  *
229  * Every PD has a local_dma_lkey which can be used as the lkey value for local
230  * memory operations.
231  */
232 struct ib_pd *__ib_alloc_pd(struct ib_device *device, unsigned int flags,
233 		const char *caller)
234 {
235 	struct ib_pd *pd;
236 	int mr_access_flags = 0;
237 
238 	pd = device->alloc_pd(device, NULL, NULL);
239 	if (IS_ERR(pd))
240 		return pd;
241 
242 	pd->device = device;
243 	pd->uobject = NULL;
244 	pd->__internal_mr = NULL;
245 	atomic_set(&pd->usecnt, 0);
246 	pd->flags = flags;
247 
248 	if (device->attrs.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY)
249 		pd->local_dma_lkey = device->local_dma_lkey;
250 	else
251 		mr_access_flags |= IB_ACCESS_LOCAL_WRITE;
252 
253 	if (flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
254 		pr_warn("%s: enabling unsafe global rkey\n", caller);
255 		mr_access_flags |= IB_ACCESS_REMOTE_READ | IB_ACCESS_REMOTE_WRITE;
256 	}
257 
258 	if (mr_access_flags) {
259 		struct ib_mr *mr;
260 
261 		mr = pd->device->get_dma_mr(pd, mr_access_flags);
262 		if (IS_ERR(mr)) {
263 			ib_dealloc_pd(pd);
264 			return ERR_CAST(mr);
265 		}
266 
267 		mr->device	= pd->device;
268 		mr->pd		= pd;
269 		mr->uobject	= NULL;
270 		mr->need_inval	= false;
271 
272 		pd->__internal_mr = mr;
273 
274 		if (!(device->attrs.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY))
275 			pd->local_dma_lkey = pd->__internal_mr->lkey;
276 
277 		if (flags & IB_PD_UNSAFE_GLOBAL_RKEY)
278 			pd->unsafe_global_rkey = pd->__internal_mr->rkey;
279 	}
280 
281 	return pd;
282 }
283 EXPORT_SYMBOL(__ib_alloc_pd);
284 
285 /**
286  * ib_dealloc_pd - Deallocates a protection domain.
287  * @pd: The protection domain to deallocate.
288  *
289  * It is an error to call this function while any resources in the pd still
290  * exist.  The caller is responsible to synchronously destroy them and
291  * guarantee no new allocations will happen.
292  */
293 void ib_dealloc_pd(struct ib_pd *pd)
294 {
295 	int ret;
296 
297 	if (pd->__internal_mr) {
298 		ret = pd->device->dereg_mr(pd->__internal_mr);
299 		WARN_ON(ret);
300 		pd->__internal_mr = NULL;
301 	}
302 
303 	/* uverbs manipulates usecnt with proper locking, while the kabi
304 	   requires the caller to guarantee we can't race here. */
305 	WARN_ON(atomic_read(&pd->usecnt));
306 
307 	/* Making delalloc_pd a void return is a WIP, no driver should return
308 	   an error here. */
309 	ret = pd->device->dealloc_pd(pd);
310 	WARN_ONCE(ret, "Infiniband HW driver failed dealloc_pd");
311 }
312 EXPORT_SYMBOL(ib_dealloc_pd);
313 
314 /* Address handles */
315 
316 struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr)
317 {
318 	struct ib_ah *ah;
319 
320 	ah = pd->device->create_ah(pd, ah_attr);
321 
322 	if (!IS_ERR(ah)) {
323 		ah->device  = pd->device;
324 		ah->pd      = pd;
325 		ah->uobject = NULL;
326 		atomic_inc(&pd->usecnt);
327 	}
328 
329 	return ah;
330 }
331 EXPORT_SYMBOL(ib_create_ah);
332 
333 static int ib_get_header_version(const union rdma_network_hdr *hdr)
334 {
335 	const struct ip *ip4h = (const struct ip *)&hdr->roce4grh;
336 	struct ip ip4h_checked;
337 	const struct ip6_hdr *ip6h = (const struct ip6_hdr *)&hdr->ibgrh;
338 
339 	/* If it's IPv6, the version must be 6, otherwise, the first
340 	 * 20 bytes (before the IPv4 header) are garbled.
341 	 */
342 	if ((ip6h->ip6_vfc & IPV6_VERSION_MASK) != IPV6_VERSION)
343 		return (ip4h->ip_v == 4) ? 4 : 0;
344 	/* version may be 6 or 4 because the first 20 bytes could be garbled */
345 
346 	/* RoCE v2 requires no options, thus header length
347 	 * must be 5 words
348 	 */
349 	if (ip4h->ip_hl != 5)
350 		return 6;
351 
352 	/* Verify checksum.
353 	 * We can't write on scattered buffers so we need to copy to
354 	 * temp buffer.
355 	 */
356 	memcpy(&ip4h_checked, ip4h, sizeof(ip4h_checked));
357 	ip4h_checked.ip_sum = 0;
358 	ip4h_checked.ip_sum = in_cksum_hdr(&ip4h_checked);
359 	/* if IPv4 header checksum is OK, believe it */
360 	if (ip4h->ip_sum == ip4h_checked.ip_sum)
361 		return 4;
362 	return 6;
363 }
364 
365 static enum rdma_network_type ib_get_net_type_by_grh(struct ib_device *device,
366 						     u8 port_num,
367 						     const struct ib_grh *grh)
368 {
369 	int grh_version;
370 
371 	if (rdma_protocol_ib(device, port_num))
372 		return RDMA_NETWORK_IB;
373 
374 	grh_version = ib_get_header_version((const union rdma_network_hdr *)grh);
375 
376 	if (grh_version == 4)
377 		return RDMA_NETWORK_IPV4;
378 
379 	if (grh->next_hdr == IPPROTO_UDP)
380 		return RDMA_NETWORK_IPV6;
381 
382 	return RDMA_NETWORK_ROCE_V1;
383 }
384 
385 struct find_gid_index_context {
386 	u16 vlan_id;
387 	enum ib_gid_type gid_type;
388 };
389 
390 static bool find_gid_index(const union ib_gid *gid,
391 			   const struct ib_gid_attr *gid_attr,
392 			   void *context)
393 {
394 	struct find_gid_index_context *ctx =
395 		(struct find_gid_index_context *)context;
396 
397 	if (ctx->gid_type != gid_attr->gid_type)
398 		return false;
399 
400 	if ((!!(ctx->vlan_id != 0xffff) == !is_vlan_dev(gid_attr->ndev)) ||
401 	    (is_vlan_dev(gid_attr->ndev) &&
402 	     vlan_dev_vlan_id(gid_attr->ndev) != ctx->vlan_id))
403 		return false;
404 
405 	return true;
406 }
407 
408 static int get_sgid_index_from_eth(struct ib_device *device, u8 port_num,
409 				   u16 vlan_id, const union ib_gid *sgid,
410 				   enum ib_gid_type gid_type,
411 				   u16 *gid_index)
412 {
413 	struct find_gid_index_context context = {.vlan_id = vlan_id,
414 						 .gid_type = gid_type};
415 
416 	return ib_find_gid_by_filter(device, sgid, port_num, find_gid_index,
417 				     &context, gid_index);
418 }
419 
420 static int get_gids_from_rdma_hdr(const union rdma_network_hdr *hdr,
421 				  enum rdma_network_type net_type,
422 				  union ib_gid *sgid, union ib_gid *dgid)
423 {
424 	struct sockaddr_in  src_in;
425 	struct sockaddr_in  dst_in;
426 	__be32 src_saddr, dst_saddr;
427 
428 	if (!sgid || !dgid)
429 		return -EINVAL;
430 
431 	if (net_type == RDMA_NETWORK_IPV4) {
432 		memcpy(&src_in.sin_addr.s_addr,
433 		       &hdr->roce4grh.ip_src, 4);
434 		memcpy(&dst_in.sin_addr.s_addr,
435 		       &hdr->roce4grh.ip_dst, 4);
436 		src_saddr = src_in.sin_addr.s_addr;
437 		dst_saddr = dst_in.sin_addr.s_addr;
438 		ipv6_addr_set_v4mapped(src_saddr,
439 				       (struct in6_addr *)sgid);
440 		ipv6_addr_set_v4mapped(dst_saddr,
441 				       (struct in6_addr *)dgid);
442 		return 0;
443 	} else if (net_type == RDMA_NETWORK_IPV6 ||
444 		   net_type == RDMA_NETWORK_IB) {
445 		*dgid = hdr->ibgrh.dgid;
446 		*sgid = hdr->ibgrh.sgid;
447 		return 0;
448 	} else {
449 		return -EINVAL;
450 	}
451 }
452 
453 int ib_init_ah_from_wc(struct ib_device *device, u8 port_num,
454 		       const struct ib_wc *wc, const struct ib_grh *grh,
455 		       struct ib_ah_attr *ah_attr)
456 {
457 	u32 flow_class;
458 	u16 gid_index;
459 	int ret;
460 	enum rdma_network_type net_type = RDMA_NETWORK_IB;
461 	enum ib_gid_type gid_type = IB_GID_TYPE_IB;
462 	int hoplimit = 0xff;
463 	union ib_gid dgid;
464 	union ib_gid sgid;
465 
466 	memset(ah_attr, 0, sizeof *ah_attr);
467 	if (rdma_cap_eth_ah(device, port_num)) {
468 		if (wc->wc_flags & IB_WC_WITH_NETWORK_HDR_TYPE)
469 			net_type = wc->network_hdr_type;
470 		else
471 			net_type = ib_get_net_type_by_grh(device, port_num, grh);
472 		gid_type = ib_network_to_gid_type(net_type);
473 	}
474 	ret = get_gids_from_rdma_hdr((const union rdma_network_hdr *)grh, net_type,
475 				     &sgid, &dgid);
476 	if (ret)
477 		return ret;
478 
479 	if (rdma_protocol_roce(device, port_num)) {
480 		int if_index = 0;
481 		u16 vlan_id = wc->wc_flags & IB_WC_WITH_VLAN ?
482 				wc->vlan_id : 0xffff;
483 		struct net_device *idev;
484 		struct net_device *resolved_dev;
485 
486 		if (!(wc->wc_flags & IB_WC_GRH))
487 			return -EPROTOTYPE;
488 
489 		if (!device->get_netdev)
490 			return -EOPNOTSUPP;
491 
492 		idev = device->get_netdev(device, port_num);
493 		if (!idev)
494 			return -ENODEV;
495 
496 		ret = rdma_addr_find_l2_eth_by_grh(&dgid, &sgid,
497 						   ah_attr->dmac,
498 						   wc->wc_flags & IB_WC_WITH_VLAN ?
499 						   NULL : &vlan_id,
500 						   &if_index, &hoplimit);
501 		if (ret) {
502 			dev_put(idev);
503 			return ret;
504 		}
505 
506 		resolved_dev = dev_get_by_index(&init_net, if_index);
507 		if (resolved_dev->if_flags & IFF_LOOPBACK) {
508 			dev_put(resolved_dev);
509 			resolved_dev = idev;
510 			dev_hold(resolved_dev);
511 		}
512 		rcu_read_lock();
513 		if (resolved_dev != idev && !rdma_is_upper_dev_rcu(idev,
514 								   resolved_dev))
515 			ret = -EHOSTUNREACH;
516 		rcu_read_unlock();
517 		dev_put(idev);
518 		dev_put(resolved_dev);
519 		if (ret)
520 			return ret;
521 
522 		ret = get_sgid_index_from_eth(device, port_num, vlan_id,
523 					      &dgid, gid_type, &gid_index);
524 		if (ret)
525 			return ret;
526 	}
527 
528 	ah_attr->dlid = wc->slid;
529 	ah_attr->sl = wc->sl;
530 	ah_attr->src_path_bits = wc->dlid_path_bits;
531 	ah_attr->port_num = port_num;
532 
533 	if (wc->wc_flags & IB_WC_GRH) {
534 		ah_attr->ah_flags = IB_AH_GRH;
535 		ah_attr->grh.dgid = sgid;
536 
537 		if (!rdma_cap_eth_ah(device, port_num)) {
538 			if (dgid.global.interface_id != cpu_to_be64(IB_SA_WELL_KNOWN_GUID)) {
539 				ret = ib_find_cached_gid_by_port(device, &dgid,
540 								 IB_GID_TYPE_IB,
541 								 port_num, NULL,
542 								 &gid_index);
543 				if (ret)
544 					return ret;
545 			} else {
546 				gid_index = 0;
547 			}
548 		}
549 
550 		ah_attr->grh.sgid_index = (u8) gid_index;
551 		flow_class = be32_to_cpu(grh->version_tclass_flow);
552 		ah_attr->grh.flow_label = flow_class & 0xFFFFF;
553 		ah_attr->grh.hop_limit = hoplimit;
554 		ah_attr->grh.traffic_class = (flow_class >> 20) & 0xFF;
555 	}
556 	return 0;
557 }
558 EXPORT_SYMBOL(ib_init_ah_from_wc);
559 
560 struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc,
561 				   const struct ib_grh *grh, u8 port_num)
562 {
563 	struct ib_ah_attr ah_attr;
564 	int ret;
565 
566 	ret = ib_init_ah_from_wc(pd->device, port_num, wc, grh, &ah_attr);
567 	if (ret)
568 		return ERR_PTR(ret);
569 
570 	return ib_create_ah(pd, &ah_attr);
571 }
572 EXPORT_SYMBOL(ib_create_ah_from_wc);
573 
574 int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
575 {
576 	return ah->device->modify_ah ?
577 		ah->device->modify_ah(ah, ah_attr) :
578 		-ENOSYS;
579 }
580 EXPORT_SYMBOL(ib_modify_ah);
581 
582 int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
583 {
584 	return ah->device->query_ah ?
585 		ah->device->query_ah(ah, ah_attr) :
586 		-ENOSYS;
587 }
588 EXPORT_SYMBOL(ib_query_ah);
589 
590 int ib_destroy_ah(struct ib_ah *ah)
591 {
592 	struct ib_pd *pd;
593 	int ret;
594 
595 	pd = ah->pd;
596 	ret = ah->device->destroy_ah(ah);
597 	if (!ret)
598 		atomic_dec(&pd->usecnt);
599 
600 	return ret;
601 }
602 EXPORT_SYMBOL(ib_destroy_ah);
603 
604 /* Shared receive queues */
605 
606 struct ib_srq *ib_create_srq(struct ib_pd *pd,
607 			     struct ib_srq_init_attr *srq_init_attr)
608 {
609 	struct ib_srq *srq;
610 
611 	if (!pd->device->create_srq)
612 		return ERR_PTR(-ENOSYS);
613 
614 	srq = pd->device->create_srq(pd, srq_init_attr, NULL);
615 
616 	if (!IS_ERR(srq)) {
617 		srq->device    	   = pd->device;
618 		srq->pd        	   = pd;
619 		srq->uobject       = NULL;
620 		srq->event_handler = srq_init_attr->event_handler;
621 		srq->srq_context   = srq_init_attr->srq_context;
622 		srq->srq_type      = srq_init_attr->srq_type;
623 		if (srq->srq_type == IB_SRQT_XRC) {
624 			srq->ext.xrc.xrcd = srq_init_attr->ext.xrc.xrcd;
625 			srq->ext.xrc.cq   = srq_init_attr->ext.xrc.cq;
626 			atomic_inc(&srq->ext.xrc.xrcd->usecnt);
627 			atomic_inc(&srq->ext.xrc.cq->usecnt);
628 		}
629 		atomic_inc(&pd->usecnt);
630 		atomic_set(&srq->usecnt, 0);
631 	}
632 
633 	return srq;
634 }
635 EXPORT_SYMBOL(ib_create_srq);
636 
637 int ib_modify_srq(struct ib_srq *srq,
638 		  struct ib_srq_attr *srq_attr,
639 		  enum ib_srq_attr_mask srq_attr_mask)
640 {
641 	return srq->device->modify_srq ?
642 		srq->device->modify_srq(srq, srq_attr, srq_attr_mask, NULL) :
643 		-ENOSYS;
644 }
645 EXPORT_SYMBOL(ib_modify_srq);
646 
647 int ib_query_srq(struct ib_srq *srq,
648 		 struct ib_srq_attr *srq_attr)
649 {
650 	return srq->device->query_srq ?
651 		srq->device->query_srq(srq, srq_attr) : -ENOSYS;
652 }
653 EXPORT_SYMBOL(ib_query_srq);
654 
655 int ib_destroy_srq(struct ib_srq *srq)
656 {
657 	struct ib_pd *pd;
658 	enum ib_srq_type srq_type;
659 	struct ib_xrcd *uninitialized_var(xrcd);
660 	struct ib_cq *uninitialized_var(cq);
661 	int ret;
662 
663 	if (atomic_read(&srq->usecnt))
664 		return -EBUSY;
665 
666 	pd = srq->pd;
667 	srq_type = srq->srq_type;
668 	if (srq_type == IB_SRQT_XRC) {
669 		xrcd = srq->ext.xrc.xrcd;
670 		cq = srq->ext.xrc.cq;
671 	}
672 
673 	ret = srq->device->destroy_srq(srq);
674 	if (!ret) {
675 		atomic_dec(&pd->usecnt);
676 		if (srq_type == IB_SRQT_XRC) {
677 			atomic_dec(&xrcd->usecnt);
678 			atomic_dec(&cq->usecnt);
679 		}
680 	}
681 
682 	return ret;
683 }
684 EXPORT_SYMBOL(ib_destroy_srq);
685 
686 /* Queue pairs */
687 
688 static void __ib_shared_qp_event_handler(struct ib_event *event, void *context)
689 {
690 	struct ib_qp *qp = context;
691 	unsigned long flags;
692 
693 	spin_lock_irqsave(&qp->device->event_handler_lock, flags);
694 	list_for_each_entry(event->element.qp, &qp->open_list, open_list)
695 		if (event->element.qp->event_handler)
696 			event->element.qp->event_handler(event, event->element.qp->qp_context);
697 	spin_unlock_irqrestore(&qp->device->event_handler_lock, flags);
698 }
699 
700 static void __ib_insert_xrcd_qp(struct ib_xrcd *xrcd, struct ib_qp *qp)
701 {
702 	mutex_lock(&xrcd->tgt_qp_mutex);
703 	list_add(&qp->xrcd_list, &xrcd->tgt_qp_list);
704 	mutex_unlock(&xrcd->tgt_qp_mutex);
705 }
706 
707 static struct ib_qp *__ib_open_qp(struct ib_qp *real_qp,
708 				  void (*event_handler)(struct ib_event *, void *),
709 				  void *qp_context)
710 {
711 	struct ib_qp *qp;
712 	unsigned long flags;
713 
714 	qp = kzalloc(sizeof *qp, GFP_KERNEL);
715 	if (!qp)
716 		return ERR_PTR(-ENOMEM);
717 
718 	qp->real_qp = real_qp;
719 	atomic_inc(&real_qp->usecnt);
720 	qp->device = real_qp->device;
721 	qp->event_handler = event_handler;
722 	qp->qp_context = qp_context;
723 	qp->qp_num = real_qp->qp_num;
724 	qp->qp_type = real_qp->qp_type;
725 
726 	spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
727 	list_add(&qp->open_list, &real_qp->open_list);
728 	spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
729 
730 	return qp;
731 }
732 
733 struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
734 			 struct ib_qp_open_attr *qp_open_attr)
735 {
736 	struct ib_qp *qp, *real_qp;
737 
738 	if (qp_open_attr->qp_type != IB_QPT_XRC_TGT)
739 		return ERR_PTR(-EINVAL);
740 
741 	qp = ERR_PTR(-EINVAL);
742 	mutex_lock(&xrcd->tgt_qp_mutex);
743 	list_for_each_entry(real_qp, &xrcd->tgt_qp_list, xrcd_list) {
744 		if (real_qp->qp_num == qp_open_attr->qp_num) {
745 			qp = __ib_open_qp(real_qp, qp_open_attr->event_handler,
746 					  qp_open_attr->qp_context);
747 			break;
748 		}
749 	}
750 	mutex_unlock(&xrcd->tgt_qp_mutex);
751 	return qp;
752 }
753 EXPORT_SYMBOL(ib_open_qp);
754 
755 static struct ib_qp *ib_create_xrc_qp(struct ib_qp *qp,
756 		struct ib_qp_init_attr *qp_init_attr)
757 {
758 	struct ib_qp *real_qp = qp;
759 
760 	qp->event_handler = __ib_shared_qp_event_handler;
761 	qp->qp_context = qp;
762 	qp->pd = NULL;
763 	qp->send_cq = qp->recv_cq = NULL;
764 	qp->srq = NULL;
765 	qp->xrcd = qp_init_attr->xrcd;
766 	atomic_inc(&qp_init_attr->xrcd->usecnt);
767 	INIT_LIST_HEAD(&qp->open_list);
768 
769 	qp = __ib_open_qp(real_qp, qp_init_attr->event_handler,
770 			  qp_init_attr->qp_context);
771 	if (!IS_ERR(qp))
772 		__ib_insert_xrcd_qp(qp_init_attr->xrcd, real_qp);
773 	else
774 		real_qp->device->destroy_qp(real_qp);
775 	return qp;
776 }
777 
778 struct ib_qp *ib_create_qp(struct ib_pd *pd,
779 			   struct ib_qp_init_attr *qp_init_attr)
780 {
781 	struct ib_device *device = pd ? pd->device : qp_init_attr->xrcd->device;
782 	struct ib_qp *qp;
783 
784 	if (qp_init_attr->rwq_ind_tbl &&
785 	    (qp_init_attr->recv_cq ||
786 	    qp_init_attr->srq || qp_init_attr->cap.max_recv_wr ||
787 	    qp_init_attr->cap.max_recv_sge))
788 		return ERR_PTR(-EINVAL);
789 
790 	qp = device->create_qp(pd, qp_init_attr, NULL);
791 	if (IS_ERR(qp))
792 		return qp;
793 
794 	qp->device     = device;
795 	qp->real_qp    = qp;
796 	qp->uobject    = NULL;
797 	qp->qp_type    = qp_init_attr->qp_type;
798 	qp->rwq_ind_tbl = qp_init_attr->rwq_ind_tbl;
799 
800 	atomic_set(&qp->usecnt, 0);
801 	spin_lock_init(&qp->mr_lock);
802 
803 	if (qp_init_attr->qp_type == IB_QPT_XRC_TGT)
804 		return ib_create_xrc_qp(qp, qp_init_attr);
805 
806 	qp->event_handler = qp_init_attr->event_handler;
807 	qp->qp_context = qp_init_attr->qp_context;
808 	if (qp_init_attr->qp_type == IB_QPT_XRC_INI) {
809 		qp->recv_cq = NULL;
810 		qp->srq = NULL;
811 	} else {
812 		qp->recv_cq = qp_init_attr->recv_cq;
813 		if (qp_init_attr->recv_cq)
814 			atomic_inc(&qp_init_attr->recv_cq->usecnt);
815 		qp->srq = qp_init_attr->srq;
816 		if (qp->srq)
817 			atomic_inc(&qp_init_attr->srq->usecnt);
818 	}
819 
820 	qp->pd	    = pd;
821 	qp->send_cq = qp_init_attr->send_cq;
822 	qp->xrcd    = NULL;
823 
824 	atomic_inc(&pd->usecnt);
825 	if (qp_init_attr->send_cq)
826 		atomic_inc(&qp_init_attr->send_cq->usecnt);
827 	if (qp_init_attr->rwq_ind_tbl)
828 		atomic_inc(&qp->rwq_ind_tbl->usecnt);
829 
830 	/*
831 	 * Note: all hw drivers guarantee that max_send_sge is lower than
832 	 * the device RDMA WRITE SGE limit but not all hw drivers ensure that
833 	 * max_send_sge <= max_sge_rd.
834 	 */
835 	qp->max_write_sge = qp_init_attr->cap.max_send_sge;
836 	qp->max_read_sge = min_t(u32, qp_init_attr->cap.max_send_sge,
837 				 device->attrs.max_sge_rd);
838 
839 	return qp;
840 }
841 EXPORT_SYMBOL(ib_create_qp);
842 
843 static const struct {
844 	int			valid;
845 	enum ib_qp_attr_mask	req_param[IB_QPT_MAX];
846 	enum ib_qp_attr_mask	opt_param[IB_QPT_MAX];
847 } qp_state_table[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = {
848 	[IB_QPS_RESET] = {
849 		[IB_QPS_RESET] = { .valid = 1 },
850 		[IB_QPS_INIT]  = {
851 			.valid = 1,
852 			.req_param = {
853 				[IB_QPT_UD]  = (IB_QP_PKEY_INDEX		|
854 						IB_QP_PORT			|
855 						IB_QP_QKEY),
856 				[IB_QPT_RAW_PACKET] = IB_QP_PORT,
857 				[IB_QPT_UC]  = (IB_QP_PKEY_INDEX		|
858 						IB_QP_PORT			|
859 						IB_QP_ACCESS_FLAGS),
860 				[IB_QPT_RC]  = (IB_QP_PKEY_INDEX		|
861 						IB_QP_PORT			|
862 						IB_QP_ACCESS_FLAGS),
863 				[IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX		|
864 						IB_QP_PORT			|
865 						IB_QP_ACCESS_FLAGS),
866 				[IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX		|
867 						IB_QP_PORT			|
868 						IB_QP_ACCESS_FLAGS),
869 				[IB_QPT_SMI] = (IB_QP_PKEY_INDEX		|
870 						IB_QP_QKEY),
871 				[IB_QPT_GSI] = (IB_QP_PKEY_INDEX		|
872 						IB_QP_QKEY),
873 			}
874 		},
875 	},
876 	[IB_QPS_INIT]  = {
877 		[IB_QPS_RESET] = { .valid = 1 },
878 		[IB_QPS_ERR] =   { .valid = 1 },
879 		[IB_QPS_INIT]  = {
880 			.valid = 1,
881 			.opt_param = {
882 				[IB_QPT_UD]  = (IB_QP_PKEY_INDEX		|
883 						IB_QP_PORT			|
884 						IB_QP_QKEY),
885 				[IB_QPT_UC]  = (IB_QP_PKEY_INDEX		|
886 						IB_QP_PORT			|
887 						IB_QP_ACCESS_FLAGS),
888 				[IB_QPT_RC]  = (IB_QP_PKEY_INDEX		|
889 						IB_QP_PORT			|
890 						IB_QP_ACCESS_FLAGS),
891 				[IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX		|
892 						IB_QP_PORT			|
893 						IB_QP_ACCESS_FLAGS),
894 				[IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX		|
895 						IB_QP_PORT			|
896 						IB_QP_ACCESS_FLAGS),
897 				[IB_QPT_SMI] = (IB_QP_PKEY_INDEX		|
898 						IB_QP_QKEY),
899 				[IB_QPT_GSI] = (IB_QP_PKEY_INDEX		|
900 						IB_QP_QKEY),
901 			}
902 		},
903 		[IB_QPS_RTR]   = {
904 			.valid = 1,
905 			.req_param = {
906 				[IB_QPT_UC]  = (IB_QP_AV			|
907 						IB_QP_PATH_MTU			|
908 						IB_QP_DEST_QPN			|
909 						IB_QP_RQ_PSN),
910 				[IB_QPT_RC]  = (IB_QP_AV			|
911 						IB_QP_PATH_MTU			|
912 						IB_QP_DEST_QPN			|
913 						IB_QP_RQ_PSN			|
914 						IB_QP_MAX_DEST_RD_ATOMIC	|
915 						IB_QP_MIN_RNR_TIMER),
916 				[IB_QPT_XRC_INI] = (IB_QP_AV			|
917 						IB_QP_PATH_MTU			|
918 						IB_QP_DEST_QPN			|
919 						IB_QP_RQ_PSN),
920 				[IB_QPT_XRC_TGT] = (IB_QP_AV			|
921 						IB_QP_PATH_MTU			|
922 						IB_QP_DEST_QPN			|
923 						IB_QP_RQ_PSN			|
924 						IB_QP_MAX_DEST_RD_ATOMIC	|
925 						IB_QP_MIN_RNR_TIMER),
926 			},
927 			.opt_param = {
928 				 [IB_QPT_UD]  = (IB_QP_PKEY_INDEX		|
929 						 IB_QP_QKEY),
930 				 [IB_QPT_UC]  = (IB_QP_ALT_PATH			|
931 						 IB_QP_ACCESS_FLAGS		|
932 						 IB_QP_PKEY_INDEX),
933 				 [IB_QPT_RC]  = (IB_QP_ALT_PATH			|
934 						 IB_QP_ACCESS_FLAGS		|
935 						 IB_QP_PKEY_INDEX),
936 				 [IB_QPT_XRC_INI] = (IB_QP_ALT_PATH		|
937 						 IB_QP_ACCESS_FLAGS		|
938 						 IB_QP_PKEY_INDEX),
939 				 [IB_QPT_XRC_TGT] = (IB_QP_ALT_PATH		|
940 						 IB_QP_ACCESS_FLAGS		|
941 						 IB_QP_PKEY_INDEX),
942 				 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX		|
943 						 IB_QP_QKEY),
944 				 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX		|
945 						 IB_QP_QKEY),
946 			 },
947 		},
948 	},
949 	[IB_QPS_RTR]   = {
950 		[IB_QPS_RESET] = { .valid = 1 },
951 		[IB_QPS_ERR] =   { .valid = 1 },
952 		[IB_QPS_RTS]   = {
953 			.valid = 1,
954 			.req_param = {
955 				[IB_QPT_UD]  = IB_QP_SQ_PSN,
956 				[IB_QPT_UC]  = IB_QP_SQ_PSN,
957 				[IB_QPT_RC]  = (IB_QP_TIMEOUT			|
958 						IB_QP_RETRY_CNT			|
959 						IB_QP_RNR_RETRY			|
960 						IB_QP_SQ_PSN			|
961 						IB_QP_MAX_QP_RD_ATOMIC),
962 				[IB_QPT_XRC_INI] = (IB_QP_TIMEOUT		|
963 						IB_QP_RETRY_CNT			|
964 						IB_QP_RNR_RETRY			|
965 						IB_QP_SQ_PSN			|
966 						IB_QP_MAX_QP_RD_ATOMIC),
967 				[IB_QPT_XRC_TGT] = (IB_QP_TIMEOUT		|
968 						IB_QP_SQ_PSN),
969 				[IB_QPT_SMI] = IB_QP_SQ_PSN,
970 				[IB_QPT_GSI] = IB_QP_SQ_PSN,
971 			},
972 			.opt_param = {
973 				 [IB_QPT_UD]  = (IB_QP_CUR_STATE		|
974 						 IB_QP_QKEY),
975 				 [IB_QPT_UC]  = (IB_QP_CUR_STATE		|
976 						 IB_QP_ALT_PATH			|
977 						 IB_QP_ACCESS_FLAGS		|
978 						 IB_QP_PATH_MIG_STATE),
979 				 [IB_QPT_RC]  = (IB_QP_CUR_STATE		|
980 						 IB_QP_ALT_PATH			|
981 						 IB_QP_ACCESS_FLAGS		|
982 						 IB_QP_MIN_RNR_TIMER		|
983 						 IB_QP_PATH_MIG_STATE),
984 				 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE		|
985 						 IB_QP_ALT_PATH			|
986 						 IB_QP_ACCESS_FLAGS		|
987 						 IB_QP_PATH_MIG_STATE),
988 				 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE		|
989 						 IB_QP_ALT_PATH			|
990 						 IB_QP_ACCESS_FLAGS		|
991 						 IB_QP_MIN_RNR_TIMER		|
992 						 IB_QP_PATH_MIG_STATE),
993 				 [IB_QPT_SMI] = (IB_QP_CUR_STATE		|
994 						 IB_QP_QKEY),
995 				 [IB_QPT_GSI] = (IB_QP_CUR_STATE		|
996 						 IB_QP_QKEY),
997 			 }
998 		}
999 	},
1000 	[IB_QPS_RTS]   = {
1001 		[IB_QPS_RESET] = { .valid = 1 },
1002 		[IB_QPS_ERR] =   { .valid = 1 },
1003 		[IB_QPS_RTS]   = {
1004 			.valid = 1,
1005 			.opt_param = {
1006 				[IB_QPT_UD]  = (IB_QP_CUR_STATE			|
1007 						IB_QP_QKEY),
1008 				[IB_QPT_UC]  = (IB_QP_CUR_STATE			|
1009 						IB_QP_ACCESS_FLAGS		|
1010 						IB_QP_ALT_PATH			|
1011 						IB_QP_PATH_MIG_STATE),
1012 				[IB_QPT_RC]  = (IB_QP_CUR_STATE			|
1013 						IB_QP_ACCESS_FLAGS		|
1014 						IB_QP_ALT_PATH			|
1015 						IB_QP_PATH_MIG_STATE		|
1016 						IB_QP_MIN_RNR_TIMER),
1017 				[IB_QPT_XRC_INI] = (IB_QP_CUR_STATE		|
1018 						IB_QP_ACCESS_FLAGS		|
1019 						IB_QP_ALT_PATH			|
1020 						IB_QP_PATH_MIG_STATE),
1021 				[IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE		|
1022 						IB_QP_ACCESS_FLAGS		|
1023 						IB_QP_ALT_PATH			|
1024 						IB_QP_PATH_MIG_STATE		|
1025 						IB_QP_MIN_RNR_TIMER),
1026 				[IB_QPT_SMI] = (IB_QP_CUR_STATE			|
1027 						IB_QP_QKEY),
1028 				[IB_QPT_GSI] = (IB_QP_CUR_STATE			|
1029 						IB_QP_QKEY),
1030 			}
1031 		},
1032 		[IB_QPS_SQD]   = {
1033 			.valid = 1,
1034 			.opt_param = {
1035 				[IB_QPT_UD]  = IB_QP_EN_SQD_ASYNC_NOTIFY,
1036 				[IB_QPT_UC]  = IB_QP_EN_SQD_ASYNC_NOTIFY,
1037 				[IB_QPT_RC]  = IB_QP_EN_SQD_ASYNC_NOTIFY,
1038 				[IB_QPT_XRC_INI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1039 				[IB_QPT_XRC_TGT] = IB_QP_EN_SQD_ASYNC_NOTIFY, /* ??? */
1040 				[IB_QPT_SMI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1041 				[IB_QPT_GSI] = IB_QP_EN_SQD_ASYNC_NOTIFY
1042 			}
1043 		},
1044 	},
1045 	[IB_QPS_SQD]   = {
1046 		[IB_QPS_RESET] = { .valid = 1 },
1047 		[IB_QPS_ERR] =   { .valid = 1 },
1048 		[IB_QPS_RTS]   = {
1049 			.valid = 1,
1050 			.opt_param = {
1051 				[IB_QPT_UD]  = (IB_QP_CUR_STATE			|
1052 						IB_QP_QKEY),
1053 				[IB_QPT_UC]  = (IB_QP_CUR_STATE			|
1054 						IB_QP_ALT_PATH			|
1055 						IB_QP_ACCESS_FLAGS		|
1056 						IB_QP_PATH_MIG_STATE),
1057 				[IB_QPT_RC]  = (IB_QP_CUR_STATE			|
1058 						IB_QP_ALT_PATH			|
1059 						IB_QP_ACCESS_FLAGS		|
1060 						IB_QP_MIN_RNR_TIMER		|
1061 						IB_QP_PATH_MIG_STATE),
1062 				[IB_QPT_XRC_INI] = (IB_QP_CUR_STATE		|
1063 						IB_QP_ALT_PATH			|
1064 						IB_QP_ACCESS_FLAGS		|
1065 						IB_QP_PATH_MIG_STATE),
1066 				[IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE		|
1067 						IB_QP_ALT_PATH			|
1068 						IB_QP_ACCESS_FLAGS		|
1069 						IB_QP_MIN_RNR_TIMER		|
1070 						IB_QP_PATH_MIG_STATE),
1071 				[IB_QPT_SMI] = (IB_QP_CUR_STATE			|
1072 						IB_QP_QKEY),
1073 				[IB_QPT_GSI] = (IB_QP_CUR_STATE			|
1074 						IB_QP_QKEY),
1075 			}
1076 		},
1077 		[IB_QPS_SQD]   = {
1078 			.valid = 1,
1079 			.opt_param = {
1080 				[IB_QPT_UD]  = (IB_QP_PKEY_INDEX		|
1081 						IB_QP_QKEY),
1082 				[IB_QPT_UC]  = (IB_QP_AV			|
1083 						IB_QP_ALT_PATH			|
1084 						IB_QP_ACCESS_FLAGS		|
1085 						IB_QP_PKEY_INDEX		|
1086 						IB_QP_PATH_MIG_STATE),
1087 				[IB_QPT_RC]  = (IB_QP_PORT			|
1088 						IB_QP_AV			|
1089 						IB_QP_TIMEOUT			|
1090 						IB_QP_RETRY_CNT			|
1091 						IB_QP_RNR_RETRY			|
1092 						IB_QP_MAX_QP_RD_ATOMIC		|
1093 						IB_QP_MAX_DEST_RD_ATOMIC	|
1094 						IB_QP_ALT_PATH			|
1095 						IB_QP_ACCESS_FLAGS		|
1096 						IB_QP_PKEY_INDEX		|
1097 						IB_QP_MIN_RNR_TIMER		|
1098 						IB_QP_PATH_MIG_STATE),
1099 				[IB_QPT_XRC_INI] = (IB_QP_PORT			|
1100 						IB_QP_AV			|
1101 						IB_QP_TIMEOUT			|
1102 						IB_QP_RETRY_CNT			|
1103 						IB_QP_RNR_RETRY			|
1104 						IB_QP_MAX_QP_RD_ATOMIC		|
1105 						IB_QP_ALT_PATH			|
1106 						IB_QP_ACCESS_FLAGS		|
1107 						IB_QP_PKEY_INDEX		|
1108 						IB_QP_PATH_MIG_STATE),
1109 				[IB_QPT_XRC_TGT] = (IB_QP_PORT			|
1110 						IB_QP_AV			|
1111 						IB_QP_TIMEOUT			|
1112 						IB_QP_MAX_DEST_RD_ATOMIC	|
1113 						IB_QP_ALT_PATH			|
1114 						IB_QP_ACCESS_FLAGS		|
1115 						IB_QP_PKEY_INDEX		|
1116 						IB_QP_MIN_RNR_TIMER		|
1117 						IB_QP_PATH_MIG_STATE),
1118 				[IB_QPT_SMI] = (IB_QP_PKEY_INDEX		|
1119 						IB_QP_QKEY),
1120 				[IB_QPT_GSI] = (IB_QP_PKEY_INDEX		|
1121 						IB_QP_QKEY),
1122 			}
1123 		}
1124 	},
1125 	[IB_QPS_SQE]   = {
1126 		[IB_QPS_RESET] = { .valid = 1 },
1127 		[IB_QPS_ERR] =   { .valid = 1 },
1128 		[IB_QPS_RTS]   = {
1129 			.valid = 1,
1130 			.opt_param = {
1131 				[IB_QPT_UD]  = (IB_QP_CUR_STATE			|
1132 						IB_QP_QKEY),
1133 				[IB_QPT_UC]  = (IB_QP_CUR_STATE			|
1134 						IB_QP_ACCESS_FLAGS),
1135 				[IB_QPT_SMI] = (IB_QP_CUR_STATE			|
1136 						IB_QP_QKEY),
1137 				[IB_QPT_GSI] = (IB_QP_CUR_STATE			|
1138 						IB_QP_QKEY),
1139 			}
1140 		}
1141 	},
1142 	[IB_QPS_ERR] = {
1143 		[IB_QPS_RESET] = { .valid = 1 },
1144 		[IB_QPS_ERR] =   { .valid = 1 }
1145 	}
1146 };
1147 
1148 int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
1149 		       enum ib_qp_type type, enum ib_qp_attr_mask mask,
1150 		       enum rdma_link_layer ll)
1151 {
1152 	enum ib_qp_attr_mask req_param, opt_param;
1153 
1154 	if (cur_state  < 0 || cur_state  > IB_QPS_ERR ||
1155 	    next_state < 0 || next_state > IB_QPS_ERR)
1156 		return 0;
1157 
1158 	if (mask & IB_QP_CUR_STATE  &&
1159 	    cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS &&
1160 	    cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE)
1161 		return 0;
1162 
1163 	if (!qp_state_table[cur_state][next_state].valid)
1164 		return 0;
1165 
1166 	req_param = qp_state_table[cur_state][next_state].req_param[type];
1167 	opt_param = qp_state_table[cur_state][next_state].opt_param[type];
1168 
1169 	if ((mask & req_param) != req_param)
1170 		return 0;
1171 
1172 	if (mask & ~(req_param | opt_param | IB_QP_STATE))
1173 		return 0;
1174 
1175 	return 1;
1176 }
1177 EXPORT_SYMBOL(ib_modify_qp_is_ok);
1178 
1179 int ib_resolve_eth_dmac(struct ib_qp *qp,
1180 			struct ib_qp_attr *qp_attr, int *qp_attr_mask)
1181 {
1182 	int           ret = 0;
1183 
1184 	if (*qp_attr_mask & IB_QP_AV) {
1185 		if (qp_attr->ah_attr.port_num < rdma_start_port(qp->device) ||
1186 		    qp_attr->ah_attr.port_num > rdma_end_port(qp->device))
1187 			return -EINVAL;
1188 
1189 		if (!rdma_cap_eth_ah(qp->device, qp_attr->ah_attr.port_num))
1190 			return 0;
1191 
1192 		if (rdma_link_local_addr((struct in6_addr *)qp_attr->ah_attr.grh.dgid.raw)) {
1193 			rdma_get_ll_mac((struct in6_addr *)qp_attr->ah_attr.grh.dgid.raw,
1194 					qp_attr->ah_attr.dmac);
1195 		} else {
1196 			union ib_gid		sgid;
1197 			struct ib_gid_attr	sgid_attr;
1198 			int			ifindex;
1199 			int			hop_limit;
1200 
1201 			ret = ib_query_gid(qp->device,
1202 					   qp_attr->ah_attr.port_num,
1203 					   qp_attr->ah_attr.grh.sgid_index,
1204 					   &sgid, &sgid_attr);
1205 
1206 			if (ret || !sgid_attr.ndev) {
1207 				if (!ret)
1208 					ret = -ENXIO;
1209 				goto out;
1210 			}
1211 
1212 			ifindex = sgid_attr.ndev->if_index;
1213 
1214 			ret = rdma_addr_find_l2_eth_by_grh(&sgid,
1215 							   &qp_attr->ah_attr.grh.dgid,
1216 							   qp_attr->ah_attr.dmac,
1217 							   NULL, &ifindex, &hop_limit);
1218 
1219 			dev_put(sgid_attr.ndev);
1220 
1221 			qp_attr->ah_attr.grh.hop_limit = hop_limit;
1222 		}
1223 	}
1224 out:
1225 	return ret;
1226 }
1227 EXPORT_SYMBOL(ib_resolve_eth_dmac);
1228 
1229 
1230 int ib_modify_qp(struct ib_qp *qp,
1231 		 struct ib_qp_attr *qp_attr,
1232 		 int qp_attr_mask)
1233 {
1234 	int ret;
1235 
1236 	ret = ib_resolve_eth_dmac(qp, qp_attr, &qp_attr_mask);
1237 	if (ret)
1238 		return ret;
1239 
1240 	return qp->device->modify_qp(qp->real_qp, qp_attr, qp_attr_mask, NULL);
1241 }
1242 EXPORT_SYMBOL(ib_modify_qp);
1243 
1244 int ib_query_qp(struct ib_qp *qp,
1245 		struct ib_qp_attr *qp_attr,
1246 		int qp_attr_mask,
1247 		struct ib_qp_init_attr *qp_init_attr)
1248 {
1249 	return qp->device->query_qp ?
1250 		qp->device->query_qp(qp->real_qp, qp_attr, qp_attr_mask, qp_init_attr) :
1251 		-ENOSYS;
1252 }
1253 EXPORT_SYMBOL(ib_query_qp);
1254 
1255 int ib_close_qp(struct ib_qp *qp)
1256 {
1257 	struct ib_qp *real_qp;
1258 	unsigned long flags;
1259 
1260 	real_qp = qp->real_qp;
1261 	if (real_qp == qp)
1262 		return -EINVAL;
1263 
1264 	spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
1265 	list_del(&qp->open_list);
1266 	spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
1267 
1268 	atomic_dec(&real_qp->usecnt);
1269 	kfree(qp);
1270 
1271 	return 0;
1272 }
1273 EXPORT_SYMBOL(ib_close_qp);
1274 
1275 static int __ib_destroy_shared_qp(struct ib_qp *qp)
1276 {
1277 	struct ib_xrcd *xrcd;
1278 	struct ib_qp *real_qp;
1279 	int ret;
1280 
1281 	real_qp = qp->real_qp;
1282 	xrcd = real_qp->xrcd;
1283 
1284 	mutex_lock(&xrcd->tgt_qp_mutex);
1285 	ib_close_qp(qp);
1286 	if (atomic_read(&real_qp->usecnt) == 0)
1287 		list_del(&real_qp->xrcd_list);
1288 	else
1289 		real_qp = NULL;
1290 	mutex_unlock(&xrcd->tgt_qp_mutex);
1291 
1292 	if (real_qp) {
1293 		ret = ib_destroy_qp(real_qp);
1294 		if (!ret)
1295 			atomic_dec(&xrcd->usecnt);
1296 		else
1297 			__ib_insert_xrcd_qp(xrcd, real_qp);
1298 	}
1299 
1300 	return 0;
1301 }
1302 
1303 int ib_destroy_qp(struct ib_qp *qp)
1304 {
1305 	struct ib_pd *pd;
1306 	struct ib_cq *scq, *rcq;
1307 	struct ib_srq *srq;
1308 	struct ib_rwq_ind_table *ind_tbl;
1309 	int ret;
1310 
1311 	if (atomic_read(&qp->usecnt))
1312 		return -EBUSY;
1313 
1314 	if (qp->real_qp != qp)
1315 		return __ib_destroy_shared_qp(qp);
1316 
1317 	pd   = qp->pd;
1318 	scq  = qp->send_cq;
1319 	rcq  = qp->recv_cq;
1320 	srq  = qp->srq;
1321 	ind_tbl = qp->rwq_ind_tbl;
1322 
1323 	ret = qp->device->destroy_qp(qp);
1324 	if (!ret) {
1325 		if (pd)
1326 			atomic_dec(&pd->usecnt);
1327 		if (scq)
1328 			atomic_dec(&scq->usecnt);
1329 		if (rcq)
1330 			atomic_dec(&rcq->usecnt);
1331 		if (srq)
1332 			atomic_dec(&srq->usecnt);
1333 		if (ind_tbl)
1334 			atomic_dec(&ind_tbl->usecnt);
1335 	}
1336 
1337 	return ret;
1338 }
1339 EXPORT_SYMBOL(ib_destroy_qp);
1340 
1341 /* Completion queues */
1342 
1343 struct ib_cq *ib_create_cq(struct ib_device *device,
1344 			   ib_comp_handler comp_handler,
1345 			   void (*event_handler)(struct ib_event *, void *),
1346 			   void *cq_context,
1347 			   const struct ib_cq_init_attr *cq_attr)
1348 {
1349 	struct ib_cq *cq;
1350 
1351 	cq = device->create_cq(device, cq_attr, NULL, NULL);
1352 
1353 	if (!IS_ERR(cq)) {
1354 		cq->device        = device;
1355 		cq->uobject       = NULL;
1356 		cq->comp_handler  = comp_handler;
1357 		cq->event_handler = event_handler;
1358 		cq->cq_context    = cq_context;
1359 		atomic_set(&cq->usecnt, 0);
1360 	}
1361 
1362 	return cq;
1363 }
1364 EXPORT_SYMBOL(ib_create_cq);
1365 
1366 int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period)
1367 {
1368 	return cq->device->modify_cq ?
1369 		cq->device->modify_cq(cq, cq_count, cq_period) : -ENOSYS;
1370 }
1371 EXPORT_SYMBOL(ib_modify_cq);
1372 
1373 int ib_destroy_cq(struct ib_cq *cq)
1374 {
1375 	if (atomic_read(&cq->usecnt))
1376 		return -EBUSY;
1377 
1378 	return cq->device->destroy_cq(cq);
1379 }
1380 EXPORT_SYMBOL(ib_destroy_cq);
1381 
1382 int ib_resize_cq(struct ib_cq *cq, int cqe)
1383 {
1384 	return cq->device->resize_cq ?
1385 		cq->device->resize_cq(cq, cqe, NULL) : -ENOSYS;
1386 }
1387 EXPORT_SYMBOL(ib_resize_cq);
1388 
1389 /* Memory regions */
1390 
1391 int ib_dereg_mr(struct ib_mr *mr)
1392 {
1393 	struct ib_pd *pd = mr->pd;
1394 	int ret;
1395 
1396 	ret = mr->device->dereg_mr(mr);
1397 	if (!ret)
1398 		atomic_dec(&pd->usecnt);
1399 
1400 	return ret;
1401 }
1402 EXPORT_SYMBOL(ib_dereg_mr);
1403 
1404 /**
1405  * ib_alloc_mr() - Allocates a memory region
1406  * @pd:            protection domain associated with the region
1407  * @mr_type:       memory region type
1408  * @max_num_sg:    maximum sg entries available for registration.
1409  *
1410  * Notes:
1411  * Memory registeration page/sg lists must not exceed max_num_sg.
1412  * For mr_type IB_MR_TYPE_MEM_REG, the total length cannot exceed
1413  * max_num_sg * used_page_size.
1414  *
1415  */
1416 struct ib_mr *ib_alloc_mr(struct ib_pd *pd,
1417 			  enum ib_mr_type mr_type,
1418 			  u32 max_num_sg)
1419 {
1420 	struct ib_mr *mr;
1421 
1422 	if (!pd->device->alloc_mr)
1423 		return ERR_PTR(-ENOSYS);
1424 
1425 	mr = pd->device->alloc_mr(pd, mr_type, max_num_sg);
1426 	if (!IS_ERR(mr)) {
1427 		mr->device  = pd->device;
1428 		mr->pd      = pd;
1429 		mr->uobject = NULL;
1430 		atomic_inc(&pd->usecnt);
1431 		mr->need_inval = false;
1432 	}
1433 
1434 	return mr;
1435 }
1436 EXPORT_SYMBOL(ib_alloc_mr);
1437 
1438 /* "Fast" memory regions */
1439 
1440 struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd,
1441 			    int mr_access_flags,
1442 			    struct ib_fmr_attr *fmr_attr)
1443 {
1444 	struct ib_fmr *fmr;
1445 
1446 	if (!pd->device->alloc_fmr)
1447 		return ERR_PTR(-ENOSYS);
1448 
1449 	fmr = pd->device->alloc_fmr(pd, mr_access_flags, fmr_attr);
1450 	if (!IS_ERR(fmr)) {
1451 		fmr->device = pd->device;
1452 		fmr->pd     = pd;
1453 		atomic_inc(&pd->usecnt);
1454 	}
1455 
1456 	return fmr;
1457 }
1458 EXPORT_SYMBOL(ib_alloc_fmr);
1459 
1460 int ib_unmap_fmr(struct list_head *fmr_list)
1461 {
1462 	struct ib_fmr *fmr;
1463 
1464 	if (list_empty(fmr_list))
1465 		return 0;
1466 
1467 	fmr = list_entry(fmr_list->next, struct ib_fmr, list);
1468 	return fmr->device->unmap_fmr(fmr_list);
1469 }
1470 EXPORT_SYMBOL(ib_unmap_fmr);
1471 
1472 int ib_dealloc_fmr(struct ib_fmr *fmr)
1473 {
1474 	struct ib_pd *pd;
1475 	int ret;
1476 
1477 	pd = fmr->pd;
1478 	ret = fmr->device->dealloc_fmr(fmr);
1479 	if (!ret)
1480 		atomic_dec(&pd->usecnt);
1481 
1482 	return ret;
1483 }
1484 EXPORT_SYMBOL(ib_dealloc_fmr);
1485 
1486 /* Multicast groups */
1487 
1488 int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
1489 {
1490 	int ret;
1491 
1492 	if (!qp->device->attach_mcast)
1493 		return -ENOSYS;
1494 	if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
1495 		return -EINVAL;
1496 
1497 	ret = qp->device->attach_mcast(qp, gid, lid);
1498 	if (!ret)
1499 		atomic_inc(&qp->usecnt);
1500 	return ret;
1501 }
1502 EXPORT_SYMBOL(ib_attach_mcast);
1503 
1504 int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
1505 {
1506 	int ret;
1507 
1508 	if (!qp->device->detach_mcast)
1509 		return -ENOSYS;
1510 	if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
1511 		return -EINVAL;
1512 
1513 	ret = qp->device->detach_mcast(qp, gid, lid);
1514 	if (!ret)
1515 		atomic_dec(&qp->usecnt);
1516 	return ret;
1517 }
1518 EXPORT_SYMBOL(ib_detach_mcast);
1519 
1520 struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device)
1521 {
1522 	struct ib_xrcd *xrcd;
1523 
1524 	if (!device->alloc_xrcd)
1525 		return ERR_PTR(-ENOSYS);
1526 
1527 	xrcd = device->alloc_xrcd(device, NULL, NULL);
1528 	if (!IS_ERR(xrcd)) {
1529 		xrcd->device = device;
1530 		xrcd->inode = NULL;
1531 		atomic_set(&xrcd->usecnt, 0);
1532 		mutex_init(&xrcd->tgt_qp_mutex);
1533 		INIT_LIST_HEAD(&xrcd->tgt_qp_list);
1534 	}
1535 
1536 	return xrcd;
1537 }
1538 EXPORT_SYMBOL(ib_alloc_xrcd);
1539 
1540 int ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1541 {
1542 	struct ib_qp *qp;
1543 	int ret;
1544 
1545 	if (atomic_read(&xrcd->usecnt))
1546 		return -EBUSY;
1547 
1548 	while (!list_empty(&xrcd->tgt_qp_list)) {
1549 		qp = list_entry(xrcd->tgt_qp_list.next, struct ib_qp, xrcd_list);
1550 		ret = ib_destroy_qp(qp);
1551 		if (ret)
1552 			return ret;
1553 	}
1554 
1555 	return xrcd->device->dealloc_xrcd(xrcd);
1556 }
1557 EXPORT_SYMBOL(ib_dealloc_xrcd);
1558 
1559 /**
1560  * ib_create_wq - Creates a WQ associated with the specified protection
1561  * domain.
1562  * @pd: The protection domain associated with the WQ.
1563  * @wq_init_attr: A list of initial attributes required to create the
1564  * WQ. If WQ creation succeeds, then the attributes are updated to
1565  * the actual capabilities of the created WQ.
1566  *
1567  * wq_init_attr->max_wr and wq_init_attr->max_sge determine
1568  * the requested size of the WQ, and set to the actual values allocated
1569  * on return.
1570  * If ib_create_wq() succeeds, then max_wr and max_sge will always be
1571  * at least as large as the requested values.
1572  */
1573 struct ib_wq *ib_create_wq(struct ib_pd *pd,
1574 			   struct ib_wq_init_attr *wq_attr)
1575 {
1576 	struct ib_wq *wq;
1577 
1578 	if (!pd->device->create_wq)
1579 		return ERR_PTR(-ENOSYS);
1580 
1581 	wq = pd->device->create_wq(pd, wq_attr, NULL);
1582 	if (!IS_ERR(wq)) {
1583 		wq->event_handler = wq_attr->event_handler;
1584 		wq->wq_context = wq_attr->wq_context;
1585 		wq->wq_type = wq_attr->wq_type;
1586 		wq->cq = wq_attr->cq;
1587 		wq->device = pd->device;
1588 		wq->pd = pd;
1589 		wq->uobject = NULL;
1590 		atomic_inc(&pd->usecnt);
1591 		atomic_inc(&wq_attr->cq->usecnt);
1592 		atomic_set(&wq->usecnt, 0);
1593 	}
1594 	return wq;
1595 }
1596 EXPORT_SYMBOL(ib_create_wq);
1597 
1598 /**
1599  * ib_destroy_wq - Destroys the specified WQ.
1600  * @wq: The WQ to destroy.
1601  */
1602 int ib_destroy_wq(struct ib_wq *wq)
1603 {
1604 	int err;
1605 	struct ib_cq *cq = wq->cq;
1606 	struct ib_pd *pd = wq->pd;
1607 
1608 	if (atomic_read(&wq->usecnt))
1609 		return -EBUSY;
1610 
1611 	err = wq->device->destroy_wq(wq);
1612 	if (!err) {
1613 		atomic_dec(&pd->usecnt);
1614 		atomic_dec(&cq->usecnt);
1615 	}
1616 	return err;
1617 }
1618 EXPORT_SYMBOL(ib_destroy_wq);
1619 
1620 /**
1621  * ib_modify_wq - Modifies the specified WQ.
1622  * @wq: The WQ to modify.
1623  * @wq_attr: On input, specifies the WQ attributes to modify.
1624  * @wq_attr_mask: A bit-mask used to specify which attributes of the WQ
1625  *   are being modified.
1626  * On output, the current values of selected WQ attributes are returned.
1627  */
1628 int ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr,
1629 		 u32 wq_attr_mask)
1630 {
1631 	int err;
1632 
1633 	if (!wq->device->modify_wq)
1634 		return -ENOSYS;
1635 
1636 	err = wq->device->modify_wq(wq, wq_attr, wq_attr_mask, NULL);
1637 	return err;
1638 }
1639 EXPORT_SYMBOL(ib_modify_wq);
1640 
1641 /*
1642  * ib_create_rwq_ind_table - Creates a RQ Indirection Table.
1643  * @device: The device on which to create the rwq indirection table.
1644  * @ib_rwq_ind_table_init_attr: A list of initial attributes required to
1645  * create the Indirection Table.
1646  *
1647  * Note: The life time of ib_rwq_ind_table_init_attr->ind_tbl is not less
1648  *	than the created ib_rwq_ind_table object and the caller is responsible
1649  *	for its memory allocation/free.
1650  */
1651 struct ib_rwq_ind_table *ib_create_rwq_ind_table(struct ib_device *device,
1652 						 struct ib_rwq_ind_table_init_attr *init_attr)
1653 {
1654 	struct ib_rwq_ind_table *rwq_ind_table;
1655 	int i;
1656 	u32 table_size;
1657 
1658 	if (!device->create_rwq_ind_table)
1659 		return ERR_PTR(-ENOSYS);
1660 
1661 	table_size = (1 << init_attr->log_ind_tbl_size);
1662 	rwq_ind_table = device->create_rwq_ind_table(device,
1663 				init_attr, NULL);
1664 	if (IS_ERR(rwq_ind_table))
1665 		return rwq_ind_table;
1666 
1667 	rwq_ind_table->ind_tbl = init_attr->ind_tbl;
1668 	rwq_ind_table->log_ind_tbl_size = init_attr->log_ind_tbl_size;
1669 	rwq_ind_table->device = device;
1670 	rwq_ind_table->uobject = NULL;
1671 	atomic_set(&rwq_ind_table->usecnt, 0);
1672 
1673 	for (i = 0; i < table_size; i++)
1674 		atomic_inc(&rwq_ind_table->ind_tbl[i]->usecnt);
1675 
1676 	return rwq_ind_table;
1677 }
1678 EXPORT_SYMBOL(ib_create_rwq_ind_table);
1679 
1680 /*
1681  * ib_destroy_rwq_ind_table - Destroys the specified Indirection Table.
1682  * @wq_ind_table: The Indirection Table to destroy.
1683 */
1684 int ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *rwq_ind_table)
1685 {
1686 	int err, i;
1687 	u32 table_size = (1 << rwq_ind_table->log_ind_tbl_size);
1688 	struct ib_wq **ind_tbl = rwq_ind_table->ind_tbl;
1689 
1690 	if (atomic_read(&rwq_ind_table->usecnt))
1691 		return -EBUSY;
1692 
1693 	err = rwq_ind_table->device->destroy_rwq_ind_table(rwq_ind_table);
1694 	if (!err) {
1695 		for (i = 0; i < table_size; i++)
1696 			atomic_dec(&ind_tbl[i]->usecnt);
1697 	}
1698 
1699 	return err;
1700 }
1701 EXPORT_SYMBOL(ib_destroy_rwq_ind_table);
1702 
1703 struct ib_flow *ib_create_flow(struct ib_qp *qp,
1704 			       struct ib_flow_attr *flow_attr,
1705 			       int domain)
1706 {
1707 	struct ib_flow *flow_id;
1708 	if (!qp->device->create_flow)
1709 		return ERR_PTR(-ENOSYS);
1710 
1711 	flow_id = qp->device->create_flow(qp, flow_attr, domain);
1712 	if (!IS_ERR(flow_id))
1713 		atomic_inc(&qp->usecnt);
1714 	return flow_id;
1715 }
1716 EXPORT_SYMBOL(ib_create_flow);
1717 
1718 int ib_destroy_flow(struct ib_flow *flow_id)
1719 {
1720 	int err;
1721 	struct ib_qp *qp = flow_id->qp;
1722 
1723 	err = qp->device->destroy_flow(flow_id);
1724 	if (!err)
1725 		atomic_dec(&qp->usecnt);
1726 	return err;
1727 }
1728 EXPORT_SYMBOL(ib_destroy_flow);
1729 
1730 int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
1731 		       struct ib_mr_status *mr_status)
1732 {
1733 	return mr->device->check_mr_status ?
1734 		mr->device->check_mr_status(mr, check_mask, mr_status) : -ENOSYS;
1735 }
1736 EXPORT_SYMBOL(ib_check_mr_status);
1737 
1738 int ib_set_vf_link_state(struct ib_device *device, int vf, u8 port,
1739 			 int state)
1740 {
1741 	if (!device->set_vf_link_state)
1742 		return -ENOSYS;
1743 
1744 	return device->set_vf_link_state(device, vf, port, state);
1745 }
1746 EXPORT_SYMBOL(ib_set_vf_link_state);
1747 
1748 int ib_get_vf_config(struct ib_device *device, int vf, u8 port,
1749 		     struct ifla_vf_info *info)
1750 {
1751 	if (!device->get_vf_config)
1752 		return -ENOSYS;
1753 
1754 	return device->get_vf_config(device, vf, port, info);
1755 }
1756 EXPORT_SYMBOL(ib_get_vf_config);
1757 
1758 int ib_get_vf_stats(struct ib_device *device, int vf, u8 port,
1759 		    struct ifla_vf_stats *stats)
1760 {
1761 	if (!device->get_vf_stats)
1762 		return -ENOSYS;
1763 
1764 	return device->get_vf_stats(device, vf, port, stats);
1765 }
1766 EXPORT_SYMBOL(ib_get_vf_stats);
1767 
1768 int ib_set_vf_guid(struct ib_device *device, int vf, u8 port, u64 guid,
1769 		   int type)
1770 {
1771 	if (!device->set_vf_guid)
1772 		return -ENOSYS;
1773 
1774 	return device->set_vf_guid(device, vf, port, guid, type);
1775 }
1776 EXPORT_SYMBOL(ib_set_vf_guid);
1777 
1778 /**
1779  * ib_map_mr_sg() - Map the largest prefix of a dma mapped SG list
1780  *     and set it the memory region.
1781  * @mr:            memory region
1782  * @sg:            dma mapped scatterlist
1783  * @sg_nents:      number of entries in sg
1784  * @sg_offset:     offset in bytes into sg
1785  * @page_size:     page vector desired page size
1786  *
1787  * Constraints:
1788  * - The first sg element is allowed to have an offset.
1789  * - Each sg element must either be aligned to page_size or virtually
1790  *   contiguous to the previous element. In case an sg element has a
1791  *   non-contiguous offset, the mapping prefix will not include it.
1792  * - The last sg element is allowed to have length less than page_size.
1793  * - If sg_nents total byte length exceeds the mr max_num_sge * page_size
1794  *   then only max_num_sg entries will be mapped.
1795  * - If the MR was allocated with type IB_MR_TYPE_SG_GAPS, none of these
1796  *   constraints holds and the page_size argument is ignored.
1797  *
1798  * Returns the number of sg elements that were mapped to the memory region.
1799  *
1800  * After this completes successfully, the  memory region
1801  * is ready for registration.
1802  */
1803 int ib_map_mr_sg(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
1804 		 unsigned int *sg_offset, unsigned int page_size)
1805 {
1806 	if (unlikely(!mr->device->map_mr_sg))
1807 		return -ENOSYS;
1808 
1809 	mr->page_size = page_size;
1810 
1811 	return mr->device->map_mr_sg(mr, sg, sg_nents, sg_offset);
1812 }
1813 EXPORT_SYMBOL(ib_map_mr_sg);
1814 
1815 /**
1816  * ib_sg_to_pages() - Convert the largest prefix of a sg list
1817  *     to a page vector
1818  * @mr:            memory region
1819  * @sgl:           dma mapped scatterlist
1820  * @sg_nents:      number of entries in sg
1821  * @sg_offset_p:   IN:  start offset in bytes into sg
1822  *                 OUT: offset in bytes for element n of the sg of the first
1823  *                      byte that has not been processed where n is the return
1824  *                      value of this function.
1825  * @set_page:      driver page assignment function pointer
1826  *
1827  * Core service helper for drivers to convert the largest
1828  * prefix of given sg list to a page vector. The sg list
1829  * prefix converted is the prefix that meet the requirements
1830  * of ib_map_mr_sg.
1831  *
1832  * Returns the number of sg elements that were assigned to
1833  * a page vector.
1834  */
1835 int ib_sg_to_pages(struct ib_mr *mr, struct scatterlist *sgl, int sg_nents,
1836 		unsigned int *sg_offset_p, int (*set_page)(struct ib_mr *, u64))
1837 {
1838 	struct scatterlist *sg;
1839 	u64 last_end_dma_addr = 0;
1840 	unsigned int sg_offset = sg_offset_p ? *sg_offset_p : 0;
1841 	unsigned int last_page_off = 0;
1842 	u64 page_mask = ~((u64)mr->page_size - 1);
1843 	int i, ret;
1844 
1845 	if (unlikely(sg_nents <= 0 || sg_offset > sg_dma_len(&sgl[0])))
1846 		return -EINVAL;
1847 
1848 	mr->iova = sg_dma_address(&sgl[0]) + sg_offset;
1849 	mr->length = 0;
1850 
1851 	for_each_sg(sgl, sg, sg_nents, i) {
1852 		u64 dma_addr = sg_dma_address(sg) + sg_offset;
1853 		u64 prev_addr = dma_addr;
1854 		unsigned int dma_len = sg_dma_len(sg) - sg_offset;
1855 		u64 end_dma_addr = dma_addr + dma_len;
1856 		u64 page_addr = dma_addr & page_mask;
1857 
1858 		/*
1859 		 * For the second and later elements, check whether either the
1860 		 * end of element i-1 or the start of element i is not aligned
1861 		 * on a page boundary.
1862 		 */
1863 		if (i && (last_page_off != 0 || page_addr != dma_addr)) {
1864 			/* Stop mapping if there is a gap. */
1865 			if (last_end_dma_addr != dma_addr)
1866 				break;
1867 
1868 			/*
1869 			 * Coalesce this element with the last. If it is small
1870 			 * enough just update mr->length. Otherwise start
1871 			 * mapping from the next page.
1872 			 */
1873 			goto next_page;
1874 		}
1875 
1876 		do {
1877 			ret = set_page(mr, page_addr);
1878 			if (unlikely(ret < 0)) {
1879 				sg_offset = prev_addr - sg_dma_address(sg);
1880 				mr->length += prev_addr - dma_addr;
1881 				if (sg_offset_p)
1882 					*sg_offset_p = sg_offset;
1883 				return i || sg_offset ? i : ret;
1884 			}
1885 			prev_addr = page_addr;
1886 next_page:
1887 			page_addr += mr->page_size;
1888 		} while (page_addr < end_dma_addr);
1889 
1890 		mr->length += dma_len;
1891 		last_end_dma_addr = end_dma_addr;
1892 		last_page_off = end_dma_addr & ~page_mask;
1893 
1894 		sg_offset = 0;
1895 	}
1896 
1897 	if (sg_offset_p)
1898 		*sg_offset_p = 0;
1899 	return i;
1900 }
1901 EXPORT_SYMBOL(ib_sg_to_pages);
1902 
1903 struct ib_drain_cqe {
1904 	struct ib_cqe cqe;
1905 	struct completion done;
1906 };
1907 
1908 static void ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc)
1909 {
1910 	struct ib_drain_cqe *cqe = container_of(wc->wr_cqe, struct ib_drain_cqe,
1911 						cqe);
1912 
1913 	complete(&cqe->done);
1914 }
1915 
1916 /*
1917  * Post a WR and block until its completion is reaped for the SQ.
1918  */
1919 static void __ib_drain_sq(struct ib_qp *qp)
1920 {
1921 	struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
1922 	struct ib_drain_cqe sdrain;
1923 	struct ib_send_wr swr = {}, *bad_swr;
1924 	int ret;
1925 
1926 	if (qp->send_cq->poll_ctx == IB_POLL_DIRECT) {
1927 		WARN_ONCE(qp->send_cq->poll_ctx == IB_POLL_DIRECT,
1928 			  "IB_POLL_DIRECT poll_ctx not supported for drain\n");
1929 		return;
1930 	}
1931 
1932 	swr.wr_cqe = &sdrain.cqe;
1933 	sdrain.cqe.done = ib_drain_qp_done;
1934 	init_completion(&sdrain.done);
1935 
1936 	ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
1937 	if (ret) {
1938 		WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
1939 		return;
1940 	}
1941 
1942 	ret = ib_post_send(qp, &swr, &bad_swr);
1943 	if (ret) {
1944 		WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
1945 		return;
1946 	}
1947 
1948 	wait_for_completion(&sdrain.done);
1949 }
1950 
1951 /*
1952  * Post a WR and block until its completion is reaped for the RQ.
1953  */
1954 static void __ib_drain_rq(struct ib_qp *qp)
1955 {
1956 	struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
1957 	struct ib_drain_cqe rdrain;
1958 	struct ib_recv_wr rwr = {}, *bad_rwr;
1959 	int ret;
1960 
1961 	if (qp->recv_cq->poll_ctx == IB_POLL_DIRECT) {
1962 		WARN_ONCE(qp->recv_cq->poll_ctx == IB_POLL_DIRECT,
1963 			  "IB_POLL_DIRECT poll_ctx not supported for drain\n");
1964 		return;
1965 	}
1966 
1967 	rwr.wr_cqe = &rdrain.cqe;
1968 	rdrain.cqe.done = ib_drain_qp_done;
1969 	init_completion(&rdrain.done);
1970 
1971 	ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
1972 	if (ret) {
1973 		WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
1974 		return;
1975 	}
1976 
1977 	ret = ib_post_recv(qp, &rwr, &bad_rwr);
1978 	if (ret) {
1979 		WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
1980 		return;
1981 	}
1982 
1983 	wait_for_completion(&rdrain.done);
1984 }
1985 
1986 /**
1987  * ib_drain_sq() - Block until all SQ CQEs have been consumed by the
1988  *		   application.
1989  * @qp:            queue pair to drain
1990  *
1991  * If the device has a provider-specific drain function, then
1992  * call that.  Otherwise call the generic drain function
1993  * __ib_drain_sq().
1994  *
1995  * The caller must:
1996  *
1997  * ensure there is room in the CQ and SQ for the drain work request and
1998  * completion.
1999  *
2000  * allocate the CQ using ib_alloc_cq() and the CQ poll context cannot be
2001  * IB_POLL_DIRECT.
2002  *
2003  * ensure that there are no other contexts that are posting WRs concurrently.
2004  * Otherwise the drain is not guaranteed.
2005  */
2006 void ib_drain_sq(struct ib_qp *qp)
2007 {
2008 	if (qp->device->drain_sq)
2009 		qp->device->drain_sq(qp);
2010 	else
2011 		__ib_drain_sq(qp);
2012 }
2013 EXPORT_SYMBOL(ib_drain_sq);
2014 
2015 /**
2016  * ib_drain_rq() - Block until all RQ CQEs have been consumed by the
2017  *		   application.
2018  * @qp:            queue pair to drain
2019  *
2020  * If the device has a provider-specific drain function, then
2021  * call that.  Otherwise call the generic drain function
2022  * __ib_drain_rq().
2023  *
2024  * The caller must:
2025  *
2026  * ensure there is room in the CQ and RQ for the drain work request and
2027  * completion.
2028  *
2029  * allocate the CQ using ib_alloc_cq() and the CQ poll context cannot be
2030  * IB_POLL_DIRECT.
2031  *
2032  * ensure that there are no other contexts that are posting WRs concurrently.
2033  * Otherwise the drain is not guaranteed.
2034  */
2035 void ib_drain_rq(struct ib_qp *qp)
2036 {
2037 	if (qp->device->drain_rq)
2038 		qp->device->drain_rq(qp);
2039 	else
2040 		__ib_drain_rq(qp);
2041 }
2042 EXPORT_SYMBOL(ib_drain_rq);
2043 
2044 /**
2045  * ib_drain_qp() - Block until all CQEs have been consumed by the
2046  *		   application on both the RQ and SQ.
2047  * @qp:            queue pair to drain
2048  *
2049  * The caller must:
2050  *
2051  * ensure there is room in the CQ(s), SQ, and RQ for drain work requests
2052  * and completions.
2053  *
2054  * allocate the CQs using ib_alloc_cq() and the CQ poll context cannot be
2055  * IB_POLL_DIRECT.
2056  *
2057  * ensure that there are no other contexts that are posting WRs concurrently.
2058  * Otherwise the drain is not guaranteed.
2059  */
2060 void ib_drain_qp(struct ib_qp *qp)
2061 {
2062 	ib_drain_sq(qp);
2063 	if (!qp->srq)
2064 		ib_drain_rq(qp);
2065 }
2066 EXPORT_SYMBOL(ib_drain_qp);
2067