1 /*- 2 * Copyright (c) 2020 Justin Hibbits 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/conf.h> 32 #include <sys/kernel.h> 33 #include <sys/bus.h> 34 #include <sys/limits.h> 35 #include <sys/module.h> 36 #include <sys/malloc.h> 37 #include <sys/mutex.h> 38 #include <sys/rman.h> 39 #include <sys/sysctl.h> 40 41 #include <machine/bus.h> 42 43 #include <dev/ofw/ofw_bus.h> 44 #include <dev/ofw/ofw_bus_subr.h> 45 46 #include <sys/kdb.h> 47 48 #include "cpld.h" 49 50 /* 51 * A driver for the AmigaOne A1222 "Tabor" Main CPLD. 52 * 53 * The main CPLD is the interface between the CPU and the GPIO CPLD. 54 * Communication with the GPIO CPLD is over the main CPLD's mailbox interface, 55 * along with the dual-port RAM on the CPLD. 56 * 57 * Only one process can open the CPLD character device at a time. The driver 58 * enforces this to simplify the communication protocol. 59 */ 60 61 /* Resource access addresses. */ 62 #define CPLD_MEM_ADDR_H 0x00 63 #define CPLD_MEM_ADDR_L 0x01 64 #define CPLD_MEM_DATA 0x80 65 66 #define CPLD_MAX_DRAM_WORDS 0x800 67 68 /* CPLD Registers. */ 69 #define CPLD_REG_SIG1 0x00 70 #define CPLD_REG_SIG2 0x01 71 #define CPLD_REG_HWREV 0x02 72 #define CPLD_REG_CPLDREV 0x03 73 #define CPLD_REG_MBC2X 0x04 74 #define CPLD_REG_MBX2C 0x05 75 #define CPLD_REG_FAN1_TACHO_U 0x10 76 #define CPLD_REG_FAN1_TACHO_L 0x11 77 #define CPLD_REG_FAN2_TACHO_U 0x12 78 #define CPLD_REG_FAN2_TACHO_L 0x13 79 #define CPLD_REG_FAN3_TACHO_U 0x14 80 #define CPLD_REG_FAN3_TACHO_L 0x15 81 #define CPLD_REG_DATE_UU 0x20 82 #define CPLD_REG_DATE_UL 0x21 83 #define CPLD_REG_DATE_LU 0x22 84 #define CPLD_REG_DATE_LL 0x23 85 #define CPLD_REG_TIME_UU 0x24 86 #define CPLD_REG_TIME_UL 0x25 87 #define CPLD_REG_TIME_LU 0x26 88 #define CPLD_REG_TIME_LL 0x27 89 #define CPLD_REG_SCR1 0x5c 90 #define CPLD_REG_SCR2 0x6a 91 #define CPLD_REG_RAM 0x80 92 93 struct cpld_softc { 94 device_t sc_dev; 95 struct resource *sc_mem; 96 struct cdev *sc_cdev; 97 struct mtx sc_mutex; 98 bool sc_isopen; 99 }; 100 101 static d_open_t cpld_open; 102 static d_close_t cpld_close; 103 static d_ioctl_t cpld_ioctl; 104 105 static struct cdevsw cpld_cdevsw = { 106 .d_version = D_VERSION, 107 .d_open = cpld_open, 108 .d_close = cpld_close, 109 .d_ioctl = cpld_ioctl, 110 .d_name = "nvram", 111 }; 112 113 static device_probe_t cpld_probe; 114 static device_attach_t cpld_attach; 115 static int cpld_fan_sysctl(SYSCTL_HANDLER_ARGS); 116 117 static device_method_t cpld_methods[] = { 118 DEVMETHOD(device_probe, cpld_probe), 119 DEVMETHOD(device_attach, cpld_attach), 120 121 DEVMETHOD_END 122 }; 123 124 static driver_t cpld_driver = { 125 "cpld", 126 cpld_methods, 127 sizeof(struct cpld_softc) 128 }; 129 130 static devclass_t cpld_devclass; 131 DRIVER_MODULE(cpld, lbc, cpld_driver, cpld_devclass, 0, 0); 132 133 static void 134 cpld_write(struct cpld_softc *sc, int addr, int data) 135 { 136 if (addr >= CPLD_REG_RAM) { 137 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr); 138 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_L, addr); 139 } else 140 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr); 141 bus_write_1(sc->sc_mem, CPLD_MEM_DATA, data); 142 } 143 144 static int 145 cpld_read(struct cpld_softc *sc, int addr) 146 { 147 if (addr >= CPLD_REG_RAM) { 148 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr); 149 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_L, addr); 150 } else 151 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr); 152 153 return (bus_read_1(sc->sc_mem, CPLD_MEM_DATA)); 154 } 155 156 /* 157 * This is only to read a register that's split into two 8-bit registers. 158 * Dual-port RAM is not accepted for this purpose. 159 */ 160 static int 161 cpld_read_pair(struct cpld_softc *sc, int addr) 162 { 163 int tmp; 164 165 KASSERT(addr <= 0xff, ("Invalid register-pair base address %x.", addr)); 166 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr); 167 tmp = bus_read_1(sc->sc_mem, CPLD_MEM_DATA) << 8; 168 169 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr + 1); 170 tmp |= bus_read_1(sc->sc_mem, CPLD_MEM_DATA); 171 172 return (tmp); 173 } 174 175 static int 176 cpld_probe(device_t dev) 177 { 178 if (!ofw_bus_is_compatible(dev, "aeon,tabor-cpld")) 179 return (ENXIO); 180 181 device_set_desc(dev, "AmigaOne Tabor CPLD"); 182 183 return (BUS_PROBE_GENERIC); 184 } 185 186 static int 187 cpld_attach(device_t dev) 188 { 189 struct make_dev_args mda; 190 struct cpld_softc *sc; 191 int rid; 192 int date, time, tmp; 193 int err; 194 struct sysctl_ctx_list *ctx; 195 struct sysctl_oid *tree; 196 197 sc = device_get_softc(dev); 198 sc->sc_dev = dev; 199 200 rid = 0; 201 sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 202 RF_ACTIVE|RF_SHAREABLE); 203 if (sc->sc_mem == NULL) { 204 device_printf(dev, "Unable to allocate memory resource.\n"); 205 return (ENXIO); 206 } 207 mtx_init(&sc->sc_mutex, "cpld", NULL, MTX_DEF); 208 209 if (bootverbose) { 210 date = (cpld_read_pair(sc, CPLD_REG_DATE_UU) << 16) | 211 cpld_read_pair(sc, CPLD_REG_DATE_LU); 212 time = (cpld_read_pair(sc, CPLD_REG_TIME_UU) << 16) | 213 cpld_read_pair(sc, CPLD_REG_TIME_LU); 214 215 device_printf(dev, "Build date: %04x-%02x-%02x\n", 216 (date >> 16) & 0xffff, (date >> 8) & 0xff, date & 0xff); 217 #if 0 218 /* Build time is nonsense on tested system. */ 219 device_printf(dev, "Build time: %02x:%02x:%02x\n", 220 (time >> 16) & 0xff, (time >> 8) & 0xff, time & 0xff); 221 #endif 222 } 223 224 tmp = cpld_read(sc, CPLD_REG_HWREV); 225 device_printf(dev, "Hardware revision: %d\n", tmp); 226 227 ctx = device_get_sysctl_ctx(dev); 228 tree = device_get_sysctl_tree(dev); 229 230 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 231 "cpu_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 232 CPLD_REG_FAN1_TACHO_U, cpld_fan_sysctl, "I", 233 "CPU Fan speed in RPM"); 234 235 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 236 "case_1_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 237 CPLD_REG_FAN2_TACHO_U, cpld_fan_sysctl, "I", 238 "Case fan 1 speed in RPM"); 239 240 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 241 "case_2_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 242 CPLD_REG_FAN3_TACHO_U, cpld_fan_sysctl, "I", 243 "Case fan 2 speed in RPM"); 244 245 make_dev_args_init(&mda); 246 mda.mda_flags = MAKEDEV_CHECKNAME; 247 mda.mda_devsw = &cpld_cdevsw; 248 mda.mda_uid = UID_ROOT; 249 mda.mda_gid = GID_WHEEL; 250 mda.mda_mode = 0660; 251 err = make_dev_s(&mda, &sc->sc_cdev, "cpld"); 252 if (err != 0) { 253 device_printf(dev, "Error creating character device: %d\n", err); 254 device_printf(dev, "Only sysctl interfaces will be available.\n"); 255 } 256 257 return (0); 258 } 259 260 static int 261 cpld_fan_sysctl(SYSCTL_HANDLER_ARGS) 262 { 263 struct cpld_softc *sc; 264 int error, old, rpm; 265 int fan_reg; 266 267 sc = arg1; 268 fan_reg = arg2; 269 mtx_lock(&sc->sc_mutex); 270 /* Read until we get some level of read stability. */ 271 rpm = cpld_read(sc, fan_reg); 272 do { 273 old = rpm; 274 rpm = cpld_read_pair(sc, fan_reg); 275 } while (abs(rpm - old) > 10); 276 mtx_unlock(&sc->sc_mutex); 277 278 /* Convert RPS->RPM. */ 279 rpm *= 60; 280 error = sysctl_handle_int(oidp, &rpm, 0, req); 281 282 return (error); 283 } 284 285 static int 286 cpld_open(struct cdev *dev, int flags, int fmt, struct thread *td) 287 { 288 struct cpld_softc *sc = dev->si_drv1; 289 290 if (sc->sc_isopen) 291 return (EBUSY); 292 sc->sc_isopen = 1; 293 return (0); 294 } 295 296 static int 297 cpld_close(struct cdev *dev, int fflag, int devtype, struct thread *td) 298 { 299 struct cpld_softc *sc = dev->si_drv1; 300 301 sc->sc_isopen = 0; 302 return (0); 303 } 304 305 /* 306 * Send a command over the CPLD to the other side. 307 * 308 * This will first copy the data into the dual-port RAM, then signal the other 309 * side by writing to the mailbox. 310 */ 311 static int 312 cpld_send(device_t dev, struct cpld_cmd_data *d) 313 { 314 struct cpld_softc *sc; 315 uint16_t *word; 316 int i; 317 318 if (d->cmd > USHRT_MAX) 319 return (EINVAL); 320 321 sc = device_get_softc(dev); 322 323 mtx_lock(&sc->sc_mutex); 324 for (i = 0, word = d->words; i < d->len; i++, word++) { 325 if (i == 0) 326 cpld_write(sc, CPLD_REG_RAM + d->offset, *word); 327 else 328 bus_write_4(sc->sc_mem, CPLD_MEM_DATA, *word); 329 } 330 331 cpld_write(sc, CPLD_REG_MBC2X, d->cmd); 332 mtx_unlock(&sc->sc_mutex); 333 334 return (0); 335 } 336 337 static int 338 cpld_recv(device_t dev, struct cpld_cmd_data *d) 339 { 340 struct cpld_softc *sc; 341 uint16_t *word; 342 int i; 343 344 sc = device_get_softc(dev); 345 346 mtx_lock(&sc->sc_mutex); 347 d->cmd = cpld_read(sc, CPLD_REG_MBX2C); 348 349 for (i = 0, word = d->words; i < d->len; i++, word++) { 350 if (i == 0) 351 *word = cpld_read(sc, CPLD_REG_RAM + d->offset); 352 else 353 *word = bus_read_4(sc->sc_mem, CPLD_MEM_DATA); 354 } 355 mtx_unlock(&sc->sc_mutex); 356 357 return (0); 358 } 359 360 static int 361 cpld_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, 362 struct thread *td) 363 { 364 struct cpld_softc *sc; 365 struct cpld_cmd_data *d; 366 void *xfer_data, *tmp; 367 int err; 368 369 sc = dev->si_drv1; 370 371 err = 0; 372 d = (struct cpld_cmd_data *)data; 373 if (d->len + d->offset > CPLD_MAX_DRAM_WORDS) { 374 return (EINVAL); 375 } 376 xfer_data = malloc(d->len * sizeof(uint16_t), M_TEMP, M_WAITOK); 377 378 switch (cmd) { 379 case IOCCPLDSEND: 380 err = copyin(d->words, xfer_data, d->len * sizeof(uint16_t)); 381 d->words = xfer_data; 382 if (err == 0) 383 err = cpld_send(sc->sc_dev, d); 384 break; 385 case IOCCPLDRECV: 386 tmp = d->words; 387 d->words = xfer_data; 388 err = cpld_recv(sc->sc_dev, d); 389 d->words = tmp; 390 if (err == 0) 391 err = copyout(xfer_data, d->words, 392 d->len * sizeof(uint16_t)); 393 break; 394 default: 395 err = ENOTTY; 396 break; 397 } 398 free(xfer_data, M_TEMP); 399 400 return (err); 401 } 402