1 /* $NetBSD: fpu_div.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */ 2 3 /*- 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 * Copyright (c) 1992, 1993 7 * The Regents of the University of California. All rights reserved. 8 * 9 * This software was developed by the Computer Systems Engineering group 10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 11 * contributed to Berkeley. 12 * 13 * All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Lawrence Berkeley Laboratory. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions 20 * are met: 21 * 1. Redistributions of source code must retain the above copyright 22 * notice, this list of conditions and the following disclaimer. 23 * 2. Redistributions in binary form must reproduce the above copyright 24 * notice, this list of conditions and the following disclaimer in the 25 * documentation and/or other materials provided with the distribution. 26 * 3. Neither the name of the University nor the names of its contributors 27 * may be used to endorse or promote products derived from this software 28 * without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 40 * SUCH DAMAGE. 41 * 42 * @(#)fpu_div.c 8.1 (Berkeley) 6/11/93 43 */ 44 45 /* 46 * Perform an FPU divide (return x / y). 47 */ 48 49 #include <sys/cdefs.h> 50 #include <sys/types.h> 51 #include <sys/systm.h> 52 53 #include <machine/fpu.h> 54 55 #include <powerpc/fpu/fpu_arith.h> 56 #include <powerpc/fpu/fpu_emu.h> 57 58 /* 59 * Division of normal numbers is done as follows: 60 * 61 * x and y are floating point numbers, i.e., in the form 1.bbbb * 2^e. 62 * If X and Y are the mantissas (1.bbbb's), the quotient is then: 63 * 64 * q = (X / Y) * 2^((x exponent) - (y exponent)) 65 * 66 * Since X and Y are both in [1.0,2.0), the quotient's mantissa (X / Y) 67 * will be in [0.5,2.0). Moreover, it will be less than 1.0 if and only 68 * if X < Y. In that case, it will have to be shifted left one bit to 69 * become a normal number, and the exponent decremented. Thus, the 70 * desired exponent is: 71 * 72 * left_shift = x->fp_mant < y->fp_mant; 73 * result_exp = x->fp_exp - y->fp_exp - left_shift; 74 * 75 * The quotient mantissa X/Y can then be computed one bit at a time 76 * using the following algorithm: 77 * 78 * Q = 0; -- Initial quotient. 79 * R = X; -- Initial remainder, 80 * if (left_shift) -- but fixed up in advance. 81 * R *= 2; 82 * for (bit = FP_NMANT; --bit >= 0; R *= 2) { 83 * if (R >= Y) { 84 * Q |= 1 << bit; 85 * R -= Y; 86 * } 87 * } 88 * 89 * The subtraction R -= Y always removes the uppermost bit from R (and 90 * can sometimes remove additional lower-order 1 bits); this proof is 91 * left to the reader. 92 * 93 * This loop correctly calculates the guard and round bits since they are 94 * included in the expanded internal representation. The sticky bit 95 * is to be set if and only if any other bits beyond guard and round 96 * would be set. From the above it is obvious that this is true if and 97 * only if the remainder R is nonzero when the loop terminates. 98 * 99 * Examining the loop above, we can see that the quotient Q is built 100 * one bit at a time ``from the top down''. This means that we can 101 * dispense with the multi-word arithmetic and just build it one word 102 * at a time, writing each result word when it is done. 103 * 104 * Furthermore, since X and Y are both in [1.0,2.0), we know that, 105 * initially, R >= Y. (Recall that, if X < Y, R is set to X * 2 and 106 * is therefore at in [2.0,4.0).) Thus Q is sure to have bit FP_NMANT-1 107 * set, and R can be set initially to either X - Y (when X >= Y) or 108 * 2X - Y (when X < Y). In addition, comparing R and Y is difficult, 109 * so we will simply calculate R - Y and see if that underflows. 110 * This leads to the following revised version of the algorithm: 111 * 112 * R = X; 113 * bit = FP_1; 114 * D = R - Y; 115 * if (D >= 0) { 116 * result_exp = x->fp_exp - y->fp_exp; 117 * R = D; 118 * q = bit; 119 * bit >>= 1; 120 * } else { 121 * result_exp = x->fp_exp - y->fp_exp - 1; 122 * q = 0; 123 * } 124 * R <<= 1; 125 * do { 126 * D = R - Y; 127 * if (D >= 0) { 128 * q |= bit; 129 * R = D; 130 * } 131 * R <<= 1; 132 * } while ((bit >>= 1) != 0); 133 * Q[0] = q; 134 * for (i = 1; i < 4; i++) { 135 * q = 0, bit = 1 << 31; 136 * do { 137 * D = R - Y; 138 * if (D >= 0) { 139 * q |= bit; 140 * R = D; 141 * } 142 * R <<= 1; 143 * } while ((bit >>= 1) != 0); 144 * Q[i] = q; 145 * } 146 * 147 * This can be refined just a bit further by moving the `R <<= 1' 148 * calculations to the front of the do-loops and eliding the first one. 149 * The process can be terminated immediately whenever R becomes 0, but 150 * this is relatively rare, and we do not bother. 151 */ 152 153 struct fpn * 154 fpu_div(struct fpemu *fe) 155 { 156 struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2; 157 u_int q, bit; 158 u_int r0, r1, r2, r3, d0, d1, d2, d3, y0, y1, y2, y3; 159 FPU_DECL_CARRY 160 161 /* 162 * Since divide is not commutative, we cannot just use ORDER. 163 * Check either operand for NaN first; if there is at least one, 164 * order the signalling one (if only one) onto the right, then 165 * return it. Otherwise we have the following cases: 166 * 167 * Inf / Inf = NaN, plus NV exception 168 * Inf / num = Inf [i.e., return x] 169 * Inf / 0 = Inf [i.e., return x] 170 * 0 / Inf = 0 [i.e., return x] 171 * 0 / num = 0 [i.e., return x] 172 * 0 / 0 = NaN, plus NV exception 173 * num / Inf = 0 174 * num / num = num (do the divide) 175 * num / 0 = Inf, plus DZ exception 176 */ 177 DPRINTF(FPE_REG, ("fpu_div:\n")); 178 DUMPFPN(FPE_REG, x); 179 DUMPFPN(FPE_REG, y); 180 DPRINTF(FPE_REG, ("=>\n")); 181 if (ISNAN(x) || ISNAN(y)) { 182 ORDER(x, y); 183 fe->fe_cx |= FPSCR_VXSNAN; 184 DUMPFPN(FPE_REG, y); 185 return (y); 186 } 187 /* 188 * Need to split the following out cause they generate different 189 * exceptions. 190 */ 191 if (ISINF(x)) { 192 if (x->fp_class == y->fp_class) { 193 fe->fe_cx |= FPSCR_VXIDI; 194 return (fpu_newnan(fe)); 195 } 196 DUMPFPN(FPE_REG, x); 197 return (x); 198 } 199 if (ISZERO(x)) { 200 fe->fe_cx |= FPSCR_ZX; 201 if (x->fp_class == y->fp_class) { 202 fe->fe_cx |= FPSCR_VXZDZ; 203 return (fpu_newnan(fe)); 204 } 205 DUMPFPN(FPE_REG, x); 206 return (x); 207 } 208 209 /* all results at this point use XOR of operand signs */ 210 x->fp_sign ^= y->fp_sign; 211 if (ISINF(y)) { 212 x->fp_class = FPC_ZERO; 213 DUMPFPN(FPE_REG, x); 214 return (x); 215 } 216 if (ISZERO(y)) { 217 fe->fe_cx = FPSCR_ZX; 218 x->fp_class = FPC_INF; 219 DUMPFPN(FPE_REG, x); 220 return (x); 221 } 222 223 /* 224 * Macros for the divide. See comments at top for algorithm. 225 * Note that we expand R, D, and Y here. 226 */ 227 228 #define SUBTRACT /* D = R - Y */ \ 229 FPU_SUBS(d3, r3, y3); FPU_SUBCS(d2, r2, y2); \ 230 FPU_SUBCS(d1, r1, y1); FPU_SUBC(d0, r0, y0) 231 232 #define NONNEGATIVE /* D >= 0 */ \ 233 ((int)d0 >= 0) 234 235 #ifdef FPU_SHL1_BY_ADD 236 #define SHL1 /* R <<= 1 */ \ 237 FPU_ADDS(r3, r3, r3); FPU_ADDCS(r2, r2, r2); \ 238 FPU_ADDCS(r1, r1, r1); FPU_ADDC(r0, r0, r0) 239 #else 240 #define SHL1 \ 241 r0 = (r0 << 1) | (r1 >> 31), r1 = (r1 << 1) | (r2 >> 31), \ 242 r2 = (r2 << 1) | (r3 >> 31), r3 <<= 1 243 #endif 244 245 #define LOOP /* do ... while (bit >>= 1) */ \ 246 do { \ 247 SHL1; \ 248 SUBTRACT; \ 249 if (NONNEGATIVE) { \ 250 q |= bit; \ 251 r0 = d0, r1 = d1, r2 = d2, r3 = d3; \ 252 } \ 253 } while ((bit >>= 1) != 0) 254 255 #define WORD(r, i) /* calculate r->fp_mant[i] */ \ 256 q = 0; \ 257 bit = 1 << 31; \ 258 LOOP; \ 259 (x)->fp_mant[i] = q 260 261 /* Setup. Note that we put our result in x. */ 262 r0 = x->fp_mant[0]; 263 r1 = x->fp_mant[1]; 264 r2 = x->fp_mant[2]; 265 r3 = x->fp_mant[3]; 266 y0 = y->fp_mant[0]; 267 y1 = y->fp_mant[1]; 268 y2 = y->fp_mant[2]; 269 y3 = y->fp_mant[3]; 270 271 bit = FP_1; 272 SUBTRACT; 273 if (NONNEGATIVE) { 274 x->fp_exp -= y->fp_exp; 275 r0 = d0, r1 = d1, r2 = d2, r3 = d3; 276 q = bit; 277 bit >>= 1; 278 } else { 279 x->fp_exp -= y->fp_exp + 1; 280 q = 0; 281 } 282 LOOP; 283 x->fp_mant[0] = q; 284 WORD(x, 1); 285 WORD(x, 2); 286 WORD(x, 3); 287 x->fp_sticky = r0 | r1 | r2 | r3; 288 289 DUMPFPN(FPE_REG, x); 290 return (x); 291 } 292