xref: /freebsd/sys/powerpc/include/pcpu.h (revision 95ee2897)
10384fff8SJason Evans /*-
24d846d26SWarner Losh  * SPDX-License-Identifier: BSD-2-Clause
371e3c308SPedro F. Giffuni  *
40384fff8SJason Evans  * Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org>
5589278dbSDavid E. O'Brien  * Copyright (c) Peter Wemm <peter@netplex.com.au>
60384fff8SJason Evans  * All rights reserved.
70384fff8SJason Evans  *
80384fff8SJason Evans  * Redistribution and use in source and binary forms, with or without
90384fff8SJason Evans  * modification, are permitted provided that the following conditions
100384fff8SJason Evans  * are met:
110384fff8SJason Evans  * 1. Redistributions of source code must retain the above copyright
120384fff8SJason Evans  *    notice, this list of conditions and the following disclaimer.
130384fff8SJason Evans  * 2. Redistributions in binary form must reproduce the above copyright
140384fff8SJason Evans  *    notice, this list of conditions and the following disclaimer in the
150384fff8SJason Evans  *    documentation and/or other materials provided with the distribution.
160384fff8SJason Evans  *
170384fff8SJason Evans  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
180384fff8SJason Evans  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
190384fff8SJason Evans  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
200384fff8SJason Evans  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
210384fff8SJason Evans  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
220384fff8SJason Evans  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
230384fff8SJason Evans  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
240384fff8SJason Evans  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
250384fff8SJason Evans  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
260384fff8SJason Evans  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
270384fff8SJason Evans  * SUCH DAMAGE.
280384fff8SJason Evans  */
290384fff8SJason Evans 
300bbc8826SJohn Baldwin #ifndef	_MACHINE_PCPU_H_
310bbc8826SJohn Baldwin #define	_MACHINE_PCPU_H_
320384fff8SJason Evans 
330bbc8826SJohn Baldwin #include <machine/cpufunc.h>
34c3e289e1SNathan Whitehorn #include <machine/slb.h>
3528bb01e5SRafal Jaworowski #include <machine/tlb.h>
360384fff8SJason Evans 
37b57e802aSBenno Rice struct pmap;
38713841afSJason A. Harmening struct pvo_entry;
39c3e289e1SNathan Whitehorn #define	CPUSAVE_LEN	9
40b57e802aSBenno Rice 
41786e4a1bSRafal Jaworowski #define	PCPU_MD_COMMON_FIELDS						\
420bbc8826SJohn Baldwin 	int		pc_inside_intr;					\
43eeaa8979SBenno Rice 	struct pmap	*pc_curpmap;		/* current pmap */	\
4410df017fSPeter Grehan 	struct thread	*pc_fputhread;		/* current fpu user */  \
451ac37bcbSNathan Whitehorn 	struct thread	*pc_vecthread;		/* current vec user */  \
4603e83a83SBreno Leitao 	struct thread	*pc_htmthread;		/* current htm user */  \
4712640815SMarcel Moolenaar 	uintptr_t	pc_hwref;					\
48999987e5SNathan Whitehorn 	int		pc_bsp;						\
49999987e5SNathan Whitehorn 	volatile int	pc_awake;					\
5012640815SMarcel Moolenaar 	uint32_t	pc_ipimask;					\
513f24b505SJustin Hibbits 	uint32_t	pc_flags;		/* cpu feature flags */ \
5210df017fSPeter Grehan 	register_t	pc_tempsave[CPUSAVE_LEN];			\
5310df017fSPeter Grehan 	register_t	pc_disisave[CPUSAVE_LEN];			\
544702d987SJustin Hibbits 	register_t	pc_dbsave[CPUSAVE_LEN];				\
55bce6d88bSJustin Hibbits 	void		*pc_restore;					\
56bce6d88bSJustin Hibbits 	vm_offset_t	pc_qmap_addr;
5710df017fSPeter Grehan 
5817dece86SGleb Smirnoff #define PCPU_MD_AIM32_FIELDS						\
59bce6d88bSJustin Hibbits 	struct pvo_entry *qmap_pvo;					\
60bce6d88bSJustin Hibbits 	struct mtx	qmap_lock;					\
61bce6d88bSJustin Hibbits 	char		__pad[128];
62c3e289e1SNathan Whitehorn 
63c3e289e1SNathan Whitehorn #define PCPU_MD_AIM64_FIELDS						\
64bce6d88bSJustin Hibbits 	struct slb	slb[64];					\
65bce6d88bSJustin Hibbits 	struct slb	**userslb;					\
66bce6d88bSJustin Hibbits 	register_t	slbsave[18];					\
67bce6d88bSJustin Hibbits 	uint8_t		slbstack[1024];				\
68bce6d88bSJustin Hibbits 	struct pvo_entry *qmap_pvo;					\
69bce6d88bSJustin Hibbits 	struct mtx	qmap_lock;					\
709367fb30SBrandon Bergren 	uint64_t	opal_hmi_flags;					\
719367fb30SBrandon Bergren 	char		__pad[1337];
72c3e289e1SNathan Whitehorn 
73c3e289e1SNathan Whitehorn #ifdef __powerpc64__
74c3e289e1SNathan Whitehorn #define PCPU_MD_AIM_FIELDS	PCPU_MD_AIM64_FIELDS
75c3e289e1SNathan Whitehorn #else
76c3e289e1SNathan Whitehorn #define PCPU_MD_AIM_FIELDS	PCPU_MD_AIM32_FIELDS
77c3e289e1SNathan Whitehorn #endif
78786e4a1bSRafal Jaworowski 
793f24b505SJustin Hibbits /* CPU feature flags, can be used for cached flow control. */
803f24b505SJustin Hibbits #define	PC_FLAG_NOSRS		0x80000000
813f24b505SJustin Hibbits 
82786e4a1bSRafal Jaworowski #define	BOOKE_CRITSAVE_LEN	(CPUSAVE_LEN + 2)
83d3895bffSJustin Hibbits #define	BOOKE_TLB_MAXNEST	4
84786e4a1bSRafal Jaworowski #define	BOOKE_TLB_SAVELEN	16
85786e4a1bSRafal Jaworowski #define	BOOKE_TLBSAVE_LEN	(BOOKE_TLB_SAVELEN * BOOKE_TLB_MAXNEST)
86786e4a1bSRafal Jaworowski 
87e683c328SJustin Hibbits #ifdef __powerpc64__
8883c9dea1SGleb Smirnoff #define	BOOKE_PCPU_PAD	901
89e683c328SJustin Hibbits #else
90d3895bffSJustin Hibbits #define	BOOKE_PCPU_PAD	365
91e683c328SJustin Hibbits #endif
92786e4a1bSRafal Jaworowski #define PCPU_MD_BOOKE_FIELDS						\
93bce6d88bSJustin Hibbits 	register_t	critsave[BOOKE_CRITSAVE_LEN];		\
94bce6d88bSJustin Hibbits 	register_t	mchksave[CPUSAVE_LEN];			\
95bce6d88bSJustin Hibbits 	register_t	tlbsave[BOOKE_TLBSAVE_LEN];		\
96bce6d88bSJustin Hibbits 	register_t	tlb_level;				\
97bce6d88bSJustin Hibbits 	uintptr_t	*tlb_lock;				\
98bce6d88bSJustin Hibbits 	int		tid_next;					\
99bce6d88bSJustin Hibbits 	char		__pad[BOOKE_PCPU_PAD];
100786e4a1bSRafal Jaworowski 
10110df017fSPeter Grehan /* Definitions for register offsets within the exception tmp save areas */
102c3e289e1SNathan Whitehorn #define	CPUSAVE_R27	0		/* where r27 gets saved */
103c3e289e1SNathan Whitehorn #define	CPUSAVE_R28	1		/* where r28 gets saved */
104c3e289e1SNathan Whitehorn #define	CPUSAVE_R29	2		/* where r29 gets saved */
105c3e289e1SNathan Whitehorn #define	CPUSAVE_R30	3		/* where r30 gets saved */
106c3e289e1SNathan Whitehorn #define	CPUSAVE_R31	4		/* where r31 gets saved */
107c3e289e1SNathan Whitehorn #define	CPUSAVE_AIM_DAR		5	/* where SPR_DAR gets saved */
108c3e289e1SNathan Whitehorn #define	CPUSAVE_AIM_DSISR	6	/* where SPR_DSISR gets saved */
109c3e289e1SNathan Whitehorn #define	CPUSAVE_BOOKE_DEAR	5	/* where SPR_DEAR gets saved */
110c3e289e1SNathan Whitehorn #define	CPUSAVE_BOOKE_ESR	6	/* where SPR_ESR gets saved */
111c3e289e1SNathan Whitehorn #define	CPUSAVE_SRR0	7		/* where SRR0 gets saved */
112c3e289e1SNathan Whitehorn #define	CPUSAVE_SRR1	8		/* where SRR1 gets saved */
113e683c328SJustin Hibbits #define	BOOKE_CRITSAVE_SRR0	9	/* where real SRR0 gets saved (critical) */
114e683c328SJustin Hibbits #define	BOOKE_CRITSAVE_SRR1	10	/* where real SRR0 gets saved (critical) */
1150384fff8SJason Evans 
116786e4a1bSRafal Jaworowski /* Book-E TLBSAVE is more elaborate */
117786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_LR	0
118786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_CR	1
119786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_SRR0	2
120786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_SRR1	3
121786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_R20	4
122786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_R21	5
123786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_R22	6
124786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_R23	7
125786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_R24	8
126786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_R25	9
127786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_R26	10
128786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_R27	11
129786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_R28	12
130786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_R29	13
131786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_R30	14
132786e4a1bSRafal Jaworowski #define TLBSAVE_BOOKE_R31	15
133786e4a1bSRafal Jaworowski 
134786e4a1bSRafal Jaworowski #define	PCPU_MD_FIELDS		\
135786e4a1bSRafal Jaworowski 	PCPU_MD_COMMON_FIELDS	\
136bce6d88bSJustin Hibbits 	union {			\
137bce6d88bSJustin Hibbits 	    struct {		\
138bce6d88bSJustin Hibbits 		PCPU_MD_AIM_FIELDS	\
139bce6d88bSJustin Hibbits 	    } pc_aim;		\
140bce6d88bSJustin Hibbits 	    struct {		\
141bce6d88bSJustin Hibbits 		PCPU_MD_BOOKE_FIELDS	\
142bce6d88bSJustin Hibbits 	    } pc_booke;		\
143bce6d88bSJustin Hibbits 	}
144786e4a1bSRafal Jaworowski 
14570d12a18SJohn Baldwin #ifdef _KERNEL
14670d12a18SJohn Baldwin 
147e2a8d178SJason A. Harmening #define pcpup	(get_pcpu())
148a8972989SNathan Whitehorn 
149a8972989SNathan Whitehorn static __inline __pure2 struct thread *
__curthread(void)150a8972989SNathan Whitehorn __curthread(void)
151a8972989SNathan Whitehorn {
152a8972989SNathan Whitehorn 	struct thread *td;
153a8972989SNathan Whitehorn #ifdef __powerpc64__
154a8972989SNathan Whitehorn 	__asm __volatile("mr %0,13" : "=r"(td));
155a8972989SNathan Whitehorn #else
156a8972989SNathan Whitehorn 	__asm __volatile("mr %0,2" : "=r"(td));
157a8972989SNathan Whitehorn #endif
158a8972989SNathan Whitehorn 	return (td);
159a8972989SNathan Whitehorn }
160a8972989SNathan Whitehorn #define curthread (__curthread())
1610384fff8SJason Evans 
16212640815SMarcel Moolenaar #define	PCPU_GET(member)	(pcpup->pc_ ## member)
163c640357fSAlan Cox 
164c640357fSAlan Cox /*
165c640357fSAlan Cox  * XXX The implementation of this operation should be made atomic
166c640357fSAlan Cox  * with respect to preemption.
167c640357fSAlan Cox  */
16812640815SMarcel Moolenaar #define	PCPU_ADD(member, value)	(pcpup->pc_ ## member += (value))
16912640815SMarcel Moolenaar #define	PCPU_PTR(member)	(&pcpup->pc_ ## member)
17012640815SMarcel Moolenaar #define	PCPU_SET(member,value)	(pcpup->pc_ ## member = (value))
1710384fff8SJason Evans 
1720384fff8SJason Evans #endif	/* _KERNEL */
1730384fff8SJason Evans 
1740bbc8826SJohn Baldwin #endif	/* !_MACHINE_PCPU_H_ */
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