1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause AND BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 5 * Copyright (C) 1995, 1996 TooLs GmbH. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by TooLs GmbH. 19 * 4. The name of TooLs GmbH may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 /*- 34 * Copyright (C) 2001 Benno Rice 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 47 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 48 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 49 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 50 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 51 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 52 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 53 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 54 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 55 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 56 * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $ 57 */ 58 59 #include <sys/cdefs.h> 60 __FBSDID("$FreeBSD$"); 61 62 #include "opt_fpu_emu.h" 63 64 #include <sys/param.h> 65 #include <sys/proc.h> 66 #include <sys/systm.h> 67 #include <sys/bio.h> 68 #include <sys/buf.h> 69 #include <sys/bus.h> 70 #include <sys/cons.h> 71 #include <sys/cpu.h> 72 #include <sys/exec.h> 73 #include <sys/imgact.h> 74 #include <sys/kernel.h> 75 #include <sys/ktr.h> 76 #include <sys/lock.h> 77 #include <sys/malloc.h> 78 #include <sys/mutex.h> 79 #include <sys/signalvar.h> 80 #include <sys/syscallsubr.h> 81 #include <sys/syscall.h> 82 #include <sys/sysent.h> 83 #include <sys/sysproto.h> 84 #include <sys/ucontext.h> 85 #include <sys/uio.h> 86 87 #include <machine/altivec.h> 88 #include <machine/cpu.h> 89 #include <machine/elf.h> 90 #include <machine/fpu.h> 91 #include <machine/pcb.h> 92 #include <machine/reg.h> 93 #include <machine/sigframe.h> 94 #include <machine/trap.h> 95 #include <machine/vmparam.h> 96 97 #include <vm/pmap.h> 98 99 #ifdef FPU_EMU 100 #include <powerpc/fpu/fpu_extern.h> 101 #endif 102 103 #ifdef COMPAT_FREEBSD32 104 #include <compat/freebsd32/freebsd32_signal.h> 105 #include <compat/freebsd32/freebsd32_util.h> 106 #include <compat/freebsd32/freebsd32_proto.h> 107 108 typedef struct __ucontext32 { 109 sigset_t uc_sigmask; 110 mcontext32_t uc_mcontext; 111 uint32_t uc_link; 112 struct sigaltstack32 uc_stack; 113 uint32_t uc_flags; 114 uint32_t __spare__[4]; 115 } ucontext32_t; 116 117 struct sigframe32 { 118 ucontext32_t sf_uc; 119 struct siginfo32 sf_si; 120 }; 121 122 static int grab_mcontext32(struct thread *td, mcontext32_t *, int flags); 123 #endif 124 125 static int grab_mcontext(struct thread *, mcontext_t *, int); 126 127 static void cleanup_power_extras(struct thread *); 128 129 #ifdef __powerpc64__ 130 extern struct sysentvec elf64_freebsd_sysvec_v2; 131 #endif 132 133 void 134 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 135 { 136 struct trapframe *tf; 137 struct sigacts *psp; 138 struct sigframe sf; 139 struct thread *td; 140 struct proc *p; 141 #ifdef COMPAT_FREEBSD32 142 struct siginfo32 siginfo32; 143 struct sigframe32 sf32; 144 #endif 145 size_t sfpsize; 146 caddr_t sfp, usfp; 147 register_t sp; 148 int oonstack, rndfsize; 149 int sig; 150 int code; 151 152 td = curthread; 153 p = td->td_proc; 154 PROC_LOCK_ASSERT(p, MA_OWNED); 155 156 psp = p->p_sigacts; 157 mtx_assert(&psp->ps_mtx, MA_OWNED); 158 tf = td->td_frame; 159 160 /* 161 * Fill siginfo structure. 162 */ 163 ksi->ksi_info.si_signo = ksi->ksi_signo; 164 ksi->ksi_info.si_addr = 165 (void *)((tf->exc == EXC_DSI || tf->exc == EXC_DSE) ? 166 tf->dar : tf->srr0); 167 168 #ifdef COMPAT_FREEBSD32 169 if (SV_PROC_FLAG(p, SV_ILP32)) { 170 siginfo_to_siginfo32(&ksi->ksi_info, &siginfo32); 171 sig = siginfo32.si_signo; 172 code = siginfo32.si_code; 173 sfp = (caddr_t)&sf32; 174 sfpsize = sizeof(sf32); 175 rndfsize = roundup(sizeof(sf32), 16); 176 sp = (uint32_t)tf->fixreg[1]; 177 oonstack = sigonstack(sp); 178 179 /* 180 * Save user context 181 */ 182 183 memset(&sf32, 0, sizeof(sf32)); 184 grab_mcontext32(td, &sf32.sf_uc.uc_mcontext, 0); 185 186 sf32.sf_uc.uc_sigmask = *mask; 187 sf32.sf_uc.uc_stack.ss_sp = (uintptr_t)td->td_sigstk.ss_sp; 188 sf32.sf_uc.uc_stack.ss_size = (uint32_t)td->td_sigstk.ss_size; 189 sf32.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 190 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 191 192 sf32.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 193 } else { 194 #endif 195 sig = ksi->ksi_signo; 196 code = ksi->ksi_code; 197 sfp = (caddr_t)&sf; 198 sfpsize = sizeof(sf); 199 #ifdef __powerpc64__ 200 /* 201 * 64-bit PPC defines a 288 byte scratch region 202 * below the stack. 203 */ 204 rndfsize = 288 + roundup(sizeof(sf), 48); 205 #else 206 rndfsize = roundup(sizeof(sf), 16); 207 #endif 208 sp = tf->fixreg[1]; 209 oonstack = sigonstack(sp); 210 211 /* 212 * Save user context 213 */ 214 215 memset(&sf, 0, sizeof(sf)); 216 grab_mcontext(td, &sf.sf_uc.uc_mcontext, 0); 217 218 sf.sf_uc.uc_sigmask = *mask; 219 sf.sf_uc.uc_stack = td->td_sigstk; 220 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 221 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 222 223 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 224 #ifdef COMPAT_FREEBSD32 225 } 226 #endif 227 228 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 229 catcher, sig); 230 231 /* 232 * Allocate and validate space for the signal handler context. 233 */ 234 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 235 SIGISMEMBER(psp->ps_sigonstack, sig)) { 236 usfp = (void *)(((uintptr_t)td->td_sigstk.ss_sp + 237 td->td_sigstk.ss_size - rndfsize) & ~0xFul); 238 } else { 239 usfp = (void *)((sp - rndfsize) & ~0xFul); 240 } 241 242 /* 243 * Save the floating-point state, if necessary, then copy it. 244 */ 245 /* XXX */ 246 247 /* 248 * Set up the registers to return to sigcode. 249 * 250 * r1/sp - sigframe ptr 251 * lr - sig function, dispatched to by blrl in trampoline 252 * r3 - sig number 253 * r4 - SIGINFO ? &siginfo : exception code 254 * r5 - user context 255 * srr0 - trampoline function addr 256 */ 257 tf->lr = (register_t)catcher; 258 tf->fixreg[1] = (register_t)usfp; 259 tf->fixreg[FIRSTARG] = sig; 260 #ifdef COMPAT_FREEBSD32 261 tf->fixreg[FIRSTARG+2] = (register_t)usfp + 262 ((SV_PROC_FLAG(p, SV_ILP32)) ? 263 offsetof(struct sigframe32, sf_uc) : 264 offsetof(struct sigframe, sf_uc)); 265 #else 266 tf->fixreg[FIRSTARG+2] = (register_t)usfp + 267 offsetof(struct sigframe, sf_uc); 268 #endif 269 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 270 /* 271 * Signal handler installed with SA_SIGINFO. 272 */ 273 #ifdef COMPAT_FREEBSD32 274 if (SV_PROC_FLAG(p, SV_ILP32)) { 275 sf32.sf_si = siginfo32; 276 tf->fixreg[FIRSTARG+1] = (register_t)usfp + 277 offsetof(struct sigframe32, sf_si); 278 sf32.sf_si = siginfo32; 279 } else { 280 #endif 281 tf->fixreg[FIRSTARG+1] = (register_t)usfp + 282 offsetof(struct sigframe, sf_si); 283 sf.sf_si = ksi->ksi_info; 284 #ifdef COMPAT_FREEBSD32 285 } 286 #endif 287 } else { 288 /* Old FreeBSD-style arguments. */ 289 tf->fixreg[FIRSTARG+1] = code; 290 tf->fixreg[FIRSTARG+3] = (tf->exc == EXC_DSI) ? 291 tf->dar : tf->srr0; 292 } 293 mtx_unlock(&psp->ps_mtx); 294 PROC_UNLOCK(p); 295 296 tf->srr0 = (register_t)p->p_sysent->sv_sigcode_base; 297 298 /* 299 * copy the frame out to userland. 300 */ 301 if (copyout(sfp, usfp, sfpsize) != 0) { 302 /* 303 * Process has trashed its stack. Kill it. 304 */ 305 CTR2(KTR_SIG, "sendsig: sigexit td=%p sfp=%p", td, sfp); 306 PROC_LOCK(p); 307 sigexit(td, SIGILL); 308 } 309 310 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, 311 tf->srr0, tf->fixreg[1]); 312 313 PROC_LOCK(p); 314 mtx_lock(&psp->ps_mtx); 315 } 316 317 int 318 sys_sigreturn(struct thread *td, struct sigreturn_args *uap) 319 { 320 ucontext_t uc; 321 int error; 322 323 CTR2(KTR_SIG, "sigreturn: td=%p ucp=%p", td, uap->sigcntxp); 324 325 if (copyin(uap->sigcntxp, &uc, sizeof(uc)) != 0) { 326 CTR1(KTR_SIG, "sigreturn: efault td=%p", td); 327 return (EFAULT); 328 } 329 330 error = set_mcontext(td, &uc.uc_mcontext); 331 if (error != 0) 332 return (error); 333 334 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 335 336 CTR3(KTR_SIG, "sigreturn: return td=%p pc=%#x sp=%#x", 337 td, uc.uc_mcontext.mc_srr0, uc.uc_mcontext.mc_gpr[1]); 338 339 return (EJUSTRETURN); 340 } 341 342 #ifdef COMPAT_FREEBSD4 343 int 344 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 345 { 346 347 return sys_sigreturn(td, (struct sigreturn_args *)uap); 348 } 349 #endif 350 351 /* 352 * Construct a PCB from a trapframe. This is called from kdb_trap() where 353 * we want to start a backtrace from the function that caused us to enter 354 * the debugger. We have the context in the trapframe, but base the trace 355 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 356 * enough for a backtrace. 357 */ 358 void 359 makectx(struct trapframe *tf, struct pcb *pcb) 360 { 361 362 pcb->pcb_lr = tf->srr0; 363 pcb->pcb_sp = tf->fixreg[1]; 364 } 365 366 /* 367 * get_mcontext/sendsig helper routine that doesn't touch the 368 * proc lock 369 */ 370 static int 371 grab_mcontext(struct thread *td, mcontext_t *mcp, int flags) 372 { 373 struct pcb *pcb; 374 int i; 375 376 pcb = td->td_pcb; 377 378 memset(mcp, 0, sizeof(mcontext_t)); 379 380 mcp->mc_vers = _MC_VERSION; 381 mcp->mc_flags = 0; 382 memcpy(&mcp->mc_frame, td->td_frame, sizeof(struct trapframe)); 383 if (flags & GET_MC_CLEAR_RET) { 384 mcp->mc_gpr[3] = 0; 385 mcp->mc_gpr[4] = 0; 386 } 387 388 /* 389 * This assumes that floating-point context is *not* lazy, 390 * so if the thread has used FP there would have been a 391 * FP-unavailable exception that would have set things up 392 * correctly. 393 */ 394 if (pcb->pcb_flags & PCB_FPREGS) { 395 if (pcb->pcb_flags & PCB_FPU) { 396 KASSERT(td == curthread, 397 ("get_mcontext: fp save not curthread")); 398 critical_enter(); 399 save_fpu(td); 400 critical_exit(); 401 } 402 mcp->mc_flags |= _MC_FP_VALID; 403 memcpy(&mcp->mc_fpscr, &pcb->pcb_fpu.fpscr, sizeof(double)); 404 for (i = 0; i < 32; i++) 405 memcpy(&mcp->mc_fpreg[i], &pcb->pcb_fpu.fpr[i].fpr, 406 sizeof(double)); 407 } 408 409 if (pcb->pcb_flags & PCB_VSX) { 410 for (i = 0; i < 32; i++) 411 memcpy(&mcp->mc_vsxfpreg[i], 412 &pcb->pcb_fpu.fpr[i].vsr[2], sizeof(double)); 413 } 414 415 /* 416 * Repeat for Altivec context 417 */ 418 419 if (pcb->pcb_flags & PCB_VEC) { 420 KASSERT(td == curthread, 421 ("get_mcontext: fp save not curthread")); 422 critical_enter(); 423 save_vec(td); 424 critical_exit(); 425 mcp->mc_flags |= _MC_AV_VALID; 426 mcp->mc_vscr = pcb->pcb_vec.vscr; 427 mcp->mc_vrsave = pcb->pcb_vec.vrsave; 428 memcpy(mcp->mc_avec, pcb->pcb_vec.vr, sizeof(mcp->mc_avec)); 429 } 430 431 mcp->mc_len = sizeof(*mcp); 432 433 return (0); 434 } 435 436 int 437 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 438 { 439 int error; 440 441 error = grab_mcontext(td, mcp, flags); 442 if (error == 0) { 443 PROC_LOCK(curthread->td_proc); 444 mcp->mc_onstack = sigonstack(td->td_frame->fixreg[1]); 445 PROC_UNLOCK(curthread->td_proc); 446 } 447 448 return (error); 449 } 450 451 int 452 set_mcontext(struct thread *td, mcontext_t *mcp) 453 { 454 struct pcb *pcb; 455 struct trapframe *tf; 456 register_t tls; 457 int i; 458 459 pcb = td->td_pcb; 460 tf = td->td_frame; 461 462 if (mcp->mc_vers != _MC_VERSION || mcp->mc_len != sizeof(*mcp)) 463 return (EINVAL); 464 465 /* 466 * Don't let the user set privileged MSR bits 467 */ 468 if ((mcp->mc_srr1 & psl_userstatic) != (tf->srr1 & psl_userstatic)) { 469 return (EINVAL); 470 } 471 472 /* Copy trapframe, preserving TLS pointer across context change */ 473 if (SV_PROC_FLAG(td->td_proc, SV_LP64)) 474 tls = tf->fixreg[13]; 475 else 476 tls = tf->fixreg[2]; 477 memcpy(tf, mcp->mc_frame, sizeof(mcp->mc_frame)); 478 if (SV_PROC_FLAG(td->td_proc, SV_LP64)) 479 tf->fixreg[13] = tls; 480 else 481 tf->fixreg[2] = tls; 482 483 /* Disable FPU */ 484 tf->srr1 &= ~PSL_FP; 485 pcb->pcb_flags &= ~PCB_FPU; 486 487 if (mcp->mc_flags & _MC_FP_VALID) { 488 /* enable_fpu() will happen lazily on a fault */ 489 pcb->pcb_flags |= PCB_FPREGS; 490 memcpy(&pcb->pcb_fpu.fpscr, &mcp->mc_fpscr, sizeof(double)); 491 bzero(pcb->pcb_fpu.fpr, sizeof(pcb->pcb_fpu.fpr)); 492 for (i = 0; i < 32; i++) { 493 memcpy(&pcb->pcb_fpu.fpr[i].fpr, &mcp->mc_fpreg[i], 494 sizeof(double)); 495 memcpy(&pcb->pcb_fpu.fpr[i].vsr[2], 496 &mcp->mc_vsxfpreg[i], sizeof(double)); 497 } 498 } 499 500 if (mcp->mc_flags & _MC_AV_VALID) { 501 if ((pcb->pcb_flags & PCB_VEC) != PCB_VEC) { 502 critical_enter(); 503 enable_vec(td); 504 critical_exit(); 505 } 506 pcb->pcb_vec.vscr = mcp->mc_vscr; 507 pcb->pcb_vec.vrsave = mcp->mc_vrsave; 508 memcpy(pcb->pcb_vec.vr, mcp->mc_avec, sizeof(mcp->mc_avec)); 509 } 510 511 return (0); 512 } 513 514 /* 515 * Clean up extra POWER state. Some per-process registers and states are not 516 * managed by the MSR, so must be cleaned up explicitly on thread exit. 517 * 518 * Currently this includes: 519 * DSCR -- Data stream control register (PowerISA 2.06+) 520 * FSCR -- Facility Status and Control Register (PowerISA 2.07+) 521 */ 522 static void 523 cleanup_power_extras(struct thread *td) 524 { 525 uint32_t pcb_flags; 526 527 if (td != curthread) 528 return; 529 530 pcb_flags = td->td_pcb->pcb_flags; 531 /* Clean up registers not managed by MSR. */ 532 if (pcb_flags & PCB_CFSCR) 533 mtspr(SPR_FSCR, 0); 534 if (pcb_flags & PCB_CDSCR) 535 mtspr(SPR_DSCRP, 0); 536 } 537 538 /* 539 * Set set up registers on exec. 540 */ 541 void 542 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 543 { 544 struct trapframe *tf; 545 register_t argc; 546 547 tf = trapframe(td); 548 bzero(tf, sizeof *tf); 549 #ifdef __powerpc64__ 550 tf->fixreg[1] = -roundup(-stack + 48, 16); 551 #else 552 tf->fixreg[1] = -roundup(-stack + 8, 16); 553 #endif 554 555 /* 556 * Set up arguments for _start(): 557 * _start(argc, argv, envp, obj, cleanup, ps_strings); 558 * 559 * Notes: 560 * - obj and cleanup are the auxilliary and termination 561 * vectors. They are fixed up by ld.elf_so. 562 * - ps_strings is a NetBSD extention, and will be 563 * ignored by executables which are strictly 564 * compliant with the SVR4 ABI. 565 */ 566 567 /* Collect argc from the user stack */ 568 argc = fuword((void *)stack); 569 570 tf->fixreg[3] = argc; 571 tf->fixreg[4] = stack + sizeof(register_t); 572 tf->fixreg[5] = stack + (2 + argc)*sizeof(register_t); 573 tf->fixreg[6] = 0; /* auxillary vector */ 574 tf->fixreg[7] = 0; /* termination vector */ 575 tf->fixreg[8] = (register_t)imgp->ps_strings; /* NetBSD extension */ 576 577 tf->srr0 = imgp->entry_addr; 578 #ifdef __powerpc64__ 579 tf->fixreg[12] = imgp->entry_addr; 580 #endif 581 tf->srr1 = psl_userset | PSL_FE_DFLT; 582 cleanup_power_extras(td); 583 td->td_pcb->pcb_flags = 0; 584 } 585 586 #ifdef COMPAT_FREEBSD32 587 void 588 ppc32_setregs(struct thread *td, struct image_params *imgp, u_long stack) 589 { 590 struct trapframe *tf; 591 uint32_t argc; 592 593 tf = trapframe(td); 594 bzero(tf, sizeof *tf); 595 tf->fixreg[1] = -roundup(-stack + 8, 16); 596 597 argc = fuword32((void *)stack); 598 599 tf->fixreg[3] = argc; 600 tf->fixreg[4] = stack + sizeof(uint32_t); 601 tf->fixreg[5] = stack + (2 + argc)*sizeof(uint32_t); 602 tf->fixreg[6] = 0; /* auxillary vector */ 603 tf->fixreg[7] = 0; /* termination vector */ 604 tf->fixreg[8] = (register_t)imgp->ps_strings; /* NetBSD extension */ 605 606 tf->srr0 = imgp->entry_addr; 607 tf->srr1 = psl_userset32 | PSL_FE_DFLT; 608 cleanup_power_extras(td); 609 td->td_pcb->pcb_flags = 0; 610 } 611 #endif 612 613 int 614 fill_regs(struct thread *td, struct reg *regs) 615 { 616 struct trapframe *tf; 617 618 tf = td->td_frame; 619 memcpy(regs, tf, sizeof(struct reg)); 620 621 return (0); 622 } 623 624 int 625 fill_dbregs(struct thread *td, struct dbreg *dbregs) 626 { 627 /* No debug registers on PowerPC */ 628 return (ENOSYS); 629 } 630 631 int 632 fill_fpregs(struct thread *td, struct fpreg *fpregs) 633 { 634 struct pcb *pcb; 635 int i; 636 637 pcb = td->td_pcb; 638 639 if ((pcb->pcb_flags & PCB_FPREGS) == 0) 640 memset(fpregs, 0, sizeof(struct fpreg)); 641 else { 642 memcpy(&fpregs->fpscr, &pcb->pcb_fpu.fpscr, sizeof(double)); 643 for (i = 0; i < 32; i++) 644 memcpy(&fpregs->fpreg[i], &pcb->pcb_fpu.fpr[i].fpr, 645 sizeof(double)); 646 } 647 648 return (0); 649 } 650 651 int 652 set_regs(struct thread *td, struct reg *regs) 653 { 654 struct trapframe *tf; 655 656 tf = td->td_frame; 657 memcpy(tf, regs, sizeof(struct reg)); 658 659 return (0); 660 } 661 662 int 663 set_dbregs(struct thread *td, struct dbreg *dbregs) 664 { 665 /* No debug registers on PowerPC */ 666 return (ENOSYS); 667 } 668 669 int 670 set_fpregs(struct thread *td, struct fpreg *fpregs) 671 { 672 struct pcb *pcb; 673 int i; 674 675 pcb = td->td_pcb; 676 pcb->pcb_flags |= PCB_FPREGS; 677 memcpy(&pcb->pcb_fpu.fpscr, &fpregs->fpscr, sizeof(double)); 678 for (i = 0; i < 32; i++) { 679 memcpy(&pcb->pcb_fpu.fpr[i].fpr, &fpregs->fpreg[i], 680 sizeof(double)); 681 } 682 683 return (0); 684 } 685 686 #ifdef COMPAT_FREEBSD32 687 int 688 set_regs32(struct thread *td, struct reg32 *regs) 689 { 690 struct trapframe *tf; 691 int i; 692 693 tf = td->td_frame; 694 for (i = 0; i < 32; i++) 695 tf->fixreg[i] = regs->fixreg[i]; 696 tf->lr = regs->lr; 697 tf->cr = regs->cr; 698 tf->xer = regs->xer; 699 tf->ctr = regs->ctr; 700 tf->srr0 = regs->pc; 701 702 return (0); 703 } 704 705 int 706 fill_regs32(struct thread *td, struct reg32 *regs) 707 { 708 struct trapframe *tf; 709 int i; 710 711 tf = td->td_frame; 712 for (i = 0; i < 32; i++) 713 regs->fixreg[i] = tf->fixreg[i]; 714 regs->lr = tf->lr; 715 regs->cr = tf->cr; 716 regs->xer = tf->xer; 717 regs->ctr = tf->ctr; 718 regs->pc = tf->srr0; 719 720 return (0); 721 } 722 723 static int 724 grab_mcontext32(struct thread *td, mcontext32_t *mcp, int flags) 725 { 726 mcontext_t mcp64; 727 int i, error; 728 729 error = grab_mcontext(td, &mcp64, flags); 730 if (error != 0) 731 return (error); 732 733 mcp->mc_vers = mcp64.mc_vers; 734 mcp->mc_flags = mcp64.mc_flags; 735 mcp->mc_onstack = mcp64.mc_onstack; 736 mcp->mc_len = mcp64.mc_len; 737 memcpy(mcp->mc_avec,mcp64.mc_avec,sizeof(mcp64.mc_avec)); 738 memcpy(mcp->mc_av,mcp64.mc_av,sizeof(mcp64.mc_av)); 739 for (i = 0; i < 42; i++) 740 mcp->mc_frame[i] = mcp64.mc_frame[i]; 741 memcpy(mcp->mc_fpreg,mcp64.mc_fpreg,sizeof(mcp64.mc_fpreg)); 742 memcpy(mcp->mc_vsxfpreg,mcp64.mc_vsxfpreg,sizeof(mcp64.mc_vsxfpreg)); 743 744 return (0); 745 } 746 747 static int 748 get_mcontext32(struct thread *td, mcontext32_t *mcp, int flags) 749 { 750 int error; 751 752 error = grab_mcontext32(td, mcp, flags); 753 if (error == 0) { 754 PROC_LOCK(curthread->td_proc); 755 mcp->mc_onstack = sigonstack(td->td_frame->fixreg[1]); 756 PROC_UNLOCK(curthread->td_proc); 757 } 758 759 return (error); 760 } 761 762 static int 763 set_mcontext32(struct thread *td, mcontext32_t *mcp) 764 { 765 mcontext_t mcp64; 766 int i, error; 767 768 mcp64.mc_vers = mcp->mc_vers; 769 mcp64.mc_flags = mcp->mc_flags; 770 mcp64.mc_onstack = mcp->mc_onstack; 771 mcp64.mc_len = mcp->mc_len; 772 memcpy(mcp64.mc_avec,mcp->mc_avec,sizeof(mcp64.mc_avec)); 773 memcpy(mcp64.mc_av,mcp->mc_av,sizeof(mcp64.mc_av)); 774 for (i = 0; i < 42; i++) 775 mcp64.mc_frame[i] = mcp->mc_frame[i]; 776 mcp64.mc_srr1 |= (td->td_frame->srr1 & 0xFFFFFFFF00000000ULL); 777 memcpy(mcp64.mc_fpreg,mcp->mc_fpreg,sizeof(mcp64.mc_fpreg)); 778 memcpy(mcp64.mc_vsxfpreg,mcp->mc_vsxfpreg,sizeof(mcp64.mc_vsxfpreg)); 779 780 error = set_mcontext(td, &mcp64); 781 782 return (error); 783 } 784 #endif 785 786 #ifdef COMPAT_FREEBSD32 787 int 788 freebsd32_sigreturn(struct thread *td, struct freebsd32_sigreturn_args *uap) 789 { 790 ucontext32_t uc; 791 int error; 792 793 CTR2(KTR_SIG, "sigreturn: td=%p ucp=%p", td, uap->sigcntxp); 794 795 if (copyin(uap->sigcntxp, &uc, sizeof(uc)) != 0) { 796 CTR1(KTR_SIG, "sigreturn: efault td=%p", td); 797 return (EFAULT); 798 } 799 800 error = set_mcontext32(td, &uc.uc_mcontext); 801 if (error != 0) 802 return (error); 803 804 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 805 806 CTR3(KTR_SIG, "sigreturn: return td=%p pc=%#x sp=%#x", 807 td, uc.uc_mcontext.mc_srr0, uc.uc_mcontext.mc_gpr[1]); 808 809 return (EJUSTRETURN); 810 } 811 812 /* 813 * The first two fields of a ucontext_t are the signal mask and the machine 814 * context. The next field is uc_link; we want to avoid destroying the link 815 * when copying out contexts. 816 */ 817 #define UC32_COPY_SIZE offsetof(ucontext32_t, uc_link) 818 819 int 820 freebsd32_getcontext(struct thread *td, struct freebsd32_getcontext_args *uap) 821 { 822 ucontext32_t uc; 823 int ret; 824 825 if (uap->ucp == NULL) 826 ret = EINVAL; 827 else { 828 bzero(&uc, sizeof(uc)); 829 get_mcontext32(td, &uc.uc_mcontext, GET_MC_CLEAR_RET); 830 PROC_LOCK(td->td_proc); 831 uc.uc_sigmask = td->td_sigmask; 832 PROC_UNLOCK(td->td_proc); 833 ret = copyout(&uc, uap->ucp, UC32_COPY_SIZE); 834 } 835 return (ret); 836 } 837 838 int 839 freebsd32_setcontext(struct thread *td, struct freebsd32_setcontext_args *uap) 840 { 841 ucontext32_t uc; 842 int ret; 843 844 if (uap->ucp == NULL) 845 ret = EINVAL; 846 else { 847 ret = copyin(uap->ucp, &uc, UC32_COPY_SIZE); 848 if (ret == 0) { 849 ret = set_mcontext32(td, &uc.uc_mcontext); 850 if (ret == 0) { 851 kern_sigprocmask(td, SIG_SETMASK, 852 &uc.uc_sigmask, NULL, 0); 853 } 854 } 855 } 856 return (ret == 0 ? EJUSTRETURN : ret); 857 } 858 859 int 860 freebsd32_swapcontext(struct thread *td, struct freebsd32_swapcontext_args *uap) 861 { 862 ucontext32_t uc; 863 int ret; 864 865 if (uap->oucp == NULL || uap->ucp == NULL) 866 ret = EINVAL; 867 else { 868 bzero(&uc, sizeof(uc)); 869 get_mcontext32(td, &uc.uc_mcontext, GET_MC_CLEAR_RET); 870 PROC_LOCK(td->td_proc); 871 uc.uc_sigmask = td->td_sigmask; 872 PROC_UNLOCK(td->td_proc); 873 ret = copyout(&uc, uap->oucp, UC32_COPY_SIZE); 874 if (ret == 0) { 875 ret = copyin(uap->ucp, &uc, UC32_COPY_SIZE); 876 if (ret == 0) { 877 ret = set_mcontext32(td, &uc.uc_mcontext); 878 if (ret == 0) { 879 kern_sigprocmask(td, SIG_SETMASK, 880 &uc.uc_sigmask, NULL, 0); 881 } 882 } 883 } 884 } 885 return (ret == 0 ? EJUSTRETURN : ret); 886 } 887 888 #endif 889 890 void 891 cpu_set_syscall_retval(struct thread *td, int error) 892 { 893 struct proc *p; 894 struct trapframe *tf; 895 int fixup; 896 897 if (error == EJUSTRETURN) 898 return; 899 900 p = td->td_proc; 901 tf = td->td_frame; 902 903 if (tf->fixreg[0] == SYS___syscall && 904 (SV_PROC_FLAG(p, SV_ILP32))) { 905 int code = tf->fixreg[FIRSTARG + 1]; 906 fixup = ( 907 #if defined(COMPAT_FREEBSD6) && defined(SYS_freebsd6_lseek) 908 code != SYS_freebsd6_lseek && 909 #endif 910 code != SYS_lseek) ? 1 : 0; 911 } else 912 fixup = 0; 913 914 switch (error) { 915 case 0: 916 if (fixup) { 917 /* 918 * 64-bit return, 32-bit syscall. Fixup byte order 919 */ 920 tf->fixreg[FIRSTARG] = 0; 921 tf->fixreg[FIRSTARG + 1] = td->td_retval[0]; 922 } else { 923 tf->fixreg[FIRSTARG] = td->td_retval[0]; 924 tf->fixreg[FIRSTARG + 1] = td->td_retval[1]; 925 } 926 tf->cr &= ~0x10000000; /* Unset summary overflow */ 927 break; 928 case ERESTART: 929 /* 930 * Set user's pc back to redo the system call. 931 */ 932 tf->srr0 -= 4; 933 break; 934 default: 935 tf->fixreg[FIRSTARG] = SV_ABI_ERRNO(p, error); 936 tf->cr |= 0x10000000; /* Set summary overflow */ 937 break; 938 } 939 } 940 941 /* 942 * Threading functions 943 */ 944 void 945 cpu_thread_exit(struct thread *td) 946 { 947 cleanup_power_extras(td); 948 } 949 950 void 951 cpu_thread_clean(struct thread *td) 952 { 953 } 954 955 void 956 cpu_thread_alloc(struct thread *td) 957 { 958 struct pcb *pcb; 959 960 pcb = (struct pcb *)((td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 961 sizeof(struct pcb)) & ~0x2fUL); 962 td->td_pcb = pcb; 963 td->td_frame = (struct trapframe *)pcb - 1; 964 } 965 966 void 967 cpu_thread_free(struct thread *td) 968 { 969 } 970 971 int 972 cpu_set_user_tls(struct thread *td, void *tls_base) 973 { 974 975 if (SV_PROC_FLAG(td->td_proc, SV_LP64)) 976 td->td_frame->fixreg[13] = (register_t)tls_base + 0x7010; 977 else 978 td->td_frame->fixreg[2] = (register_t)tls_base + 0x7008; 979 return (0); 980 } 981 982 void 983 cpu_copy_thread(struct thread *td, struct thread *td0) 984 { 985 struct pcb *pcb2; 986 struct trapframe *tf; 987 struct callframe *cf; 988 989 pcb2 = td->td_pcb; 990 991 /* Copy the upcall pcb */ 992 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); 993 994 /* Create a stack for the new thread */ 995 tf = td->td_frame; 996 bcopy(td0->td_frame, tf, sizeof(struct trapframe)); 997 tf->fixreg[FIRSTARG] = 0; 998 tf->fixreg[FIRSTARG + 1] = 0; 999 tf->cr &= ~0x10000000; 1000 1001 /* Set registers for trampoline to user mode. */ 1002 cf = (struct callframe *)tf - 1; 1003 memset(cf, 0, sizeof(struct callframe)); 1004 cf->cf_func = (register_t)fork_return; 1005 cf->cf_arg0 = (register_t)td; 1006 cf->cf_arg1 = (register_t)tf; 1007 1008 pcb2->pcb_sp = (register_t)cf; 1009 #if defined(__powerpc64__) && (!defined(_CALL_ELF) || _CALL_ELF == 1) 1010 pcb2->pcb_lr = ((register_t *)fork_trampoline)[0]; 1011 pcb2->pcb_toc = ((register_t *)fork_trampoline)[1]; 1012 #else 1013 pcb2->pcb_lr = (register_t)fork_trampoline; 1014 pcb2->pcb_context[0] = pcb2->pcb_lr; 1015 #endif 1016 pcb2->pcb_cpu.aim.usr_vsid = 0; 1017 #ifdef __SPE__ 1018 pcb2->pcb_vec.vscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | 1019 SPEFSCR_FUNFE | SPEFSCR_FOVFE; 1020 #endif 1021 1022 /* Setup to release spin count in fork_exit(). */ 1023 td->td_md.md_spinlock_count = 1; 1024 td->td_md.md_saved_msr = psl_kernset; 1025 } 1026 1027 void 1028 cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg, 1029 stack_t *stack) 1030 { 1031 struct trapframe *tf; 1032 uintptr_t sp; 1033 1034 tf = td->td_frame; 1035 /* align stack and alloc space for frame ptr and saved LR */ 1036 #ifdef __powerpc64__ 1037 sp = ((uintptr_t)stack->ss_sp + stack->ss_size - 48) & 1038 ~0x1f; 1039 #else 1040 sp = ((uintptr_t)stack->ss_sp + stack->ss_size - 8) & 1041 ~0x1f; 1042 #endif 1043 bzero(tf, sizeof(struct trapframe)); 1044 1045 tf->fixreg[1] = (register_t)sp; 1046 tf->fixreg[3] = (register_t)arg; 1047 if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) { 1048 tf->srr0 = (register_t)entry; 1049 #ifdef __powerpc64__ 1050 tf->srr1 = psl_userset32 | PSL_FE_DFLT; 1051 #else 1052 tf->srr1 = psl_userset | PSL_FE_DFLT; 1053 #endif 1054 } else { 1055 #ifdef __powerpc64__ 1056 if (td->td_proc->p_sysent == &elf64_freebsd_sysvec_v2) { 1057 tf->srr0 = (register_t)entry; 1058 /* ELFv2 ABI requires that the global entry point be in r12. */ 1059 tf->fixreg[12] = (register_t)entry; 1060 } 1061 else { 1062 register_t entry_desc[3]; 1063 (void)copyin((void *)entry, entry_desc, sizeof(entry_desc)); 1064 tf->srr0 = entry_desc[0]; 1065 tf->fixreg[2] = entry_desc[1]; 1066 tf->fixreg[11] = entry_desc[2]; 1067 } 1068 tf->srr1 = psl_userset | PSL_FE_DFLT; 1069 #endif 1070 } 1071 1072 td->td_pcb->pcb_flags = 0; 1073 #ifdef __SPE__ 1074 td->td_pcb->pcb_vec.vscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | 1075 SPEFSCR_FUNFE | SPEFSCR_FOVFE; 1076 #endif 1077 1078 td->td_retval[0] = (register_t)entry; 1079 td->td_retval[1] = 0; 1080 } 1081 1082 static int 1083 emulate_mfspr(int spr, int reg, struct trapframe *frame){ 1084 struct thread *td; 1085 1086 td = curthread; 1087 1088 if (spr == SPR_DSCR || spr == SPR_DSCRP) { 1089 // If DSCR was never set, get the default DSCR 1090 if ((td->td_pcb->pcb_flags & PCB_CDSCR) == 0) 1091 td->td_pcb->pcb_dscr = mfspr(SPR_DSCRP); 1092 1093 frame->fixreg[reg] = td->td_pcb->pcb_dscr; 1094 frame->srr0 += 4; 1095 return 0; 1096 } else 1097 return SIGILL; 1098 } 1099 1100 static int 1101 emulate_mtspr(int spr, int reg, struct trapframe *frame){ 1102 struct thread *td; 1103 1104 td = curthread; 1105 1106 if (spr == SPR_DSCR || spr == SPR_DSCRP) { 1107 td->td_pcb->pcb_flags |= PCB_CDSCR; 1108 td->td_pcb->pcb_dscr = frame->fixreg[reg]; 1109 mtspr(SPR_DSCRP, frame->fixreg[reg]); 1110 frame->srr0 += 4; 1111 return 0; 1112 } else 1113 return SIGILL; 1114 } 1115 1116 #define XFX 0xFC0007FF 1117 int 1118 ppc_instr_emulate(struct trapframe *frame, struct thread *td) 1119 { 1120 struct pcb *pcb; 1121 uint32_t instr; 1122 int reg, sig; 1123 int rs, spr; 1124 1125 instr = fuword32((void *)frame->srr0); 1126 sig = SIGILL; 1127 1128 if ((instr & 0xfc1fffff) == 0x7c1f42a6) { /* mfpvr */ 1129 reg = (instr & ~0xfc1fffff) >> 21; 1130 frame->fixreg[reg] = mfpvr(); 1131 frame->srr0 += 4; 1132 return (0); 1133 } else if ((instr & XFX) == 0x7c0002a6) { /* mfspr */ 1134 rs = (instr & 0x3e00000) >> 21; 1135 spr = (instr & 0x1ff800) >> 16; 1136 return emulate_mfspr(spr, rs, frame); 1137 } else if ((instr & XFX) == 0x7c0003a6) { /* mtspr */ 1138 rs = (instr & 0x3e00000) >> 21; 1139 spr = (instr & 0x1ff800) >> 16; 1140 return emulate_mtspr(spr, rs, frame); 1141 } else if ((instr & 0xfc000ffe) == 0x7c0004ac) { /* various sync */ 1142 powerpc_sync(); /* Do a heavy-weight sync */ 1143 frame->srr0 += 4; 1144 return (0); 1145 } 1146 1147 pcb = td->td_pcb; 1148 #ifdef FPU_EMU 1149 if (!(pcb->pcb_flags & PCB_FPREGS)) { 1150 bzero(&pcb->pcb_fpu, sizeof(pcb->pcb_fpu)); 1151 pcb->pcb_flags |= PCB_FPREGS; 1152 } else if (pcb->pcb_flags & PCB_FPU) 1153 save_fpu(td); 1154 sig = fpu_emulate(frame, &pcb->pcb_fpu); 1155 if ((sig == 0 || sig == SIGFPE) && pcb->pcb_flags & PCB_FPU) 1156 enable_fpu(td); 1157 #endif 1158 if (sig == SIGILL) { 1159 if (pcb->pcb_lastill != frame->srr0) { 1160 /* Allow a second chance, in case of cache sync issues. */ 1161 sig = 0; 1162 pmap_sync_icache(PCPU_GET(curpmap), frame->srr0, 4); 1163 pcb->pcb_lastill = frame->srr0; 1164 } 1165 } 1166 1167 return (sig); 1168 } 1169 1170