1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2008 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/ktr.h> 36 #include <sys/bus.h> 37 #include <sys/cpuset.h> 38 #include <sys/lock.h> 39 #include <sys/malloc.h> 40 #include <sys/mutex.h> 41 #include <sys/pcpu.h> 42 #include <sys/proc.h> 43 #include <sys/sched.h> 44 #include <sys/smp.h> 45 46 #include <vm/vm.h> 47 #include <vm/vm_param.h> 48 #include <vm/pmap.h> 49 #include <vm/vm_map.h> 50 #include <vm/vm_extern.h> 51 #include <vm/vm_kern.h> 52 53 #include <machine/bus.h> 54 #include <machine/cpu.h> 55 #include <machine/intr_machdep.h> 56 #include <machine/pcb.h> 57 #include <machine/platform.h> 58 #include <machine/md_var.h> 59 #include <machine/setjmp.h> 60 #include <machine/smp.h> 61 62 #include "pic_if.h" 63 64 volatile static int ap_awake; 65 volatile static u_int ap_letgo; 66 volatile static u_quad_t ap_timebase; 67 static u_int ipi_msg_cnt[32]; 68 static struct mtx ap_boot_mtx; 69 struct pcb stoppcbs[MAXCPU]; 70 71 void 72 machdep_ap_bootstrap(void) 73 { 74 75 PCPU_SET(awake, 1); 76 __asm __volatile("msync; isync"); 77 78 while (ap_letgo == 0) 79 nop_prio_vlow(); 80 nop_prio_medium(); 81 82 /* 83 * Set timebase as soon as possible to meet an implicit rendezvous 84 * from cpu_mp_unleash(), which sets ap_letgo and then immediately 85 * sets timebase. 86 * 87 * Note that this is instrinsically racy and is only relevant on 88 * platforms that do not support better mechanisms. 89 */ 90 platform_smp_timebase_sync(ap_timebase, 1); 91 92 /* Give platform code a chance to do anything else necessary */ 93 platform_smp_ap_init(); 94 95 /* Initialize decrementer */ 96 decr_ap_init(); 97 98 /* Serialize console output and AP count increment */ 99 mtx_lock_spin(&ap_boot_mtx); 100 ap_awake++; 101 if (bootverbose) 102 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid)); 103 else 104 printf("%s%d%s", ap_awake == 2 ? "Launching APs: " : "", 105 PCPU_GET(cpuid), ap_awake == mp_ncpus ? "\n" : " "); 106 mtx_unlock_spin(&ap_boot_mtx); 107 108 while(smp_started == 0) 109 ; 110 111 /* Start per-CPU event timers. */ 112 cpu_initclocks_ap(); 113 114 /* Announce ourselves awake, and enter the scheduler */ 115 sched_throw(NULL); 116 } 117 118 void 119 cpu_mp_setmaxid(void) 120 { 121 struct cpuref cpuref; 122 int error; 123 124 mp_ncpus = 0; 125 mp_maxid = 0; 126 error = platform_smp_first_cpu(&cpuref); 127 while (!error) { 128 mp_ncpus++; 129 mp_maxid = max(cpuref.cr_cpuid, mp_maxid); 130 error = platform_smp_next_cpu(&cpuref); 131 } 132 /* Sanity. */ 133 if (mp_ncpus == 0) 134 mp_ncpus = 1; 135 } 136 137 int 138 cpu_mp_probe(void) 139 { 140 141 /* 142 * We're not going to enable SMP if there's only 1 processor. 143 */ 144 return (mp_ncpus > 1); 145 } 146 147 void 148 cpu_mp_start(void) 149 { 150 struct cpuref bsp, cpu; 151 struct pcpu *pc; 152 int error; 153 154 error = platform_smp_get_bsp(&bsp); 155 KASSERT(error == 0, ("Don't know BSP")); 156 157 error = platform_smp_first_cpu(&cpu); 158 while (!error) { 159 if (cpu.cr_cpuid >= MAXCPU) { 160 printf("SMP: cpu%d: skipped -- ID out of range\n", 161 cpu.cr_cpuid); 162 goto next; 163 } 164 if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) { 165 printf("SMP: cpu%d: skipped - duplicate ID\n", 166 cpu.cr_cpuid); 167 goto next; 168 } 169 if (cpu.cr_cpuid != bsp.cr_cpuid) { 170 void *dpcpu; 171 172 pc = &__pcpu[cpu.cr_cpuid]; 173 dpcpu = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | 174 M_ZERO); 175 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc)); 176 dpcpu_init(dpcpu, cpu.cr_cpuid); 177 } else { 178 pc = pcpup; 179 pc->pc_cpuid = bsp.cr_cpuid; 180 pc->pc_bsp = 1; 181 } 182 pc->pc_hwref = cpu.cr_hwref; 183 184 if (vm_ndomains > 1) 185 pc->pc_domain = cpu.cr_domain; 186 else 187 pc->pc_domain = 0; 188 189 CPU_SET(pc->pc_cpuid, &cpuset_domain[pc->pc_domain]); 190 KASSERT(pc->pc_domain < MAXMEMDOM, ("bad domain value %d\n", 191 pc->pc_domain)); 192 CPU_SET(pc->pc_cpuid, &all_cpus); 193 next: 194 error = platform_smp_next_cpu(&cpu); 195 } 196 197 #ifdef SMP 198 platform_smp_probe_threads(); 199 #endif 200 } 201 202 void 203 cpu_mp_announce(void) 204 { 205 struct pcpu *pc; 206 int i; 207 208 if (!bootverbose) 209 return; 210 211 CPU_FOREACH(i) { 212 pc = pcpu_find(i); 213 if (pc == NULL) 214 continue; 215 printf("cpu%d: dev=%x domain=%d ", i, (int)pc->pc_hwref, pc->pc_domain); 216 if (pc->pc_bsp) 217 printf(" (BSP)"); 218 printf("\n"); 219 } 220 } 221 222 static void 223 cpu_mp_unleash(void *dummy) 224 { 225 struct pcpu *pc; 226 int cpus, timeout; 227 int ret; 228 229 if (mp_ncpus <= 1) 230 return; 231 232 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); 233 234 cpus = 0; 235 smp_cpus = 0; 236 #ifdef BOOKE 237 tlb1_ap_prep(); 238 #endif 239 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 240 cpus++; 241 if (!pc->pc_bsp) { 242 if (bootverbose) 243 printf("Waking up CPU %d (dev=%x)\n", 244 pc->pc_cpuid, (int)pc->pc_hwref); 245 246 ret = platform_smp_start_cpu(pc); 247 if (ret == 0) { 248 timeout = 2000; /* wait 2sec for the AP */ 249 while (!pc->pc_awake && --timeout > 0) 250 DELAY(1000); 251 } 252 } else { 253 pc->pc_awake = 1; 254 } 255 if (pc->pc_awake) { 256 if (bootverbose) 257 printf("Adding CPU %d, hwref=%jx, awake=%x\n", 258 pc->pc_cpuid, (uintmax_t)pc->pc_hwref, 259 pc->pc_awake); 260 smp_cpus++; 261 } else 262 CPU_SET(pc->pc_cpuid, &stopped_cpus); 263 } 264 265 ap_awake = 1; 266 267 /* Provide our current DEC and TB values for APs */ 268 ap_timebase = mftb() + 10; 269 __asm __volatile("msync; isync"); 270 271 /* Let APs continue */ 272 atomic_store_rel_int(&ap_letgo, 1); 273 274 platform_smp_timebase_sync(ap_timebase, 0); 275 276 while (ap_awake < smp_cpus) 277 ; 278 279 if (smp_cpus != cpus || cpus != mp_ncpus) { 280 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n", 281 mp_ncpus, cpus, smp_cpus); 282 } 283 284 if (smp_cpus > 1) 285 atomic_store_rel_int(&smp_started, 1); 286 287 /* Let the APs get into the scheduler */ 288 DELAY(10000); 289 290 } 291 292 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL); 293 294 int 295 powerpc_ipi_handler(void *arg) 296 { 297 u_int cpuid; 298 uint32_t ipimask; 299 int msg; 300 301 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr()); 302 303 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask)); 304 if (ipimask == 0) 305 return (FILTER_STRAY); 306 while ((msg = ffs(ipimask) - 1) != -1) { 307 ipimask &= ~(1u << msg); 308 ipi_msg_cnt[msg]++; 309 switch (msg) { 310 case IPI_AST: 311 CTR1(KTR_SMP, "%s: IPI_AST", __func__); 312 break; 313 case IPI_PREEMPT: 314 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__); 315 sched_preempt(curthread); 316 break; 317 case IPI_RENDEZVOUS: 318 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__); 319 smp_rendezvous_action(); 320 break; 321 case IPI_STOP: 322 323 /* 324 * IPI_STOP_HARD is mapped to IPI_STOP so it is not 325 * necessary to add such case in the switch. 326 */ 327 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)", 328 __func__); 329 cpuid = PCPU_GET(cpuid); 330 savectx(&stoppcbs[cpuid]); 331 savectx(PCPU_GET(curpcb)); 332 CPU_SET_ATOMIC(cpuid, &stopped_cpus); 333 while (!CPU_ISSET(cpuid, &started_cpus)) 334 cpu_spinwait(); 335 CPU_CLR_ATOMIC(cpuid, &stopped_cpus); 336 CPU_CLR_ATOMIC(cpuid, &started_cpus); 337 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__); 338 break; 339 case IPI_HARDCLOCK: 340 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); 341 hardclockintr(); 342 break; 343 } 344 } 345 346 return (FILTER_HANDLED); 347 } 348 349 static void 350 ipi_send(struct pcpu *pc, int ipi) 351 { 352 353 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__, 354 pc, pc->pc_cpuid, ipi); 355 356 atomic_set_32(&pc->pc_ipimask, (1 << ipi)); 357 powerpc_sync(); 358 PIC_IPI(root_pic, pc->pc_cpuid); 359 360 CTR1(KTR_SMP, "%s: sent", __func__); 361 } 362 363 /* Send an IPI to a set of cpus. */ 364 void 365 ipi_selected(cpuset_t cpus, int ipi) 366 { 367 struct pcpu *pc; 368 369 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 370 if (CPU_ISSET(pc->pc_cpuid, &cpus)) 371 ipi_send(pc, ipi); 372 } 373 } 374 375 /* Send an IPI to a specific CPU. */ 376 void 377 ipi_cpu(int cpu, u_int ipi) 378 { 379 380 ipi_send(cpuid_to_pcpu[cpu], ipi); 381 } 382 383 /* Send an IPI to all CPUs EXCEPT myself. */ 384 void 385 ipi_all_but_self(int ipi) 386 { 387 struct pcpu *pc; 388 389 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { 390 if (pc != pcpup) 391 ipi_send(pc, ipi); 392 } 393 } 394