1/* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */ 2 3/*- 4 * Copyright (C) 2001 Benno Rice 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 21 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 22 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26*/ 27/*- 28 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 29 * Copyright (C) 1995, 1996 TooLs GmbH. 30 * All rights reserved. 31 * 32 * Redistribution and use in source and binary forms, with or without 33 * modification, are permitted provided that the following conditions 34 * are met: 35 * 1. Redistributions of source code must retain the above copyright 36 * notice, this list of conditions and the following disclaimer. 37 * 2. Redistributions in binary form must reproduce the above copyright 38 * notice, this list of conditions and the following disclaimer in the 39 * documentation and/or other materials provided with the distribution. 40 * 3. All advertising materials mentioning features or use of this software 41 * must display the following acknowledgement: 42 * This product includes software developed by TooLs GmbH. 43 * 4. The name of TooLs GmbH may not be used to endorse or promote products 44 * derived from this software without specific prior written permission. 45 * 46 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 47 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 48 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 49 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 50 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 51 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 52 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 53 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 54 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 55 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 56 */ 57 58#include "assym.inc" 59#include "opt_sched.h" 60 61#include <sys/syscall.h> 62 63#include <machine/trap.h> 64#include <machine/spr.h> 65#include <machine/param.h> 66#include <machine/asm.h> 67 68#ifdef _CALL_ELF 69.abiversion _CALL_ELF 70#endif 71 72TOC_ENTRY(blocked_lock) 73 74/* 75 * void cpu_throw(struct thread *old, struct thread *new) 76 */ 77ENTRY(cpu_throw) 78 mr %r13, %r4 79 li %r14,0 /* Tell cpu_switchin not to release a thread */ 80 li %r18,0 /* No old pcb flags. The old thread is extinguished. */ 81 82 b cpu_switchin 83END(cpu_throw) 84 85/* 86 * void cpu_switch(struct thread *old, 87 * struct thread *new, 88 * struct mutex *mtx); 89 * 90 * Switch to a new thread saving the current state in the old thread. 91 * 92 * Internally clobbers (not visible outside of this file): 93 * r18 - old thread pcb_flags 94 * r19 - new thread pcb_flags 95 */ 96ENTRY(cpu_switch) 97 ld %r6,TD_PCB(%r3) /* Get the old thread's PCB ptr */ 98 std %r12,PCB_CONTEXT(%r6) /* Save the non-volatile GP regs. 99 These can now be used for scratch */ 100 std %r14,PCB_CONTEXT+2*8(%r6) 101 std %r15,PCB_CONTEXT+3*8(%r6) 102 std %r16,PCB_CONTEXT+4*8(%r6) 103 std %r17,PCB_CONTEXT+5*8(%r6) 104 std %r18,PCB_CONTEXT+6*8(%r6) 105 std %r19,PCB_CONTEXT+7*8(%r6) 106 std %r20,PCB_CONTEXT+8*8(%r6) 107 std %r21,PCB_CONTEXT+9*8(%r6) 108 std %r22,PCB_CONTEXT+10*8(%r6) 109 std %r23,PCB_CONTEXT+11*8(%r6) 110 std %r24,PCB_CONTEXT+12*8(%r6) 111 std %r25,PCB_CONTEXT+13*8(%r6) 112 std %r26,PCB_CONTEXT+14*8(%r6) 113 std %r27,PCB_CONTEXT+15*8(%r6) 114 std %r28,PCB_CONTEXT+16*8(%r6) 115 std %r29,PCB_CONTEXT+17*8(%r6) 116 std %r30,PCB_CONTEXT+18*8(%r6) 117 std %r31,PCB_CONTEXT+19*8(%r6) 118 119 mfcr %r16 /* Save the condition register */ 120 std %r16,PCB_CR(%r6) 121 mflr %r16 /* Save the link register */ 122 std %r16,PCB_LR(%r6) 123 std %r1,PCB_SP(%r6) /* Save the stack pointer */ 124 std %r2,PCB_TOC(%r6) /* Save the TOC pointer */ 125 126 mr %r14,%r3 /* Copy the old thread ptr... */ 127 mr %r13,%r4 /* and the new thread ptr in curthread*/ 128 mr %r16,%r5 /* and the new lock */ 129 mr %r17,%r6 /* and the PCB */ 130 131 stdu %r1,-48(%r1) 132 133 /* Keep this next section in sync with cpu_save_thread_regs()! */ 134 135 lwz %r18, PCB_FLAGS(%r17) 136 andi. %r7, %r18, PCB_CFSCR 137 beq 1f 138 mfspr %r6, SPR_FSCR 139 std %r6, PCB_FSCR(%r17) 140save_ebb: 141 andi. %r0, %r6, FSCR_EBB 142 beq save_lm 143 mfspr %r7, SPR_EBBHR 144 std %r7, PCB_EBB_EBBHR(%r17) 145 mfspr %r7, SPR_EBBRR 146 std %r7, PCB_EBB_EBBRR(%r17) 147 mfspr %r7, SPR_BESCR 148 std %r7, PCB_EBB_BESCR(%r17) 149save_lm: 150 andi. %r0, %r6, FSCR_LM 151 beq save_tar 152 mfspr %r7, SPR_LMRR 153 std %r7, PCB_LMON_LMRR(%r17) 154 mfspr %r7, SPR_LMSER 155 std %r7, PCB_LMON_LMSER(%r17) 156save_tar: 157 andi. %r0, %r6, FSCR_TAR 158 beq 1f 159 mfspr %r7, SPR_TAR 160 std %r7, PCB_TAR(%r17) 1611: 162 andi. %r7, %r18, PCB_CDSCR 163 beq .L0 164 mfspr %r6, SPR_DSCRP 165 std %r6, PCB_DSCR(%r17) 166 167.L0: 168 /* Save FPU context if needed */ 169 andi. %r7, %r18, PCB_FPU 170 beq .L1 171 bl save_fpu 172 nop 173 174.L1: 175 mr %r3,%r14 /* restore old thread ptr */ 176 /* Save Altivec context if needed */ 177 andi. %r7, %r18, PCB_VEC 178 beq .L2 179 bl save_vec 180 nop 181 182.L2: 183 mr %r3,%r14 /* restore old thread ptr */ 184 bl pmap_deactivate /* Deactivate the current pmap */ 185 nop 186 187 sync /* Make sure all of that finished */ 188 189cpu_switchin: 190#if defined(SMP) && defined(SCHED_ULE) 191 /* Wait for the new thread to become unblocked */ 192 addis %r6,%r2,TOC_REF(blocked_lock)@ha 193 ld %r6,TOC_REF(blocked_lock)@l(%r6) 194blocked_loop: 195 ld %r7,TD_LOCK(%r13) 196 cmpd %r6,%r7 197 beq- blocked_loop 198 isync 199#endif 200 201 ld %r17,TD_PCB(%r13) /* Get new PCB */ 202 ld %r1,PCB_SP(%r17) /* Load the stack pointer */ 203 addi %r1,%r1,-48 /* Remember about cpu_switch stack frame */ 204 205 /* Release old thread now that we have a stack pointer set up */ 206 cmpdi %r14,0 207 beq- 1f 208 std %r16,TD_LOCK(%r14) /* ULE: update old thread's lock */ 209 2101: mfsprg %r7,0 /* Get the pcpu pointer */ 211 std %r13,PC_CURTHREAD(%r7) /* Store new current thread */ 212 ld %r17,TD_PCB(%r13) /* Store new current PCB */ 213 std %r17,PC_CURPCB(%r7) 214 215 mr %r3,%r13 /* Get new thread ptr */ 216 bl pmap_activate /* Activate the new address space */ 217 nop 218 219 lwz %r19, PCB_FLAGS(%r17) 220 /* Restore FPU context if needed */ 221 andi. %r6, %r19, PCB_FPU 222 beq .L3 223 mr %r3,%r13 /* Pass curthread to enable_fpu */ 224 bl enable_fpu 225 nop 226 227.L3: 228 /* Restore Altivec context if needed */ 229 andi. %r6, %r19, PCB_VEC 230 beq .L31 231 mr %r3,%r13 /* Pass curthread to enable_vec */ 232 bl enable_vec 233 nop 234 235.L31: 236 /* Load custom DSCR on PowerISA 2.06+ CPUs. */ 237 /* Load changed FSCR on PowerISA 2.07+ CPUs. */ 238 or %r18,%r18,%r19 239 /* Restore Custom DSCR if needed (zeroes if in old but not new) */ 240 andi. %r6, %r18, PCB_CDSCR 241 beq .L32 242 ld %r7, PCB_DSCR(%r17) /* Load the DSCR register*/ 243 mtspr SPR_DSCRP, %r7 244.L32: 245 /* Restore FSCR if needed (zeroes if in old but not new) */ 246 andi. %r6, %r18, PCB_CFSCR 247 beq .L4 248 ld %r7, PCB_FSCR(%r17) /* Load the FSCR register*/ 249 mtspr SPR_FSCR, %r7 250restore_ebb: 251 andi. %r0, %r7, FSCR_EBB 252 beq restore_lm 253 ld %r6, PCB_EBB_EBBHR(%r17) 254 mtspr SPR_EBBHR, %r6 255 ld %r6, PCB_EBB_EBBRR(%r17) 256 mtspr SPR_EBBRR, %r6 257 ld %r6, PCB_EBB_BESCR(%r17) 258 mtspr SPR_BESCR, %r6 259restore_lm: 260 andi. %r0, %r7, FSCR_LM 261 beq restore_tar 262 ld %r6, PCB_LMON_LMRR(%r17) 263 mtspr SPR_LMRR, %r6 264 ld %r6, PCB_LMON_LMSER(%r17) 265 mtspr SPR_LMSER, %r6 266restore_tar: 267 andi. %r0, %r7, FSCR_TAR 268 beq .L4 269 ld %r6, PCB_TAR(%r17) 270 mtspr SPR_TAR, %r6 271 272 /* thread to restore is in r3 */ 273.L4: 274 addi %r1,%r1,48 275 mr %r3,%r17 /* Recover PCB ptr */ 276 ld %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs. */ 277 ld %r14,PCB_CONTEXT+2*8(%r3) 278 ld %r15,PCB_CONTEXT+3*8(%r3) 279 ld %r16,PCB_CONTEXT+4*8(%r3) 280 ld %r17,PCB_CONTEXT+5*8(%r3) 281 ld %r18,PCB_CONTEXT+6*8(%r3) 282 ld %r19,PCB_CONTEXT+7*8(%r3) 283 ld %r20,PCB_CONTEXT+8*8(%r3) 284 ld %r21,PCB_CONTEXT+9*8(%r3) 285 ld %r22,PCB_CONTEXT+10*8(%r3) 286 ld %r23,PCB_CONTEXT+11*8(%r3) 287 ld %r24,PCB_CONTEXT+12*8(%r3) 288 ld %r25,PCB_CONTEXT+13*8(%r3) 289 ld %r26,PCB_CONTEXT+14*8(%r3) 290 ld %r27,PCB_CONTEXT+15*8(%r3) 291 ld %r28,PCB_CONTEXT+16*8(%r3) 292 ld %r29,PCB_CONTEXT+17*8(%r3) 293 ld %r30,PCB_CONTEXT+18*8(%r3) 294 ld %r31,PCB_CONTEXT+19*8(%r3) 295 ld %r5,PCB_CR(%r3) /* Load the condition register */ 296 mtcr %r5 297 ld %r5,PCB_LR(%r3) /* Load the link register */ 298 mtlr %r5 299 ld %r1,PCB_SP(%r3) /* Load the stack pointer */ 300 ld %r2,PCB_TOC(%r3) /* Load the TOC pointer */ 301 302 /* 303 * Perform a dummy stdcx. to clear any reservations we may have 304 * inherited from the previous thread. It doesn't matter if the 305 * stdcx succeeds or not. pcb_context[0] can be clobbered. 306 */ 307 stdcx. %r1, 0, %r3 308 blr 309END(cpu_switch) 310 311/* 312 * savectx(pcb) 313 * Update pcb, saving current processor state 314 */ 315ENTRY(savectx) 316 std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */ 317 std %r13,PCB_CONTEXT+1*8(%r3) 318 std %r14,PCB_CONTEXT+2*8(%r3) 319 std %r15,PCB_CONTEXT+3*8(%r3) 320 std %r16,PCB_CONTEXT+4*8(%r3) 321 std %r17,PCB_CONTEXT+5*8(%r3) 322 std %r18,PCB_CONTEXT+6*8(%r3) 323 std %r19,PCB_CONTEXT+7*8(%r3) 324 std %r20,PCB_CONTEXT+8*8(%r3) 325 std %r21,PCB_CONTEXT+9*8(%r3) 326 std %r22,PCB_CONTEXT+10*8(%r3) 327 std %r23,PCB_CONTEXT+11*8(%r3) 328 std %r24,PCB_CONTEXT+12*8(%r3) 329 std %r25,PCB_CONTEXT+13*8(%r3) 330 std %r26,PCB_CONTEXT+14*8(%r3) 331 std %r27,PCB_CONTEXT+15*8(%r3) 332 std %r28,PCB_CONTEXT+16*8(%r3) 333 std %r29,PCB_CONTEXT+17*8(%r3) 334 std %r30,PCB_CONTEXT+18*8(%r3) 335 std %r31,PCB_CONTEXT+19*8(%r3) 336 337 mfcr %r4 /* Save the condition register */ 338 std %r4,PCB_CR(%r3) 339 std %r1,PCB_SP(%r3) /* Save the stack pointer */ 340 std %r2,PCB_TOC(%r3) /* Save the TOC pointer */ 341 mflr %r4 /* Save the link register */ 342 std %r4,PCB_LR(%r3) 343 blr 344END(savectx) 345 346/* 347 * fork_trampoline() 348 * Set up the return from cpu_fork() 349 */ 350 351ENTRY_NOPROF(fork_trampoline) 352 ld %r3,CF_FUNC(%r1) 353 ld %r4,CF_ARG0(%r1) 354 ld %r5,CF_ARG1(%r1) 355 356 stdu %r1,-48(%r1) 357 bl fork_exit 358 nop 359 addi %r1,%r1,48+CF_SIZE-FSP /* Allow 8 bytes in front of 360 trapframe to simulate FRAME_SETUP 361 does when allocating space for 362 a frame pointer/saved LR */ 363 bl trapexit 364 nop 365END(fork_trampoline) 366