1/* $FreeBSD$ */ 2/* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */ 3 4/*- 5 * Copyright (C) 2001 Benno Rice 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27*/ 28/*- 29 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 30 * Copyright (C) 1995, 1996 TooLs GmbH. 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by TooLs GmbH. 44 * 4. The name of TooLs GmbH may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 51 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 52 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 53 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 54 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 55 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 56 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59#include "assym.inc" 60#include "opt_sched.h" 61 62#include <sys/syscall.h> 63 64#include <machine/trap.h> 65#include <machine/spr.h> 66#include <machine/param.h> 67#include <machine/asm.h> 68 69#ifdef _CALL_ELF 70.abiversion _CALL_ELF 71#endif 72 73TOC_ENTRY(blocked_lock) 74 75/* 76 * void cpu_throw(struct thread *old, struct thread *new) 77 */ 78ENTRY(cpu_throw) 79 mr %r13, %r4 80 li %r14,0 /* Tell cpu_switchin not to release a thread */ 81 li %r18,0 /* No old pcb flags. The old thread is extinguished. */ 82 83 b cpu_switchin 84 85/* 86 * void cpu_switch(struct thread *old, 87 * struct thread *new, 88 * struct mutex *mtx); 89 * 90 * Switch to a new thread saving the current state in the old thread. 91 * 92 * Internally clobbers (not visible outside of this file): 93 * r18 - old thread pcb_flags 94 * r19 - new thread pcb_flags 95 */ 96ENTRY(cpu_switch) 97 ld %r6,TD_PCB(%r3) /* Get the old thread's PCB ptr */ 98 std %r12,PCB_CONTEXT(%r6) /* Save the non-volatile GP regs. 99 These can now be used for scratch */ 100 std %r14,PCB_CONTEXT+2*8(%r6) 101 std %r15,PCB_CONTEXT+3*8(%r6) 102 std %r16,PCB_CONTEXT+4*8(%r6) 103 std %r17,PCB_CONTEXT+5*8(%r6) 104 std %r18,PCB_CONTEXT+6*8(%r6) 105 std %r19,PCB_CONTEXT+7*8(%r6) 106 std %r20,PCB_CONTEXT+8*8(%r6) 107 std %r21,PCB_CONTEXT+9*8(%r6) 108 std %r22,PCB_CONTEXT+10*8(%r6) 109 std %r23,PCB_CONTEXT+11*8(%r6) 110 std %r24,PCB_CONTEXT+12*8(%r6) 111 std %r25,PCB_CONTEXT+13*8(%r6) 112 std %r26,PCB_CONTEXT+14*8(%r6) 113 std %r27,PCB_CONTEXT+15*8(%r6) 114 std %r28,PCB_CONTEXT+16*8(%r6) 115 std %r29,PCB_CONTEXT+17*8(%r6) 116 std %r30,PCB_CONTEXT+18*8(%r6) 117 std %r31,PCB_CONTEXT+19*8(%r6) 118 119 mfcr %r16 /* Save the condition register */ 120 std %r16,PCB_CR(%r6) 121 mflr %r16 /* Save the link register */ 122 std %r16,PCB_LR(%r6) 123 std %r1,PCB_SP(%r6) /* Save the stack pointer */ 124 std %r2,PCB_TOC(%r6) /* Save the TOC pointer */ 125 126 mr %r14,%r3 /* Copy the old thread ptr... */ 127 mr %r13,%r4 /* and the new thread ptr in curthread*/ 128 mr %r16,%r5 /* and the new lock */ 129 mr %r17,%r6 /* and the PCB */ 130 131 stdu %r1,-48(%r1) 132 133 lwz %r18, PCB_FLAGS(%r17) 134 andi. %r7, %r18, PCB_CFSCR 135 beq 1f 136 mfspr %r6, SPR_FSCR 137 std %r6, PCB_FSCR(%r17) 138save_ebb: 139 andi. %r0, %r6, FSCR_EBB 140 beq save_lm 141 mfspr %r7, SPR_EBBHR 142 std %r7, PCB_EBB_EBBHR(%r17) 143 mfspr %r7, SPR_EBBRR 144 std %r7, PCB_EBB_EBBRR(%r17) 145 mfspr %r7, SPR_BESCR 146 std %r7, PCB_EBB_BESCR(%r17) 147save_lm: 148 andi. %r0, %r6, FSCR_LM 149 beq save_tar 150 mfspr %r7, SPR_LMRR 151 std %r7, PCB_LMON_LMRR(%r17) 152 mfspr %r7, SPR_LMSER 153 std %r7, PCB_LMON_LMSER(%r17) 154save_tar: 155 andi. %r0, %r6, FSCR_TAR 156 beq 1f 157 mfspr %r7, SPR_TAR 158 std %r7, PCB_TAR(%r17) 1591: 160 andi. %r7, %r18, PCB_CDSCR 161 beq .L0 162 mfspr %r6, SPR_DSCRP 163 std %r6, PCB_DSCR(%r17) 164 165.L0: 166 /* Save FPU context if needed */ 167 andi. %r7, %r18, PCB_FPU 168 beq .L1 169 bl save_fpu 170 nop 171 172.L1: 173 mr %r3,%r14 /* restore old thread ptr */ 174 /* Save Altivec context if needed */ 175 andi. %r7, %r18, PCB_VEC 176 beq .L2 177 bl save_vec 178 nop 179 180.L2: 181 mr %r3,%r14 /* restore old thread ptr */ 182 bl pmap_deactivate /* Deactivate the current pmap */ 183 nop 184 185 sync /* Make sure all of that finished */ 186 187cpu_switchin: 188#if defined(SMP) && defined(SCHED_ULE) 189 /* Wait for the new thread to become unblocked */ 190 addis %r6,%r2,TOC_REF(blocked_lock)@ha 191 ld %r6,TOC_REF(blocked_lock)@l(%r6) 192blocked_loop: 193 ld %r7,TD_LOCK(%r13) 194 cmpd %r6,%r7 195 beq- blocked_loop 196 isync 197#endif 198 199 ld %r17,TD_PCB(%r13) /* Get new PCB */ 200 ld %r1,PCB_SP(%r17) /* Load the stack pointer */ 201 addi %r1,%r1,-48 /* Remember about cpu_switch stack frame */ 202 203 /* Release old thread now that we have a stack pointer set up */ 204 cmpdi %r14,0 205 beq- 1f 206 std %r16,TD_LOCK(%r14) /* ULE: update old thread's lock */ 207 2081: mfsprg %r7,0 /* Get the pcpu pointer */ 209 std %r13,PC_CURTHREAD(%r7) /* Store new current thread */ 210 ld %r17,TD_PCB(%r13) /* Store new current PCB */ 211 std %r17,PC_CURPCB(%r7) 212 213 mr %r3,%r13 /* Get new thread ptr */ 214 bl pmap_activate /* Activate the new address space */ 215 nop 216 217 lwz %r19, PCB_FLAGS(%r17) 218 /* Restore FPU context if needed */ 219 andi. %r6, %r19, PCB_FPU 220 beq .L3 221 mr %r3,%r13 /* Pass curthread to enable_fpu */ 222 bl enable_fpu 223 nop 224 225.L3: 226 /* Restore Altivec context if needed */ 227 andi. %r6, %r19, PCB_VEC 228 beq .L31 229 mr %r3,%r13 /* Pass curthread to enable_vec */ 230 bl enable_vec 231 nop 232 233.L31: 234 /* Load custom DSCR on PowerISA 2.06+ CPUs. */ 235 /* Load changed FSCR on PowerISA 2.07+ CPUs. */ 236 or %r18,%r18,%r19 237 /* Restore Custom DSCR if needed (zeroes if in old but not new) */ 238 andi. %r6, %r18, PCB_CDSCR 239 beq .L32 240 ld %r7, PCB_DSCR(%r17) /* Load the DSCR register*/ 241 mtspr SPR_DSCRP, %r7 242.L32: 243 /* Restore FSCR if needed (zeroes if in old but not new) */ 244 andi. %r6, %r18, PCB_CFSCR 245 beq .L4 246 ld %r7, PCB_FSCR(%r17) /* Load the FSCR register*/ 247 mtspr SPR_FSCR, %r7 248restore_ebb: 249 andi. %r0, %r7, FSCR_EBB 250 beq restore_lm 251 ld %r6, PCB_EBB_EBBHR(%r17) 252 mtspr SPR_EBBHR, %r6 253 ld %r6, PCB_EBB_EBBRR(%r17) 254 mtspr SPR_EBBRR, %r6 255 ld %r6, PCB_EBB_BESCR(%r17) 256 mtspr SPR_BESCR, %r6 257restore_lm: 258 andi. %r0, %r7, FSCR_LM 259 beq restore_tar 260 ld %r6, PCB_LMON_LMRR(%r17) 261 mtspr SPR_LMRR, %r6 262 ld %r6, PCB_LMON_LMSER(%r17) 263 mtspr SPR_LMSER, %r6 264restore_tar: 265 andi. %r0, %r7, FSCR_TAR 266 beq .L4 267 ld %r6, PCB_TAR(%r17) 268 mtspr SPR_TAR, %r6 269 270 /* thread to restore is in r3 */ 271.L4: 272 addi %r1,%r1,48 273 mr %r3,%r17 /* Recover PCB ptr */ 274 ld %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs. */ 275 ld %r14,PCB_CONTEXT+2*8(%r3) 276 ld %r15,PCB_CONTEXT+3*8(%r3) 277 ld %r16,PCB_CONTEXT+4*8(%r3) 278 ld %r17,PCB_CONTEXT+5*8(%r3) 279 ld %r18,PCB_CONTEXT+6*8(%r3) 280 ld %r19,PCB_CONTEXT+7*8(%r3) 281 ld %r20,PCB_CONTEXT+8*8(%r3) 282 ld %r21,PCB_CONTEXT+9*8(%r3) 283 ld %r22,PCB_CONTEXT+10*8(%r3) 284 ld %r23,PCB_CONTEXT+11*8(%r3) 285 ld %r24,PCB_CONTEXT+12*8(%r3) 286 ld %r25,PCB_CONTEXT+13*8(%r3) 287 ld %r26,PCB_CONTEXT+14*8(%r3) 288 ld %r27,PCB_CONTEXT+15*8(%r3) 289 ld %r28,PCB_CONTEXT+16*8(%r3) 290 ld %r29,PCB_CONTEXT+17*8(%r3) 291 ld %r30,PCB_CONTEXT+18*8(%r3) 292 ld %r31,PCB_CONTEXT+19*8(%r3) 293 ld %r5,PCB_CR(%r3) /* Load the condition register */ 294 mtcr %r5 295 ld %r5,PCB_LR(%r3) /* Load the link register */ 296 mtlr %r5 297 ld %r1,PCB_SP(%r3) /* Load the stack pointer */ 298 ld %r2,PCB_TOC(%r3) /* Load the TOC pointer */ 299 300 /* 301 * Perform a dummy stdcx. to clear any reservations we may have 302 * inherited from the previous thread. It doesn't matter if the 303 * stdcx succeeds or not. pcb_context[0] can be clobbered. 304 */ 305 stdcx. %r1, 0, %r3 306 blr 307 308/* 309 * savectx(pcb) 310 * Update pcb, saving current processor state 311 */ 312ENTRY(savectx) 313 std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */ 314 std %r13,PCB_CONTEXT+1*8(%r3) 315 std %r14,PCB_CONTEXT+2*8(%r3) 316 std %r15,PCB_CONTEXT+3*8(%r3) 317 std %r16,PCB_CONTEXT+4*8(%r3) 318 std %r17,PCB_CONTEXT+5*8(%r3) 319 std %r18,PCB_CONTEXT+6*8(%r3) 320 std %r19,PCB_CONTEXT+7*8(%r3) 321 std %r20,PCB_CONTEXT+8*8(%r3) 322 std %r21,PCB_CONTEXT+9*8(%r3) 323 std %r22,PCB_CONTEXT+10*8(%r3) 324 std %r23,PCB_CONTEXT+11*8(%r3) 325 std %r24,PCB_CONTEXT+12*8(%r3) 326 std %r25,PCB_CONTEXT+13*8(%r3) 327 std %r26,PCB_CONTEXT+14*8(%r3) 328 std %r27,PCB_CONTEXT+15*8(%r3) 329 std %r28,PCB_CONTEXT+16*8(%r3) 330 std %r29,PCB_CONTEXT+17*8(%r3) 331 std %r30,PCB_CONTEXT+18*8(%r3) 332 std %r31,PCB_CONTEXT+19*8(%r3) 333 334 mfcr %r4 /* Save the condition register */ 335 std %r4,PCB_CR(%r3) 336 std %r1,PCB_SP(%r3) /* Save the stack pointer */ 337 std %r2,PCB_TOC(%r3) /* Save the TOC pointer */ 338 mflr %r4 /* Save the link register */ 339 std %r4,PCB_LR(%r3) 340 blr 341 342/* 343 * fork_trampoline() 344 * Set up the return from cpu_fork() 345 */ 346 347ENTRY_NOPROF(fork_trampoline) 348 ld %r3,CF_FUNC(%r1) 349 ld %r4,CF_ARG0(%r1) 350 ld %r5,CF_ARG1(%r1) 351 352 stdu %r1,-48(%r1) 353 bl fork_exit 354 nop 355 addi %r1,%r1,48+CF_SIZE-FSP /* Allow 8 bytes in front of 356 trapframe to simulate FRAME_SETUP 357 does when allocating space for 358 a frame pointer/saved LR */ 359 bl trapexit 360 nop 361